Searched refs:SPORT1_MRCS3 (Results 1 - 33 of 33) sorted by relevance

/linux-4.1.27/arch/blackfin/mach-bf533/boards/
H A Dblackstamp.c307 .end = SPORT1_MRCS3+4,
H A Dcm_bf533.c334 .end = SPORT1_MRCS3+4,
H A Dstamp.c413 .end = SPORT1_MRCS3+4,
/linux-4.1.27/arch/blackfin/mach-bf537/boards/
H A Dminotaur.c452 .end = SPORT1_MRCS3+4,
H A Dtcm_bf537.c522 .end = SPORT1_MRCS3+4,
H A Dcm_bf537e.c623 .end = SPORT1_MRCS3+4,
H A Dcm_bf537u.c520 .end = SPORT1_MRCS3+4,
H A Dstamp.c2383 .end = SPORT1_MRCS3+4,
/linux-4.1.27/arch/blackfin/mach-bf518/boards/
H A Dtcm-bf518.c535 .end = SPORT1_MRCS3+4,
H A Dezbrd.c613 .end = SPORT1_MRCS3+4,
/linux-4.1.27/arch/blackfin/mach-bf527/boards/
H A Dad7160eval.c636 .end = SPORT1_MRCS3+4,
H A Dcm_bf527.c782 .end = SPORT1_MRCS3+4,
H A Dezbrd.c656 .end = SPORT1_MRCS3+4,
H A Dtll6527m.c760 .end = SPORT1_MRCS3+4,
H A Dezkit.c1041 .end = SPORT1_MRCS3+4,
/linux-4.1.27/arch/blackfin/mach-bf538/boards/
H A Dezkit.c319 .end = SPORT1_MRCS3+4,
/linux-4.1.27/arch/blackfin/mach-bf533/include/mach/
H A DcdefBF532.h666 #define bfin_read_SPORT1_MRCS3() bfin_read32(SPORT1_MRCS3)
667 #define bfin_write_SPORT1_MRCS3(val) bfin_write32(SPORT1_MRCS3,val)
H A DdefBF532.h167 #define SPORT1_MRCS3 0xFFC0095C /* SPORT1 Multi-Channel Receive Select Register 3 */ macro
/linux-4.1.27/arch/blackfin/mach-bf548/boards/
H A Dcm_bf548.c595 .end = SPORT1_MRCS3+4,
H A Dezkit.c738 .end = SPORT1_MRCS3+4,
/linux-4.1.27/arch/blackfin/mach-bf518/include/mach/
H A DcdefBF512.h349 #define bfin_read_SPORT1_MRCS3() bfin_read32(SPORT1_MRCS3)
350 #define bfin_write_SPORT1_MRCS3(val) bfin_write32(SPORT1_MRCS3, val)
H A DdefBF512.h205 #define SPORT1_MRCS3 0xFFC0095C /* SPORT1 Multi-Channel Receive Select Register 3 */ macro
/linux-4.1.27/arch/blackfin/mach-bf527/include/mach/
H A DcdefBF522.h366 #define bfin_read_SPORT1_MRCS3() bfin_read32(SPORT1_MRCS3)
367 #define bfin_write_SPORT1_MRCS3(val) bfin_write32(SPORT1_MRCS3, val)
H A DdefBF522.h203 #define SPORT1_MRCS3 0xFFC0095C /* SPORT1 Multi-Channel Receive Select Register 3 */ macro
/linux-4.1.27/arch/blackfin/mach-bf561/include/mach/
H A DcdefBF561.h475 #define bfin_read_SPORT1_MRCS3() bfin_read32(SPORT1_MRCS3)
476 #define bfin_write_SPORT1_MRCS3(val) bfin_write32(SPORT1_MRCS3,val)
H A DdefBF561.h279 #define SPORT1_MRCS3 0xFFC0095C /* SPORT1 Multi-Channel Receive Select Register 3 */ macro
/linux-4.1.27/arch/blackfin/mach-bf609/boards/
H A Dezkit.c511 .end = SPORT1_MRCS3+4,
/linux-4.1.27/arch/blackfin/mach-bf537/include/mach/
H A DcdefBF534.h330 #define bfin_read_SPORT1_MRCS3() bfin_read32(SPORT1_MRCS3)
331 #define bfin_write_SPORT1_MRCS3(val) bfin_write32(SPORT1_MRCS3,val)
H A DdefBF534.h181 #define SPORT1_MRCS3 0xFFC0095C /* SPORT1 Multi-Channel Receive Select Register 3 */ macro
/linux-4.1.27/arch/blackfin/mach-bf538/include/mach/
H A DcdefBF538.h302 #define bfin_read_SPORT1_MRCS3() bfin_read32(SPORT1_MRCS3)
303 #define bfin_write_SPORT1_MRCS3(val) bfin_write32(SPORT1_MRCS3, val)
H A DdefBF538.h172 #define SPORT1_MRCS3 0xFFC0095C /* SPORT1 Multi-Channel Receive Select Register 3 */ macro
/linux-4.1.27/arch/blackfin/mach-bf548/include/mach/
H A DcdefBF54x_base.h208 #define bfin_read_SPORT1_MRCS3() bfin_read32(SPORT1_MRCS3)
209 #define bfin_write_SPORT1_MRCS3(val) bfin_write32(SPORT1_MRCS3, val)
H A DdefBF54x_base.h149 #define SPORT1_MRCS3 0xffc0095c /* SPORT1 Multi channel Receive Select Register 3 */ macro

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