1/*
2 * Copyright 2004-2009 Analog Devices Inc.
3 *                2005 National ICT Australia (NICTA)
4 *                      Aidan Williams <aidan@nicta.com.au>
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#include <linux/device.h>
10#include <linux/delay.h>
11#include <linux/platform_device.h>
12#include <linux/mtd/mtd.h>
13#include <linux/mtd/partitions.h>
14#include <linux/mtd/physmap.h>
15#include <linux/spi/spi.h>
16#include <linux/spi/flash.h>
17#include <linux/spi/mmc_spi.h>
18#if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
19#include <linux/usb/isp1362.h>
20#endif
21#include <linux/gpio.h>
22#include <linux/irq.h>
23#include <linux/i2c.h>
24#include <asm/dma.h>
25#include <asm/bfin5xx_spi.h>
26#include <asm/reboot.h>
27#include <asm/portmux.h>
28#include <asm/dpmc.h>
29
30/*
31 * Name the Board for the /proc/cpuinfo
32 */
33const char bfin_board_name[] = "ADI BF533-STAMP";
34
35#if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
36static struct platform_device rtc_device = {
37	.name = "rtc-bfin",
38	.id   = -1,
39};
40#endif
41
42/*
43 *  Driver needs to know address, irq and flag pin.
44 */
45#if IS_ENABLED(CONFIG_SMC91X)
46#include <linux/smc91x.h>
47
48static struct smc91x_platdata smc91x_info = {
49	.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
50	.leda = RPC_LED_100_10,
51	.ledb = RPC_LED_TX_RX,
52};
53
54static struct resource smc91x_resources[] = {
55	{
56		.name = "smc91x-regs",
57		.start = 0x20300300,
58		.end = 0x20300300 + 16,
59		.flags = IORESOURCE_MEM,
60	}, {
61		.start = IRQ_PF7,
62		.end = IRQ_PF7,
63		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
64	},
65};
66
67static struct platform_device smc91x_device = {
68	.name = "smc91x",
69	.id = 0,
70	.num_resources = ARRAY_SIZE(smc91x_resources),
71	.resource = smc91x_resources,
72	.dev	= {
73		.platform_data	= &smc91x_info,
74	},
75};
76#endif
77
78#if IS_ENABLED(CONFIG_USB_NET2272)
79static struct resource net2272_bfin_resources[] = {
80	{
81		.start = 0x20300000,
82		.end = 0x20300000 + 0x100,
83		.flags = IORESOURCE_MEM,
84	}, {
85		.start = 1,
86		.flags = IORESOURCE_BUS,
87	}, {
88		.start = IRQ_PF10,
89		.end = IRQ_PF10,
90		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
91	},
92};
93
94static struct platform_device net2272_bfin_device = {
95	.name = "net2272",
96	.id = -1,
97	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
98	.resource = net2272_bfin_resources,
99};
100#endif
101
102#if IS_ENABLED(CONFIG_MTD_BFIN_ASYNC)
103static struct mtd_partition stamp_partitions[] = {
104	{
105		.name   = "bootloader(nor)",
106		.size   = 0x40000,
107		.offset = 0,
108	}, {
109		.name   = "linux kernel(nor)",
110		.size   = 0x180000,
111		.offset = MTDPART_OFS_APPEND,
112	}, {
113		.name   = "file system(nor)",
114		.size   = MTDPART_SIZ_FULL,
115		.offset = MTDPART_OFS_APPEND,
116	}
117};
118
119static struct physmap_flash_data stamp_flash_data = {
120	.width    = 2,
121	.parts    = stamp_partitions,
122	.nr_parts = ARRAY_SIZE(stamp_partitions),
123};
124
125static struct resource stamp_flash_resource[] = {
126	{
127		.name  = "cfi_probe",
128		.start = 0x20000000,
129		.end   = 0x203fffff,
130		.flags = IORESOURCE_MEM,
131	}, {
132		.start = 0x7BB07BB0,	/* AMBCTL0 setting when accessing flash */
133		.end   = 0x7BB07BB0,	/* AMBCTL1 setting when accessing flash */
134		.flags = IORESOURCE_MEM,
135	}, {
136		.start = GPIO_PF0,
137		.flags = IORESOURCE_IRQ,
138	}
139};
140
141static struct platform_device stamp_flash_device = {
142	.name          = "bfin-async-flash",
143	.id            = 0,
144	.dev = {
145		.platform_data = &stamp_flash_data,
146	},
147	.num_resources = ARRAY_SIZE(stamp_flash_resource),
148	.resource      = stamp_flash_resource,
149};
150#endif
151
152#if IS_ENABLED(CONFIG_MTD_M25P80)
153static struct mtd_partition bfin_spi_flash_partitions[] = {
154	{
155		.name = "bootloader(spi)",
156		.size = 0x00040000,
157		.offset = 0,
158		.mask_flags = MTD_CAP_ROM
159	}, {
160		.name = "linux kernel(spi)",
161		.size = 0x180000,
162		.offset = MTDPART_OFS_APPEND,
163	}, {
164		.name = "file system(spi)",
165		.size = MTDPART_SIZ_FULL,
166		.offset = MTDPART_OFS_APPEND,
167	}
168};
169
170static struct flash_platform_data bfin_spi_flash_data = {
171	.name = "m25p80",
172	.parts = bfin_spi_flash_partitions,
173	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
174	.type = "m25p64",
175};
176
177/* SPI flash chip (m25p64) */
178static struct bfin5xx_spi_chip spi_flash_chip_info = {
179	.enable_dma = 0,         /* use dma transfer with this chip*/
180};
181#endif
182
183#if IS_ENABLED(CONFIG_MMC_SPI)
184#define MMC_SPI_CARD_DETECT_INT IRQ_PF5
185static int bfin_mmc_spi_init(struct device *dev,
186	irqreturn_t (*detect_int)(int, void *), void *data)
187{
188	return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
189		IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
190		"mmc-spi-detect", data);
191}
192
193static void bfin_mmc_spi_exit(struct device *dev, void *data)
194{
195	free_irq(MMC_SPI_CARD_DETECT_INT, data);
196}
197
198static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
199	.init = bfin_mmc_spi_init,
200	.exit = bfin_mmc_spi_exit,
201	.detect_delay = 100, /* msecs */
202};
203
204static struct bfin5xx_spi_chip  mmc_spi_chip_info = {
205	.enable_dma = 0,
206	.pio_interrupt = 0,
207};
208#endif
209
210static struct spi_board_info bfin_spi_board_info[] __initdata = {
211#if IS_ENABLED(CONFIG_MTD_M25P80)
212	{
213		/* the modalias must be the same as spi device driver name */
214		.modalias = "m25p80", /* Name of spi_driver for this device */
215		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
216		.bus_num = 0, /* Framework bus number */
217		.chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
218		.platform_data = &bfin_spi_flash_data,
219		.controller_data = &spi_flash_chip_info,
220		.mode = SPI_MODE_3,
221	},
222#endif
223
224#if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD1836)
225	{
226		.modalias = "ad1836",
227		.max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
228		.bus_num = 0,
229		.chip_select = 4,
230		.platform_data = "ad1836", /* only includes chip name for the moment */
231		.mode = SPI_MODE_3,
232	},
233#endif
234
235#if IS_ENABLED(CONFIG_SPI_SPIDEV)
236	{
237		.modalias = "spidev",
238		.max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
239		.bus_num = 0,
240		.chip_select = 1,
241	},
242#endif
243#if IS_ENABLED(CONFIG_MMC_SPI)
244	{
245		.modalias = "mmc_spi",
246		.max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
247		.bus_num = 0,
248		.chip_select = 4,
249		.platform_data = &bfin_mmc_spi_pdata,
250		.controller_data = &mmc_spi_chip_info,
251		.mode = SPI_MODE_3,
252	},
253#endif
254};
255
256#if IS_ENABLED(CONFIG_SPI_BFIN5XX)
257/* SPI (0) */
258static struct resource bfin_spi0_resource[] = {
259	[0] = {
260		.start = SPI0_REGBASE,
261		.end   = SPI0_REGBASE + 0xFF,
262		.flags = IORESOURCE_MEM,
263	},
264	[1] = {
265		.start = CH_SPI,
266		.end   = CH_SPI,
267		.flags = IORESOURCE_DMA,
268	},
269	[2] = {
270		.start = IRQ_SPI,
271		.end   = IRQ_SPI,
272		.flags = IORESOURCE_IRQ,
273	}
274};
275
276/* SPI controller data */
277static struct bfin5xx_spi_master bfin_spi0_info = {
278	.num_chipselect = 8,
279	.enable_dma = 1,  /* master has the ability to do dma transfer */
280	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
281};
282
283static struct platform_device bfin_spi0_device = {
284	.name = "bfin-spi",
285	.id = 0, /* Bus number */
286	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
287	.resource = bfin_spi0_resource,
288	.dev = {
289		.platform_data = &bfin_spi0_info, /* Passed to driver */
290	},
291};
292#endif  /* spi master and devices */
293
294#if IS_ENABLED(CONFIG_SERIAL_BFIN)
295#ifdef CONFIG_SERIAL_BFIN_UART0
296static struct resource bfin_uart0_resources[] = {
297	{
298		.start = BFIN_UART_THR,
299		.end = BFIN_UART_GCTL+2,
300		.flags = IORESOURCE_MEM,
301	},
302	{
303		.start = IRQ_UART0_TX,
304		.end = IRQ_UART0_TX,
305		.flags = IORESOURCE_IRQ,
306	},
307	{
308		.start = IRQ_UART0_RX,
309		.end = IRQ_UART0_RX,
310		.flags = IORESOURCE_IRQ,
311	},
312	{
313		.start = IRQ_UART0_ERROR,
314		.end = IRQ_UART0_ERROR,
315		.flags = IORESOURCE_IRQ,
316	},
317	{
318		.start = CH_UART0_TX,
319		.end = CH_UART0_TX,
320		.flags = IORESOURCE_DMA,
321	},
322	{
323		.start = CH_UART0_RX,
324		.end = CH_UART0_RX,
325		.flags = IORESOURCE_DMA,
326	},
327};
328
329static unsigned short bfin_uart0_peripherals[] = {
330	P_UART0_TX, P_UART0_RX, 0
331};
332
333static struct platform_device bfin_uart0_device = {
334	.name = "bfin-uart",
335	.id = 0,
336	.num_resources = ARRAY_SIZE(bfin_uart0_resources),
337	.resource = bfin_uart0_resources,
338	.dev = {
339		.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
340	},
341};
342#endif
343#endif
344
345#if IS_ENABLED(CONFIG_BFIN_SIR)
346#ifdef CONFIG_BFIN_SIR0
347static struct resource bfin_sir0_resources[] = {
348	{
349		.start = 0xFFC00400,
350		.end = 0xFFC004FF,
351		.flags = IORESOURCE_MEM,
352	},
353	{
354		.start = IRQ_UART0_RX,
355		.end = IRQ_UART0_RX+1,
356		.flags = IORESOURCE_IRQ,
357	},
358	{
359		.start = CH_UART0_RX,
360		.end = CH_UART0_RX+1,
361		.flags = IORESOURCE_DMA,
362	},
363};
364
365static struct platform_device bfin_sir0_device = {
366	.name = "bfin_sir",
367	.id = 0,
368	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
369	.resource = bfin_sir0_resources,
370};
371#endif
372#endif
373
374#if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
375#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
376static struct resource bfin_sport0_uart_resources[] = {
377	{
378		.start = SPORT0_TCR1,
379		.end = SPORT0_MRCS3+4,
380		.flags = IORESOURCE_MEM,
381	},
382	{
383		.start = IRQ_SPORT0_RX,
384		.end = IRQ_SPORT0_RX+1,
385		.flags = IORESOURCE_IRQ,
386	},
387	{
388		.start = IRQ_SPORT0_ERROR,
389		.end = IRQ_SPORT0_ERROR,
390		.flags = IORESOURCE_IRQ,
391	},
392};
393
394static unsigned short bfin_sport0_peripherals[] = {
395	P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
396	P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
397};
398
399static struct platform_device bfin_sport0_uart_device = {
400	.name = "bfin-sport-uart",
401	.id = 0,
402	.num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
403	.resource = bfin_sport0_uart_resources,
404	.dev = {
405		.platform_data = &bfin_sport0_peripherals, /* Passed to driver */
406	},
407};
408#endif
409#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
410static struct resource bfin_sport1_uart_resources[] = {
411	{
412		.start = SPORT1_TCR1,
413		.end = SPORT1_MRCS3+4,
414		.flags = IORESOURCE_MEM,
415	},
416	{
417		.start = IRQ_SPORT1_RX,
418		.end = IRQ_SPORT1_RX+1,
419		.flags = IORESOURCE_IRQ,
420	},
421	{
422		.start = IRQ_SPORT1_ERROR,
423		.end = IRQ_SPORT1_ERROR,
424		.flags = IORESOURCE_IRQ,
425	},
426};
427
428static unsigned short bfin_sport1_peripherals[] = {
429	P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
430	P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
431};
432
433static struct platform_device bfin_sport1_uart_device = {
434	.name = "bfin-sport-uart",
435	.id = 1,
436	.num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
437	.resource = bfin_sport1_uart_resources,
438	.dev = {
439		.platform_data = &bfin_sport1_peripherals, /* Passed to driver */
440	},
441};
442#endif
443#endif
444
445#if IS_ENABLED(CONFIG_BFIN_SPORT)
446static struct resource bfin_sport0_resources[] = {
447	{
448		.start = SPORT0_TCR1,
449		.end = SPORT0_MRCS3+4,
450		.flags = IORESOURCE_MEM,
451	},
452	{
453		.start = IRQ_SPORT0_TX,
454		.end = IRQ_SPORT0_TX+1,
455		.flags = IORESOURCE_IRQ,
456	},
457	{
458		.start = IRQ_SPORT0_RX,
459		.end = IRQ_SPORT0_RX+1,
460		.flags = IORESOURCE_IRQ,
461	},
462	{
463		.start = IRQ_SPORT0_ERROR,
464		.end = IRQ_SPORT0_ERROR,
465		.flags = IORESOURCE_IRQ,
466	},
467	{
468		.start = CH_SPORT0_TX,
469		.end = CH_SPORT0_TX,
470		.flags = IORESOURCE_DMA,
471	},
472	{
473		.start = CH_SPORT0_RX,
474		.end = CH_SPORT0_RX,
475		.flags = IORESOURCE_DMA,
476	},
477};
478static struct platform_device bfin_sport0_device = {
479	.name = "bfin_sport_raw",
480	.id = 0,
481	.num_resources = ARRAY_SIZE(bfin_sport0_resources),
482	.resource = bfin_sport0_resources,
483	.dev = {
484		.platform_data = &bfin_sport0_peripherals,
485	},
486};
487#endif
488
489#if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
490#include <linux/input.h>
491#include <linux/gpio_keys.h>
492
493static struct gpio_keys_button bfin_gpio_keys_table[] = {
494	{BTN_0, GPIO_PF5, 0, "gpio-keys: BTN0"},
495	{BTN_1, GPIO_PF6, 0, "gpio-keys: BTN1"},
496	{BTN_2, GPIO_PF8, 0, "gpio-keys: BTN2"},
497};
498
499static struct gpio_keys_platform_data bfin_gpio_keys_data = {
500	.buttons        = bfin_gpio_keys_table,
501	.nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
502};
503
504static struct platform_device bfin_device_gpiokeys = {
505	.name      = "gpio-keys",
506	.dev = {
507		.platform_data = &bfin_gpio_keys_data,
508	},
509};
510#endif
511
512#if IS_ENABLED(CONFIG_I2C_GPIO)
513#include <linux/i2c-gpio.h>
514
515static struct i2c_gpio_platform_data i2c_gpio_data = {
516	.sda_pin		= GPIO_PF2,
517	.scl_pin		= GPIO_PF3,
518	.sda_is_open_drain	= 0,
519	.scl_is_open_drain	= 0,
520	.udelay			= 10,
521};
522
523static struct platform_device i2c_gpio_device = {
524	.name		= "i2c-gpio",
525	.id		= 0,
526	.dev		= {
527		.platform_data	= &i2c_gpio_data,
528	},
529};
530#endif
531
532static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
533#if IS_ENABLED(CONFIG_JOYSTICK_AD7142)
534	{
535		I2C_BOARD_INFO("ad7142_joystick", 0x2C),
536		.irq = 39,
537	},
538#endif
539#if IS_ENABLED(CONFIG_BFIN_TWI_LCD)
540	{
541		I2C_BOARD_INFO("pcf8574_lcd", 0x22),
542	},
543#endif
544#if IS_ENABLED(CONFIG_INPUT_PCF8574)
545	{
546		I2C_BOARD_INFO("pcf8574_keypad", 0x27),
547		.irq = 39,
548	},
549#endif
550#if IS_ENABLED(CONFIG_FB_BFIN_7393)
551	{
552		I2C_BOARD_INFO("bfin-adv7393", 0x2B),
553	},
554#endif
555#if IS_ENABLED(CONFIG_BFIN_TWI_LCD)
556	{
557		I2C_BOARD_INFO("ad5252", 0x2f),
558	},
559#endif
560};
561
562static const unsigned int cclk_vlev_datasheet[] =
563{
564	VRPAIR(VLEV_085, 250000000),
565	VRPAIR(VLEV_090, 376000000),
566	VRPAIR(VLEV_095, 426000000),
567	VRPAIR(VLEV_100, 426000000),
568	VRPAIR(VLEV_105, 476000000),
569	VRPAIR(VLEV_110, 476000000),
570	VRPAIR(VLEV_115, 476000000),
571	VRPAIR(VLEV_120, 600000000),
572	VRPAIR(VLEV_125, 600000000),
573	VRPAIR(VLEV_130, 600000000),
574};
575
576static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
577	.tuple_tab = cclk_vlev_datasheet,
578	.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
579	.vr_settling_time = 25 /* us */,
580};
581
582static struct platform_device bfin_dpmc = {
583	.name = "bfin dpmc",
584	.dev = {
585		.platform_data = &bfin_dmpc_vreg_data,
586	},
587};
588
589#if IS_ENABLED(CONFIG_SND_BF5XX_I2S) || \
590	IS_ENABLED(CONFIG_SND_BF5XX_AC97)
591
592#include <asm/bfin_sport.h>
593
594#define SPORT_REQ(x) \
595	[x] = {P_SPORT##x##_TFS, P_SPORT##x##_DTPRI, P_SPORT##x##_TSCLK, \
596		P_SPORT##x##_RFS, P_SPORT##x##_DRPRI, P_SPORT##x##_RSCLK, 0}
597
598static const u16 bfin_snd_pin[][7] = {
599	SPORT_REQ(0),
600	SPORT_REQ(1),
601};
602
603static struct bfin_snd_platform_data bfin_snd_data[] = {
604	{
605		.pin_req = &bfin_snd_pin[0][0],
606	},
607	{
608		.pin_req = &bfin_snd_pin[1][0],
609	},
610};
611
612#define BFIN_SND_RES(x) \
613	[x] = { \
614		{ \
615			.start = SPORT##x##_TCR1, \
616			.end = SPORT##x##_TCR1, \
617			.flags = IORESOURCE_MEM \
618		}, \
619		{ \
620			.start = CH_SPORT##x##_RX, \
621			.end = CH_SPORT##x##_RX, \
622			.flags = IORESOURCE_DMA, \
623		}, \
624		{ \
625			.start = CH_SPORT##x##_TX, \
626			.end = CH_SPORT##x##_TX, \
627			.flags = IORESOURCE_DMA, \
628		}, \
629		{ \
630			.start = IRQ_SPORT##x##_ERROR, \
631			.end = IRQ_SPORT##x##_ERROR, \
632			.flags = IORESOURCE_IRQ, \
633		} \
634	}
635
636static struct resource bfin_snd_resources[][4] = {
637	BFIN_SND_RES(0),
638	BFIN_SND_RES(1),
639};
640#endif
641
642#if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
643static struct platform_device bfin_i2s_pcm = {
644	.name = "bfin-i2s-pcm-audio",
645	.id = -1,
646};
647#endif
648
649#if IS_ENABLED(CONFIG_SND_BF5XX_AC97)
650static struct platform_device bfin_ac97_pcm = {
651	.name = "bfin-ac97-pcm-audio",
652	.id = -1,
653};
654#endif
655
656#if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD1836)
657static const char * const ad1836_link[] = {
658	"bfin-i2s.0",
659	"spi0.4",
660};
661static struct platform_device bfin_ad1836_machine = {
662	.name = "bfin-snd-ad1836",
663	.id = -1,
664	.dev = {
665		.platform_data = (void *)ad1836_link,
666	},
667};
668#endif
669
670#if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD73311)
671static const unsigned ad73311_gpio[] = {
672	GPIO_PF4,
673};
674
675static struct platform_device bfin_ad73311_machine = {
676	.name = "bfin-snd-ad73311",
677	.id = 1,
678	.dev = {
679		.platform_data = (void *)ad73311_gpio,
680	},
681};
682#endif
683
684#if IS_ENABLED(CONFIG_SND_SOC_AD73311)
685static struct platform_device bfin_ad73311_codec_device = {
686	.name = "ad73311",
687	.id = -1,
688};
689#endif
690
691#if IS_ENABLED(CONFIG_SND_SOC_AD74111)
692static struct platform_device bfin_ad74111_codec_device = {
693	.name = "ad74111",
694	.id = -1,
695};
696#endif
697
698#if IS_ENABLED(CONFIG_SND_BF5XX_SOC_I2S)
699static struct platform_device bfin_i2s = {
700	.name = "bfin-i2s",
701	.id = CONFIG_SND_BF5XX_SPORT_NUM,
702	.num_resources =
703		ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
704	.resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
705	.dev = {
706		.platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
707	},
708};
709#endif
710
711#if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AC97)
712static struct platform_device bfin_ac97 = {
713	.name = "bfin-ac97",
714	.id = CONFIG_SND_BF5XX_SPORT_NUM,
715	.num_resources =
716		ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
717	.resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
718	.dev = {
719		.platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
720	},
721};
722#endif
723
724static struct platform_device *stamp_devices[] __initdata = {
725
726	&bfin_dpmc,
727
728#if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
729	&rtc_device,
730#endif
731
732#if IS_ENABLED(CONFIG_SMC91X)
733	&smc91x_device,
734#endif
735
736#if IS_ENABLED(CONFIG_USB_NET2272)
737	&net2272_bfin_device,
738#endif
739
740#if IS_ENABLED(CONFIG_SPI_BFIN5XX)
741	&bfin_spi0_device,
742#endif
743
744#if IS_ENABLED(CONFIG_SERIAL_BFIN)
745#ifdef CONFIG_SERIAL_BFIN_UART0
746	&bfin_uart0_device,
747#endif
748#endif
749
750#if IS_ENABLED(CONFIG_BFIN_SIR)
751#ifdef CONFIG_BFIN_SIR0
752	&bfin_sir0_device,
753#endif
754#endif
755
756#if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
757#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
758	&bfin_sport0_uart_device,
759#endif
760#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
761	&bfin_sport1_uart_device,
762#endif
763#endif
764
765#if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
766	&bfin_device_gpiokeys,
767#endif
768
769#if IS_ENABLED(CONFIG_I2C_GPIO)
770	&i2c_gpio_device,
771#endif
772
773#if IS_ENABLED(CONFIG_MTD_BFIN_ASYNC)
774	&stamp_flash_device,
775#endif
776
777#if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
778	&bfin_i2s_pcm,
779#endif
780
781#if IS_ENABLED(CONFIG_SND_BF5XX_AC97)
782	&bfin_ac97_pcm,
783#endif
784
785#if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD1836)
786	&bfin_ad1836_machine,
787#endif
788
789#if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD73311)
790	&bfin_ad73311_machine,
791#endif
792
793#if IS_ENABLED(CONFIG_SND_SOC_AD73311)
794	&bfin_ad73311_codec_device,
795#endif
796
797#if IS_ENABLED(CONFIG_SND_SOC_AD74111)
798	&bfin_ad74111_codec_device,
799#endif
800
801#if IS_ENABLED(CONFIG_SND_BF5XX_SOC_I2S)
802	&bfin_i2s,
803#endif
804
805#if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AC97)
806	&bfin_ac97,
807#endif
808};
809
810static int __init net2272_init(void)
811{
812#if IS_ENABLED(CONFIG_USB_NET2272)
813	int ret;
814
815	/* Set PF0 to 0, PF1 to 1 make /AMS3 work properly */
816	ret = gpio_request(GPIO_PF0, "net2272");
817	if (ret)
818		return ret;
819
820	ret = gpio_request(GPIO_PF1, "net2272");
821	if (ret) {
822		gpio_free(GPIO_PF0);
823		return ret;
824	}
825
826	ret = gpio_request(GPIO_PF11, "net2272");
827	if (ret) {
828		gpio_free(GPIO_PF0);
829		gpio_free(GPIO_PF1);
830		return ret;
831	}
832
833	gpio_direction_output(GPIO_PF0, 0);
834	gpio_direction_output(GPIO_PF1, 1);
835
836	/* Reset the USB chip */
837	gpio_direction_output(GPIO_PF11, 0);
838	mdelay(2);
839	gpio_set_value(GPIO_PF11, 1);
840#endif
841
842	return 0;
843}
844
845static int __init stamp_init(void)
846{
847	int ret;
848
849	printk(KERN_INFO "%s(): registering device resources\n", __func__);
850
851	i2c_register_board_info(0, bfin_i2c_board_info,
852				ARRAY_SIZE(bfin_i2c_board_info));
853
854	ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
855	if (ret < 0)
856		return ret;
857
858#if IS_ENABLED(CONFIG_SMC91X)
859	/*
860	 * setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC.
861	 * the bfin-async-map driver takes care of flipping between
862	 * flash and ethernet when necessary.
863	 */
864	ret = gpio_request(GPIO_PF0, "enet_cpld");
865	if (!ret) {
866		gpio_direction_output(GPIO_PF0, 1);
867		gpio_free(GPIO_PF0);
868	}
869#endif
870
871	if (net2272_init())
872		pr_warning("unable to configure net2272; it probably won't work\n");
873
874	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
875	return 0;
876}
877
878arch_initcall(stamp_init);
879
880static struct platform_device *stamp_early_devices[] __initdata = {
881#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
882#ifdef CONFIG_SERIAL_BFIN_UART0
883	&bfin_uart0_device,
884#endif
885#endif
886
887#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
888#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
889	&bfin_sport0_uart_device,
890#endif
891#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
892	&bfin_sport1_uart_device,
893#endif
894#endif
895};
896
897void __init native_machine_early_platform_add_devices(void)
898{
899	printk(KERN_INFO "register early platform devices\n");
900	early_platform_add_devices(stamp_early_devices,
901		ARRAY_SIZE(stamp_early_devices));
902}
903
904void native_machine_restart(char *cmd)
905{
906	/* workaround pull up on cpld / flash pin not being strong enough */
907	gpio_request(GPIO_PF0, "flash_cpld");
908	gpio_direction_output(GPIO_PF0, 0);
909}
910