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Searched refs:Reset (Results 1 – 138 of 138) sorted by relevance

/linux-4.1.27/drivers/reset/
DKconfig5 bool "Reset Controller Support"
8 Generic Reset Controller support.
/linux-4.1.27/Documentation/devicetree/bindings/reset/
Dreset.txt1 = Reset Signal Device Tree Bindings =
4 internally in most IC (SoC, FPGA, ...) designs. Reset signals for whole
32 = Reset providers =
45 = Reset consumers =
Dsocfpga-reset.txt1 Altera SOCFPGA Reset Manager
Dbrcm,bcm21664-resetmgr.txt1 Broadcom Kona Family Reset Manager
Dallwinner,sunxi-clock-reset.txt1 Allwinner sunxi Peripheral Reset Controller
Dsirf,rstc.txt1 CSR SiRFSoC Reset Controller
Dfsl,imx-src.txt1 Freescale i.MX System Reset Controller
Dst,sti-powerdown.txt1 STMicroelectronics STi family Sysconfig Peripheral Powerdown Reset Controller
/linux-4.1.27/Documentation/hwmon/
Dltc297877 in1_reset_history Reset input voltage history.
96 in[N]_reset_history Reset output voltage history.
121 temp[N]_reset_history Reset temperature history. Not supported for chip
140 curr1_reset_history Reset input current history. LTC3883 only.
157 curr[N]_reset_history Reset output current history.
Dtmp40151 * Reset of historical minimum/maximum temperature measurements
Dsysfs-interface158 Reset inX_lowest and inX_highest
162 Reset inX_lowest and inX_highest for all sensors
404 Reset temp_lowest and temp_highest
408 Reset temp_lowest and temp_highest for all sensors
463 Reset currX_lowest and currX_highest
467 Reset currX_lowest and currX_highest for all sensors
526 power[1-*]_reset_history Reset input_highest, input_lowest,
/linux-4.1.27/Documentation/devicetree/bindings/clock/
Dnvidia,tegra30-car.txt1 NVIDIA Tegra30 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
Dnvidia,tegra20-car.txt1 NVIDIA Tegra20 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
Dnvidia,tegra114-car.txt1 NVIDIA Tegra114 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
Dnvidia,tegra124-car.txt1 NVIDIA Tegra124 and Tegra132 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
Dqcom,lcc.txt1 Qualcomm LPASS Clock & Reset Controller Binding
Dqcom,mmcc.txt1 Qualcomm Multimedia Clock & Reset Controller Binding
Dqcom,gcc.txt1 Qualcomm Global Clock & Reset Controller Binding
Dmvebu-core-clock.txt4 reading the Sample-At-Reset (SAR) register. The core clock consumer should
58 - reg : shall be the register address of the Sample-At-Reset (SAR) register
Drockchip,rk3288-cru.txt1 * Rockchip RK3288 Clock and Reset Unit
Drockchip,rk3188-cru.txt1 * Rockchip RK3188/RK3066 Clock and Reset Unit
Dst,nomadik.txt1 ST Microelectronics Nomadik SRC System Reset and Control
/linux-4.1.27/init/
Dinitramfs.c196 Reset enumerator
329 next_state = Reset; in do_name()
397 next_state = Reset; in do_symlink()
409 [Reset] = do_reset,
438 state = Reset; in flush_buffer()
498 if (state != Reset) in unpack_to_rootfs()
/linux-4.1.27/Documentation/devicetree/bindings/power/reset/
Dkeystone-reset.txt7 SoC. Each watchdog timer event input is connected to the Reset Mux
8 block. The Reset Mux block can be configured to cause reset or not.
/linux-4.1.27/arch/arm/boot/dts/
Dbcm47081-buffalo-wzr-900dhp.dts32 label = "Reset";
Dbcm4708-luxul-xwc-1000.dts55 label = "Reset";
Dste-hrefprev60-stuib.dts21 /* Reset line for the BU21013 touchscreen */
Dkirkwood-ts219-6281.dts48 label = "Reset";
Dkirkwood-iomega_ix2_200.dts161 Reset {
162 label = "Reset Button";
Dkirkwood-ts219-6282.dts58 label = "Reset";
Dste-hrefv60plus-stuib.dts23 /* Reset line for the BU21013 touchscreen */
Dbcm4709-netgear-r8000.dts72 label = "Reset";
Dbcm47081-asus-rt-n18u.dts66 label = "Reset";
Dbcm4708-netgear-r6300-v2.dts78 label = "Reset";
Dbcm4708-netgear-r6250.dts88 label = "Reset";
Dkirkwood-ts419.dtsi54 label = "Reset";
Dmoxart-uc7112lx.dts68 label = "GPIO Reset";
Dimx28-duckbill.dts42 MX28_PAD_SSP0_DATA7__GPIO_2_7 /* PHY Reset */
Dbcm47081-buffalo-wzr-600dhp2.dts105 label = "Reset";
Dbcm4708-buffalo-wzr-1750dhp.dts99 label = "Reset";
Dkirkwood-nsa3x0-common.dtsi91 label = "Reset Button";
Dkirkwood-ib62x0.dts71 label = "Reset";
Dkirkwood-blackarmor-nas220.dts40 label = "Reset";
Dkirkwood-iconnect.dts146 label = "Reset";
Dorion5x-maxtor-shared-storage-2.dts49 label = "Reset";
Dkirkwood-netgear_readynas_duo_v2.dts172 label = "Reset Button";
Dkirkwood-netgear_readynas_nv+_v2.dts184 label = "Reset Button";
Dkirkwood-dnskw.dtsi27 label = "Reset button";
Dimx6qdl-tx6.dtsi397 MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x1b0b0 /* Reset */
491 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b1 /* LCD Reset */
Dimx6qdl-gw51xx.dtsi233 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 /* PHY Reset */
Darmada-xp-axpwifiap.dts159 label = "Factory Reset Button";
Dimx53-tx53-x03x.dts242 MX53_PAD_EIM_A16__GPIO2_22 0x04 /* Reset */
Darmada-370-netgear-rn104.dts261 label = "Reset Button";
Dimx6qdl-gw52xx.dtsi356 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 /* PHY Reset */
Darmada-370-netgear-rn102.dts233 label = "Reset Button";
Darmada-xp-lenovo-ix4-300d.dts206 label = "Reset Button";
Darmada-xp-linksys-mamba.dts309 label = "Factory Reset Button";
Darmada-xp-netgear-rn2120.dts276 label = "Reset Button";
Dimx51-babbage.dts497 MX51_PAD_EIM_A20__GPIO2_14 0x00000085 /* Phy Reset */
Dimx28-tx28.dts569 MX28_PAD_LCD_RESET__GPIO_3_30 /* Reset */
/linux-4.1.27/Documentation/devicetree/bindings/sound/
Dtlv320aic32x4.txt18 - reset-gpios: Reset-GPIO phandle with args as described in gpio/gpio.txt
/linux-4.1.27/Documentation/scsi/
Ddc395x.txt71 *2 0x04 4 Reset SCSI Bus on startup.
84 The seconds to not accept commands after a SCSI Reset
DChangeLog.sym53c8xx_268 - Reset 53C896 and 53C1010 chip according to the manual.
Dlibsas.txt247 (2) SAS 1.1 does not define I_T Nexus Reset TMF.
289 PORTE_HARD_RESET -- Hard Reset primitive received.
Darcmsr_spec.txt86 ** 0x03 : Reset (Abort all queued Command)
409 ** GUI_RESET_CONTROLLER : Reset Controller
DBusLogic.txt482 Adapter Hard Reset which initiates a SCSI Bus Reset and issuing any SCSI
501 Reset.
Dsym53c8xx_2.txt28 8.7 Reset all logical units of a target
380 8.7 Reset all logical units of a target
650 Bit 0x02 : RST SCSI BUS Reset
Daic79xx.txt129 - Reset the bus on an SE->LVD change. This is required
Dncr53c8xx.txt28 8.9 Reset all logical units of a target
539 8.9 Reset all logical units of a target
1324 Bit 0x02 : RST SCSI BUS Reset
DChangeLog.megaraid_sas199 1. Add the Online Controller Reset (OCR) to the Driver.
Dtmscsim.txt311 *2 0x04 4 Reset SCSI Bus on startup.
DChangeLog.lpfc1053 * Reset context2 to 0 on exit in
1251 firmware. Reset ELX_CFG_DFT_HBA_Q_DEPTH to max_xri after
DChangeLog.1992-19971087 * aha1542.c: Reset mailbox status after a bus device reset.
/linux-4.1.27/Documentation/devicetree/bindings/arm/omap/
Dprcm.txt3 Power Reset and Clock Manager lists the device clocks and clockdomains under
/linux-4.1.27/Documentation/devicetree/bindings/mfd/
Dsun6i-prcm.txt1 * Allwinner PRCM (Power/Reset/Clock Management) Multi-Functional Device
/linux-4.1.27/Documentation/PCI/
Dpci-error-recovery.txt159 then recovery proceeds to STEP 4 (Slot Reset).
195 instead will have gone directly to STEP 3 (Link Reset) or STEP 4 (Slot Reset)
228 proceeds to either STEP3 (Link Reset) or to STEP 5 (Resume Operations).
231 proceeds to STEP 4 (Slot Reset)
233 STEP 3: Link Reset
250 The platform then proceeds to either STEP 4 (Slot Reset) or STEP 5
255 STEP 4: Slot Reset
Dpcieaer-howto.txt198 default by setting the Secondary Bus Reset bit of the Bridge Control
/linux-4.1.27/scripts/rt-tester/
Dt3-l1-pi-signal.tst47 # Reset event counter
/linux-4.1.27/Documentation/ABI/testing/
Dsysfs-bus-usb-lvstest32 Write to this node to issue "Reset" for Link Layer Validation
/linux-4.1.27/arch/cris/arch-v32/mach-a3/
Ddram_init.S42 ; Reset phy and start calibration
/linux-4.1.27/Documentation/networking/
Dx25-iface.txt86 handle such N-Reset events gracefully. And frequent N-Reset events
Dcan.txt763 TX_RESET_MULTI_IDX: Reset the index for the multiple frame transmission.
/linux-4.1.27/Documentation/virtual/kvm/devices/
Dmpic.txt18 Reset value is zero.
/linux-4.1.27/Documentation/auxdisplay/
Dcfag12864b72 (12) [+5v]---(14) Reset
/linux-4.1.27/Documentation/devicetree/bindings/net/
Dfsl-fec.txt11 - phy-reset-duration : Reset duration in milliseconds. Should present
/linux-4.1.27/drivers/net/ethernet/amd/
Dariadne.h48 volatile u_short Reset; /* Reset Chip on Read Access */ member
Dariadne.c400 in = lance->Reset; in ariadne_open()
/linux-4.1.27/Documentation/devicetree/bindings/power/
Drenesas,sysc-rmobile.txt7 - Reset generation,
/linux-4.1.27/Documentation/devicetree/bindings/soc/fsl/
Dbman.txt86 via the Reset Configuration Word (RCW) and that are relevant to a specific board
Dqman.txt103 configured via the Reset Configuration Word (RCW) and that are relevant to a
/linux-4.1.27/Documentation/isdn/
DREADME.audio40 AT+VIP Reset all audio parameters.
DREADME125 AT&F Reset all registers and profile to "factory-defaults"
/linux-4.1.27/Documentation/devicetree/bindings/pinctrl/
Dnvidia,tegra30-pinmux.txt18 - nvidia,io-reset: Integer. Reset the IO path. 0: no, 1: yes.
Dnvidia,tegra114-pinmux.txt20 - nvidia,io-reset: Integer. Reset the IO path. 0: no, 1: yes.
Dnvidia,tegra124-pinmux.txt29 - nvidia,io-reset: Integer. Reset the IO path.
/linux-4.1.27/Documentation/devicetree/bindings/arm/
Datmel-at91.txt88 RSTC Reset Controller required properties:
Dmarvell,berlin.txt109 * Reset controller binding
/linux-4.1.27/drivers/power/reset/
DKconfig116 Reset support for STMicroelectronics boards.
/linux-4.1.27/arch/arm/kvm/
Dinterrupts.S191 @ Reset Hyp-role
/linux-4.1.27/arch/powerpc/boot/dts/
Dmpc5125twr.dts98 reset@e00 { // Reset module
Dmpc5121.dtsi132 /* Reset module */
/linux-4.1.27/Documentation/video4linux/cx2341x/
Dfw-memory.txt109 0x9054: Reset HW blocks
/linux-4.1.27/arch/cris/arch-v32/kernel/
Dkgdb_asm.S470 move.d reg, $acr ; Reset ACR to point at the beginning of the register image
/linux-4.1.27/arch/arm/plat-omap/
DKconfig55 bool "Reset unused clocks during boot"
/linux-4.1.27/Documentation/devicetree/bindings/usb/
Dam33xx-usb.txt11 Reset module
/linux-4.1.27/Documentation/zh_CN/
Dgpio.txt347 err = gpio_request_one(31, GPIOF_IN, "Reset Button");
/linux-4.1.27/arch/m32r/platforms/mappi/
Ddot.gdbinit79 # Reset (P5=LED,P6.b4=LAN_RESET)
Ddot.gdbinit.nommu79 # Reset (P5=LED,P6.b4=LAN_RESET)
Ddot.gdbinit.smp144 # Reset (P5=LED,P6.b4=LAN_RESET)
/linux-4.1.27/drivers/net/usb/
Dcatc.c85 Reset = 0xf4, enumerator
205 #define catc_reset(catc) catc_ctrl_msg(catc, USB_DIR_OUT, Reset, 0, 0, NULL, 0)
/linux-4.1.27/Documentation/devicetree/bindings/i2c/
Dtrivial-devices.txt44 dallas,ds1374 I2C, 32-Bit Binary Counter Watchdog RTC with Trickle Charger and Reset Input/Output
/linux-4.1.27/sound/soc/blackfin/
DKconfig155 bool "BOARD has COLD Reset GPIO"
/linux-4.1.27/Documentation/leds/
Dleds-lp55xx.txt49 Reset command, chip enable command
/linux-4.1.27/Documentation/blockdev/
Dzram.txt179 9) Reset:
/linux-4.1.27/arch/x86/kernel/
Dentry_32.S296 pushl_cfi $0x0202 # Reset kernel eflags
308 pushl_cfi $0x0202 # Reset kernel eflags
/linux-4.1.27/arch/arm/mach-davinci/
DKconfig247 bool "Reset unused clocks during boot"
/linux-4.1.27/arch/microblaze/
DKconfig192 Set this option to have the kernel override the CPU Reset vector.
/linux-4.1.27/Documentation/watchdog/
Dwatchdog-api.txt160 WDIOF_OVERHEAT Reset due to CPU overheat
Dwatchdog-parameters.txt195 reset: Watchdog Interrupt/Reset Mode. 0 = interrupt, 1 = reset
/linux-4.1.27/arch/blackfin/
DKconfig.debug85 bool "Reset"
/linux-4.1.27/Documentation/power/
Dsuspend-and-cpuhotplug.txt92 | Reset cpu_hotplug_disabled to 0, thereby enabling regular cpu hotplug
/linux-4.1.27/arch/powerpc/kernel/
Dhead_8xx.S217 EXCEPTION(0x100, Reset, unknown_exception, EXC_XFER_STD)
Dhead_32.S344 EXCEPTION(0x100, Reset, unknown_exception, EXC_XFER_STD)
/linux-4.1.27/drivers/message/fusion/lsi/
Dmpi_history.txt487 * Added SATA Link Reset settings, Enable SATA Asynchronous
571 * Request: Do Not Send Task IU and Soft Reset Option.
/linux-4.1.27/drivers/mfd/
DKconfig881 bool "ST-Ericsson DB8500 Power Reset Control Management Unit"
885 Select this option to enable support for the DB8500 Power Reset
943 Support for the PRCM (Power/Reset/Clock Management) unit available
/linux-4.1.27/scripts/kconfig/
Dzconf.lex.c_shipped1713 /* Reset buffer status. */
2246 /* Reset the globals. This is important in a non-reentrant scanner so the next time
/linux-4.1.27/scripts/genksyms/
Dlex.lex.c_shipped1312 /* Reset buffer status. */
1851 /* Reset the globals. This is important in a non-reentrant scanner so the next time
/linux-4.1.27/scripts/dtc/
Ddtc-lexer.lex.c_shipped1579 /* Reset buffer status. */
2114 /* Reset the globals. This is important in a non-reentrant scanner so the next time
/linux-4.1.27/firmware/keyspan_pda/
Dkeyspan_pda.S197 ljmp 0 ; USB Reset
Dxircom_pgs.S199 ljmp 0 ; USB Reset
/linux-4.1.27/drivers/watchdog/
DKconfig310 Note: The IOP13XX watchdog does an Internal Bus Reset which will
962 (LPC IO with 8042 KBC, Reset Generation, HWM and multiple
/linux-4.1.27/Documentation/laptops/
Dlaptop-mode.txt654 # Reset commit and atime options to defaults.
/linux-4.1.27/drivers/scsi/
DKconfig1619 bool "Reset SCSI-devices at boottime"
1622 Reset the devices on your Atari whenever it boots. This makes the
/linux-4.1.27/Documentation/sound/alsa/
DALSA-Configuration.txt893 power_save_controller - Reset HD-audio controller in power-saving mode
1358 reset - Reset all devices
/linux-4.1.27/Documentation/gpio/
Dgpio-legacy.txt368 err = gpio_request_one(31, GPIOF_IN, "Reset Button");
/linux-4.1.27/Documentation/
Dkernel-parameters.txt493 atkbd.reset= [HW] Reset keyboard during initialization
1310 i8042.reset [HW] Reset the controller during init and cleanup
1312 i8042.kbdreset [HW] Reset device connected to KBD port
/linux-4.1.27/Documentation/filesystems/cifs/
DCHANGES620 unitialized. Reset search to restart at correct file when kernel routine
/linux-4.1.27/Documentation/cdrom/
Dcdrom-standard.tex938 \item[CDROMRESET] Reset the drive.