1NVIDIA Tegra30 Clock And Reset Controller
2
3This binding uses the common clock binding:
4Documentation/devicetree/bindings/clock/clock-bindings.txt
5
6The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
7for muxing and gating Tegra's clocks, and setting their rates.
8
9Required properties :
10- compatible : Should be "nvidia,tegra30-car"
11- reg : Should contain CAR registers location and length
12- clocks : Should contain phandle and clock specifiers for two clocks:
13  the 32 KHz "32k_in", and the board-specific oscillator "osc".
14- #clock-cells : Should be 1.
15  In clock consumers, this cell represents the clock ID exposed by the
16  CAR. The assignments may be found in header file
17  <dt-bindings/clock/tegra30-car.h>.
18- #reset-cells : Should be 1.
19  In clock consumers, this cell represents the bit number in the CAR's
20  array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.
21
22Example SoC include file:
23
24/ {
25	tegra_car: clock {
26		compatible = "nvidia,tegra30-car";
27		reg = <0x60006000 0x1000>;
28		#clock-cells = <1>;
29		#reset-cells = <1>;
30	};
31
32	usb@c5004000 {
33		clocks = <&tegra_car TEGRA30_CLK_USB2>;
34	};
35};
36
37Example board file:
38
39/ {
40	clocks {
41		compatible = "simple-bus";
42		#address-cells = <1>;
43		#size-cells = <0>;
44
45		osc: clock@0 {
46			compatible = "fixed-clock";
47			reg = <0>;
48			#clock-cells = <0>;
49			clock-frequency = <12000000>;
50		};
51
52		clk_32k: clock@1 {
53			compatible = "fixed-clock";
54			reg = <1>;
55			#clock-cells = <0>;
56			clock-frequency = <32768>;
57		};
58	};
59
60	&tegra_car {
61		clocks = <&clk_32k> <&osc>;
62	};
63};
64