Home
last modified time | relevance | path

Searched defs:scope (Results 1 – 169 of 169) sorted by relevance

/linux-4.1.27/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/
Diop_version_defs.h15 #define REG_RD( scope, inst, reg ) \ argument
21 #define REG_WR( scope, inst, reg, val ) \ argument
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
41 #define REG_RD_INT( scope, inst, reg ) \ argument
46 #define REG_WR_INT( scope, inst, reg, val ) \ argument
51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
72 #define REG_ADDR( scope, inst, reg ) \ argument
77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_sap_in_defs.h15 #define REG_RD( scope, inst, reg ) \ argument
21 #define REG_WR( scope, inst, reg, val ) \ argument
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
41 #define REG_RD_INT( scope, inst, reg ) \ argument
46 #define REG_WR_INT( scope, inst, reg, val ) \ argument
51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
72 #define REG_ADDR( scope, inst, reg ) \ argument
77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_sap_out_defs.h15 #define REG_RD( scope, inst, reg ) \ argument
21 #define REG_WR( scope, inst, reg, val ) \ argument
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
41 #define REG_RD_INT( scope, inst, reg ) \ argument
46 #define REG_WR_INT( scope, inst, reg, val ) \ argument
51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
72 #define REG_ADDR( scope, inst, reg ) \ argument
77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_sw_spu_defs.h15 #define REG_RD( scope, inst, reg ) \ argument
21 #define REG_WR( scope, inst, reg, val ) \ argument
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
41 #define REG_RD_INT( scope, inst, reg ) \ argument
46 #define REG_WR_INT( scope, inst, reg, val ) \ argument
51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
72 #define REG_ADDR( scope, inst, reg ) \ argument
77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_sw_cpu_defs.h15 #define REG_RD( scope, inst, reg ) \ argument
21 #define REG_WR( scope, inst, reg, val ) \ argument
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
41 #define REG_RD_INT( scope, inst, reg ) \ argument
46 #define REG_WR_INT( scope, inst, reg, val ) \ argument
51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
72 #define REG_ADDR( scope, inst, reg ) \ argument
77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_sw_cfg_defs.h15 #define REG_RD( scope, inst, reg ) \ argument
21 #define REG_WR( scope, inst, reg, val ) \ argument
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
41 #define REG_RD_INT( scope, inst, reg ) \ argument
46 #define REG_WR_INT( scope, inst, reg, val ) \ argument
51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
72 #define REG_ADDR( scope, inst, reg ) \ argument
77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_sw_mpu_defs.h15 #define REG_RD( scope, inst, reg ) \ argument
21 #define REG_WR( scope, inst, reg, val ) \ argument
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
41 #define REG_RD_INT( scope, inst, reg ) \ argument
46 #define REG_WR_INT( scope, inst, reg, val ) \ argument
51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
72 #define REG_ADDR( scope, inst, reg ) \ argument
77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
/linux-4.1.27/arch/cris/include/arch-v32/arch/hwregs/iop/
Diop_version_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_scrc_out_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_scrc_in_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_fifo_out_extra_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_fifo_in_extra_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_trigger_grp_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_mpu_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_sap_in_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_crc_par_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_fifo_in_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_timer_grp_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_fifo_out_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_dmc_out_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_dmc_in_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_sap_out_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_spu_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_sw_spu_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_sw_cfg_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_sw_cpu_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_sw_mpu_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
/linux-4.1.27/arch/cris/include/arch-v32/arch/hwregs/
Dirq_nmi_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dstrcop_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dconfig_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Drt_trace_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Data_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dmarb_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
[all …]
Dbif_slave_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dmarb_bp_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
Dbif_core_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dser_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Ddma_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dsser_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Deth_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dextmem_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dbif_dma_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
/linux-4.1.27/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/asm/
Diop_version_defs_asm.h15 #define REG_FIELD( scope, reg, field, value ) \ argument
21 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
27 #define REG_MASK( scope, reg, field ) \ argument
33 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
37 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
46 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_sap_in_defs_asm.h15 #define REG_FIELD( scope, reg, field, value ) \ argument
21 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
27 #define REG_MASK( scope, reg, field ) \ argument
33 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
37 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
46 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_sap_out_defs_asm.h15 #define REG_FIELD( scope, reg, field, value ) \ argument
21 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
27 #define REG_MASK( scope, reg, field ) \ argument
33 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
37 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
46 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_sw_spu_defs_asm.h15 #define REG_FIELD( scope, reg, field, value ) \ argument
21 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
27 #define REG_MASK( scope, reg, field ) \ argument
33 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
37 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
46 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_sw_cfg_defs_asm.h15 #define REG_FIELD( scope, reg, field, value ) \ argument
21 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
27 #define REG_MASK( scope, reg, field ) \ argument
33 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
37 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
46 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_sw_cpu_defs_asm.h15 #define REG_FIELD( scope, reg, field, value ) \ argument
21 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
27 #define REG_MASK( scope, reg, field ) \ argument
33 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
37 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
46 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_sw_mpu_defs_asm.h15 #define REG_FIELD( scope, reg, field, value ) \ argument
21 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
27 #define REG_MASK( scope, reg, field ) \ argument
33 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
37 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
46 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
/linux-4.1.27/arch/cris/include/arch-v32/arch/hwregs/iop/asm/
Diop_version_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_scrc_in_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_scrc_out_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_crc_par_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_fifo_out_extra_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_fifo_in_extra_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_trigger_grp_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_mpu_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_sap_in_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_fifo_in_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_timer_grp_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_fifo_out_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_dmc_in_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_dmc_out_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_sap_out_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_spu_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_sw_spu_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_sw_cfg_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_sw_cpu_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_sw_mpu_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
/linux-4.1.27/drivers/staging/lustre/lustre/include/
Dlu_ref.h127 const char *scope, in lu_ref_add()
134 const char *scope, in lu_ref_add_atomic()
142 const char *scope, in lu_ref_add_at()
147 static inline void lu_ref_del(struct lu_ref *ref, const char *scope, in lu_ref_del()
153 const char *scope, const void *source0, in lu_ref_set_at()
159 const char *scope, const void *source) in lu_ref_del_at()
Dlu_object.h858 const char *scope, in lu_object_ref_add()
866 const char *scope, in lu_object_ref_add_at()
873 const char *scope, const void *source) in lu_object_ref_del()
880 const char *scope, const void *source) in lu_object_ref_del_at()
/linux-4.1.27/arch/cris/include/arch-v32/arch/hwregs/asm/
Dirq_nmi_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dstrcop_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dcris_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dstrmux_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dconfig_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Drt_trace_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dtimer_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dmmu_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Data_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dgio_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dbif_slave_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dmarb_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
325 #define REG_FIELD( scope, reg, field, value ) \ argument
331 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
337 #define REG_MASK( scope, reg, field ) \ argument
[all …]
Ddma_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dbif_core_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dintr_vect_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dser_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dbif_dma_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dsser_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Deth_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
/linux-4.1.27/arch/cris/include/arch-v32/mach-a3/mach/hwregs/
Dstrmux_defs.h15 #define REG_RD( scope, inst, reg ) \ argument
21 #define REG_WR( scope, inst, reg, val ) \ argument
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
41 #define REG_RD_INT( scope, inst, reg ) \ argument
46 #define REG_WR_INT( scope, inst, reg, val ) \ argument
51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
72 #define REG_ADDR( scope, inst, reg ) \ argument
77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dl2cache_defs.h15 #define REG_RD( scope, inst, reg ) \ argument
21 #define REG_WR( scope, inst, reg, val ) \ argument
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
41 #define REG_RD_INT( scope, inst, reg ) \ argument
46 #define REG_WR_INT( scope, inst, reg, val ) \ argument
51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
72 #define REG_ADDR( scope, inst, reg ) \ argument
77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dclkgen_defs.h15 #define REG_RD( scope, inst, reg ) \ argument
21 #define REG_WR( scope, inst, reg, val ) \ argument
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
41 #define REG_RD_INT( scope, inst, reg ) \ argument
46 #define REG_WR_INT( scope, inst, reg, val ) \ argument
51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
72 #define REG_ADDR( scope, inst, reg ) \ argument
77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dmarb_bar_defs.h15 #define REG_RD( scope, inst, reg ) \ argument
21 #define REG_WR( scope, inst, reg, val ) \ argument
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
41 #define REG_RD_INT( scope, inst, reg ) \ argument
46 #define REG_WR_INT( scope, inst, reg, val ) \ argument
51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
72 #define REG_ADDR( scope, inst, reg ) \ argument
77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
[all …]
Dtimer_defs.h15 #define REG_RD( scope, inst, reg ) \ argument
21 #define REG_WR( scope, inst, reg, val ) \ argument
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
41 #define REG_RD_INT( scope, inst, reg ) \ argument
46 #define REG_WR_INT( scope, inst, reg, val ) \ argument
51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
72 #define REG_ADDR( scope, inst, reg ) \ argument
77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dddr2_defs.h15 #define REG_RD( scope, inst, reg ) \ argument
21 #define REG_WR( scope, inst, reg, val ) \ argument
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
41 #define REG_RD_INT( scope, inst, reg ) \ argument
46 #define REG_WR_INT( scope, inst, reg, val ) \ argument
51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
72 #define REG_ADDR( scope, inst, reg ) \ argument
77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dmarb_foo_defs.h15 #define REG_RD( scope, inst, reg ) \ argument
21 #define REG_WR( scope, inst, reg, val ) \ argument
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
41 #define REG_RD_INT( scope, inst, reg ) \ argument
46 #define REG_WR_INT( scope, inst, reg, val ) \ argument
51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
72 #define REG_ADDR( scope, inst, reg ) \ argument
77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
[all …]
Dpio_defs.h15 #define REG_RD( scope, inst, reg ) \ argument
21 #define REG_WR( scope, inst, reg, val ) \ argument
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
41 #define REG_RD_INT( scope, inst, reg ) \ argument
46 #define REG_WR_INT( scope, inst, reg, val ) \ argument
51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
72 #define REG_ADDR( scope, inst, reg ) \ argument
77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dpinmux_defs.h15 #define REG_RD( scope, inst, reg ) \ argument
21 #define REG_WR( scope, inst, reg, val ) \ argument
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
41 #define REG_RD_INT( scope, inst, reg ) \ argument
46 #define REG_WR_INT( scope, inst, reg, val ) \ argument
51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
72 #define REG_ADDR( scope, inst, reg ) \ argument
77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dintr_vect_defs.h15 #define REG_RD( scope, inst, reg ) \ argument
21 #define REG_WR( scope, inst, reg, val ) \ argument
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
41 #define REG_RD_INT( scope, inst, reg ) \ argument
46 #define REG_WR_INT( scope, inst, reg, val ) \ argument
51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
72 #define REG_ADDR( scope, inst, reg ) \ argument
77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dgio_defs.h15 #define REG_RD( scope, inst, reg ) \ argument
21 #define REG_WR( scope, inst, reg, val ) \ argument
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
41 #define REG_RD_INT( scope, inst, reg ) \ argument
46 #define REG_WR_INT( scope, inst, reg, val ) \ argument
51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
72 #define REG_ADDR( scope, inst, reg ) \ argument
77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
/linux-4.1.27/arch/cris/include/arch-v32/mach-fs/mach/hwregs/
Dstrmux_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dconfig_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dmarb_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
[all …]
Dtimer_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dbif_slave_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dmarb_bp_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
Dgio_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dintr_vect_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dbif_core_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dpinmux_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dbif_dma_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
/linux-4.1.27/drivers/acpi/acpica/
Dpsscope.c108 union acpi_generic_state *scope; in acpi_ps_init_scope() local
149 union acpi_generic_state *scope; in acpi_ps_push_scope() local
202 union acpi_generic_state *scope = parser_state->scope; in acpi_ps_pop_scope() local
249 union acpi_generic_state *scope; in acpi_ps_cleanup_scope() local
Daclocal.h651 struct acpi_scope_state scope; member
811 union acpi_generic_state *scope; /* Current scope */ member
/linux-4.1.27/arch/cris/include/arch-v32/mach-fs/mach/hwregs/asm/
Dconfig_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dtimer_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dgio_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dbif_core_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dpinmux_defs_asm.h18 #define REG_FIELD( scope, reg, field, value ) \ argument
24 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
30 #define REG_MASK( scope, reg, field ) \ argument
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
/linux-4.1.27/drivers/scsi/aic7xxx/aicasm/
Daicasm_symbol.h172 typedef struct scope { struct
176 scope_type type; argument
177 int inner_scope_patches; argument
185 SLIST_HEAD(scope_list, scope); argument
Daicasm.c461 dump_scope(scope_t *scope) in dump_scope()
489 emit_patch(scope_t *scope, int patch) in emit_patch()
781 process_scope(scope_t *scope) in process_scope()
/linux-4.1.27/arch/cris/include/arch-v32/mach-a3/mach/hwregs/asm/
Dclkgen_defs_asm.h15 #define REG_FIELD( scope, reg, field, value ) \ argument
21 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
27 #define REG_MASK( scope, reg, field ) \ argument
33 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
37 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
46 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dtimer_defs_asm.h15 #define REG_FIELD( scope, reg, field, value ) \ argument
21 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
27 #define REG_MASK( scope, reg, field ) \ argument
33 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
37 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
46 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dddr2_defs_asm.h15 #define REG_FIELD( scope, reg, field, value ) \ argument
21 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
27 #define REG_MASK( scope, reg, field ) \ argument
33 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
37 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
46 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dpio_defs_asm.h15 #define REG_FIELD( scope, reg, field, value ) \ argument
21 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
27 #define REG_MASK( scope, reg, field ) \ argument
33 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
37 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
46 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dpinmux_defs_asm.h15 #define REG_FIELD( scope, reg, field, value ) \ argument
21 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
27 #define REG_MASK( scope, reg, field ) \ argument
33 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
37 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
46 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dgio_defs_asm.h15 #define REG_FIELD( scope, reg, field, value ) \ argument
21 #define REG_STATE( scope, reg, field, symbolic_value ) \ argument
27 #define REG_MASK( scope, reg, field ) \ argument
33 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb argument
37 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit argument
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
46 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
/linux-4.1.27/arch/m68k/kernel/
Dsys_m68k.c67 cache_flush_040 (unsigned long addr, int scope, int cache, unsigned long len) in cache_flush_040()
227 cache_flush_060 (unsigned long addr, int scope, int cache, unsigned long len) in cache_flush_060()
377 sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len) in sys_cacheflush()
525 sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len) in sys_cacheflush()
/linux-4.1.27/net/ipv6/
Daddrconf_core.c18 #define IPV6_ADDR_SCOPE_TYPE(scope) ((scope) << 16) argument
20 static inline unsigned int ipv6_addr_scope2type(unsigned int scope) in ipv6_addr_scope2type()
Daddrconf.c830 int scope, u32 flags, u32 valid_lft, u32 prefered_lft) in ipv6_add_addr()
1215 int scope; member
1737 int scope = ifp->scope; in addrconf_dad_failure() local
2575 int scope; in inet6_addr_add() local
2736 int plen, int scope) in add_addr()
2758 int scope, plen; in sit_add_v4_addrs() local
4170 u8 scope, int ifindex) in put_ifaddrmsg()
4277 u8 scope = RT_SCOPE_UNIVERSE; in inet6_fill_ifmcaddr() local
4303 u8 scope = RT_SCOPE_UNIVERSE; in inet6_fill_ifacaddr() local
/linux-4.1.27/arch/powerpc/platforms/pseries/
Dmobility.c43 static int mobility_rtas_call(int token, char *buf, s32 scope) in mobility_rtas_call()
130 static int update_dt_node(__be32 phandle, s32 scope) in update_dt_node()
239 int pseries_devicetree_update(s32 scope) in pseries_devicetree_update()
/linux-4.1.27/net/sctp/
Dbind_addr.c60 sctp_scope_t scope, gfp_t gfp, in sctp_bind_addr_copy()
439 sctp_scope_t scope, gfp_t gfp, in sctp_copy_one_addr()
483 int sctp_in_scope(struct net *net, const union sctp_addr *addr, sctp_scope_t scope) in sctp_in_scope()
Dassociola.c69 sctp_scope_t scope, in sctp_association_init()
297 sctp_scope_t scope, in sctp_association_new()
1542 sctp_scope_t scope, gfp_t gfp) in sctp_assoc_set_bind_addr_from_ep()
Dsm_make_chunk.c1575 sctp_scope_t scope; in sctp_make_temp_asoc() local
1702 sctp_scope_t scope; in sctp_unpack_cookie() local
2496 sctp_scope_t scope; in sctp_process_param() local
Dipv6.c244 sctp_scope_t scope; in sctp_v6_get_dst() local
Dprotocol.c199 sctp_scope_t scope, gfp_t gfp, int copy_flags) in sctp_copy_local_addr_list()
Dsocket.c1051 sctp_scope_t scope; in __sctp_connect() local
1600 sctp_scope_t scope; in sctp_sendmsg() local
/linux-4.1.27/drivers/staging/lustre/lustre/obdclass/
Dcl_lock.c562 const char *scope, const void *source) in cl_lock_peek()
872 const char *scope, const void *source) in cl_lock_hold_release()
2019 const char *scope, const void *source) in cl_lock_hold_mutex()
2050 const char *scope, const void *source) in cl_lock_hold()
2067 const char *scope, const void *source) in cl_lock_request()
2112 const char *scope, const void *source) in cl_lock_hold_add()
2130 const char *scope, const void *source) in cl_lock_unhold()
2143 const char *scope, const void *source) in cl_lock_release()
Dobd_config.c711 const char *scope, const void *source) in class_incref()
722 void class_decref(struct obd_device *obd, const char *scope, const void *source) in class_decref()
/linux-4.1.27/net/ipv4/
Dfib_lookup.h47 u8 scope; member
Ddevinet.c1193 __be32 inet_select_addr(const struct net_device *dev, __be32 dst, int scope) in inet_select_addr()
1243 __be32 local, int scope) in confirm_addr_indev()
1288 __be32 dst, __be32 local, int scope) in inet_confirm_addr()
Dfib_semantics.c1113 int scope = RT_SCOPE_NOWHERE; in fib_sync_down_dev() local
Darp.c356 int scope; in arp_ignore() local
Dfib_frontend.c262 int scope; in fib_compute_spec_dst() local
/linux-4.1.27/drivers/target/
Dtarget_core_pr.c2228 core_scsi3_pro_reserve(struct se_cmd *cmd, int type, int scope, u64 res_key) in core_scsi3_pro_reserve()
2384 core_scsi3_emulate_pro_reserve(struct se_cmd *cmd, int type, int scope, in core_scsi3_emulate_pro_reserve()
2472 core_scsi3_emulate_pro_release(struct se_cmd *cmd, int type, int scope, in core_scsi3_emulate_pro_release()
2720 int scope, in __core_scsi3_complete_pro_preempt()
2783 core_scsi3_pro_preempt(struct se_cmd *cmd, int type, int scope, u64 res_key, in core_scsi3_pro_preempt()
3078 core_scsi3_emulate_pro_preempt(struct se_cmd *cmd, int type, int scope, in core_scsi3_emulate_pro_preempt()
3116 int new_reg = 0, type, scope, matching_iname; in core_scsi3_emulate_pro_register_and_move() local
3530 int sa, scope, type, aptpl; in target_scsi3_emulate_pr_out() local
Dtarget_core_configfs.c1038 u8 type = 0, scope; in target_core_dev_pr_store_attr_res_aptpl_metadata() local
/linux-4.1.27/arch/powerpc/include/asm/
Dio_event_irq.h44 uint8_t scope; /* 0x02 Error/Event Scope */ member
/linux-4.1.27/net/tipc/
Dname_table.c121 u32 scope, u32 node, u32 port_ref, in publ_create()
235 u32 upper, u32 scope, in tipc_nameseq_insert_publ()
471 u32 lower, u32 upper, u32 scope, in tipc_nametbl_insert_publ()
664 u32 upper, u32 scope, u32 port_ref, in tipc_nametbl_publish()
Dname_table.h73 u32 scope; member
Dname_distr.c427 int scope; in tipc_named_reinit() local
Dsocket.c722 u32 scope = TIPC_CLUSTER_SCOPE; in tipc_sk_mcast_rcv() local
2171 static int tipc_sk_publish(struct tipc_sock *tsk, uint scope, in tipc_sk_publish()
2195 static int tipc_sk_withdraw(struct tipc_sock *tsk, uint scope, in tipc_sk_withdraw()
/linux-4.1.27/net/decnet/
Ddn_fib.c66 u8 scope; member
692 int scope = RT_SCOPE_NOWHERE; in dn_fib_sync_down() local
Ddn_table.c300 u32 tb_id, u8 type, u8 scope, void *dst, int dst_len, in dn_fib_dump_info()
Ddn_route.c922 static __le16 dnet_select_source(const struct net_device *dev, __le16 daddr, int scope) in dnet_select_source()
/linux-4.1.27/drivers/iommu/
Dintel_irq_remapping.c721 static int ir_parse_one_hpet_scope(struct acpi_dmar_device_scope *scope, in ir_parse_one_hpet_scope()
766 static int ir_parse_one_ioapic_scope(struct acpi_dmar_device_scope *scope, in ir_parse_one_ioapic_scope()
816 struct acpi_dmar_device_scope *scope; in ir_parse_ioapic_hpet_scope() local
Ddmar.c92 struct acpi_dmar_device_scope *scope; in dmar_alloc_dev_scope() local
227 struct acpi_dmar_device_scope *scope; in dmar_insert_dev_scope() local
690 struct acpi_dmar_device_scope *scope; in dmar_acpi_insert_dev_scope() local
/linux-4.1.27/arch/s390/kernel/
Dcache.c42 unsigned char scope : 2; member
/linux-4.1.27/arch/powerpc/kernel/
Drtasd.c289 static void prrn_schedule_update(u32 scope) in prrn_schedule_update()
/linux-4.1.27/include/net/
Dip_fib.h136 unsigned char scope; member
154 unsigned char scope; member
Dif_inet6.h57 __u16 scope; member
233 unsigned char scope = broadcast[5] & 0xF; in ipv6_ib_mc_map() local
Ddn_fib.h14 unsigned char scope; member
Dflow.h85 __u32 mark, __u8 tos, __u8 scope, in flowi4_init_output()
Dip.h405 unsigned char scope = broadcast[5] & 0xF; in ip_ib_mc_map() local
/linux-4.1.27/include/uapi/linux/
Dtipc.h181 signed char scope; member
/linux-4.1.27/drivers/target/iscsi/
Discsi_target_parameters.c147 char *name, char *value, u8 phase, u8 scope, u8 sender, in iscsi_set_default_param()
Discsi_target_parameters.h17 u8 scope; member
/linux-4.1.27/include/rdma/
Dib_sa.h197 u8 scope; member
/linux-4.1.27/drivers/crypto/qat/qat_common/
Dicp_qat_uclo.h261 char scope; member
/linux-4.1.27/include/net/sctp/
Dstructs.h480 sctp_scope_t (*scope) (union sctp_addr *); member