| /linux-4.4.14/drivers/gpu/drm/bridge/ |
| H A D | dw_hdmi.c | 18 #include <linux/hdmi.h>
144 void (*write)(struct dw_hdmi *hdmi, u8 val, int offset);
145 u8 (*read)(struct dw_hdmi *hdmi, int offset);
156 static void dw_hdmi_writel(struct dw_hdmi *hdmi, u8 val, int offset) dw_hdmi_writel() argument
158 writel(val, hdmi->regs + (offset << 2)); dw_hdmi_writel()
161 static u8 dw_hdmi_readl(struct dw_hdmi *hdmi, int offset) dw_hdmi_readl() argument
163 return readl(hdmi->regs + (offset << 2)); dw_hdmi_readl()
166 static void dw_hdmi_writeb(struct dw_hdmi *hdmi, u8 val, int offset) dw_hdmi_writeb() argument
168 writeb(val, hdmi->regs + offset); dw_hdmi_writeb()
171 static u8 dw_hdmi_readb(struct dw_hdmi *hdmi, int offset) dw_hdmi_readb() argument
173 return readb(hdmi->regs + offset); dw_hdmi_readb()
176 static inline void hdmi_writeb(struct dw_hdmi *hdmi, u8 val, int offset) hdmi_writeb() argument
178 hdmi->write(hdmi, val, offset); hdmi_writeb()
181 static inline u8 hdmi_readb(struct dw_hdmi *hdmi, int offset) hdmi_readb() argument
183 return hdmi->read(hdmi, offset); hdmi_readb()
186 static void hdmi_modb(struct dw_hdmi *hdmi, u8 data, u8 mask, unsigned reg) hdmi_modb() argument
188 u8 val = hdmi_readb(hdmi, reg) & ~mask; hdmi_modb()
191 hdmi_writeb(hdmi, val, reg); hdmi_modb()
194 static void hdmi_mask_writeb(struct dw_hdmi *hdmi, u8 data, unsigned int reg, hdmi_mask_writeb() argument
197 hdmi_modb(hdmi, data << shift, mask, reg); hdmi_mask_writeb()
200 static void hdmi_set_cts_n(struct dw_hdmi *hdmi, unsigned int cts, hdmi_set_cts_n() argument
204 hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3); hdmi_set_cts_n()
207 hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_N_SHIFT_MASK, HDMI_AUD_CTS3); hdmi_set_cts_n()
209 hdmi_writeb(hdmi, ((cts >> 16) & HDMI_AUD_CTS3_AUDCTS19_16_MASK) | hdmi_set_cts_n()
211 hdmi_writeb(hdmi, (cts >> 8) & 0xff, HDMI_AUD_CTS2); hdmi_set_cts_n()
212 hdmi_writeb(hdmi, cts & 0xff, HDMI_AUD_CTS1); hdmi_set_cts_n()
214 hdmi_writeb(hdmi, (n >> 16) & 0x0f, HDMI_AUD_N3); hdmi_set_cts_n()
215 hdmi_writeb(hdmi, (n >> 8) & 0xff, HDMI_AUD_N2); hdmi_set_cts_n()
216 hdmi_writeb(hdmi, n & 0xff, HDMI_AUD_N1); hdmi_set_cts_n()
275 static void hdmi_set_clk_regenerator(struct dw_hdmi *hdmi, hdmi_set_clk_regenerator() argument
295 dev_dbg(hdmi->dev, "%s: fs=%uHz ftdms=%lu.%03luMHz N=%d cts=%d\n", hdmi_set_clk_regenerator()
299 spin_lock_irq(&hdmi->audio_lock); hdmi_set_clk_regenerator()
300 hdmi->audio_n = n; hdmi_set_clk_regenerator()
301 hdmi->audio_cts = cts; hdmi_set_clk_regenerator()
302 hdmi_set_cts_n(hdmi, cts, hdmi->audio_enable ? n : 0); hdmi_set_clk_regenerator()
303 spin_unlock_irq(&hdmi->audio_lock); hdmi_set_clk_regenerator()
306 static void hdmi_init_clk_regenerator(struct dw_hdmi *hdmi) hdmi_init_clk_regenerator() argument
308 mutex_lock(&hdmi->audio_mutex); hdmi_init_clk_regenerator()
309 hdmi_set_clk_regenerator(hdmi, 74250000, hdmi->sample_rate); hdmi_init_clk_regenerator()
310 mutex_unlock(&hdmi->audio_mutex); hdmi_init_clk_regenerator()
313 static void hdmi_clk_regenerator_update_pixel_clock(struct dw_hdmi *hdmi) hdmi_clk_regenerator_update_pixel_clock() argument
315 mutex_lock(&hdmi->audio_mutex); hdmi_clk_regenerator_update_pixel_clock()
316 hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mpixelclock, hdmi_clk_regenerator_update_pixel_clock()
317 hdmi->sample_rate); hdmi_clk_regenerator_update_pixel_clock()
318 mutex_unlock(&hdmi->audio_mutex); hdmi_clk_regenerator_update_pixel_clock()
321 void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate) dw_hdmi_set_sample_rate() argument
323 mutex_lock(&hdmi->audio_mutex); dw_hdmi_set_sample_rate()
324 hdmi->sample_rate = rate; dw_hdmi_set_sample_rate()
325 hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mpixelclock, dw_hdmi_set_sample_rate()
326 hdmi->sample_rate); dw_hdmi_set_sample_rate()
327 mutex_unlock(&hdmi->audio_mutex); dw_hdmi_set_sample_rate()
331 void dw_hdmi_audio_enable(struct dw_hdmi *hdmi) dw_hdmi_audio_enable() argument
335 spin_lock_irqsave(&hdmi->audio_lock, flags); dw_hdmi_audio_enable()
336 hdmi->audio_enable = true; dw_hdmi_audio_enable()
337 hdmi_set_cts_n(hdmi, hdmi->audio_cts, hdmi->audio_n); dw_hdmi_audio_enable()
338 spin_unlock_irqrestore(&hdmi->audio_lock, flags); dw_hdmi_audio_enable()
342 void dw_hdmi_audio_disable(struct dw_hdmi *hdmi) dw_hdmi_audio_disable() argument
346 spin_lock_irqsave(&hdmi->audio_lock, flags); dw_hdmi_audio_disable()
347 hdmi->audio_enable = false; dw_hdmi_audio_disable()
348 hdmi_set_cts_n(hdmi, hdmi->audio_cts, 0); dw_hdmi_audio_disable()
349 spin_unlock_irqrestore(&hdmi->audio_lock, flags); dw_hdmi_audio_disable()
360 static void hdmi_video_sample(struct dw_hdmi *hdmi) hdmi_video_sample() argument
365 if (hdmi->hdmi_data.enc_in_format == RGB) { hdmi_video_sample()
366 if (hdmi->hdmi_data.enc_color_depth == 8) hdmi_video_sample()
368 else if (hdmi->hdmi_data.enc_color_depth == 10) hdmi_video_sample()
370 else if (hdmi->hdmi_data.enc_color_depth == 12) hdmi_video_sample()
372 else if (hdmi->hdmi_data.enc_color_depth == 16) hdmi_video_sample()
376 } else if (hdmi->hdmi_data.enc_in_format == YCBCR444) { hdmi_video_sample()
377 if (hdmi->hdmi_data.enc_color_depth == 8) hdmi_video_sample()
379 else if (hdmi->hdmi_data.enc_color_depth == 10) hdmi_video_sample()
381 else if (hdmi->hdmi_data.enc_color_depth == 12) hdmi_video_sample()
383 else if (hdmi->hdmi_data.enc_color_depth == 16) hdmi_video_sample()
387 } else if (hdmi->hdmi_data.enc_in_format == YCBCR422_8BITS) { hdmi_video_sample()
388 if (hdmi->hdmi_data.enc_color_depth == 8) hdmi_video_sample()
390 else if (hdmi->hdmi_data.enc_color_depth == 10) hdmi_video_sample()
392 else if (hdmi->hdmi_data.enc_color_depth == 12) hdmi_video_sample()
401 hdmi_writeb(hdmi, val, HDMI_TX_INVID0); hdmi_video_sample()
407 hdmi_writeb(hdmi, val, HDMI_TX_INSTUFFING); hdmi_video_sample()
408 hdmi_writeb(hdmi, 0x0, HDMI_TX_GYDATA0); hdmi_video_sample()
409 hdmi_writeb(hdmi, 0x0, HDMI_TX_GYDATA1); hdmi_video_sample()
410 hdmi_writeb(hdmi, 0x0, HDMI_TX_RCRDATA0); hdmi_video_sample()
411 hdmi_writeb(hdmi, 0x0, HDMI_TX_RCRDATA1); hdmi_video_sample()
412 hdmi_writeb(hdmi, 0x0, HDMI_TX_BCBDATA0); hdmi_video_sample()
413 hdmi_writeb(hdmi, 0x0, HDMI_TX_BCBDATA1); hdmi_video_sample()
416 static int is_color_space_conversion(struct dw_hdmi *hdmi) is_color_space_conversion() argument
418 return hdmi->hdmi_data.enc_in_format != hdmi->hdmi_data.enc_out_format; is_color_space_conversion()
421 static int is_color_space_decimation(struct dw_hdmi *hdmi) is_color_space_decimation() argument
423 if (hdmi->hdmi_data.enc_out_format != YCBCR422_8BITS) is_color_space_decimation()
425 if (hdmi->hdmi_data.enc_in_format == RGB || is_color_space_decimation()
426 hdmi->hdmi_data.enc_in_format == YCBCR444) is_color_space_decimation()
431 static int is_color_space_interpolation(struct dw_hdmi *hdmi) is_color_space_interpolation() argument
433 if (hdmi->hdmi_data.enc_in_format != YCBCR422_8BITS) is_color_space_interpolation()
435 if (hdmi->hdmi_data.enc_out_format == RGB || is_color_space_interpolation()
436 hdmi->hdmi_data.enc_out_format == YCBCR444) is_color_space_interpolation()
441 static void dw_hdmi_update_csc_coeffs(struct dw_hdmi *hdmi) dw_hdmi_update_csc_coeffs() argument
447 if (is_color_space_conversion(hdmi)) { dw_hdmi_update_csc_coeffs()
448 if (hdmi->hdmi_data.enc_out_format == RGB) { dw_hdmi_update_csc_coeffs()
449 if (hdmi->hdmi_data.colorimetry == dw_hdmi_update_csc_coeffs()
454 } else if (hdmi->hdmi_data.enc_in_format == RGB) { dw_hdmi_update_csc_coeffs()
455 if (hdmi->hdmi_data.colorimetry == dw_hdmi_update_csc_coeffs()
470 hdmi_writeb(hdmi, coeff_a & 0xff, HDMI_CSC_COEF_A1_LSB + i * 2); dw_hdmi_update_csc_coeffs()
471 hdmi_writeb(hdmi, coeff_a >> 8, HDMI_CSC_COEF_A1_MSB + i * 2); dw_hdmi_update_csc_coeffs()
472 hdmi_writeb(hdmi, coeff_b & 0xff, HDMI_CSC_COEF_B1_LSB + i * 2); dw_hdmi_update_csc_coeffs()
473 hdmi_writeb(hdmi, coeff_b >> 8, HDMI_CSC_COEF_B1_MSB + i * 2); dw_hdmi_update_csc_coeffs()
474 hdmi_writeb(hdmi, coeff_c & 0xff, HDMI_CSC_COEF_C1_LSB + i * 2); dw_hdmi_update_csc_coeffs()
475 hdmi_writeb(hdmi, coeff_c >> 8, HDMI_CSC_COEF_C1_MSB + i * 2); dw_hdmi_update_csc_coeffs()
478 hdmi_modb(hdmi, csc_scale, HDMI_CSC_SCALE_CSCSCALE_MASK, dw_hdmi_update_csc_coeffs()
482 static void hdmi_video_csc(struct dw_hdmi *hdmi) hdmi_video_csc() argument
489 if (is_color_space_interpolation(hdmi)) hdmi_video_csc()
491 else if (is_color_space_decimation(hdmi)) hdmi_video_csc()
494 if (hdmi->hdmi_data.enc_color_depth == 8) hdmi_video_csc()
496 else if (hdmi->hdmi_data.enc_color_depth == 10) hdmi_video_csc()
498 else if (hdmi->hdmi_data.enc_color_depth == 12) hdmi_video_csc()
500 else if (hdmi->hdmi_data.enc_color_depth == 16) hdmi_video_csc()
506 hdmi_writeb(hdmi, interpolation | decimation, HDMI_CSC_CFG); hdmi_video_csc()
507 hdmi_modb(hdmi, color_depth, HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK, hdmi_video_csc()
510 dw_hdmi_update_csc_coeffs(hdmi); hdmi_video_csc()
518 static void hdmi_video_packetize(struct dw_hdmi *hdmi) hdmi_video_packetize() argument
523 struct hdmi_data_info *hdmi_data = &hdmi->hdmi_data; hdmi_video_packetize()
563 hdmi_writeb(hdmi, val, HDMI_VP_PR_CD); hdmi_video_packetize()
565 hdmi_modb(hdmi, HDMI_VP_STUFF_PR_STUFFING_STUFFING_MODE, hdmi_video_packetize()
577 hdmi_modb(hdmi, vp_conf, hdmi_video_packetize()
581 hdmi_modb(hdmi, 1 << HDMI_VP_STUFF_IDEFAULT_PHASE_OFFSET, hdmi_video_packetize()
584 hdmi_writeb(hdmi, remap_size, HDMI_VP_REMAP); hdmi_video_packetize()
602 hdmi_modb(hdmi, vp_conf, hdmi_video_packetize()
606 hdmi_modb(hdmi, HDMI_VP_STUFF_PP_STUFFING_STUFFING_MODE | hdmi_video_packetize()
611 hdmi_modb(hdmi, output_select, HDMI_VP_CONF_OUTPUT_SELECTOR_MASK, hdmi_video_packetize()
615 static inline void hdmi_phy_test_clear(struct dw_hdmi *hdmi, hdmi_phy_test_clear() argument
618 hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTCLR_OFFSET, hdmi_phy_test_clear()
622 static inline void hdmi_phy_test_enable(struct dw_hdmi *hdmi, hdmi_phy_test_enable() argument
625 hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTEN_OFFSET, hdmi_phy_test_enable()
629 static inline void hdmi_phy_test_clock(struct dw_hdmi *hdmi, hdmi_phy_test_clock() argument
632 hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTCLK_OFFSET, hdmi_phy_test_clock()
636 static inline void hdmi_phy_test_din(struct dw_hdmi *hdmi, hdmi_phy_test_din() argument
639 hdmi_writeb(hdmi, bit, HDMI_PHY_TST1); hdmi_phy_test_din()
642 static inline void hdmi_phy_test_dout(struct dw_hdmi *hdmi, hdmi_phy_test_dout() argument
645 hdmi_writeb(hdmi, bit, HDMI_PHY_TST2); hdmi_phy_test_dout()
648 static bool hdmi_phy_wait_i2c_done(struct dw_hdmi *hdmi, int msec) hdmi_phy_wait_i2c_done() argument
652 while ((val = hdmi_readb(hdmi, HDMI_IH_I2CMPHY_STAT0) & 0x3) == 0) { hdmi_phy_wait_i2c_done()
657 hdmi_writeb(hdmi, val, HDMI_IH_I2CMPHY_STAT0); hdmi_phy_wait_i2c_done()
662 static void __hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data, __hdmi_phy_i2c_write() argument
665 hdmi_writeb(hdmi, 0xFF, HDMI_IH_I2CMPHY_STAT0); __hdmi_phy_i2c_write()
666 hdmi_writeb(hdmi, addr, HDMI_PHY_I2CM_ADDRESS_ADDR); __hdmi_phy_i2c_write()
667 hdmi_writeb(hdmi, (unsigned char)(data >> 8), __hdmi_phy_i2c_write()
669 hdmi_writeb(hdmi, (unsigned char)(data >> 0), __hdmi_phy_i2c_write()
671 hdmi_writeb(hdmi, HDMI_PHY_I2CM_OPERATION_ADDR_WRITE, __hdmi_phy_i2c_write()
673 hdmi_phy_wait_i2c_done(hdmi, 1000); __hdmi_phy_i2c_write()
676 static int hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data, hdmi_phy_i2c_write() argument
679 __hdmi_phy_i2c_write(hdmi, data, addr); hdmi_phy_i2c_write()
683 static void dw_hdmi_phy_enable_powerdown(struct dw_hdmi *hdmi, bool enable) dw_hdmi_phy_enable_powerdown() argument
685 hdmi_mask_writeb(hdmi, !enable, HDMI_PHY_CONF0, dw_hdmi_phy_enable_powerdown()
690 static void dw_hdmi_phy_enable_tmds(struct dw_hdmi *hdmi, u8 enable) dw_hdmi_phy_enable_tmds() argument
692 hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, dw_hdmi_phy_enable_tmds()
697 static void dw_hdmi_phy_enable_spare(struct dw_hdmi *hdmi, u8 enable) dw_hdmi_phy_enable_spare() argument
699 hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, dw_hdmi_phy_enable_spare()
704 static void dw_hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, u8 enable) dw_hdmi_phy_gen2_pddq() argument
706 hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, dw_hdmi_phy_gen2_pddq()
711 static void dw_hdmi_phy_gen2_txpwron(struct dw_hdmi *hdmi, u8 enable) dw_hdmi_phy_gen2_txpwron() argument
713 hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, dw_hdmi_phy_gen2_txpwron()
718 static void dw_hdmi_phy_sel_data_en_pol(struct dw_hdmi *hdmi, u8 enable) dw_hdmi_phy_sel_data_en_pol() argument
720 hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, dw_hdmi_phy_sel_data_en_pol()
725 static void dw_hdmi_phy_sel_interface_control(struct dw_hdmi *hdmi, u8 enable) dw_hdmi_phy_sel_interface_control() argument
727 hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, dw_hdmi_phy_sel_interface_control()
732 static int hdmi_phy_configure(struct dw_hdmi *hdmi, unsigned char prep, hdmi_phy_configure() argument
737 const struct dw_hdmi_plat_data *pdata = hdmi->plat_data; hdmi_phy_configure()
762 if (hdmi->hdmi_data.video_mode.mpixelclock <= hdmi_phy_configure()
767 if (hdmi->hdmi_data.video_mode.mpixelclock <= hdmi_phy_configure()
772 if (hdmi->hdmi_data.video_mode.mpixelclock <= hdmi_phy_configure()
779 dev_err(hdmi->dev, "Pixel clock %d - unsupported by HDMI\n", hdmi_phy_configure()
780 hdmi->hdmi_data.video_mode.mpixelclock); hdmi_phy_configure()
790 hdmi_writeb(hdmi, val, HDMI_MC_FLOWCTRL); hdmi_phy_configure()
793 dw_hdmi_phy_gen2_txpwron(hdmi, 0); hdmi_phy_configure()
796 dw_hdmi_phy_gen2_pddq(hdmi, 1); hdmi_phy_configure()
799 hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_DEASSERT, HDMI_MC_PHYRSTZ); hdmi_phy_configure()
800 hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_ASSERT, HDMI_MC_PHYRSTZ); hdmi_phy_configure()
802 hdmi_writeb(hdmi, HDMI_MC_HEACPHY_RST_ASSERT, HDMI_MC_HEACPHY_RST); hdmi_phy_configure()
804 hdmi_phy_test_clear(hdmi, 1); hdmi_phy_configure()
805 hdmi_writeb(hdmi, HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2, hdmi_phy_configure()
807 hdmi_phy_test_clear(hdmi, 0); hdmi_phy_configure()
809 hdmi_phy_i2c_write(hdmi, mpll_config->res[res_idx].cpce, 0x06); hdmi_phy_configure()
810 hdmi_phy_i2c_write(hdmi, mpll_config->res[res_idx].gmp, 0x15); hdmi_phy_configure()
813 hdmi_phy_i2c_write(hdmi, curr_ctrl->curr[res_idx], 0x10); hdmi_phy_configure()
815 hdmi_phy_i2c_write(hdmi, 0x0000, 0x13); /* PLLPHBYCTRL */ hdmi_phy_configure()
816 hdmi_phy_i2c_write(hdmi, 0x0006, 0x17); hdmi_phy_configure()
818 hdmi_phy_i2c_write(hdmi, phy_config->term, 0x19); /* TXTERM */ hdmi_phy_configure()
819 hdmi_phy_i2c_write(hdmi, phy_config->sym_ctr, 0x09); /* CKSYMTXCTRL */ hdmi_phy_configure()
820 hdmi_phy_i2c_write(hdmi, phy_config->vlev_ctr, 0x0E); /* VLEVCTRL */ hdmi_phy_configure()
823 hdmi_phy_i2c_write(hdmi, 0x8000, 0x05); /* CKCALCTRL */ hdmi_phy_configure()
825 dw_hdmi_phy_enable_powerdown(hdmi, false); hdmi_phy_configure()
828 dw_hdmi_phy_enable_tmds(hdmi, 0); hdmi_phy_configure()
829 dw_hdmi_phy_enable_tmds(hdmi, 1); hdmi_phy_configure()
832 dw_hdmi_phy_gen2_txpwron(hdmi, 1); hdmi_phy_configure()
833 dw_hdmi_phy_gen2_pddq(hdmi, 0); hdmi_phy_configure()
835 if (hdmi->dev_type == RK3288_HDMI) hdmi_phy_configure()
836 dw_hdmi_phy_enable_spare(hdmi, 1); hdmi_phy_configure()
841 val = hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_TX_PHY_LOCK; hdmi_phy_configure()
846 dev_err(hdmi->dev, "PHY PLL not locked\n"); hdmi_phy_configure()
857 static int dw_hdmi_phy_init(struct dw_hdmi *hdmi) dw_hdmi_phy_init() argument
863 cscon = hdmi->sink_is_hdmi && is_color_space_conversion(hdmi); dw_hdmi_phy_init()
867 dw_hdmi_phy_sel_data_en_pol(hdmi, 1); dw_hdmi_phy_init()
868 dw_hdmi_phy_sel_interface_control(hdmi, 0); dw_hdmi_phy_init()
869 dw_hdmi_phy_enable_tmds(hdmi, 0); dw_hdmi_phy_init()
870 dw_hdmi_phy_enable_powerdown(hdmi, true); dw_hdmi_phy_init()
873 ret = hdmi_phy_configure(hdmi, 0, 8, cscon); dw_hdmi_phy_init()
878 hdmi->phy_enabled = true; dw_hdmi_phy_init()
882 static void hdmi_tx_hdcp_config(struct dw_hdmi *hdmi) hdmi_tx_hdcp_config() argument
886 if (hdmi->hdmi_data.video_mode.mdataenablepolarity) hdmi_tx_hdcp_config()
892 hdmi_modb(hdmi, HDMI_A_HDCPCFG0_RXDETECT_DISABLE, hdmi_tx_hdcp_config()
895 hdmi_modb(hdmi, de, HDMI_A_VIDPOLCFG_DATAENPOL_MASK, HDMI_A_VIDPOLCFG); hdmi_tx_hdcp_config()
897 hdmi_modb(hdmi, HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_DISABLE, hdmi_tx_hdcp_config()
901 static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) hdmi_config_AVI() argument
909 if (hdmi->hdmi_data.enc_out_format == YCBCR444) hdmi_config_AVI()
911 else if (hdmi->hdmi_data.enc_out_format == YCBCR422_8BITS) hdmi_config_AVI()
917 if (hdmi->hdmi_data.enc_out_format == XVYCC444) { hdmi_config_AVI()
919 if (hdmi->hdmi_data.colorimetry == HDMI_COLORIMETRY_ITU_601) hdmi_config_AVI()
922 else /*hdmi->hdmi_data.colorimetry == HDMI_COLORIMETRY_ITU_709*/ hdmi_config_AVI()
925 } else if (hdmi->hdmi_data.enc_out_format != RGB) { hdmi_config_AVI()
926 frame.colorimetry = hdmi->hdmi_data.colorimetry; hdmi_config_AVI()
952 hdmi_writeb(hdmi, val, HDMI_FC_AVICONF0); hdmi_config_AVI()
958 hdmi_writeb(hdmi, val, HDMI_FC_AVICONF1); hdmi_config_AVI()
966 hdmi_writeb(hdmi, val, HDMI_FC_AVICONF2); hdmi_config_AVI()
970 hdmi_writeb(hdmi, val, HDMI_FC_AVIVID); hdmi_config_AVI()
973 val = (((hdmi->hdmi_data.video_mode.mpixelrepetitioninput + 1) << hdmi_config_AVI()
976 ((hdmi->hdmi_data.video_mode.mpixelrepetitionoutput << hdmi_config_AVI()
979 hdmi_writeb(hdmi, val, HDMI_FC_PRCONF); hdmi_config_AVI()
987 hdmi_writeb(hdmi, val, HDMI_FC_AVICONF3); hdmi_config_AVI()
990 hdmi_writeb(hdmi, frame.top_bar & 0xff, HDMI_FC_AVIETB0); hdmi_config_AVI()
991 hdmi_writeb(hdmi, (frame.top_bar >> 8) & 0xff, HDMI_FC_AVIETB1); hdmi_config_AVI()
992 hdmi_writeb(hdmi, frame.bottom_bar & 0xff, HDMI_FC_AVISBB0); hdmi_config_AVI()
993 hdmi_writeb(hdmi, (frame.bottom_bar >> 8) & 0xff, HDMI_FC_AVISBB1); hdmi_config_AVI()
994 hdmi_writeb(hdmi, frame.left_bar & 0xff, HDMI_FC_AVIELB0); hdmi_config_AVI()
995 hdmi_writeb(hdmi, (frame.left_bar >> 8) & 0xff, HDMI_FC_AVIELB1); hdmi_config_AVI()
996 hdmi_writeb(hdmi, frame.right_bar & 0xff, HDMI_FC_AVISRB0); hdmi_config_AVI()
997 hdmi_writeb(hdmi, (frame.right_bar >> 8) & 0xff, HDMI_FC_AVISRB1); hdmi_config_AVI()
1000 static void hdmi_av_composer(struct dw_hdmi *hdmi, hdmi_av_composer() argument
1004 struct hdmi_vmode *vmode = &hdmi->hdmi_data.video_mode; hdmi_av_composer()
1010 dev_dbg(hdmi->dev, "final pixclk = %d\n", vmode->mpixelclock); hdmi_av_composer()
1013 inv_val = (hdmi->hdmi_data.hdcp_enable ? hdmi_av_composer()
1029 if (hdmi->vic == 39) hdmi_av_composer()
1040 inv_val |= hdmi->sink_is_hdmi ? hdmi_av_composer()
1044 hdmi_writeb(hdmi, inv_val, HDMI_FC_INVIDCONF); hdmi_av_composer()
1063 hdmi_writeb(hdmi, mode->hdisplay >> 8, HDMI_FC_INHACTV1); hdmi_av_composer()
1064 hdmi_writeb(hdmi, mode->hdisplay, HDMI_FC_INHACTV0); hdmi_av_composer()
1067 hdmi_writeb(hdmi, vdisplay >> 8, HDMI_FC_INVACTV1); hdmi_av_composer()
1068 hdmi_writeb(hdmi, vdisplay, HDMI_FC_INVACTV0); hdmi_av_composer()
1072 hdmi_writeb(hdmi, hblank >> 8, HDMI_FC_INHBLANK1); hdmi_av_composer()
1073 hdmi_writeb(hdmi, hblank, HDMI_FC_INHBLANK0); hdmi_av_composer()
1076 hdmi_writeb(hdmi, vblank, HDMI_FC_INVBLANK); hdmi_av_composer()
1080 hdmi_writeb(hdmi, h_de_hs >> 8, HDMI_FC_HSYNCINDELAY1); hdmi_av_composer()
1081 hdmi_writeb(hdmi, h_de_hs, HDMI_FC_HSYNCINDELAY0); hdmi_av_composer()
1084 hdmi_writeb(hdmi, v_de_vs, HDMI_FC_VSYNCINDELAY); hdmi_av_composer()
1088 hdmi_writeb(hdmi, hsync_len >> 8, HDMI_FC_HSYNCINWIDTH1); hdmi_av_composer()
1089 hdmi_writeb(hdmi, hsync_len, HDMI_FC_HSYNCINWIDTH0); hdmi_av_composer()
1092 hdmi_writeb(hdmi, vsync_len, HDMI_FC_VSYNCINWIDTH); hdmi_av_composer()
1095 static void dw_hdmi_phy_disable(struct dw_hdmi *hdmi) dw_hdmi_phy_disable() argument
1097 if (!hdmi->phy_enabled) dw_hdmi_phy_disable()
1100 dw_hdmi_phy_enable_tmds(hdmi, 0); dw_hdmi_phy_disable()
1101 dw_hdmi_phy_enable_powerdown(hdmi, true); dw_hdmi_phy_disable()
1103 hdmi->phy_enabled = false; dw_hdmi_phy_disable()
1107 static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi) dw_hdmi_enable_video_path() argument
1112 hdmi_writeb(hdmi, 12, HDMI_FC_CTRLDUR); dw_hdmi_enable_video_path()
1113 hdmi_writeb(hdmi, 32, HDMI_FC_EXCTRLDUR); dw_hdmi_enable_video_path()
1114 hdmi_writeb(hdmi, 1, HDMI_FC_EXCTRLSPAC); dw_hdmi_enable_video_path()
1117 hdmi_writeb(hdmi, 0x0B, HDMI_FC_CH0PREAM); dw_hdmi_enable_video_path()
1118 hdmi_writeb(hdmi, 0x16, HDMI_FC_CH1PREAM); dw_hdmi_enable_video_path()
1119 hdmi_writeb(hdmi, 0x21, HDMI_FC_CH2PREAM); dw_hdmi_enable_video_path()
1124 hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS); dw_hdmi_enable_video_path()
1127 hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS); dw_hdmi_enable_video_path()
1130 if (is_color_space_conversion(hdmi)) { dw_hdmi_enable_video_path()
1132 hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS); dw_hdmi_enable_video_path()
1136 static void hdmi_enable_audio_clk(struct dw_hdmi *hdmi) hdmi_enable_audio_clk() argument
1138 hdmi_modb(hdmi, 0, HDMI_MC_CLKDIS_AUDCLK_DISABLE, HDMI_MC_CLKDIS); hdmi_enable_audio_clk()
1142 static void dw_hdmi_clear_overflow(struct dw_hdmi *hdmi) dw_hdmi_clear_overflow() argument
1148 hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ, HDMI_MC_SWRSTZ); dw_hdmi_clear_overflow()
1150 val = hdmi_readb(hdmi, HDMI_FC_INVIDCONF); dw_hdmi_clear_overflow()
1151 if (hdmi->dev_type == IMX6DL_HDMI) { dw_hdmi_clear_overflow()
1152 hdmi_writeb(hdmi, val, HDMI_FC_INVIDCONF); dw_hdmi_clear_overflow()
1157 hdmi_writeb(hdmi, val, HDMI_FC_INVIDCONF); dw_hdmi_clear_overflow()
1160 static void hdmi_enable_overflow_interrupts(struct dw_hdmi *hdmi) hdmi_enable_overflow_interrupts() argument
1162 hdmi_writeb(hdmi, 0, HDMI_FC_MASK2); hdmi_enable_overflow_interrupts()
1163 hdmi_writeb(hdmi, 0, HDMI_IH_MUTE_FC_STAT2); hdmi_enable_overflow_interrupts()
1166 static void hdmi_disable_overflow_interrupts(struct dw_hdmi *hdmi) hdmi_disable_overflow_interrupts() argument
1168 hdmi_writeb(hdmi, HDMI_IH_MUTE_FC_STAT2_OVERFLOW_MASK, hdmi_disable_overflow_interrupts()
1172 static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode) dw_hdmi_setup() argument
1176 hdmi_disable_overflow_interrupts(hdmi); dw_hdmi_setup()
1178 hdmi->vic = drm_match_cea_mode(mode); dw_hdmi_setup()
1180 if (!hdmi->vic) { dw_hdmi_setup()
1181 dev_dbg(hdmi->dev, "Non-CEA mode used in HDMI\n"); dw_hdmi_setup()
1183 dev_dbg(hdmi->dev, "CEA mode used vic=%d\n", hdmi->vic); dw_hdmi_setup()
1186 if ((hdmi->vic == 6) || (hdmi->vic == 7) || dw_hdmi_setup()
1187 (hdmi->vic == 21) || (hdmi->vic == 22) || dw_hdmi_setup()
1188 (hdmi->vic == 2) || (hdmi->vic == 3) || dw_hdmi_setup()
1189 (hdmi->vic == 17) || (hdmi->vic == 18)) dw_hdmi_setup()
1190 hdmi->hdmi_data.colorimetry = HDMI_COLORIMETRY_ITU_601; dw_hdmi_setup()
1192 hdmi->hdmi_data.colorimetry = HDMI_COLORIMETRY_ITU_709; dw_hdmi_setup()
1194 hdmi->hdmi_data.video_mode.mpixelrepetitionoutput = 0; dw_hdmi_setup()
1195 hdmi->hdmi_data.video_mode.mpixelrepetitioninput = 0; dw_hdmi_setup()
1198 hdmi->hdmi_data.enc_in_format = RGB; dw_hdmi_setup()
1200 hdmi->hdmi_data.enc_out_format = RGB; dw_hdmi_setup()
1202 hdmi->hdmi_data.enc_color_depth = 8; dw_hdmi_setup()
1203 hdmi->hdmi_data.pix_repet_factor = 0; dw_hdmi_setup()
1204 hdmi->hdmi_data.hdcp_enable = 0; dw_hdmi_setup()
1205 hdmi->hdmi_data.video_mode.mdataenablepolarity = true; dw_hdmi_setup()
1208 hdmi_av_composer(hdmi, mode); dw_hdmi_setup()
1211 ret = dw_hdmi_phy_init(hdmi); dw_hdmi_setup()
1216 dw_hdmi_enable_video_path(hdmi); dw_hdmi_setup()
1218 if (hdmi->sink_has_audio) { dw_hdmi_setup()
1219 dev_dbg(hdmi->dev, "sink has audio support\n"); dw_hdmi_setup()
1222 hdmi_clk_regenerator_update_pixel_clock(hdmi); dw_hdmi_setup()
1223 hdmi_enable_audio_clk(hdmi); dw_hdmi_setup()
1227 if (hdmi->sink_is_hdmi) { dw_hdmi_setup()
1228 dev_dbg(hdmi->dev, "%s HDMI mode\n", __func__); dw_hdmi_setup()
1231 hdmi_config_AVI(hdmi, mode); dw_hdmi_setup()
1233 dev_dbg(hdmi->dev, "%s DVI mode\n", __func__); dw_hdmi_setup()
1236 hdmi_video_packetize(hdmi); dw_hdmi_setup()
1237 hdmi_video_csc(hdmi); dw_hdmi_setup()
1238 hdmi_video_sample(hdmi); dw_hdmi_setup()
1239 hdmi_tx_hdcp_config(hdmi); dw_hdmi_setup()
1241 dw_hdmi_clear_overflow(hdmi); dw_hdmi_setup()
1242 if (hdmi->cable_plugin && hdmi->sink_is_hdmi) dw_hdmi_setup()
1243 hdmi_enable_overflow_interrupts(hdmi); dw_hdmi_setup()
1249 static int dw_hdmi_fb_registered(struct dw_hdmi *hdmi) dw_hdmi_fb_registered() argument
1251 hdmi_writeb(hdmi, HDMI_PHY_I2CM_INT_ADDR_DONE_POL, dw_hdmi_fb_registered()
1254 hdmi_writeb(hdmi, HDMI_PHY_I2CM_CTLINT_ADDR_NAC_POL | dw_hdmi_fb_registered()
1259 hdmi_writeb(hdmi, hdmi->phy_mask, HDMI_PHY_MASK0); dw_hdmi_fb_registered()
1262 hdmi_writeb(hdmi, HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE, dw_hdmi_fb_registered()
1268 static void initialize_hdmi_ih_mutes(struct dw_hdmi *hdmi) initialize_hdmi_ih_mutes() argument
1279 ih_mute = hdmi_readb(hdmi, HDMI_IH_MUTE) | initialize_hdmi_ih_mutes()
1283 hdmi_writeb(hdmi, ih_mute, HDMI_IH_MUTE); initialize_hdmi_ih_mutes()
1286 hdmi_writeb(hdmi, 0xff, HDMI_VP_MASK); initialize_hdmi_ih_mutes()
1287 hdmi_writeb(hdmi, 0xff, HDMI_FC_MASK0); initialize_hdmi_ih_mutes()
1288 hdmi_writeb(hdmi, 0xff, HDMI_FC_MASK1); initialize_hdmi_ih_mutes()
1289 hdmi_writeb(hdmi, 0xff, HDMI_FC_MASK2); initialize_hdmi_ih_mutes()
1290 hdmi_writeb(hdmi, 0xff, HDMI_PHY_MASK0); initialize_hdmi_ih_mutes()
1291 hdmi_writeb(hdmi, 0xff, HDMI_PHY_I2CM_INT_ADDR); initialize_hdmi_ih_mutes()
1292 hdmi_writeb(hdmi, 0xff, HDMI_PHY_I2CM_CTLINT_ADDR); initialize_hdmi_ih_mutes()
1293 hdmi_writeb(hdmi, 0xff, HDMI_AUD_INT); initialize_hdmi_ih_mutes()
1294 hdmi_writeb(hdmi, 0xff, HDMI_AUD_SPDIFINT); initialize_hdmi_ih_mutes()
1295 hdmi_writeb(hdmi, 0xff, HDMI_AUD_HBR_MASK); initialize_hdmi_ih_mutes()
1296 hdmi_writeb(hdmi, 0xff, HDMI_GP_MASK); initialize_hdmi_ih_mutes()
1297 hdmi_writeb(hdmi, 0xff, HDMI_A_APIINTMSK); initialize_hdmi_ih_mutes()
1298 hdmi_writeb(hdmi, 0xff, HDMI_CEC_MASK); initialize_hdmi_ih_mutes()
1299 hdmi_writeb(hdmi, 0xff, HDMI_I2CM_INT); initialize_hdmi_ih_mutes()
1300 hdmi_writeb(hdmi, 0xff, HDMI_I2CM_CTLINT); initialize_hdmi_ih_mutes()
1303 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT0); initialize_hdmi_ih_mutes()
1304 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT1); initialize_hdmi_ih_mutes()
1305 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT2); initialize_hdmi_ih_mutes()
1306 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_AS_STAT0); initialize_hdmi_ih_mutes()
1307 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_PHY_STAT0); initialize_hdmi_ih_mutes()
1308 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_I2CM_STAT0); initialize_hdmi_ih_mutes()
1309 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_CEC_STAT0); initialize_hdmi_ih_mutes()
1310 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_VP_STAT0); initialize_hdmi_ih_mutes()
1311 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_I2CMPHY_STAT0); initialize_hdmi_ih_mutes()
1312 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_AHBDMAAUD_STAT0); initialize_hdmi_ih_mutes()
1317 hdmi_writeb(hdmi, ih_mute, HDMI_IH_MUTE); initialize_hdmi_ih_mutes()
1320 static void dw_hdmi_poweron(struct dw_hdmi *hdmi) dw_hdmi_poweron() argument
1322 hdmi->bridge_is_on = true; dw_hdmi_poweron()
1323 dw_hdmi_setup(hdmi, &hdmi->previous_mode); dw_hdmi_poweron()
1326 static void dw_hdmi_poweroff(struct dw_hdmi *hdmi) dw_hdmi_poweroff() argument
1328 dw_hdmi_phy_disable(hdmi); dw_hdmi_poweroff()
1329 hdmi->bridge_is_on = false; dw_hdmi_poweroff()
1332 static void dw_hdmi_update_power(struct dw_hdmi *hdmi) dw_hdmi_update_power() argument
1334 int force = hdmi->force; dw_hdmi_update_power()
1336 if (hdmi->disabled) { dw_hdmi_update_power()
1339 if (hdmi->rxsense) dw_hdmi_update_power()
1346 if (hdmi->bridge_is_on) dw_hdmi_update_power()
1347 dw_hdmi_poweroff(hdmi); dw_hdmi_update_power()
1349 if (!hdmi->bridge_is_on) dw_hdmi_update_power()
1350 dw_hdmi_poweron(hdmi); dw_hdmi_update_power()
1366 static void dw_hdmi_update_phy_mask(struct dw_hdmi *hdmi) dw_hdmi_update_phy_mask() argument
1368 u8 old_mask = hdmi->phy_mask; dw_hdmi_update_phy_mask()
1370 if (hdmi->force || hdmi->disabled || !hdmi->rxsense) dw_hdmi_update_phy_mask()
1371 hdmi->phy_mask |= HDMI_PHY_RX_SENSE; dw_hdmi_update_phy_mask()
1373 hdmi->phy_mask &= ~HDMI_PHY_RX_SENSE; dw_hdmi_update_phy_mask()
1375 if (old_mask != hdmi->phy_mask) dw_hdmi_update_phy_mask()
1376 hdmi_writeb(hdmi, hdmi->phy_mask, HDMI_PHY_MASK0); dw_hdmi_update_phy_mask()
1383 struct dw_hdmi *hdmi = bridge->driver_private; dw_hdmi_bridge_mode_set() local
1385 mutex_lock(&hdmi->mutex); dw_hdmi_bridge_mode_set()
1388 memcpy(&hdmi->previous_mode, mode, sizeof(hdmi->previous_mode)); dw_hdmi_bridge_mode_set()
1390 mutex_unlock(&hdmi->mutex); dw_hdmi_bridge_mode_set()
1402 struct dw_hdmi *hdmi = bridge->driver_private; dw_hdmi_bridge_disable() local
1404 mutex_lock(&hdmi->mutex); dw_hdmi_bridge_disable()
1405 hdmi->disabled = true; dw_hdmi_bridge_disable()
1406 dw_hdmi_update_power(hdmi); dw_hdmi_bridge_disable()
1407 dw_hdmi_update_phy_mask(hdmi); dw_hdmi_bridge_disable()
1408 mutex_unlock(&hdmi->mutex); dw_hdmi_bridge_disable()
1413 struct dw_hdmi *hdmi = bridge->driver_private; dw_hdmi_bridge_enable() local
1415 mutex_lock(&hdmi->mutex); dw_hdmi_bridge_enable()
1416 hdmi->disabled = false; dw_hdmi_bridge_enable()
1417 dw_hdmi_update_power(hdmi); dw_hdmi_bridge_enable()
1418 dw_hdmi_update_phy_mask(hdmi); dw_hdmi_bridge_enable()
1419 mutex_unlock(&hdmi->mutex); dw_hdmi_bridge_enable()
1430 struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi, dw_hdmi_connector_detect() local
1433 mutex_lock(&hdmi->mutex); dw_hdmi_connector_detect()
1434 hdmi->force = DRM_FORCE_UNSPECIFIED; dw_hdmi_connector_detect()
1435 dw_hdmi_update_power(hdmi); dw_hdmi_connector_detect()
1436 dw_hdmi_update_phy_mask(hdmi); dw_hdmi_connector_detect()
1437 mutex_unlock(&hdmi->mutex); dw_hdmi_connector_detect()
1439 return hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_HPD ? dw_hdmi_connector_detect()
1445 struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi, dw_hdmi_connector_get_modes() local
1450 if (!hdmi->ddc) dw_hdmi_connector_get_modes()
1453 edid = drm_get_edid(connector, hdmi->ddc); dw_hdmi_connector_get_modes()
1455 dev_dbg(hdmi->dev, "got edid: width[%d] x height[%d]\n", dw_hdmi_connector_get_modes()
1458 hdmi->sink_is_hdmi = drm_detect_hdmi_monitor(edid); dw_hdmi_connector_get_modes()
1459 hdmi->sink_has_audio = drm_detect_monitor_audio(edid); dw_hdmi_connector_get_modes()
1466 dev_dbg(hdmi->dev, "failed to get edid\n"); dw_hdmi_connector_get_modes()
1476 struct dw_hdmi *hdmi = container_of(connector, dw_hdmi_connector_mode_valid() local
1484 if (hdmi->plat_data->mode_valid) dw_hdmi_connector_mode_valid()
1485 mode_status = hdmi->plat_data->mode_valid(connector, mode); dw_hdmi_connector_mode_valid()
1493 struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi, dw_hdmi_connector_best_encoder() local
1496 return hdmi->encoder; dw_hdmi_connector_best_encoder()
1507 struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi, dw_hdmi_connector_force() local
1510 mutex_lock(&hdmi->mutex); dw_hdmi_connector_force()
1511 hdmi->force = connector->force; dw_hdmi_connector_force()
1512 dw_hdmi_update_power(hdmi); dw_hdmi_connector_force()
1513 dw_hdmi_update_phy_mask(hdmi); dw_hdmi_connector_force()
1514 mutex_unlock(&hdmi->mutex); dw_hdmi_connector_force()
1542 struct dw_hdmi *hdmi = dev_id; dw_hdmi_hardirq() local
1545 intr_stat = hdmi_readb(hdmi, HDMI_IH_PHY_STAT0); dw_hdmi_hardirq()
1547 hdmi_writeb(hdmi, ~0, HDMI_IH_MUTE_PHY_STAT0); dw_hdmi_hardirq()
1554 struct dw_hdmi *hdmi = dev_id; dw_hdmi_irq() local
1557 intr_stat = hdmi_readb(hdmi, HDMI_IH_PHY_STAT0); dw_hdmi_irq()
1558 phy_int_pol = hdmi_readb(hdmi, HDMI_PHY_POL0); dw_hdmi_irq()
1559 phy_stat = hdmi_readb(hdmi, HDMI_PHY_STAT0); dw_hdmi_irq()
1574 hdmi_modb(hdmi, ~phy_int_pol, phy_pol_mask, HDMI_PHY_POL0); dw_hdmi_irq()
1585 mutex_lock(&hdmi->mutex); dw_hdmi_irq()
1586 if (!hdmi->disabled && !hdmi->force) { dw_hdmi_irq()
1592 hdmi->rxsense = false; dw_hdmi_irq()
1601 hdmi->rxsense = true; dw_hdmi_irq()
1603 dw_hdmi_update_power(hdmi); dw_hdmi_irq()
1604 dw_hdmi_update_phy_mask(hdmi); dw_hdmi_irq()
1606 mutex_unlock(&hdmi->mutex); dw_hdmi_irq()
1610 dev_dbg(hdmi->dev, "EVENT=%s\n", dw_hdmi_irq()
1612 drm_helper_hpd_irq_event(hdmi->bridge->dev); dw_hdmi_irq()
1615 hdmi_writeb(hdmi, intr_stat, HDMI_IH_PHY_STAT0); dw_hdmi_irq()
1616 hdmi_writeb(hdmi, ~(HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE), dw_hdmi_irq()
1622 static int dw_hdmi_register(struct drm_device *drm, struct dw_hdmi *hdmi) dw_hdmi_register() argument
1624 struct drm_encoder *encoder = hdmi->encoder; dw_hdmi_register()
1634 hdmi->bridge = bridge; dw_hdmi_register()
1635 bridge->driver_private = hdmi; dw_hdmi_register()
1644 hdmi->connector.polled = DRM_CONNECTOR_POLL_HPD; dw_hdmi_register()
1646 drm_connector_helper_add(&hdmi->connector, dw_hdmi_register()
1648 drm_connector_init(drm, &hdmi->connector, &dw_hdmi_connector_funcs, dw_hdmi_register()
1651 hdmi->connector.encoder = encoder; dw_hdmi_register()
1653 drm_mode_connector_attach_encoder(&hdmi->connector, encoder); dw_hdmi_register()
1668 struct dw_hdmi *hdmi; dw_hdmi_bind() local
1672 hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL); dw_hdmi_bind()
1673 if (!hdmi) dw_hdmi_bind()
1676 hdmi->connector.interlace_allowed = 1; dw_hdmi_bind()
1678 hdmi->plat_data = plat_data; dw_hdmi_bind()
1679 hdmi->dev = dev; dw_hdmi_bind()
1680 hdmi->dev_type = plat_data->dev_type; dw_hdmi_bind()
1681 hdmi->sample_rate = 48000; dw_hdmi_bind()
1682 hdmi->encoder = encoder; dw_hdmi_bind()
1683 hdmi->disabled = true; dw_hdmi_bind()
1684 hdmi->rxsense = true; dw_hdmi_bind()
1685 hdmi->phy_mask = (u8)~(HDMI_PHY_HPD | HDMI_PHY_RX_SENSE); dw_hdmi_bind()
1687 mutex_init(&hdmi->mutex); dw_hdmi_bind()
1688 mutex_init(&hdmi->audio_mutex); dw_hdmi_bind()
1689 spin_lock_init(&hdmi->audio_lock); dw_hdmi_bind()
1695 hdmi->write = dw_hdmi_writel; dw_hdmi_bind()
1696 hdmi->read = dw_hdmi_readl; dw_hdmi_bind()
1699 hdmi->write = dw_hdmi_writeb; dw_hdmi_bind()
1700 hdmi->read = dw_hdmi_readb; dw_hdmi_bind()
1709 hdmi->ddc = of_find_i2c_adapter_by_node(ddc_node); dw_hdmi_bind()
1711 if (!hdmi->ddc) { dw_hdmi_bind()
1712 dev_dbg(hdmi->dev, "failed to read ddc node\n"); dw_hdmi_bind()
1717 dev_dbg(hdmi->dev, "no ddc property found\n"); dw_hdmi_bind()
1720 hdmi->regs = devm_ioremap_resource(dev, iores); dw_hdmi_bind()
1721 if (IS_ERR(hdmi->regs)) dw_hdmi_bind()
1722 return PTR_ERR(hdmi->regs); dw_hdmi_bind()
1724 hdmi->isfr_clk = devm_clk_get(hdmi->dev, "isfr"); dw_hdmi_bind()
1725 if (IS_ERR(hdmi->isfr_clk)) { dw_hdmi_bind()
1726 ret = PTR_ERR(hdmi->isfr_clk); dw_hdmi_bind()
1727 dev_err(hdmi->dev, "Unable to get HDMI isfr clk: %d\n", ret); dw_hdmi_bind()
1731 ret = clk_prepare_enable(hdmi->isfr_clk); dw_hdmi_bind()
1733 dev_err(hdmi->dev, "Cannot enable HDMI isfr clock: %d\n", ret); dw_hdmi_bind()
1737 hdmi->iahb_clk = devm_clk_get(hdmi->dev, "iahb"); dw_hdmi_bind()
1738 if (IS_ERR(hdmi->iahb_clk)) { dw_hdmi_bind()
1739 ret = PTR_ERR(hdmi->iahb_clk); dw_hdmi_bind()
1740 dev_err(hdmi->dev, "Unable to get HDMI iahb clk: %d\n", ret); dw_hdmi_bind()
1744 ret = clk_prepare_enable(hdmi->iahb_clk); dw_hdmi_bind()
1746 dev_err(hdmi->dev, "Cannot enable HDMI iahb clock: %d\n", ret); dw_hdmi_bind()
1753 hdmi_readb(hdmi, HDMI_DESIGN_ID), dw_hdmi_bind()
1754 hdmi_readb(hdmi, HDMI_REVISION_ID), dw_hdmi_bind()
1755 hdmi_readb(hdmi, HDMI_PRODUCT_ID0), dw_hdmi_bind()
1756 hdmi_readb(hdmi, HDMI_PRODUCT_ID1)); dw_hdmi_bind()
1758 initialize_hdmi_ih_mutes(hdmi); dw_hdmi_bind()
1762 dev_name(dev), hdmi); dw_hdmi_bind()
1770 hdmi_init_clk_regenerator(hdmi); dw_hdmi_bind()
1776 hdmi_writeb(hdmi, HDMI_PHY_HPD | HDMI_PHY_RX_SENSE, HDMI_PHY_POL0); dw_hdmi_bind()
1779 hdmi_writeb(hdmi, HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE, dw_hdmi_bind()
1782 ret = dw_hdmi_fb_registered(hdmi); dw_hdmi_bind()
1786 ret = dw_hdmi_register(drm, hdmi); dw_hdmi_bind()
1791 hdmi_writeb(hdmi, ~(HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE), dw_hdmi_bind()
1798 if (hdmi_readb(hdmi, HDMI_CONFIG1_ID) & HDMI_CONFIG1_AHB) { dw_hdmi_bind()
1800 audio.base = hdmi->regs; dw_hdmi_bind()
1802 audio.hdmi = hdmi; dw_hdmi_bind()
1803 audio.eld = hdmi->connector.eld; dw_hdmi_bind()
1805 pdevinfo.name = "dw-hdmi-ahb-audio"; dw_hdmi_bind()
1809 hdmi->audio = platform_device_register_full(&pdevinfo); dw_hdmi_bind()
1812 dev_set_drvdata(dev, hdmi); dw_hdmi_bind()
1817 clk_disable_unprepare(hdmi->iahb_clk); dw_hdmi_bind()
1819 clk_disable_unprepare(hdmi->isfr_clk); dw_hdmi_bind()
1827 struct dw_hdmi *hdmi = dev_get_drvdata(dev); dw_hdmi_unbind() local
1829 if (hdmi->audio && !IS_ERR(hdmi->audio)) dw_hdmi_unbind()
1830 platform_device_unregister(hdmi->audio); dw_hdmi_unbind()
1833 hdmi_writeb(hdmi, ~0, HDMI_IH_MUTE_PHY_STAT0); dw_hdmi_unbind()
1835 hdmi->connector.funcs->destroy(&hdmi->connector); dw_hdmi_unbind()
1836 hdmi->encoder->funcs->destroy(hdmi->encoder); dw_hdmi_unbind()
1838 clk_disable_unprepare(hdmi->iahb_clk); dw_hdmi_unbind()
1839 clk_disable_unprepare(hdmi->isfr_clk); dw_hdmi_unbind()
1840 i2c_put_adapter(hdmi->ddc); dw_hdmi_unbind()
1849 MODULE_ALIAS("platform:dw-hdmi");
|
| H A D | dw_hdmi-audio.h | 10 struct dw_hdmi *hdmi; member in struct:dw_hdmi_audio_data
|
| H A D | dw_hdmi-ahb-audio.c | 26 #define DRIVER_NAME "dw-hdmi-ahb-audio"
367 "dw-hdmi-audio", dw); dw_hdmi_open()
431 dw_hdmi_set_sample_rate(dw->data.hdmi, runtime->rate); dw_hdmi_prepare()
487 dw_hdmi_audio_enable(dw->data.hdmi); dw_hdmi_trigger()
496 dw_hdmi_audio_disable(dw->data.hdmi); dw_hdmi_trigger()
546 dev_err(dev, "dw-hdmi-audio: unknown revision 0x%02x\n", snd_dw_hdmi_probe()
|
| /linux-4.4.14/drivers/gpu/drm/msm/hdmi/ |
| H A D | hdmi_bridge.c | 18 #include "hdmi.h"
22 struct hdmi *hdmi; member in struct:hdmi_bridge
34 struct hdmi *hdmi = hdmi_bridge->hdmi; power_on() local
35 const struct hdmi_platform_config *config = hdmi->config; power_on()
39 ret = regulator_enable(hdmi->pwr_regs[i]); power_on()
47 DBG("pixclock: %lu", hdmi->pixclock); power_on()
48 ret = clk_set_rate(hdmi->pwr_clks[0], hdmi->pixclock); power_on()
56 ret = clk_prepare_enable(hdmi->pwr_clks[i]); power_on()
68 struct hdmi *hdmi = hdmi_bridge->hdmi; power_off() local
69 const struct hdmi_platform_config *config = hdmi->config; power_off()
78 clk_disable_unprepare(hdmi->pwr_clks[i]); power_off()
81 ret = regulator_disable(hdmi->pwr_regs[i]); power_off()
92 struct hdmi *hdmi = hdmi_bridge->hdmi; hdmi_bridge_pre_enable() local
93 struct hdmi_phy *phy = hdmi->phy; hdmi_bridge_pre_enable()
97 if (!hdmi->power_on) { hdmi_bridge_pre_enable()
99 hdmi->power_on = true; hdmi_bridge_pre_enable()
100 hdmi_audio_update(hdmi); hdmi_bridge_pre_enable()
104 phy->funcs->powerup(phy, hdmi->pixclock); hdmi_bridge_pre_enable()
106 hdmi_set_mode(hdmi, true); hdmi_bridge_pre_enable()
108 if (hdmi->hdcp_ctrl) hdmi_bridge_pre_enable()
109 hdmi_hdcp_on(hdmi->hdcp_ctrl); hdmi_bridge_pre_enable()
123 struct hdmi *hdmi = hdmi_bridge->hdmi; hdmi_bridge_post_disable() local
124 struct hdmi_phy *phy = hdmi->phy; hdmi_bridge_post_disable()
126 if (hdmi->hdcp_ctrl) hdmi_bridge_post_disable()
127 hdmi_hdcp_off(hdmi->hdcp_ctrl); hdmi_bridge_post_disable()
130 hdmi_set_mode(hdmi, false); hdmi_bridge_post_disable()
135 if (hdmi->power_on) { hdmi_bridge_post_disable()
137 hdmi->power_on = false; hdmi_bridge_post_disable()
138 hdmi_audio_update(hdmi); hdmi_bridge_post_disable()
147 struct hdmi *hdmi = hdmi_bridge->hdmi; hdmi_bridge_mode_set() local
153 hdmi->pixclock = mode->clock * 1000; hdmi_bridge_mode_set()
164 hdmi_write(hdmi, REG_HDMI_TOTAL, hdmi_bridge_mode_set()
168 hdmi_write(hdmi, REG_HDMI_ACTIVE_HSYNC, hdmi_bridge_mode_set()
171 hdmi_write(hdmi, REG_HDMI_ACTIVE_VSYNC, hdmi_bridge_mode_set()
176 hdmi_write(hdmi, REG_HDMI_VSYNC_TOTAL_F2, hdmi_bridge_mode_set()
178 hdmi_write(hdmi, REG_HDMI_VSYNC_ACTIVE_F2, hdmi_bridge_mode_set()
182 hdmi_write(hdmi, REG_HDMI_VSYNC_TOTAL_F2, hdmi_bridge_mode_set()
184 hdmi_write(hdmi, REG_HDMI_VSYNC_ACTIVE_F2, hdmi_bridge_mode_set()
197 hdmi_write(hdmi, REG_HDMI_FRAME_CTRL, frame_ctrl); hdmi_bridge_mode_set()
199 hdmi_audio_update(hdmi); hdmi_bridge_mode_set()
212 struct drm_bridge *hdmi_bridge_init(struct hdmi *hdmi) hdmi_bridge_init() argument
218 hdmi_bridge = devm_kzalloc(hdmi->dev->dev, hdmi_bridge_init()
225 hdmi_bridge->hdmi = hdmi; hdmi_bridge_init()
230 ret = drm_bridge_attach(hdmi->dev, bridge); hdmi_bridge_init()
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| H A D | hdmi_phy_8x60.c | 18 #include "hdmi.h"
22 struct hdmi *hdmi; member in struct:hdmi_phy_8x60
36 struct hdmi *hdmi = phy_8x60->hdmi; hdmi_phy_8x60_powerup() local
39 hdmi_write(hdmi, REG_HDMI_8x60_PHY_REG0, hdmi_phy_8x60_powerup()
44 hdmi_write(hdmi, REG_HDMI_8x60_PHY_REG1, hdmi_phy_8x60_powerup()
48 hdmi_write(hdmi, REG_HDMI_8x60_PHY_REG1, hdmi_phy_8x60_powerup()
54 hdmi_write(hdmi, REG_HDMI_8x60_PHY_REG2, hdmi_phy_8x60_powerup()
64 hdmi_write(hdmi, REG_HDMI_8x60_PHY_REG2, hdmi_phy_8x60_powerup()
73 hdmi_write(hdmi, REG_HDMI_8x60_PHY_REG2, hdmi_phy_8x60_powerup()
81 hdmi_write(hdmi, REG_HDMI_8x60_PHY_REG3, hdmi_phy_8x60_powerup()
85 hdmi_write(hdmi, REG_HDMI_8x60_PHY_REG9, 0); hdmi_phy_8x60_powerup()
90 hdmi_write(hdmi, REG_HDMI_8x60_PHY_REG12, hdmi_phy_8x60_powerup()
95 hdmi_write(hdmi, REG_HDMI_8x60_PHY_REG2, hdmi_phy_8x60_powerup()
99 hdmi_write(hdmi, REG_HDMI_8x60_PHY_REG2, hdmi_phy_8x60_powerup()
103 hdmi_write(hdmi, REG_HDMI_8x60_PHY_REG4, 0); hdmi_phy_8x60_powerup()
104 hdmi_write(hdmi, REG_HDMI_8x60_PHY_REG5, 0); hdmi_phy_8x60_powerup()
105 hdmi_write(hdmi, REG_HDMI_8x60_PHY_REG6, 0); hdmi_phy_8x60_powerup()
106 hdmi_write(hdmi, REG_HDMI_8x60_PHY_REG7, 0); hdmi_phy_8x60_powerup()
107 hdmi_write(hdmi, REG_HDMI_8x60_PHY_REG8, 0); hdmi_phy_8x60_powerup()
108 hdmi_write(hdmi, REG_HDMI_8x60_PHY_REG9, 0); hdmi_phy_8x60_powerup()
109 hdmi_write(hdmi, REG_HDMI_8x60_PHY_REG10, 0); hdmi_phy_8x60_powerup()
110 hdmi_write(hdmi, REG_HDMI_8x60_PHY_REG11, 0); hdmi_phy_8x60_powerup()
113 hdmi_write(hdmi, REG_HDMI_8x60_PHY_REG12, hdmi_phy_8x60_powerup()
122 struct hdmi *hdmi = phy_8x60->hdmi; hdmi_phy_8x60_powerdown() local
125 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, hdmi_phy_8x60_powerdown()
129 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, 0); hdmi_phy_8x60_powerdown()
131 hdmi_write(hdmi, REG_HDMI_8x60_PHY_REG2, hdmi_phy_8x60_powerdown()
139 hdmi_write(hdmi, REG_HDMI_8x60_PHY_REG3, 0); hdmi_phy_8x60_powerdown()
141 hdmi_write(hdmi, REG_HDMI_8x60_PHY_REG2, hdmi_phy_8x60_powerdown()
158 struct hdmi_phy *hdmi_phy_8x60_init(struct hdmi *hdmi) hdmi_phy_8x60_init() argument
174 phy_8x60->hdmi = hdmi; hdmi_phy_8x60_init()
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| H A D | hdmi.c | 20 #include "hdmi.h"
22 void hdmi_set_mode(struct hdmi *hdmi, bool power_on) hdmi_set_mode() argument
27 spin_lock_irqsave(&hdmi->reg_lock, flags); hdmi_set_mode()
30 if (!hdmi->hdmi_mode) { hdmi_set_mode()
32 hdmi_write(hdmi, REG_HDMI_CTRL, ctrl); hdmi_set_mode()
41 hdmi_write(hdmi, REG_HDMI_CTRL, ctrl); hdmi_set_mode()
42 spin_unlock_irqrestore(&hdmi->reg_lock, flags); hdmi_set_mode()
49 struct hdmi *hdmi = dev_id; hdmi_irq() local
52 hdmi_connector_irq(hdmi->connector); hdmi_irq()
55 hdmi_i2c_irq(hdmi->i2c); hdmi_irq()
58 if (hdmi->hdcp_ctrl) hdmi_irq()
59 hdmi_hdcp_irq(hdmi->hdcp_ctrl); hdmi_irq()
66 static void hdmi_destroy(struct hdmi *hdmi) hdmi_destroy() argument
68 struct hdmi_phy *phy = hdmi->phy; hdmi_destroy()
74 if (hdmi->workq) { hdmi_destroy()
75 flush_workqueue(hdmi->workq); hdmi_destroy()
76 destroy_workqueue(hdmi->workq); hdmi_destroy()
78 hdmi_hdcp_destroy(hdmi); hdmi_destroy()
82 if (hdmi->i2c) hdmi_destroy()
83 hdmi_i2c_destroy(hdmi->i2c); hdmi_destroy()
85 platform_set_drvdata(hdmi->pdev, NULL); hdmi_destroy()
88 /* construct hdmi at bind/probe time, grab all the resources. If
92 static struct hdmi *hdmi_init(struct platform_device *pdev) hdmi_init()
95 struct hdmi *hdmi = NULL; hdmi_init() local
99 hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL); hdmi_init()
100 if (!hdmi) { hdmi_init()
105 hdmi->pdev = pdev; hdmi_init()
106 hdmi->config = config; hdmi_init()
107 spin_lock_init(&hdmi->reg_lock); hdmi_init()
111 hdmi->phy = config->phy_init(hdmi); hdmi_init()
113 if (IS_ERR(hdmi->phy)) { hdmi_init()
114 ret = PTR_ERR(hdmi->phy); hdmi_init()
116 hdmi->phy = NULL; hdmi_init()
121 hdmi->mmio = msm_ioremap(pdev, config->mmio_name, "HDMI"); hdmi_init()
122 if (IS_ERR(hdmi->mmio)) { hdmi_init()
123 ret = PTR_ERR(hdmi->mmio); hdmi_init()
127 /* HDCP needs physical address of hdmi register */ hdmi_init()
130 hdmi->mmio_phy_addr = res->start; hdmi_init()
132 hdmi->qfprom_mmio = msm_ioremap(pdev, hdmi_init()
134 if (IS_ERR(hdmi->qfprom_mmio)) { hdmi_init()
136 hdmi->qfprom_mmio = NULL; hdmi_init()
139 hdmi->hpd_regs = devm_kzalloc(&pdev->dev, sizeof(hdmi->hpd_regs[0]) * hdmi_init()
141 if (!hdmi->hpd_regs) { hdmi_init()
157 hdmi->hpd_regs[i] = reg; hdmi_init()
160 hdmi->pwr_regs = devm_kzalloc(&pdev->dev, sizeof(hdmi->pwr_regs[0]) * hdmi_init()
162 if (!hdmi->pwr_regs) { hdmi_init()
178 hdmi->pwr_regs[i] = reg; hdmi_init()
181 hdmi->hpd_clks = devm_kzalloc(&pdev->dev, sizeof(hdmi->hpd_clks[0]) * hdmi_init()
183 if (!hdmi->hpd_clks) { hdmi_init()
198 hdmi->hpd_clks[i] = clk; hdmi_init()
201 hdmi->pwr_clks = devm_kzalloc(&pdev->dev, sizeof(hdmi->pwr_clks[0]) * hdmi_init()
203 if (!hdmi->pwr_clks) { hdmi_init()
218 hdmi->pwr_clks[i] = clk; hdmi_init()
221 hdmi->workq = alloc_ordered_workqueue("msm_hdmi", 0); hdmi_init()
223 hdmi->i2c = hdmi_i2c_init(hdmi); hdmi_init()
224 if (IS_ERR(hdmi->i2c)) { hdmi_init()
225 ret = PTR_ERR(hdmi->i2c); hdmi_init()
227 hdmi->i2c = NULL; hdmi_init()
231 hdmi->hdcp_ctrl = hdmi_hdcp_init(hdmi); hdmi_init()
232 if (IS_ERR(hdmi->hdcp_ctrl)) { hdmi_init()
234 hdmi->hdcp_ctrl = NULL; hdmi_init()
237 return hdmi; hdmi_init()
240 if (hdmi) hdmi_init()
241 hdmi_destroy(hdmi); hdmi_init()
248 * driver (not hdmi sub-device's probe/bind!)
252 * hdmi sub-device's probe.
254 int hdmi_modeset_init(struct hdmi *hdmi, hdmi_modeset_init() argument
258 struct platform_device *pdev = hdmi->pdev; hdmi_modeset_init()
261 hdmi->dev = dev; hdmi_modeset_init()
262 hdmi->encoder = encoder; hdmi_modeset_init()
264 hdmi_audio_infoframe_init(&hdmi->audio.infoframe); hdmi_modeset_init()
266 hdmi->bridge = hdmi_bridge_init(hdmi); hdmi_modeset_init()
267 if (IS_ERR(hdmi->bridge)) { hdmi_modeset_init()
268 ret = PTR_ERR(hdmi->bridge); hdmi_modeset_init()
270 hdmi->bridge = NULL; hdmi_modeset_init()
274 hdmi->connector = hdmi_connector_init(hdmi); hdmi_modeset_init()
275 if (IS_ERR(hdmi->connector)) { hdmi_modeset_init()
276 ret = PTR_ERR(hdmi->connector); hdmi_modeset_init()
278 hdmi->connector = NULL; hdmi_modeset_init()
282 hdmi->irq = irq_of_parse_and_map(pdev->dev.of_node, 0); hdmi_modeset_init()
283 if (hdmi->irq < 0) { hdmi_modeset_init()
284 ret = hdmi->irq; hdmi_modeset_init()
289 ret = devm_request_irq(&pdev->dev, hdmi->irq, hdmi_modeset_init()
291 "hdmi_isr", hdmi); hdmi_modeset_init()
294 hdmi->irq, ret); hdmi_modeset_init()
298 encoder->bridge = hdmi->bridge; hdmi_modeset_init()
300 priv->bridges[priv->num_bridges++] = hdmi->bridge; hdmi_modeset_init()
301 priv->connectors[priv->num_connectors++] = hdmi->connector; hdmi_modeset_init()
303 platform_set_drvdata(pdev, hdmi); hdmi_modeset_init()
309 if (hdmi->bridge) { hdmi_modeset_init()
310 hdmi_bridge_destroy(hdmi->bridge); hdmi_modeset_init()
311 hdmi->bridge = NULL; hdmi_modeset_init()
313 if (hdmi->connector) { hdmi_modeset_init()
314 hdmi->connector->funcs->destroy(hdmi->connector); hdmi_modeset_init()
315 hdmi->connector = NULL; hdmi_modeset_init()
322 * The hdmi device:
338 static const char *hpd_reg_names_8960[] = {"core-vdda", "hdmi-mux"};
392 { .compatible = "qcom,hdmi-tx-8996", .data = &hdmi_tx_8996_config },
393 { .compatible = "qcom,hdmi-tx-8994", .data = &hdmi_tx_8994_config },
394 { .compatible = "qcom,hdmi-tx-8084", .data = &hdmi_tx_8084_config },
395 { .compatible = "qcom,hdmi-tx-8974", .data = &hdmi_tx_8974_config },
396 { .compatible = "qcom,hdmi-tx-8960", .data = &hdmi_tx_8960_config },
397 { .compatible = "qcom,hdmi-tx-8660", .data = &hdmi_tx_8660_config },
423 struct hdmi *hdmi; hdmi_bind() local
431 DBG("hdmi phy: %s", match->compatible); hdmi_bind()
439 hdmi_cfg->ddc_clk_gpio = get_gpio(dev, of_node, "qcom,hdmi-tx-ddc-clk"); hdmi_bind()
440 hdmi_cfg->ddc_data_gpio = get_gpio(dev, of_node, "qcom,hdmi-tx-ddc-data"); hdmi_bind()
441 hdmi_cfg->hpd_gpio = get_gpio(dev, of_node, "qcom,hdmi-tx-hpd"); hdmi_bind()
442 hdmi_cfg->mux_en_gpio = get_gpio(dev, of_node, "qcom,hdmi-tx-mux-en"); hdmi_bind()
443 hdmi_cfg->mux_sel_gpio = get_gpio(dev, of_node, "qcom,hdmi-tx-mux-sel"); hdmi_bind()
444 hdmi_cfg->mux_lpm_gpio = get_gpio(dev, of_node, "qcom,hdmi-tx-mux-lpm"); hdmi_bind()
497 hdmi = hdmi_init(to_platform_device(dev)); hdmi_bind()
498 if (IS_ERR(hdmi)) hdmi_bind()
499 return PTR_ERR(hdmi); hdmi_bind()
500 priv->hdmi = hdmi; hdmi_bind()
510 if (priv->hdmi) { hdmi_unbind()
511 hdmi_destroy(priv->hdmi); hdmi_unbind()
512 priv->hdmi = NULL; hdmi_unbind()
|
| H A D | hdmi_i2c.c | 18 #include "hdmi.h"
22 struct hdmi *hdmi; member in struct:hdmi_i2c_adapter
30 struct hdmi *hdmi = hdmi_i2c->hdmi; init_ddc() local
32 hdmi_write(hdmi, REG_HDMI_DDC_CTRL, init_ddc()
34 hdmi_write(hdmi, REG_HDMI_DDC_CTRL, init_ddc()
37 hdmi_write(hdmi, REG_HDMI_DDC_SPEED, init_ddc()
41 hdmi_write(hdmi, REG_HDMI_DDC_SETUP, init_ddc()
45 hdmi_write(hdmi, REG_HDMI_DDC_REF, init_ddc()
52 struct hdmi *hdmi = hdmi_i2c->hdmi; ddc_clear_irq() local
53 struct drm_device *dev = hdmi->dev; ddc_clear_irq()
60 hdmi_write(hdmi, REG_HDMI_DDC_INT_CTRL, ddc_clear_irq()
64 ddc_int_ctrl = hdmi_read(hdmi, REG_HDMI_DDC_INT_CTRL); ddc_clear_irq()
82 struct hdmi *hdmi = hdmi_i2c->hdmi; sw_done() local
87 ddc_int_ctrl = hdmi_read(hdmi, REG_HDMI_DDC_INT_CTRL); sw_done()
92 hdmi_write(hdmi, REG_HDMI_DDC_INT_CTRL, sw_done()
104 struct hdmi *hdmi = hdmi_i2c->hdmi; hdmi_i2c_xfer() local
105 struct drm_device *dev = hdmi->dev; hdmi_i2c_xfer()
116 WARN_ON(!(hdmi_read(hdmi, REG_HDMI_CTRL) & HDMI_CTRL_ENABLE)); hdmi_i2c_xfer()
142 hdmi_write(hdmi, REG_HDMI_DDC_DATA, ddc_data); hdmi_i2c_xfer()
153 hdmi_write(hdmi, REG_HDMI_DDC_DATA, ddc_data); hdmi_i2c_xfer()
166 hdmi_write(hdmi, REG_HDMI_I2C_TRANSACTION(i), i2c_trans); hdmi_i2c_xfer()
170 hdmi_write(hdmi, REG_HDMI_DDC_CTRL, hdmi_i2c_xfer()
180 hdmi_read(hdmi, REG_HDMI_DDC_SW_STATUS), hdmi_i2c_xfer()
181 hdmi_read(hdmi, REG_HDMI_DDC_HW_STATUS), hdmi_i2c_xfer()
182 hdmi_read(hdmi, REG_HDMI_DDC_INT_CTRL)); hdmi_i2c_xfer()
186 ddc_status = hdmi_read(hdmi, REG_HDMI_DDC_SW_STATUS); hdmi_i2c_xfer()
205 hdmi_write(hdmi, REG_HDMI_DDC_DATA, ddc_data); hdmi_i2c_xfer()
208 hdmi_read(hdmi, REG_HDMI_DDC_DATA); hdmi_i2c_xfer()
211 ddc_data = hdmi_read(hdmi, REG_HDMI_DDC_DATA); hdmi_i2c_xfer()
244 struct i2c_adapter *hdmi_i2c_init(struct hdmi *hdmi) hdmi_i2c_init() argument
246 struct drm_device *dev = hdmi->dev; hdmi_i2c_init()
259 hdmi_i2c->hdmi = hdmi; hdmi_i2c_init()
265 snprintf(i2c->name, sizeof(i2c->name), "msm hdmi i2c"); hdmi_i2c_init()
266 i2c->dev.parent = &hdmi->pdev->dev; hdmi_i2c_init()
271 dev_err(dev->dev, "failed to register hdmi i2c: %d\n", ret); hdmi_i2c_init()
|
| H A D | hdmi_connector.c | 22 #include "hdmi.h"
26 struct hdmi *hdmi; member in struct:hdmi_connector
31 static void hdmi_phy_reset(struct hdmi *hdmi) hdmi_phy_reset() argument
35 val = hdmi_read(hdmi, REG_HDMI_PHY_CTRL); hdmi_phy_reset()
39 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, hdmi_phy_reset()
43 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, hdmi_phy_reset()
49 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, hdmi_phy_reset()
53 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, hdmi_phy_reset()
61 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, hdmi_phy_reset()
65 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, hdmi_phy_reset()
71 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, hdmi_phy_reset()
75 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, hdmi_phy_reset()
80 static int gpio_config(struct hdmi *hdmi, bool on) gpio_config() argument
82 struct device *dev = &hdmi->pdev->dev; gpio_config()
83 const struct hdmi_platform_config *config = hdmi->config; gpio_config()
197 struct hdmi *hdmi = hdmi_connector->hdmi; hpd_enable() local
198 const struct hdmi_platform_config *config = hdmi->config; hpd_enable()
199 struct device *dev = &hdmi->pdev->dev; hpd_enable()
205 ret = regulator_enable(hdmi->hpd_regs[i]); hpd_enable()
219 ret = gpio_config(hdmi, true); hpd_enable()
227 ret = clk_set_rate(hdmi->hpd_clks[i], hpd_enable()
234 ret = clk_prepare_enable(hdmi->hpd_clks[i]); hpd_enable()
242 hdmi_set_mode(hdmi, false); hpd_enable()
243 hdmi_phy_reset(hdmi); hpd_enable()
244 hdmi_set_mode(hdmi, true); hpd_enable()
246 hdmi_write(hdmi, REG_HDMI_USEC_REFTIMER, 0x0001001b); hpd_enable()
249 hdmi_write(hdmi, REG_HDMI_HPD_INT_CTRL, hpd_enable()
254 spin_lock_irqsave(&hdmi->reg_lock, flags); hpd_enable()
255 hpd_ctrl = hdmi_read(hdmi, REG_HDMI_HPD_CTRL); hpd_enable()
259 hdmi_write(hdmi, REG_HDMI_HPD_CTRL, hpd_enable()
261 hdmi_write(hdmi, REG_HDMI_HPD_CTRL, hpd_enable()
263 spin_unlock_irqrestore(&hdmi->reg_lock, flags); hpd_enable()
273 struct hdmi *hdmi = hdmi_connector->hdmi; hdp_disable() local
274 const struct hdmi_platform_config *config = hdmi->config; hdp_disable()
275 struct device *dev = &hdmi->pdev->dev; hdp_disable()
279 hdmi_write(hdmi, REG_HDMI_HPD_INT_CTRL, 0); hdp_disable()
281 hdmi_set_mode(hdmi, false); hdp_disable()
284 clk_disable_unprepare(hdmi->hpd_clks[i]); hdp_disable()
286 ret = gpio_config(hdmi, false); hdp_disable()
295 ret = regulator_disable(hdmi->hpd_regs[i]); hdp_disable()
314 struct hdmi *hdmi = hdmi_connector->hdmi; hdmi_connector_irq() local
318 hpd_int_status = hdmi_read(hdmi, REG_HDMI_HPD_INT_STATUS); hdmi_connector_irq()
319 hpd_int_ctrl = hdmi_read(hdmi, REG_HDMI_HPD_INT_CTRL); hdmi_connector_irq()
326 hdmi_write(hdmi, REG_HDMI_HPD_INT_CTRL, hdmi_connector_irq()
335 hdmi_write(hdmi, REG_HDMI_HPD_INT_CTRL, hpd_int_ctrl); hdmi_connector_irq()
337 queue_work(hdmi->workq, &hdmi_connector->hpd_work); hdmi_connector_irq()
341 static enum drm_connector_status detect_reg(struct hdmi *hdmi) detect_reg() argument
343 uint32_t hpd_int_status = hdmi_read(hdmi, REG_HDMI_HPD_INT_STATUS); detect_reg()
348 static enum drm_connector_status detect_gpio(struct hdmi *hdmi) detect_gpio() argument
350 const struct hdmi_platform_config *config = hdmi->config; detect_gpio()
360 struct hdmi *hdmi = hdmi_connector->hdmi; hdmi_connector_detect() local
365 stat_gpio = detect_gpio(hdmi); hdmi_connector_detect()
366 stat_reg = detect_reg(hdmi); hdmi_connector_detect()
375 * so trust that one the most if we didn't manage to get hdmi and hdmi_connector_detect()
401 struct hdmi *hdmi = hdmi_connector->hdmi; hdmi_connector_get_modes() local
406 hdmi_ctrl = hdmi_read(hdmi, REG_HDMI_CTRL); hdmi_connector_get_modes()
407 hdmi_write(hdmi, REG_HDMI_CTRL, hdmi_ctrl | HDMI_CTRL_ENABLE); hdmi_connector_get_modes()
409 edid = drm_get_edid(connector, hdmi->i2c); hdmi_connector_get_modes()
411 hdmi_write(hdmi, REG_HDMI_CTRL, hdmi_ctrl); hdmi_connector_get_modes()
413 hdmi->hdmi_mode = drm_detect_hdmi_monitor(edid); hdmi_connector_get_modes()
428 struct hdmi *hdmi = hdmi_connector->hdmi; hdmi_connector_mode_valid() local
429 const struct hdmi_platform_config *config = hdmi->config; hdmi_connector_mode_valid()
436 requested, hdmi_connector->hdmi->encoder); hdmi_connector_mode_valid()
443 actual = clk_round_rate(hdmi->pwr_clks[0], actual); hdmi_connector_mode_valid()
457 return hdmi_connector->hdmi->encoder; hdmi_connector_best_encoder()
477 struct drm_connector *hdmi_connector_init(struct hdmi *hdmi) hdmi_connector_init() argument
489 hdmi_connector->hdmi = hdmi; hdmi_connector_init()
494 drm_connector_init(hdmi->dev, connector, &hdmi_connector_funcs, hdmi_connector_init()
508 dev_err(&hdmi->pdev->dev, "failed to enable HPD: %d\n", ret); hdmi_connector_init()
512 drm_mode_connector_attach_encoder(connector, hdmi->encoder); hdmi_connector_init()
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| H A D | hdmi.h | 25 #include <linux/hdmi.h>
28 #include "hdmi.xml.h"
42 struct hdmi { struct
69 /* the encoder we are hooked to (outside of hdmi block) */
72 bool hdmi_mode; /* are we in hdmi mode? */
91 struct hdmi_phy *(*phy_init)(struct hdmi *hdmi);
117 void hdmi_set_mode(struct hdmi *hdmi, bool power_on);
119 static inline void hdmi_write(struct hdmi *hdmi, u32 reg, u32 data) hdmi_write() argument
121 msm_writel(data, hdmi->mmio + reg); hdmi_write()
124 static inline u32 hdmi_read(struct hdmi *hdmi, u32 reg) hdmi_read() argument
126 return msm_readl(hdmi->mmio + reg); hdmi_read()
129 static inline u32 hdmi_qfprom_read(struct hdmi *hdmi, u32 reg) hdmi_qfprom_read() argument
131 return msm_readl(hdmi->qfprom_mmio + reg); hdmi_qfprom_read()
150 struct hdmi_phy *hdmi_phy_8960_init(struct hdmi *hdmi);
151 struct hdmi_phy *hdmi_phy_8x60_init(struct hdmi *hdmi);
152 struct hdmi_phy *hdmi_phy_8x74_init(struct hdmi *hdmi);
158 int hdmi_audio_update(struct hdmi *hdmi);
159 int hdmi_audio_info_setup(struct hdmi *hdmi, bool enabled,
162 void hdmi_audio_set_sample_rate(struct hdmi *hdmi, int rate);
166 * hdmi bridge:
169 struct drm_bridge *hdmi_bridge_init(struct hdmi *hdmi);
173 * hdmi connector:
177 struct drm_connector *hdmi_connector_init(struct hdmi *hdmi);
185 struct i2c_adapter *hdmi_i2c_init(struct hdmi *hdmi);
190 struct hdmi_hdcp_ctrl *hdmi_hdcp_init(struct hdmi *hdmi);
191 void hdmi_hdcp_destroy(struct hdmi *hdmi);
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| H A D | hdmi_audio.c | 18 #include <linux/hdmi.h>
19 #include "hdmi.h"
92 int hdmi_audio_update(struct hdmi *hdmi) hdmi_audio_update() argument
94 struct hdmi_audio *audio = &hdmi->audio; hdmi_audio_update()
105 DBG("video: power_on=%d, pixclock=%lu", hdmi->power_on, hdmi->pixclock); hdmi_audio_update()
107 if (enabled && !(hdmi->power_on && hdmi->pixclock)) { hdmi_audio_update()
113 arcs = get_arcs(hdmi->pixclock); hdmi_audio_update()
116 hdmi->pixclock); hdmi_audio_update()
122 acr_pkt_ctrl = hdmi_read(hdmi, REG_HDMI_ACR_PKT_CTRL); hdmi_audio_update()
123 vbi_pkt_ctrl = hdmi_read(hdmi, REG_HDMI_VBI_PKT_CTRL); hdmi_audio_update()
124 aud_pkt_ctrl = hdmi_read(hdmi, REG_HDMI_AUDIO_PKT_CTRL1); hdmi_audio_update()
125 infofrm_ctrl = hdmi_read(hdmi, REG_HDMI_INFOFRAME_CTRL0); hdmi_audio_update()
126 audio_config = hdmi_read(hdmi, REG_HDMI_AUDIO_CFG); hdmi_audio_update()
170 hdmi_write(hdmi, REG_HDMI_ACR_0(select - 1), hdmi_audio_update()
172 hdmi_write(hdmi, REG_HDMI_ACR_1(select - 1), hdmi_audio_update()
175 hdmi_write(hdmi, REG_HDMI_AUDIO_PKT_CTRL2, hdmi_audio_update()
184 hdmi_write(hdmi, REG_HDMI_AUDIO_INFO0, hdmi_audio_update()
187 hdmi_write(hdmi, REG_HDMI_AUDIO_INFO1, hdmi_audio_update()
190 hdmi_write(hdmi, REG_HDMI_GC, 0); hdmi_audio_update()
218 hdmi_write(hdmi, REG_HDMI_ACR_PKT_CTRL, acr_pkt_ctrl); hdmi_audio_update()
219 hdmi_write(hdmi, REG_HDMI_VBI_PKT_CTRL, vbi_pkt_ctrl); hdmi_audio_update()
220 hdmi_write(hdmi, REG_HDMI_AUDIO_PKT_CTRL1, aud_pkt_ctrl); hdmi_audio_update()
221 hdmi_write(hdmi, REG_HDMI_INFOFRAME_CTRL0, infofrm_ctrl); hdmi_audio_update()
223 hdmi_write(hdmi, REG_HDMI_AUD_INT, hdmi_audio_update()
227 hdmi_write(hdmi, REG_HDMI_AUDIO_CFG, audio_config); hdmi_audio_update()
235 int hdmi_audio_info_setup(struct hdmi *hdmi, bool enabled, hdmi_audio_info_setup() argument
241 if (!hdmi) hdmi_audio_info_setup()
244 audio = &hdmi->audio; hdmi_audio_info_setup()
255 return hdmi_audio_update(hdmi); hdmi_audio_info_setup()
258 void hdmi_audio_set_sample_rate(struct hdmi *hdmi, int rate) hdmi_audio_set_sample_rate() argument
262 if (!hdmi) hdmi_audio_set_sample_rate()
265 audio = &hdmi->audio; hdmi_audio_set_sample_rate()
271 hdmi_audio_update(hdmi); hdmi_audio_set_sample_rate()
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| H A D | hdmi_hdcp.c | 14 #include "hdmi.h"
58 struct hdmi *hdmi; member in struct:hdmi_hdcp_ctrl
87 static int hdmi_ddc_read(struct hdmi *hdmi, u16 addr, u8 offset, hdmi_ddc_read() argument
108 rc = i2c_transfer(hdmi->i2c, msgs, 2); hdmi_ddc_read()
125 static int hdmi_ddc_write(struct hdmi *hdmi, u16 addr, u8 offset, hdmi_ddc_write() argument
150 rc = i2c_transfer(hdmi->i2c, msgs, 1); hdmi_ddc_write()
168 struct hdmi *hdmi = hdcp_ctrl->hdmi; hdmi_hdcp_scm_wr() local
176 phy_addr = (u32)hdmi->mmio_phy_addr; hdmi_hdcp_scm_wr()
199 hdmi_write(hdmi, preg[i], pdata[i]); hdmi_hdcp_scm_wr()
207 struct hdmi *hdmi = hdcp_ctrl->hdmi; hdmi_hdcp_irq() local
211 spin_lock_irqsave(&hdmi->reg_lock, flags); hdmi_hdcp_irq()
212 reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_INT_CTRL); hdmi_hdcp_irq()
215 spin_unlock_irqrestore(&hdmi->reg_lock, flags); hdmi_hdcp_irq()
223 hdmi_write(hdmi, REG_HDMI_HDCP_INT_CTRL, reg_val); hdmi_hdcp_irq()
224 spin_unlock_irqrestore(&hdmi->reg_lock, flags); hdmi_hdcp_irq()
237 reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_LINK0_STATUS); hdmi_hdcp_irq()
241 queue_work(hdmi->workq, &hdcp_ctrl->hdcp_reauth_work); hdmi_hdcp_irq()
269 struct hdmi *hdmi = hdcp_ctrl->hdmi; hdmi_hdcp_read_validate_aksv() local
272 hdcp_ctrl->aksv_lsb = hdmi_qfprom_read(hdmi, HDCP_KSV_LSB); hdmi_hdcp_read_validate_aksv()
273 hdcp_ctrl->aksv_msb = hdmi_qfprom_read(hdmi, HDCP_KSV_MSB); hdmi_hdcp_read_validate_aksv()
292 struct hdmi *hdmi = hdcp_ctrl->hdmi; reset_hdcp_ddc_failures() local
297 reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_DDC_STATUS); reset_hdcp_ddc_failures()
314 hdmi_write(hdmi, REG_HDMI_HDCP_DDC_CTRL_0, reset_hdcp_ddc_failures()
318 reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_DDC_CTRL_1); reset_hdcp_ddc_failures()
320 hdmi_write(hdmi, REG_HDMI_HDCP_DDC_CTRL_1, reg_val); reset_hdcp_ddc_failures()
323 reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_DDC_STATUS); reset_hdcp_ddc_failures()
329 hdmi_write(hdmi, REG_HDMI_HDCP_DDC_CTRL_0, 0); reset_hdcp_ddc_failures()
334 hdmi_read(hdmi, REG_HDMI_DDC_SW_STATUS)); reset_hdcp_ddc_failures()
336 reg_val = hdmi_read(hdmi, REG_HDMI_DDC_CTRL); reset_hdcp_ddc_failures()
338 hdmi_write(hdmi, REG_HDMI_DDC_CTRL, reg_val); reset_hdcp_ddc_failures()
342 reg_val = hdmi_read(hdmi, REG_HDMI_DDC_CTRL); reset_hdcp_ddc_failures()
344 hdmi_write(hdmi, REG_HDMI_DDC_CTRL, reg_val); reset_hdcp_ddc_failures()
347 reg_val = hdmi_read(hdmi, REG_HDMI_DDC_CTRL); reset_hdcp_ddc_failures()
349 hdmi_write(hdmi, REG_HDMI_DDC_CTRL, reg_val); reset_hdcp_ddc_failures()
355 reg_val = hdmi_read(hdmi, REG_HDMI_DDC_CTRL); reset_hdcp_ddc_failures()
357 hdmi_write(hdmi, REG_HDMI_DDC_CTRL, reg_val); reset_hdcp_ddc_failures()
359 hdmi_read(hdmi, REG_HDMI_DDC_SW_STATUS)); reset_hdcp_ddc_failures()
372 struct hdmi *hdmi = hdcp_ctrl->hdmi; hdmi_hdcp_hw_ddc_clean() local
374 if (hdmi_read(hdmi, REG_HDMI_DDC_HW_STATUS) == 0) hdmi_hdcp_hw_ddc_clean()
380 hdcp_ddc_status = hdmi_read(hdmi, REG_HDMI_HDCP_DDC_STATUS); hdmi_hdcp_hw_ddc_clean()
381 ddc_hw_status = hdmi_read(hdmi, REG_HDMI_DDC_HW_STATUS); hdmi_hdcp_hw_ddc_clean()
409 struct hdmi *hdmi = hdcp_ctrl->hdmi; hdmi_hdcp_reauth_work() local
420 spin_lock_irqsave(&hdmi->reg_lock, flags); hdmi_hdcp_reauth_work()
421 reg_val = hdmi_read(hdmi, REG_HDMI_HPD_CTRL); hdmi_hdcp_reauth_work()
423 hdmi_write(hdmi, REG_HDMI_HPD_CTRL, reg_val); hdmi_hdcp_reauth_work()
426 hdmi_write(hdmi, REG_HDMI_HDCP_INT_CTRL, 0); hdmi_hdcp_reauth_work()
427 spin_unlock_irqrestore(&hdmi->reg_lock, flags); hdmi_hdcp_reauth_work()
429 hdmi_write(hdmi, REG_HDMI_HDCP_RESET, hdmi_hdcp_reauth_work()
439 hdmi_write(hdmi, REG_HDMI_HDCP_CTRL, 0); hdmi_hdcp_reauth_work()
442 spin_lock_irqsave(&hdmi->reg_lock, flags); hdmi_hdcp_reauth_work()
443 reg_val = hdmi_read(hdmi, REG_HDMI_HPD_CTRL); hdmi_hdcp_reauth_work()
445 hdmi_write(hdmi, REG_HDMI_HPD_CTRL, reg_val); hdmi_hdcp_reauth_work()
446 spin_unlock_irqrestore(&hdmi->reg_lock, flags); hdmi_hdcp_reauth_work()
461 queue_work(hdmi->workq, &hdcp_ctrl->hdcp_auth_work); hdmi_hdcp_reauth_work()
466 struct hdmi *hdmi = hdcp_ctrl->hdmi; hdmi_hdcp_auth_prepare() local
482 spin_lock_irqsave(&hdmi->reg_lock, flags); hdmi_hdcp_auth_prepare()
484 reg_val = hdmi_read(hdmi, REG_HDMI_CTRL); hdmi_hdcp_auth_prepare()
486 hdmi_write(hdmi, REG_HDMI_CTRL, reg_val); hdmi_hdcp_auth_prepare()
489 reg_val = hdmi_read(hdmi, REG_HDMI_DDC_ARBITRATION); hdmi_hdcp_auth_prepare()
491 hdmi_write(hdmi, REG_HDMI_DDC_ARBITRATION, reg_val); hdmi_hdcp_auth_prepare()
492 spin_unlock_irqrestore(&hdmi->reg_lock, flags); hdmi_hdcp_auth_prepare()
499 hdmi_write(hdmi, REG_HDMI_HDCP_SW_LOWER_AKSV, hdcp_ctrl->aksv_lsb); hdmi_hdcp_auth_prepare()
500 hdmi_write(hdmi, REG_HDMI_HDCP_SW_UPPER_AKSV, hdcp_ctrl->aksv_msb); hdmi_hdcp_auth_prepare()
506 hdmi_write(hdmi, REG_HDMI_HDCP_ENTROPY_CTRL0, 0xB1FFB0FF); hdmi_hdcp_auth_prepare()
507 hdmi_write(hdmi, REG_HDMI_HDCP_ENTROPY_CTRL1, 0xF00DFACE); hdmi_hdcp_auth_prepare()
510 reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_DEBUG_CTRL); hdmi_hdcp_auth_prepare()
512 hdmi_write(hdmi, REG_HDMI_HDCP_DEBUG_CTRL, reg_val); hdmi_hdcp_auth_prepare()
514 hdmi_read(hdmi, REG_HDMI_HDCP_DEBUG_CTRL)); hdmi_hdcp_auth_prepare()
527 hdmi_write(hdmi, REG_HDMI_HDCP_CTRL, HDMI_HDCP_CTRL_ENABLE); hdmi_hdcp_auth_prepare()
533 link0_status = hdmi_read(hdmi, REG_HDMI_HDCP_LINK0_STATUS); hdmi_hdcp_auth_prepare()
548 struct hdmi *hdmi = hdcp_ctrl->hdmi; hdmi_hdcp_auth_fail() local
554 spin_lock_irqsave(&hdmi->reg_lock, flags); hdmi_hdcp_auth_fail()
555 reg_val = hdmi_read(hdmi, REG_HDMI_CTRL); hdmi_hdcp_auth_fail()
557 hdmi_write(hdmi, REG_HDMI_CTRL, reg_val); hdmi_hdcp_auth_fail()
558 spin_unlock_irqrestore(&hdmi->reg_lock, flags); hdmi_hdcp_auth_fail()
561 queue_work(hdmi->workq, &hdcp_ctrl->hdcp_reauth_work); hdmi_hdcp_auth_fail()
566 struct hdmi *hdmi = hdcp_ctrl->hdmi; hdmi_hdcp_auth_done() local
574 spin_lock_irqsave(&hdmi->reg_lock, flags); hdmi_hdcp_auth_done()
575 reg_val = hdmi_read(hdmi, REG_HDMI_DDC_ARBITRATION); hdmi_hdcp_auth_done()
577 hdmi_write(hdmi, REG_HDMI_DDC_ARBITRATION, reg_val); hdmi_hdcp_auth_done()
578 spin_unlock_irqrestore(&hdmi->reg_lock, flags); hdmi_hdcp_auth_done()
581 spin_lock_irqsave(&hdmi->reg_lock, flags); hdmi_hdcp_auth_done()
582 reg_val = hdmi_read(hdmi, REG_HDMI_CTRL); hdmi_hdcp_auth_done()
584 hdmi_write(hdmi, REG_HDMI_CTRL, reg_val); hdmi_hdcp_auth_done()
585 spin_unlock_irqrestore(&hdmi->reg_lock, flags); hdmi_hdcp_auth_done()
602 struct hdmi *hdmi = hdcp_ctrl->hdmi; hdmi_hdcp_wait_key_an_ready() local
610 link0_status = hdmi_read(hdmi, REG_HDMI_HDCP_LINK0_STATUS); hdmi_hdcp_wait_key_an_ready()
631 link0_status = hdmi_read(hdmi, REG_HDMI_HDCP_LINK0_STATUS); hdmi_hdcp_wait_key_an_ready()
657 struct hdmi *hdmi = hdcp_ctrl->hdmi; hdmi_hdcp_send_aksv_an() local
663 link0_an[0] = hdmi_read(hdmi, REG_HDMI_HDCP_RCVPORT_DATA5); hdmi_hdcp_send_aksv_an()
664 link0_an[1] = hdmi_read(hdmi, REG_HDMI_HDCP_RCVPORT_DATA6); hdmi_hdcp_send_aksv_an()
667 link0_aksv_0 = hdmi_read(hdmi, REG_HDMI_HDCP_RCVPORT_DATA3); hdmi_hdcp_send_aksv_an()
668 link0_aksv_1 = hdmi_read(hdmi, REG_HDMI_HDCP_RCVPORT_DATA4); hdmi_hdcp_send_aksv_an()
679 rc = hdmi_ddc_write(hdmi, HDCP_PORT_ADDR, 0x18, (u8 *)link0_an, hdmi_hdcp_send_aksv_an()
688 rc = hdmi_ddc_write(hdmi, HDCP_PORT_ADDR, 0x10, aksv, 5); hdmi_hdcp_send_aksv_an()
701 struct hdmi *hdmi = hdcp_ctrl->hdmi; hdmi_hdcp_recv_bksv() local
706 rc = hdmi_ddc_read(hdmi, HDCP_PORT_ADDR, 0x00, bksv, 5); hdmi_hdcp_recv_bksv()
739 struct hdmi *hdmi = hdcp_ctrl->hdmi; hdmi_hdcp_recv_bcaps() local
743 rc = hdmi_ddc_read(hdmi, HDCP_PORT_ADDR, 0x40, &bcaps, 1); hdmi_hdcp_recv_bcaps()
763 struct hdmi *hdmi = hdcp_ctrl->hdmi; hdmi_hdcp_auth_part1_key_exchange() local
785 hdmi_write(hdmi, REG_HDMI_HDCP_RCVPORT_DATA4, 0); hdmi_hdcp_auth_part1_key_exchange()
802 spin_lock_irqsave(&hdmi->reg_lock, flags); hdmi_hdcp_auth_part1_key_exchange()
803 hdmi_write(hdmi, REG_HDMI_HDCP_INT_CTRL, hdmi_hdcp_auth_part1_key_exchange()
809 spin_unlock_irqrestore(&hdmi->reg_lock, flags); hdmi_hdcp_auth_part1_key_exchange()
817 struct hdmi *hdmi = hdcp_ctrl->hdmi; hdmi_hdcp_auth_part1_recv_r0() local
830 rc = hdmi_ddc_read(hdmi, HDCP_PORT_ADDR, 0x08, buf, 2); hdmi_hdcp_auth_part1_recv_r0()
838 hdmi_write(hdmi, REG_HDMI_HDCP_RCVPORT_DATA2_0, hdmi_hdcp_auth_part1_recv_r0()
847 struct hdmi *hdmi = hdcp_ctrl->hdmi; hdmi_hdcp_auth_part1_verify_r0() local
858 link0_status = hdmi_read(hdmi, REG_HDMI_HDCP_LINK0_STATUS); hdmi_hdcp_auth_part1_verify_r0()
865 hdmi_write(hdmi, REG_HDMI_HDCP_CTRL, hdmi_hdcp_auth_part1_verify_r0()
876 struct hdmi *hdmi = hdcp_ctrl->hdmi; hdmi_hdcp_recv_check_bstatus() local
883 rc = hdmi_ddc_read(hdmi, HDCP_PORT_ADDR, 0x41, buf, 2); hdmi_hdcp_recv_check_bstatus()
943 struct hdmi *hdmi = hdcp_ctrl->hdmi; hdmi_hdcp_auth_part2_wait_ksv_fifo_ready() local
956 rc = hdmi_ddc_read(hdmi, HDCP_PORT_ADDR, 0x40, &bcaps, 1); hdmi_hdcp_auth_part2_wait_ksv_fifo_ready()
1002 struct hdmi *hdmi = hdcp_ctrl->hdmi; hdmi_hdcp_transfer_v_h() local
1019 rc = hdmi_ddc_read(hdmi, HDCP_PORT_ADDR, hdmi_hdcp_transfer_v_h()
1039 struct hdmi *hdmi = hdcp_ctrl->hdmi; hdmi_hdcp_recv_ksv_fifo() local
1044 rc = hdmi_ddc_read(hdmi, HDCP_PORT_ADDR, 0x43, hdmi_hdcp_recv_ksv_fifo()
1126 struct hdmi *hdmi = hdcp_ctrl->hdmi; hdmi_hdcp_write_ksv_fifo() local
1136 reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_SHA_STATUS); hdmi_hdcp_write_ksv_fifo()
1220 struct hdmi *hdmi = hdcp_ctrl->hdmi; hdmi_hdcp_auth_part2_check_v_match() local
1225 link0_status = hdmi_read(hdmi, REG_HDMI_HDCP_LINK0_STATUS); hdmi_hdcp_auth_part2_check_v_match()
1315 struct hdmi *hdmi = hdcp_ctrl->hdmi; hdmi_hdcp_on() local
1326 spin_lock_irqsave(&hdmi->reg_lock, flags); hdmi_hdcp_on()
1327 reg_val = hdmi_read(hdmi, REG_HDMI_CTRL); hdmi_hdcp_on()
1329 hdmi_write(hdmi, REG_HDMI_CTRL, reg_val); hdmi_hdcp_on()
1330 spin_unlock_irqrestore(&hdmi->reg_lock, flags); hdmi_hdcp_on()
1335 queue_work(hdmi->workq, &hdcp_ctrl->hdcp_auth_work); hdmi_hdcp_on()
1340 struct hdmi *hdmi = hdcp_ctrl->hdmi; hdmi_hdcp_off() local
1356 spin_lock_irqsave(&hdmi->reg_lock, flags); hdmi_hdcp_off()
1357 reg_val = hdmi_read(hdmi, REG_HDMI_HPD_CTRL); hdmi_hdcp_off()
1359 hdmi_write(hdmi, REG_HDMI_HPD_CTRL, reg_val); hdmi_hdcp_off()
1366 hdmi_write(hdmi, REG_HDMI_HDCP_INT_CTRL, 0); hdmi_hdcp_off()
1367 spin_unlock_irqrestore(&hdmi->reg_lock, flags); hdmi_hdcp_off()
1380 hdmi_write(hdmi, REG_HDMI_HDCP_RESET, hdmi_hdcp_off()
1384 hdmi_write(hdmi, REG_HDMI_HDCP_CTRL, 0); hdmi_hdcp_off()
1386 spin_lock_irqsave(&hdmi->reg_lock, flags); hdmi_hdcp_off()
1387 reg_val = hdmi_read(hdmi, REG_HDMI_CTRL); hdmi_hdcp_off()
1389 hdmi_write(hdmi, REG_HDMI_CTRL, reg_val); hdmi_hdcp_off()
1392 reg_val = hdmi_read(hdmi, REG_HDMI_HPD_CTRL); hdmi_hdcp_off()
1394 hdmi_write(hdmi, REG_HDMI_HPD_CTRL, reg_val); hdmi_hdcp_off()
1395 spin_unlock_irqrestore(&hdmi->reg_lock, flags); hdmi_hdcp_off()
1402 struct hdmi_hdcp_ctrl *hdmi_hdcp_init(struct hdmi *hdmi) hdmi_hdcp_init() argument
1406 if (!hdmi->qfprom_mmio) { hdmi_hdcp_init()
1419 hdcp_ctrl->hdmi = hdmi; hdmi_hdcp_init()
1431 void hdmi_hdcp_destroy(struct hdmi *hdmi) hdmi_hdcp_destroy() argument
1433 if (hdmi && hdmi->hdcp_ctrl) { hdmi_hdcp_destroy()
1434 kfree(hdmi->hdcp_ctrl); hdmi_hdcp_destroy()
1435 hdmi->hdcp_ctrl = NULL; hdmi_hdcp_destroy()
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| H A D | hdmi_phy_8960.c | 23 #include "hdmi.h"
27 struct hdmi *hdmi; member in struct:hdmi_phy_8960
42 * To get the parent clock setup properly, we need to plug in hdmi pll
255 struct hdmi *hdmi = phy_8960->hdmi; hdmi_pll_enable() local
262 hdmi_write(hdmi, REG_HDMI_8960_PHY_PLL_LOCKDET_CFG2, 0x8d); hdmi_pll_enable()
263 hdmi_write(hdmi, REG_HDMI_8960_PHY_PLL_LOCKDET_CFG0, 0x10); hdmi_pll_enable()
264 hdmi_write(hdmi, REG_HDMI_8960_PHY_PLL_LOCKDET_CFG1, 0x1a); hdmi_pll_enable()
274 hdmi_write(hdmi, REG_HDMI_8960_PHY_PLL_LOCKDET_CFG2, 0x0d); hdmi_pll_enable()
276 val = hdmi_read(hdmi, REG_HDMI_8960_PHY_REG12); hdmi_pll_enable()
279 hdmi_write(hdmi, REG_HDMI_8960_PHY_REG12, val); hdmi_pll_enable()
287 hdmi_write(hdmi, REG_HDMI_8960_PHY_REG12, val); hdmi_pll_enable()
288 hdmi_write(hdmi, REG_HDMI_8960_PHY_REG2, 0x3f); hdmi_pll_enable()
290 val = hdmi_read(hdmi, REG_HDMI_8960_PHY_REG12); hdmi_pll_enable()
292 hdmi_write(hdmi, REG_HDMI_8960_PHY_REG12, val); hdmi_pll_enable()
297 val = hdmi_read(hdmi, REG_HDMI_8960_PHY_PLL_PWRDN_B); hdmi_pll_enable()
300 hdmi_write(hdmi, REG_HDMI_8960_PHY_PLL_PWRDN_B, val); hdmi_pll_enable()
301 hdmi_write(hdmi, REG_HDMI_8960_PHY_REG2, 0x80); hdmi_pll_enable()
307 val = hdmi_read(hdmi, REG_HDMI_8960_PHY_PLL_STATUS0); hdmi_pll_enable()
321 hdmi_write(hdmi, REG_HDMI_8960_PHY_PLL_LOCKDET_CFG2, 0x8d); hdmi_pll_enable()
323 hdmi_write(hdmi, REG_HDMI_8960_PHY_PLL_LOCKDET_CFG2, 0x0d); hdmi_pll_enable()
340 struct hdmi *hdmi = phy_8960->hdmi; hdmi_pll_disable() local
345 val = hdmi_read(hdmi, REG_HDMI_8960_PHY_REG12); hdmi_pll_disable()
347 hdmi_write(hdmi, REG_HDMI_8960_PHY_REG12, val); hdmi_pll_disable()
349 val = hdmi_read(hdmi, REG_HDMI_8960_PHY_PLL_PWRDN_B); hdmi_pll_disable()
352 hdmi_write(hdmi, REG_HDMI_8960_PHY_PLL_PWRDN_B, val); hdmi_pll_disable()
384 struct hdmi *hdmi = phy_8960->hdmi; hdmi_pll_set_rate() local
391 hdmi_write(hdmi, pll_rate->conf[i].reg, pll_rate->conf[i].val); hdmi_pll_set_rate()
433 struct hdmi *hdmi = phy_8960->hdmi; hdmi_phy_8960_powerup() local
437 hdmi_write(hdmi, REG_HDMI_8960_PHY_REG2, 0x00); hdmi_phy_8960_powerup()
438 hdmi_write(hdmi, REG_HDMI_8960_PHY_REG0, 0x1b); hdmi_phy_8960_powerup()
439 hdmi_write(hdmi, REG_HDMI_8960_PHY_REG1, 0xf2); hdmi_phy_8960_powerup()
440 hdmi_write(hdmi, REG_HDMI_8960_PHY_REG4, 0x00); hdmi_phy_8960_powerup()
441 hdmi_write(hdmi, REG_HDMI_8960_PHY_REG5, 0x00); hdmi_phy_8960_powerup()
442 hdmi_write(hdmi, REG_HDMI_8960_PHY_REG6, 0x00); hdmi_phy_8960_powerup()
443 hdmi_write(hdmi, REG_HDMI_8960_PHY_REG7, 0x00); hdmi_phy_8960_powerup()
444 hdmi_write(hdmi, REG_HDMI_8960_PHY_REG8, 0x00); hdmi_phy_8960_powerup()
445 hdmi_write(hdmi, REG_HDMI_8960_PHY_REG9, 0x00); hdmi_phy_8960_powerup()
446 hdmi_write(hdmi, REG_HDMI_8960_PHY_REG10, 0x00); hdmi_phy_8960_powerup()
447 hdmi_write(hdmi, REG_HDMI_8960_PHY_REG11, 0x00); hdmi_phy_8960_powerup()
448 hdmi_write(hdmi, REG_HDMI_8960_PHY_REG3, 0x20); hdmi_phy_8960_powerup()
454 struct hdmi *hdmi = phy_8960->hdmi; hdmi_phy_8960_powerdown() local
458 hdmi_write(hdmi, REG_HDMI_8960_PHY_REG2, 0x7f); hdmi_phy_8960_powerdown()
467 struct hdmi_phy *hdmi_phy_8960_init(struct hdmi *hdmi) hdmi_phy_8960_init() argument
491 phy_8960->hdmi = hdmi; hdmi_phy_8960_init()
495 phy_8960->pll = devm_clk_register(&hdmi->pdev->dev, &phy_8960->pll_hw); hdmi_phy_8960_init()
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| H A D | hdmi_phy_8x74.c | 18 #include "hdmi.h"
70 struct hdmi_phy *hdmi_phy_8x74_init(struct hdmi *hdmi) hdmi_phy_8x74_init() argument
87 phy_8x74->mmio = msm_ioremap(hdmi->pdev, hdmi_phy_8x74_init()
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| H A D | qfprom.xml.h | 19 - /home/robclark/src/freedreno/envytools/rnndb/hdmi/qfprom.xml ( 600 bytes, from 2015-05-20 20:03:07)
20 - /home/robclark/src/freedreno/envytools/rnndb/hdmi/hdmi.xml ( 29154 bytes, from 2015-08-10 21:25:43)
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| H A D | hdmi.xml.h | 19 - /home/robclark/src/freedreno/envytools/rnndb/hdmi/qfprom.xml ( 600 bytes, from 2015-05-20 20:03:07)
20 - /home/robclark/src/freedreno/envytools/rnndb/hdmi/hdmi.xml ( 29154 bytes, from 2015-08-10 21:25:43)
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| /linux-4.4.14/drivers/video/fbdev/ |
| H A D | sh_mobile_hdmi.c | 292 void (*write)(struct sh_hdmi *hdmi, u8 data, u8 reg);
293 u8 (*read)(struct sh_hdmi *hdmi, u8 reg);
298 static void __hdmi_write8(struct sh_hdmi *hdmi, u8 data, u8 reg) __hdmi_write8() argument
300 iowrite8(data, hdmi->base + reg); __hdmi_write8()
303 static u8 __hdmi_read8(struct sh_hdmi *hdmi, u8 reg) __hdmi_read8() argument
305 return ioread8(hdmi->base + reg); __hdmi_read8()
308 static void __hdmi_write32(struct sh_hdmi *hdmi, u8 data, u8 reg) __hdmi_write32() argument
310 iowrite32((u32)data, hdmi->base + (reg * 4)); __hdmi_write32()
314 static u8 __hdmi_read32(struct sh_hdmi *hdmi, u8 reg) __hdmi_read32() argument
316 return (u8)ioread32(hdmi->base + (reg * 4)); __hdmi_read32()
319 static void hdmi_write(struct sh_hdmi *hdmi, u8 data, u8 reg) hdmi_write() argument
321 hdmi->write(hdmi, data, reg); hdmi_write()
324 static u8 hdmi_read(struct sh_hdmi *hdmi, u8 reg) hdmi_read() argument
326 return hdmi->read(hdmi, reg); hdmi_read()
329 static void hdmi_bit_set(struct sh_hdmi *hdmi, u8 mask, u8 data, u8 reg) hdmi_bit_set() argument
331 u8 val = hdmi_read(hdmi, reg); hdmi_bit_set()
336 hdmi_write(hdmi, val, reg); hdmi_bit_set()
339 static void hdmi_htop1_write(struct sh_hdmi *hdmi, u32 data, u32 reg) hdmi_htop1_write() argument
341 iowrite32(data, hdmi->htop1 + reg); hdmi_htop1_write()
345 static u32 hdmi_htop1_read(struct sh_hdmi *hdmi, u32 reg) hdmi_htop1_read() argument
347 return ioread32(hdmi->htop1 + reg); hdmi_htop1_read()
356 struct sh_hdmi *hdmi = snd_soc_codec_get_drvdata(codec); sh_hdmi_snd_read() local
358 return hdmi_read(hdmi, reg); sh_hdmi_snd_read()
365 struct sh_hdmi *hdmi = snd_soc_codec_get_drvdata(codec); sh_hdmi_snd_write() local
367 hdmi_write(hdmi, value, reg); sh_hdmi_snd_write()
403 static void sh_hdmi_external_video_param(struct sh_hdmi *hdmi) sh_hdmi_external_video_param() argument
405 struct fb_videomode *mode = &hdmi->mode; sh_hdmi_external_video_param()
435 dev_dbg(hdmi->dev, "H: %u, %u, %u, %u; V: %u, %u, %u, %u; sync 0x%x\n", sh_hdmi_external_video_param()
439 hdmi_write(hdmi, sync | (voffset << 4), HDMI_EXTERNAL_VIDEO_PARAM_SETTINGS); sh_hdmi_external_video_param()
441 hdmi_write(hdmi, htotal, HDMI_EXTERNAL_H_TOTAL_7_0); sh_hdmi_external_video_param()
442 hdmi_write(hdmi, htotal >> 8, HDMI_EXTERNAL_H_TOTAL_11_8); sh_hdmi_external_video_param()
444 hdmi_write(hdmi, hblank, HDMI_EXTERNAL_H_BLANK_7_0); sh_hdmi_external_video_param()
445 hdmi_write(hdmi, hblank >> 8, HDMI_EXTERNAL_H_BLANK_9_8); sh_hdmi_external_video_param()
447 hdmi_write(hdmi, hdelay, HDMI_EXTERNAL_H_DELAY_7_0); sh_hdmi_external_video_param()
448 hdmi_write(hdmi, hdelay >> 8, HDMI_EXTERNAL_H_DELAY_9_8); sh_hdmi_external_video_param()
450 hdmi_write(hdmi, mode->hsync_len, HDMI_EXTERNAL_H_DURATION_7_0); sh_hdmi_external_video_param()
451 hdmi_write(hdmi, mode->hsync_len >> 8, HDMI_EXTERNAL_H_DURATION_9_8); sh_hdmi_external_video_param()
453 hdmi_write(hdmi, vtotal, HDMI_EXTERNAL_V_TOTAL_7_0); sh_hdmi_external_video_param()
454 hdmi_write(hdmi, vtotal >> 8, HDMI_EXTERNAL_V_TOTAL_9_8); sh_hdmi_external_video_param()
456 hdmi_write(hdmi, vblank, HDMI_EXTERNAL_V_BLANK); sh_hdmi_external_video_param()
458 hdmi_write(hdmi, vdelay, HDMI_EXTERNAL_V_DELAY); sh_hdmi_external_video_param()
460 hdmi_write(hdmi, mode->vsync_len, HDMI_EXTERNAL_V_DURATION); sh_hdmi_external_video_param()
463 if (!hdmi->preprogrammed_vic) sh_hdmi_external_video_param()
464 hdmi_write(hdmi, sync | 1 | (voffset << 4), sh_hdmi_external_video_param()
471 static void sh_hdmi_video_config(struct sh_hdmi *hdmi) sh_hdmi_video_config() argument
478 hdmi_write(hdmi, 0x20, HDMI_AUDIO_VIDEO_SETTING_1); sh_hdmi_video_config()
486 hdmi_write(hdmi, 0x34, HDMI_VIDEO_SETTING_1); sh_hdmi_video_config()
493 hdmi_write(hdmi, 0x20, HDMI_DEEP_COLOR_MODES); sh_hdmi_video_config()
499 static void sh_hdmi_audio_config(struct sh_hdmi *hdmi) sh_hdmi_audio_config() argument
502 struct sh_mobile_hdmi_info *pdata = dev_get_platdata(hdmi->dev); sh_hdmi_audio_config()
508 hdmi_write(hdmi, 0x00, HDMI_L_R_DATA_SWAP_CTRL_RPKT); sh_hdmi_audio_config()
510 hdmi_write(hdmi, 0x18, HDMI_20_BIT_N_FOR_AUDIO_RPKT_15_8); sh_hdmi_audio_config()
512 hdmi_write(hdmi, 0x00, HDMI_20_BIT_N_FOR_AUDIO_RPKT_7_0); sh_hdmi_audio_config()
515 hdmi_write(hdmi, 0x20, HDMI_SPDIF_AUDIO_SAMP_FREQ_CTS); sh_hdmi_audio_config()
537 hdmi_write(hdmi, data, HDMI_AUDIO_SETTING_1); sh_hdmi_audio_config()
540 hdmi_write(hdmi, 0x40, HDMI_AUDIO_SETTING_2); sh_hdmi_audio_config()
546 hdmi_write(hdmi, 0x04, HDMI_I2S_AUDIO_SET); sh_hdmi_audio_config()
549 hdmi_write(hdmi, 0x00, HDMI_DSD_AUDIO_SET); sh_hdmi_audio_config()
552 hdmi_write(hdmi, 0x00, HDMI_I2S_INPUT_PIN_SWAP); sh_hdmi_audio_config()
558 hdmi_write(hdmi, 0x00, HDMI_AUDIO_STATUS_BITS_SETTING_1); sh_hdmi_audio_config()
567 hdmi_write(hdmi, 0x00, HDMI_AUDIO_STATUS_BITS_SETTING_2); sh_hdmi_audio_config()
570 hdmi_write(hdmi, 0x00, HDMI_CATEGORY_CODE); sh_hdmi_audio_config()
576 hdmi_write(hdmi, 0x00, HDMI_SOURCE_NUM_AUDIO_WORD_LEN); sh_hdmi_audio_config()
579 hdmi_write(hdmi, 0x20, HDMI_AUDIO_VIDEO_SETTING_1); sh_hdmi_audio_config()
585 static void sh_hdmi_phy_config(struct sh_hdmi *hdmi) sh_hdmi_phy_config() argument
587 if (hdmi->mode.pixclock < 10000) { sh_hdmi_phy_config()
589 hdmi_write(hdmi, 0x1d, HDMI_SLIPHDMIT_PARAM_SETTINGS_1); sh_hdmi_phy_config()
590 hdmi_write(hdmi, 0x00, HDMI_SLIPHDMIT_PARAM_SETTINGS_2); sh_hdmi_phy_config()
591 hdmi_write(hdmi, 0x00, HDMI_SLIPHDMIT_PARAM_SETTINGS_3); sh_hdmi_phy_config()
592 hdmi_write(hdmi, 0x4c, HDMI_SLIPHDMIT_PARAM_SETTINGS_5); sh_hdmi_phy_config()
593 hdmi_write(hdmi, 0x1e, HDMI_SLIPHDMIT_PARAM_SETTINGS_6); sh_hdmi_phy_config()
594 hdmi_write(hdmi, 0x48, HDMI_SLIPHDMIT_PARAM_SETTINGS_7); sh_hdmi_phy_config()
595 hdmi_write(hdmi, 0x0e, HDMI_SLIPHDMIT_PARAM_SETTINGS_8); sh_hdmi_phy_config()
596 hdmi_write(hdmi, 0x25, HDMI_SLIPHDMIT_PARAM_SETTINGS_9); sh_hdmi_phy_config()
597 hdmi_write(hdmi, 0x04, HDMI_SLIPHDMIT_PARAM_SETTINGS_10); sh_hdmi_phy_config()
598 } else if (hdmi->mode.pixclock < 30000) { sh_hdmi_phy_config()
607 hdmi_write(hdmi, 0x0f, HDMI_SLIPHDMIT_PARAM_SETTINGS_1); sh_hdmi_phy_config()
609 hdmi_write(hdmi, 0x00, HDMI_SLIPHDMIT_PARAM_SETTINGS_2); sh_hdmi_phy_config()
614 hdmi_write(hdmi, 0x00, HDMI_SLIPHDMIT_PARAM_SETTINGS_3); sh_hdmi_phy_config()
616 hdmi_write(hdmi, 0x44, HDMI_SLIPHDMIT_PARAM_SETTINGS_5); sh_hdmi_phy_config()
621 hdmi_write(hdmi, 0x32, HDMI_SLIPHDMIT_PARAM_SETTINGS_6); sh_hdmi_phy_config()
623 hdmi_write(hdmi, 0x4A, HDMI_SLIPHDMIT_PARAM_SETTINGS_7); sh_hdmi_phy_config()
628 hdmi_write(hdmi, 0x00, HDMI_SLIPHDMIT_PARAM_SETTINGS_8); sh_hdmi_phy_config()
630 hdmi_write(hdmi, 0x25, HDMI_SLIPHDMIT_PARAM_SETTINGS_9); sh_hdmi_phy_config()
636 hdmi_write(hdmi, 0x04, HDMI_SLIPHDMIT_PARAM_SETTINGS_10); sh_hdmi_phy_config()
639 hdmi_write(hdmi, 0x19, HDMI_SLIPHDMIT_PARAM_SETTINGS_1); sh_hdmi_phy_config()
640 hdmi_write(hdmi, 0x00, HDMI_SLIPHDMIT_PARAM_SETTINGS_2); sh_hdmi_phy_config()
641 hdmi_write(hdmi, 0x00, HDMI_SLIPHDMIT_PARAM_SETTINGS_3); sh_hdmi_phy_config()
642 hdmi_write(hdmi, 0x44, HDMI_SLIPHDMIT_PARAM_SETTINGS_5); sh_hdmi_phy_config()
643 hdmi_write(hdmi, 0x32, HDMI_SLIPHDMIT_PARAM_SETTINGS_6); sh_hdmi_phy_config()
644 hdmi_write(hdmi, 0x48, HDMI_SLIPHDMIT_PARAM_SETTINGS_7); sh_hdmi_phy_config()
645 hdmi_write(hdmi, 0x0F, HDMI_SLIPHDMIT_PARAM_SETTINGS_8); sh_hdmi_phy_config()
646 hdmi_write(hdmi, 0x20, HDMI_SLIPHDMIT_PARAM_SETTINGS_9); sh_hdmi_phy_config()
647 hdmi_write(hdmi, 0x04, HDMI_SLIPHDMIT_PARAM_SETTINGS_10); sh_hdmi_phy_config()
654 static void sh_hdmi_avi_infoframe_setup(struct sh_hdmi *hdmi) sh_hdmi_avi_infoframe_setup() argument
659 hdmi_write(hdmi, 0x06, HDMI_CTRL_PKT_BUF_INDEX); sh_hdmi_avi_infoframe_setup()
662 hdmi_write(hdmi, 0x82, HDMI_CTRL_PKT_BUF_ACCESS_HB0); sh_hdmi_avi_infoframe_setup()
665 hdmi_write(hdmi, 0x02, HDMI_CTRL_PKT_BUF_ACCESS_HB1); sh_hdmi_avi_infoframe_setup()
668 hdmi_write(hdmi, 0x0D, HDMI_CTRL_PKT_BUF_ACCESS_HB2); sh_hdmi_avi_infoframe_setup()
671 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB0); sh_hdmi_avi_infoframe_setup()
679 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB1); sh_hdmi_avi_infoframe_setup()
686 hdmi_write(hdmi, 0x28, HDMI_CTRL_PKT_BUF_ACCESS_PB2); sh_hdmi_avi_infoframe_setup()
694 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB3); sh_hdmi_avi_infoframe_setup()
700 if (hdmi->preprogrammed_vic) sh_hdmi_avi_infoframe_setup()
701 vic = hdmi->preprogrammed_vic; sh_hdmi_avi_infoframe_setup()
704 hdmi_write(hdmi, vic, HDMI_CTRL_PKT_BUF_ACCESS_PB4); sh_hdmi_avi_infoframe_setup()
707 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB5); sh_hdmi_avi_infoframe_setup()
710 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB6); sh_hdmi_avi_infoframe_setup()
713 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB7); sh_hdmi_avi_infoframe_setup()
716 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB8); sh_hdmi_avi_infoframe_setup()
719 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB9); sh_hdmi_avi_infoframe_setup()
722 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB10); sh_hdmi_avi_infoframe_setup()
725 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB11); sh_hdmi_avi_infoframe_setup()
728 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB12); sh_hdmi_avi_infoframe_setup()
731 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB13); sh_hdmi_avi_infoframe_setup()
737 static void sh_hdmi_audio_infoframe_setup(struct sh_hdmi *hdmi) sh_hdmi_audio_infoframe_setup() argument
740 hdmi_write(hdmi, 0x08, HDMI_CTRL_PKT_BUF_INDEX); sh_hdmi_audio_infoframe_setup()
743 hdmi_write(hdmi, 0x84, HDMI_CTRL_PKT_BUF_ACCESS_HB0); sh_hdmi_audio_infoframe_setup()
746 hdmi_write(hdmi, 0x01, HDMI_CTRL_PKT_BUF_ACCESS_HB1); sh_hdmi_audio_infoframe_setup()
749 hdmi_write(hdmi, 0x0A, HDMI_CTRL_PKT_BUF_ACCESS_HB2); sh_hdmi_audio_infoframe_setup()
752 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB0); sh_hdmi_audio_infoframe_setup()
755 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB1); sh_hdmi_audio_infoframe_setup()
758 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB2); sh_hdmi_audio_infoframe_setup()
761 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB3); sh_hdmi_audio_infoframe_setup()
764 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB4); sh_hdmi_audio_infoframe_setup()
767 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB5); sh_hdmi_audio_infoframe_setup()
770 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB6); sh_hdmi_audio_infoframe_setup()
771 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB7); sh_hdmi_audio_infoframe_setup()
772 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB8); sh_hdmi_audio_infoframe_setup()
773 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB9); sh_hdmi_audio_infoframe_setup()
774 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB10); sh_hdmi_audio_infoframe_setup()
780 static void sh_hdmi_configure(struct sh_hdmi *hdmi) sh_hdmi_configure() argument
783 sh_hdmi_video_config(hdmi); sh_hdmi_configure()
786 sh_hdmi_audio_config(hdmi); sh_hdmi_configure()
789 sh_hdmi_phy_config(hdmi); sh_hdmi_configure()
792 sh_hdmi_avi_infoframe_setup(hdmi); sh_hdmi_configure()
795 sh_hdmi_audio_infoframe_setup(hdmi); sh_hdmi_configure()
801 hdmi_write(hdmi, 0x8E, HDMI_CTRL_PKT_AUTO_SEND); sh_hdmi_configure()
807 hdmi_bit_set(hdmi, 0xFC, 0x4C, HDMI_SYSTEM_CTRL); sh_hdmi_configure()
811 hdmi_bit_set(hdmi, 0xFC, 0x40, HDMI_SYSTEM_CTRL); sh_hdmi_configure()
814 static unsigned long sh_hdmi_rate_error(struct sh_hdmi *hdmi, sh_hdmi_rate_error() argument
819 struct sh_mobile_hdmi_info *pdata = dev_get_platdata(hdmi->dev); sh_hdmi_rate_error()
821 *hdmi_rate = clk_round_rate(hdmi->hdmi_clk, target); sh_hdmi_rate_error()
823 *hdmi_rate = clk_get_rate(hdmi->hdmi_clk); sh_hdmi_rate_error()
828 else if (clk_get_parent(hdmi->hdmi_clk)) sh_hdmi_rate_error()
829 *parent_rate = clk_get_rate(clk_get_parent(hdmi->hdmi_clk)); sh_hdmi_rate_error()
831 dev_dbg(hdmi->dev, "%u-%u-%u-%u x %u-%u-%u-%u\n", sh_hdmi_rate_error()
837 dev_dbg(hdmi->dev, "\t@%lu(+/-%lu)Hz, e=%lu / 1000, r=%uHz, p=%luHz\n", target, sh_hdmi_rate_error()
844 static int sh_hdmi_read_edid(struct sh_hdmi *hdmi, unsigned long *hdmi_rate, sh_hdmi_read_edid() argument
847 struct sh_mobile_lcdc_chan *ch = hdmi->entity.lcdc; sh_hdmi_read_edid()
858 dev_dbg(hdmi->dev, "Read back EDID code:"); sh_hdmi_read_edid()
860 edid[i] = (hdmi->htop1) ? sh_hdmi_read_edid()
861 (u8)hdmi_htop1_read(hdmi, HDMI_HTOP1_EDID_DATA_READ + (i * 4)) : sh_hdmi_read_edid()
862 hdmi_read(hdmi, HDMI_EDID_KSV_FIFO_ACCESS_WINDOW); sh_hdmi_read_edid()
876 if (!hdmi->edid_blocks) { sh_hdmi_read_edid()
877 fb_edid_to_monspecs(edid, &hdmi->monspec); sh_hdmi_read_edid()
878 hdmi->edid_blocks = edid[126] + 1; sh_hdmi_read_edid()
880 dev_dbg(hdmi->dev, "%d main modes, %d extension blocks\n", sh_hdmi_read_edid()
881 hdmi->monspec.modedb_len, hdmi->edid_blocks - 1); sh_hdmi_read_edid()
883 dev_dbg(hdmi->dev, "Extension %u detected, DTD start %u\n", sh_hdmi_read_edid()
885 fb_edid_add_monspecs(edid, &hdmi->monspec); sh_hdmi_read_edid()
888 if (hdmi->edid_blocks > hdmi->edid_segment_nr * 2 + sh_hdmi_read_edid()
889 (hdmi->edid_block_addr >> 7) + 1) { sh_hdmi_read_edid()
891 if (hdmi->edid_block_addr) { sh_hdmi_read_edid()
892 hdmi->edid_block_addr = 0; sh_hdmi_read_edid()
893 hdmi->edid_segment_nr++; sh_hdmi_read_edid()
895 hdmi->edid_block_addr = 0x80; sh_hdmi_read_edid()
898 hdmi_write(hdmi, hdmi->edid_block_addr, HDMI_EDID_WORD_ADDRESS); sh_hdmi_read_edid()
900 hdmi_write(hdmi, 0xC6, HDMI_INTERRUPT_MASK_1); sh_hdmi_read_edid()
902 hdmi_write(hdmi, hdmi->edid_segment_nr, HDMI_EDID_SEGMENT_POINTER); sh_hdmi_read_edid()
907 dev_dbg(hdmi->dev, "%d main and extended modes\n", hdmi->monspec.modedb_len); sh_hdmi_read_edid()
921 dev_dbg(hdmi->dev, "Forced mode %ux%u@%uHz\n", sh_hdmi_read_edid()
926 for (i = 0, mode = hdmi->monspec.modedb; sh_hdmi_read_edid()
927 i < hdmi->monspec.modedb_len && scanning; sh_hdmi_read_edid()
947 rate_error = sh_hdmi_rate_error(hdmi, mode, hdmi_rate, parent_rate); sh_hdmi_read_edid()
988 if (!found && hdmi->entity.def_mode.xres != 0) { sh_hdmi_read_edid()
989 found = &hdmi->entity.def_mode; sh_hdmi_read_edid()
990 found_rate_error = sh_hdmi_rate_error(hdmi, found, hdmi_rate, sh_hdmi_read_edid()
999 hdmi->preprogrammed_vic = 1; sh_hdmi_read_edid()
1001 hdmi->preprogrammed_vic = 2; sh_hdmi_read_edid()
1003 hdmi->preprogrammed_vic = 17; sh_hdmi_read_edid()
1005 hdmi->preprogrammed_vic = 4; sh_hdmi_read_edid()
1007 hdmi->preprogrammed_vic = 32; sh_hdmi_read_edid()
1009 hdmi->preprogrammed_vic = 31; sh_hdmi_read_edid()
1011 hdmi->preprogrammed_vic = 16; sh_hdmi_read_edid()
1013 hdmi->preprogrammed_vic = 0; sh_hdmi_read_edid()
1015 dev_dbg(hdmi->dev, "Using %s %s mode %ux%u@%uHz (%luHz), " sh_hdmi_read_edid()
1017 hdmi->preprogrammed_vic ? "VIC" : "external", found->xres, sh_hdmi_read_edid()
1021 hdmi->mode = *found; sh_hdmi_read_edid()
1022 sh_hdmi_external_video_param(hdmi); sh_hdmi_read_edid()
1029 struct sh_hdmi *hdmi = dev_id; sh_hdmi_hotplug() local
1033 hdmi_bit_set(hdmi, 0xFC, 0x2C, HDMI_SYSTEM_CTRL); sh_hdmi_hotplug()
1039 hdmi_bit_set(hdmi, 0xFC, 0x20, HDMI_SYSTEM_CTRL); sh_hdmi_hotplug()
1041 status1 = hdmi_read(hdmi, HDMI_INTERRUPT_STATUS_1); sh_hdmi_hotplug()
1042 status2 = hdmi_read(hdmi, HDMI_INTERRUPT_STATUS_2); sh_hdmi_hotplug()
1044 mask1 = hdmi_read(hdmi, HDMI_INTERRUPT_MASK_1); sh_hdmi_hotplug()
1045 mask2 = hdmi_read(hdmi, HDMI_INTERRUPT_MASK_2); sh_hdmi_hotplug()
1048 hdmi_write(hdmi, 0xFF, HDMI_INTERRUPT_STATUS_1); sh_hdmi_hotplug()
1049 hdmi_write(hdmi, 0xFF, HDMI_INTERRUPT_STATUS_2); sh_hdmi_hotplug()
1052 dev_dbg(hdmi->dev, "IRQ #%d: Status #1: 0x%x & 0x%x, #2: 0x%x & 0x%x\n", sh_hdmi_hotplug()
1063 msens = hdmi_read(hdmi, HDMI_HOT_PLUG_MSENS_STATUS); sh_hdmi_hotplug()
1064 dev_dbg(hdmi->dev, "MSENS 0x%x\n", msens); sh_hdmi_hotplug()
1068 hdmi->edid_segment_nr = 0; sh_hdmi_hotplug()
1069 hdmi->edid_block_addr = 0; sh_hdmi_hotplug()
1070 hdmi->edid_blocks = 0; sh_hdmi_hotplug()
1071 hdmi->hp_state = HDMI_HOTPLUG_CONNECTED; sh_hdmi_hotplug()
1074 hdmi_write(hdmi, 0x00, HDMI_EDID_WORD_ADDRESS); sh_hdmi_hotplug()
1076 hdmi_write(hdmi, 0xC6, HDMI_INTERRUPT_MASK_1); sh_hdmi_hotplug()
1078 hdmi_write(hdmi, 0x00, HDMI_EDID_SEGMENT_POINTER); sh_hdmi_hotplug()
1081 if (hdmi->hp_state != HDMI_HOTPLUG_DISCONNECTED) { sh_hdmi_hotplug()
1082 hdmi->hp_state = HDMI_HOTPLUG_DISCONNECTED; sh_hdmi_hotplug()
1083 schedule_delayed_work(&hdmi->edid_work, 0); sh_hdmi_hotplug()
1090 hdmi_write(hdmi, hdmi->edid_block_addr, HDMI_EDID_WORD_ADDRESS); sh_hdmi_hotplug()
1092 hdmi_write(hdmi, hdmi->edid_segment_nr, HDMI_EDID_SEGMENT_POINTER); sh_hdmi_hotplug()
1095 hdmi_write(hdmi, 0xC0, HDMI_INTERRUPT_MASK_1); sh_hdmi_hotplug()
1096 schedule_delayed_work(&hdmi->edid_work, msecs_to_jiffies(10)); sh_hdmi_hotplug()
1104 struct sh_hdmi *hdmi = entity_to_sh_hdmi(entity); sh_hdmi_display_on() local
1106 dev_dbg(hdmi->dev, "%s(%p): state %x\n", __func__, hdmi, sh_hdmi_display_on()
1107 hdmi->hp_state); sh_hdmi_display_on()
1115 if (hdmi->hp_state == HDMI_HOTPLUG_EDID_DONE) { sh_hdmi_display_on()
1117 hdmi_bit_set(hdmi, 0xFC, 0x80, HDMI_SYSTEM_CTRL); sh_hdmi_display_on()
1118 dev_dbg(hdmi->dev, "HDMI running\n"); sh_hdmi_display_on()
1121 return hdmi->hp_state == HDMI_HOTPLUG_DISCONNECTED sh_hdmi_display_on()
1128 struct sh_hdmi *hdmi = entity_to_sh_hdmi(entity); sh_hdmi_display_off() local
1130 dev_dbg(hdmi->dev, "%s(%p)\n", __func__, hdmi); sh_hdmi_display_off()
1132 hdmi_bit_set(hdmi, 0xFC, 0x10, HDMI_SYSTEM_CTRL); sh_hdmi_display_off()
1142 * @hdmi: driver context
1149 static long sh_hdmi_clk_configure(struct sh_hdmi *hdmi, unsigned long hdmi_rate, sh_hdmi_clk_configure() argument
1154 if (parent_rate && clk_get_parent(hdmi->hdmi_clk)) { sh_hdmi_clk_configure()
1155 ret = clk_set_rate(clk_get_parent(hdmi->hdmi_clk), parent_rate); sh_hdmi_clk_configure()
1157 dev_warn(hdmi->dev, "Cannot set parent rate %ld: %d\n", parent_rate, ret); sh_hdmi_clk_configure()
1158 hdmi_rate = clk_round_rate(hdmi->hdmi_clk, hdmi_rate); sh_hdmi_clk_configure()
1160 dev_dbg(hdmi->dev, "HDMI set parent frequency %lu\n", parent_rate); sh_hdmi_clk_configure()
1164 ret = clk_set_rate(hdmi->hdmi_clk, hdmi_rate); sh_hdmi_clk_configure()
1166 dev_warn(hdmi->dev, "Cannot set rate %ld: %d\n", hdmi_rate, ret); sh_hdmi_clk_configure()
1169 dev_dbg(hdmi->dev, "HDMI set frequency %lu\n", hdmi_rate); sh_hdmi_clk_configure()
1178 struct sh_hdmi *hdmi = container_of(work, struct sh_hdmi, edid_work.work); sh_hdmi_edid_work_fn() local
1179 struct sh_mobile_lcdc_chan *ch = hdmi->entity.lcdc; sh_hdmi_edid_work_fn()
1182 dev_dbg(hdmi->dev, "%s(%p): begin, hotplug status %d\n", __func__, hdmi, sh_hdmi_edid_work_fn()
1183 hdmi->hp_state); sh_hdmi_edid_work_fn()
1185 if (hdmi->hp_state == HDMI_HOTPLUG_CONNECTED) { sh_hdmi_edid_work_fn()
1188 ret = sh_hdmi_read_edid(hdmi, &hdmi_rate, &parent_rate); sh_hdmi_edid_work_fn()
1192 hdmi->hp_state = HDMI_HOTPLUG_EDID_DONE; sh_hdmi_edid_work_fn()
1195 ret = sh_hdmi_clk_configure(hdmi, hdmi_rate, parent_rate); sh_hdmi_edid_work_fn()
1200 sh_hdmi_configure(hdmi); sh_hdmi_edid_work_fn()
1206 &hdmi->mode, &hdmi->monspec); sh_hdmi_edid_work_fn()
1208 hdmi->monspec.modedb_len = 0; sh_hdmi_edid_work_fn()
1209 fb_destroy_modedb(hdmi->monspec.modedb); sh_hdmi_edid_work_fn()
1210 hdmi->monspec.modedb = NULL; sh_hdmi_edid_work_fn()
1221 hdmi->hp_state = HDMI_HOTPLUG_DISCONNECTED; sh_hdmi_edid_work_fn()
1223 dev_dbg(hdmi->dev, "%s(%p): end\n", __func__, hdmi); sh_hdmi_edid_work_fn()
1226 static void sh_hdmi_htop1_init(struct sh_hdmi *hdmi) sh_hdmi_htop1_init() argument
1228 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_MODE); sh_hdmi_htop1_init()
1229 hdmi_htop1_write(hdmi, 0x0000000b, 0x0010); sh_hdmi_htop1_init()
1230 hdmi_htop1_write(hdmi, 0x00006710, HDMI_HTOP1_HTOP_DCL_FRC_MODE); sh_hdmi_htop1_init()
1231 hdmi_htop1_write(hdmi, 0x01020406, HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y1_1); sh_hdmi_htop1_init()
1232 hdmi_htop1_write(hdmi, 0x07080806, HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y1_2); sh_hdmi_htop1_init()
1233 hdmi_htop1_write(hdmi, 0x01020406, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB1_1); sh_hdmi_htop1_init()
1234 hdmi_htop1_write(hdmi, 0x07080806, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB1_2); sh_hdmi_htop1_init()
1235 hdmi_htop1_write(hdmi, 0x01020406, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR1_1); sh_hdmi_htop1_init()
1236 hdmi_htop1_write(hdmi, 0x07080806, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR1_2); sh_hdmi_htop1_init()
1237 hdmi_htop1_write(hdmi, 0x01020406, HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y2_1); sh_hdmi_htop1_init()
1238 hdmi_htop1_write(hdmi, 0x07080806, HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y2_2); sh_hdmi_htop1_init()
1239 hdmi_htop1_write(hdmi, 0x01020406, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB2_1); sh_hdmi_htop1_init()
1240 hdmi_htop1_write(hdmi, 0x07080806, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB2_2); sh_hdmi_htop1_init()
1241 hdmi_htop1_write(hdmi, 0x01020406, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR2_1); sh_hdmi_htop1_init()
1242 hdmi_htop1_write(hdmi, 0x07080806, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR2_2); sh_hdmi_htop1_init()
1243 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_COR_PARA_Y1); sh_hdmi_htop1_init()
1244 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_COR_PARA_CB1); sh_hdmi_htop1_init()
1245 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_COR_PARA_CR1); sh_hdmi_htop1_init()
1246 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_COR_PARA_Y2); sh_hdmi_htop1_init()
1247 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_COR_PARA_CB2); sh_hdmi_htop1_init()
1248 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_COR_PARA_CR2); sh_hdmi_htop1_init()
1249 hdmi_htop1_write(hdmi, 0x00000008, HDMI_HTOP1_CURRENT); sh_hdmi_htop1_init()
1250 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_TISEMP0_1); sh_hdmi_htop1_init()
1251 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_TISEMP2_C); sh_hdmi_htop1_init()
1252 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_PHY_TEST_MODE); sh_hdmi_htop1_init()
1253 hdmi_htop1_write(hdmi, 0x00000081, HDMI_HTOP1_TISIDRV); sh_hdmi_htop1_init()
1254 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_PLLBW); sh_hdmi_htop1_init()
1255 hdmi_htop1_write(hdmi, 0x0000000f, HDMI_HTOP1_TISEN); sh_hdmi_htop1_init()
1256 hdmi_htop1_write(hdmi, 0x0000000f, HDMI_HTOP1_TISDREN); sh_hdmi_htop1_init()
1257 hdmi_htop1_write(hdmi, 0x00000003, HDMI_HTOP1_ENABLE_SELECTOR); sh_hdmi_htop1_init()
1258 hdmi_htop1_write(hdmi, 0x00000001, HDMI_HTOP1_MACRO_RESET); sh_hdmi_htop1_init()
1259 hdmi_htop1_write(hdmi, 0x00000016, HDMI_HTOP1_CISRANGE); sh_hdmi_htop1_init()
1261 hdmi_htop1_write(hdmi, 0x00000001, HDMI_HTOP1_ENABLE_SELECTOR); sh_hdmi_htop1_init()
1263 hdmi_htop1_write(hdmi, 0x00000003, HDMI_HTOP1_ENABLE_SELECTOR); sh_hdmi_htop1_init()
1264 hdmi_htop1_write(hdmi, 0x00000001, HDMI_HTOP1_MACRO_RESET); sh_hdmi_htop1_init()
1265 hdmi_htop1_write(hdmi, 0x0000000f, HDMI_HTOP1_TISEN); sh_hdmi_htop1_init()
1266 hdmi_htop1_write(hdmi, 0x0000000f, HDMI_HTOP1_TISDREN); sh_hdmi_htop1_init()
1267 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_VIDEO_INPUT); sh_hdmi_htop1_init()
1268 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_CLK_TO_PHY); sh_hdmi_htop1_init()
1269 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_VIDEO_INPUT2); sh_hdmi_htop1_init()
1270 hdmi_htop1_write(hdmi, 0x0000000a, HDMI_HTOP1_CLK_SET); sh_hdmi_htop1_init()
1279 struct sh_hdmi *hdmi; sh_hdmi_probe() local
1294 hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL); sh_hdmi_probe()
1295 if (!hdmi) { sh_hdmi_probe()
1300 hdmi->dev = &pdev->dev; sh_hdmi_probe()
1301 hdmi->entity.owner = THIS_MODULE; sh_hdmi_probe()
1302 hdmi->entity.ops = &sh_hdmi_ops; sh_hdmi_probe()
1303 hdmi->irq = irq; sh_hdmi_probe()
1305 hdmi->hdmi_clk = clk_get(&pdev->dev, "ick"); sh_hdmi_probe()
1306 if (IS_ERR(hdmi->hdmi_clk)) { sh_hdmi_probe()
1307 ret = PTR_ERR(hdmi->hdmi_clk); sh_hdmi_probe()
1314 hdmi->write = __hdmi_write32; sh_hdmi_probe()
1315 hdmi->read = __hdmi_read32; sh_hdmi_probe()
1317 hdmi->write = __hdmi_write8; sh_hdmi_probe()
1318 hdmi->read = __hdmi_read8; sh_hdmi_probe()
1322 rate = clk_round_rate(hdmi->hdmi_clk, PICOS2KHZ(37037)); sh_hdmi_probe()
1324 rate = sh_hdmi_clk_configure(hdmi, rate, 0); sh_hdmi_probe()
1331 ret = clk_prepare_enable(hdmi->hdmi_clk); sh_hdmi_probe()
1333 dev_err(hdmi->dev, "Cannot enable clock: %d\n", ret); sh_hdmi_probe()
1345 hdmi->base = ioremap(res->start, resource_size(res)); sh_hdmi_probe()
1346 if (!hdmi->base) { sh_hdmi_probe()
1352 platform_set_drvdata(pdev, &hdmi->entity); sh_hdmi_probe()
1354 INIT_DELAYED_WORK(&hdmi->edid_work, sh_hdmi_edid_work_fn); sh_hdmi_probe()
1361 hdmi_bit_set(hdmi, 0x02, 0x02, HDMI_SYSTEM_CTRL); sh_hdmi_probe()
1364 hdmi_bit_set(hdmi, 0x01, 0x01, HDMI_SYSTEM_CTRL); sh_hdmi_probe()
1368 hdmi->htop1 = ioremap(htop1_res->start, resource_size(htop1_res)); sh_hdmi_probe()
1369 if (!hdmi->htop1) { sh_hdmi_probe()
1374 sh_hdmi_htop1_init(hdmi); sh_hdmi_probe()
1379 hdmi_read(hdmi, HDMI_PRODUCT_ID), hdmi_read(hdmi, HDMI_REVISION_ID)); sh_hdmi_probe()
1382 dev_name(&pdev->dev), hdmi); sh_hdmi_probe()
1398 free_irq(irq, hdmi); sh_hdmi_probe()
1400 if (hdmi->htop1) sh_hdmi_probe()
1401 iounmap(hdmi->htop1); sh_hdmi_probe()
1405 iounmap(hdmi->base); sh_hdmi_probe()
1409 clk_disable_unprepare(hdmi->hdmi_clk); sh_hdmi_probe()
1411 clk_put(hdmi->hdmi_clk); sh_hdmi_probe()
1418 struct sh_hdmi *hdmi = entity_to_sh_hdmi(platform_get_drvdata(pdev)); sh_hdmi_remove() local
1424 free_irq(hdmi->irq, hdmi); sh_hdmi_remove()
1426 cancel_delayed_work_sync(&hdmi->edid_work); sh_hdmi_remove()
1429 clk_disable_unprepare(hdmi->hdmi_clk); sh_hdmi_remove()
1430 clk_put(hdmi->hdmi_clk); sh_hdmi_remove()
1431 if (hdmi->htop1) sh_hdmi_remove()
1432 iounmap(hdmi->htop1); sh_hdmi_remove()
1433 iounmap(hdmi->base); sh_hdmi_remove()
1442 struct sh_hdmi *hdmi = entity_to_sh_hdmi(platform_get_drvdata(pdev)); sh_hdmi_suspend() local
1444 disable_irq(hdmi->irq); sh_hdmi_suspend()
1446 cancel_delayed_work_sync(&hdmi->edid_work); sh_hdmi_suspend()
1454 struct sh_hdmi *hdmi = entity_to_sh_hdmi(platform_get_drvdata(pdev)); sh_hdmi_resume() local
1458 hdmi_bit_set(hdmi, 0x02, 0x02, HDMI_SYSTEM_CTRL); sh_hdmi_resume()
1461 hdmi_bit_set(hdmi, 0x01, 0x01, HDMI_SYSTEM_CTRL); sh_hdmi_resume()
1464 if (hdmi->htop1) sh_hdmi_resume()
1465 sh_hdmi_htop1_init(hdmi); sh_hdmi_resume()
1468 enable_irq(hdmi->irq); sh_hdmi_resume()
1480 .name = "sh-mobile-hdmi",
|
| /linux-4.4.14/drivers/gpu/drm/sti/ |
| H A D | sti_hdmi.c | 9 #include <linux/hdmi.h>
119 struct sti_hdmi *hdmi; member in struct:sti_hdmi_connector
125 u32 hdmi_read(struct sti_hdmi *hdmi, int offset) hdmi_read() argument
127 return readl(hdmi->regs + offset); hdmi_read()
130 void hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset) hdmi_write() argument
132 writel(val, hdmi->regs + offset); hdmi_write()
143 struct sti_hdmi *hdmi = arg; hdmi_irq_thread() local
146 if (hdmi->irq_status & HDMI_INT_HOT_PLUG) { hdmi_irq_thread()
147 hdmi->hpd = readl(hdmi->regs + HDMI_STA) & HDMI_STA_HOT_PLUG; hdmi_irq_thread()
148 if (hdmi->drm_dev) hdmi_irq_thread()
149 drm_helper_hpd_irq_event(hdmi->drm_dev); hdmi_irq_thread()
155 if (hdmi->irq_status & (HDMI_INT_SW_RST | HDMI_INT_DLL_LCK)) { hdmi_irq_thread()
156 hdmi->event_received = true; hdmi_irq_thread()
157 wake_up_interruptible(&hdmi->wait_event); hdmi_irq_thread()
171 struct sti_hdmi *hdmi = arg; hdmi_irq() local
174 hdmi->irq_status = hdmi_read(hdmi, HDMI_INT_STA); hdmi_irq()
177 hdmi_write(hdmi, hdmi->irq_status, HDMI_INT_CLR); hdmi_irq()
180 hdmi_read(hdmi, HDMI_INT_STA); hdmi_irq()
186 * Set hdmi active area depending on the drm display mode selected
188 * @hdmi: pointer on the hdmi internal structure
190 static void hdmi_active_area(struct sti_hdmi *hdmi) hdmi_active_area() argument
195 xmin = sti_vtg_get_pixel_number(hdmi->mode, 1); hdmi_active_area()
196 xmax = sti_vtg_get_pixel_number(hdmi->mode, hdmi->mode.hdisplay); hdmi_active_area()
197 ymin = sti_vtg_get_line_number(hdmi->mode, 0); hdmi_active_area()
198 ymax = sti_vtg_get_line_number(hdmi->mode, hdmi->mode.vdisplay - 1); hdmi_active_area()
200 hdmi_write(hdmi, xmin, HDMI_ACTIVE_VID_XMIN); hdmi_active_area()
201 hdmi_write(hdmi, xmax, HDMI_ACTIVE_VID_XMAX); hdmi_active_area()
202 hdmi_write(hdmi, ymin, HDMI_ACTIVE_VID_YMIN); hdmi_active_area()
203 hdmi_write(hdmi, ymax, HDMI_ACTIVE_VID_YMAX); hdmi_active_area()
207 * Overall hdmi configuration
209 * @hdmi: pointer on the hdmi internal structure
211 static void hdmi_config(struct sti_hdmi *hdmi) hdmi_config() argument
227 if (hdmi->mode.flags & DRM_MODE_FLAG_NHSYNC) { hdmi_config()
233 if (hdmi->mode.flags & DRM_MODE_FLAG_NVSYNC) { hdmi_config()
241 hdmi_write(hdmi, conf, HDMI_CFG); hdmi_config()
247 * @ptr: pointer on the hdmi internal structure
265 * @hdmi: pointer on the hdmi internal structure
269 static void hdmi_infoframe_write_infopack(struct sti_hdmi *hdmi, const u8 *data) hdmi_infoframe_write_infopack() argument
299 val = hdmi_read(hdmi, HDMI_SW_DI_CFG); hdmi_infoframe_write_infopack()
301 hdmi_write(hdmi, val, HDMI_SW_DI_CFG); hdmi_infoframe_write_infopack()
306 writel(val, hdmi->regs + head_offset); hdmi_infoframe_write_infopack()
319 writel(val, hdmi->regs + pack_offset + i); hdmi_infoframe_write_infopack()
323 val = hdmi_read(hdmi, HDMI_SW_DI_CFG); hdmi_infoframe_write_infopack()
325 hdmi_write(hdmi, val, HDMI_SW_DI_CFG); hdmi_infoframe_write_infopack()
335 * @hdmi: pointer on the hdmi internal structure
339 static int hdmi_avi_infoframe_config(struct sti_hdmi *hdmi) hdmi_avi_infoframe_config() argument
341 struct drm_display_mode *mode = &hdmi->mode; hdmi_avi_infoframe_config()
365 hdmi_infoframe_write_infopack(hdmi, buffer); hdmi_avi_infoframe_config()
377 * @hdmi: pointer on the hdmi internal structure
381 static int hdmi_audio_infoframe_config(struct sti_hdmi *hdmi) hdmi_audio_infoframe_config() argument
401 hdmi_infoframe_write_infopack(hdmi, buffer); hdmi_audio_infoframe_config()
407 * Software reset of the hdmi subsystem
409 * @hdmi: pointer on the hdmi internal structure
413 static void hdmi_swreset(struct sti_hdmi *hdmi) hdmi_swreset() argument
419 /* Enable hdmi_audio clock only during hdmi reset */ hdmi_swreset()
420 if (clk_prepare_enable(hdmi->clk_audio)) hdmi_swreset()
424 hdmi->event_received = false; hdmi_swreset()
426 val = hdmi_read(hdmi, HDMI_CFG); hdmi_swreset()
428 hdmi_write(hdmi, val, HDMI_CFG); hdmi_swreset()
431 wait_event_interruptible_timeout(hdmi->wait_event, hdmi_swreset()
432 hdmi->event_received == true, hdmi_swreset()
440 if ((hdmi_read(hdmi, HDMI_STA) & HDMI_STA_SW_RST) == 0) hdmi_swreset()
443 val = hdmi_read(hdmi, HDMI_CFG); hdmi_swreset()
445 hdmi_write(hdmi, val, HDMI_CFG); hdmi_swreset()
448 clk_disable_unprepare(hdmi->clk_audio); hdmi_swreset()
453 struct sti_hdmi *hdmi = bridge->driver_private; sti_hdmi_disable() local
455 u32 val = hdmi_read(hdmi, HDMI_CFG); sti_hdmi_disable()
457 if (!hdmi->enabled) sti_hdmi_disable()
464 hdmi_write(hdmi, val, HDMI_CFG); sti_hdmi_disable()
466 hdmi_write(hdmi, 0xffffffff, HDMI_INT_CLR); sti_hdmi_disable()
469 hdmi->phy_ops->stop(hdmi); sti_hdmi_disable()
472 hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL0_DAT); sti_hdmi_disable()
473 hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL1_DAT); sti_hdmi_disable()
474 hdmi_write(hdmi, 0x0060, HDMI_DFLT_CHL2_DAT); sti_hdmi_disable()
476 /* Disable/unprepare hdmi clock */ sti_hdmi_disable()
477 clk_disable_unprepare(hdmi->clk_phy); sti_hdmi_disable()
478 clk_disable_unprepare(hdmi->clk_tmds); sti_hdmi_disable()
479 clk_disable_unprepare(hdmi->clk_pix); sti_hdmi_disable()
481 hdmi->enabled = false; sti_hdmi_disable()
486 struct sti_hdmi *hdmi = bridge->driver_private; sti_hdmi_pre_enable() local
490 if (hdmi->enabled) sti_hdmi_pre_enable()
494 if (clk_prepare_enable(hdmi->clk_pix)) sti_hdmi_pre_enable()
496 if (clk_prepare_enable(hdmi->clk_tmds)) sti_hdmi_pre_enable()
498 if (clk_prepare_enable(hdmi->clk_phy)) sti_hdmi_pre_enable()
501 hdmi->enabled = true; sti_hdmi_pre_enable()
503 /* Program hdmi serializer and start phy */ sti_hdmi_pre_enable()
504 if (!hdmi->phy_ops->start(hdmi)) { sti_hdmi_pre_enable()
505 DRM_ERROR("Unable to start hdmi phy\n"); sti_hdmi_pre_enable()
509 /* Program hdmi active area */ sti_hdmi_pre_enable()
510 hdmi_active_area(hdmi); sti_hdmi_pre_enable()
513 hdmi_write(hdmi, HDMI_WORKING_INT, HDMI_INT_EN); sti_hdmi_pre_enable()
515 /* Program hdmi config */ sti_hdmi_pre_enable()
516 hdmi_config(hdmi); sti_hdmi_pre_enable()
519 if (hdmi_avi_infoframe_config(hdmi)) sti_hdmi_pre_enable()
523 if (hdmi_audio_infoframe_config(hdmi)) sti_hdmi_pre_enable()
527 hdmi_swreset(hdmi); sti_hdmi_pre_enable()
534 struct sti_hdmi *hdmi = bridge->driver_private; sti_hdmi_set_mode() local
540 memcpy(&hdmi->mode, mode, sizeof(struct drm_display_mode)); sti_hdmi_set_mode()
543 ret = clk_set_rate(hdmi->clk_pix, mode->clock * 1000); sti_hdmi_set_mode()
549 ret = clk_set_rate(hdmi->clk_phy, mode->clock * 1000); sti_hdmi_set_mode()
574 struct sti_hdmi *hdmi = hdmi_connector->hdmi; sti_hdmi_connector_get_modes() local
580 edid = drm_get_edid(connector, hdmi->ddc_adapt); sti_hdmi_connector_get_modes()
606 struct sti_hdmi *hdmi = hdmi_connector->hdmi; sti_hdmi_connector_mode_valid() local
609 result = clk_round_rate(hdmi->clk_pix, target); sti_hdmi_connector_mode_valid()
615 DRM_DEBUG_DRIVER("hdmi pixclk=%d not supported\n", target); sti_hdmi_connector_mode_valid()
644 struct sti_hdmi *hdmi = hdmi_connector->hdmi; sti_hdmi_connector_detect() local
648 if (hdmi->hpd) { sti_hdmi_connector_detect()
649 DRM_DEBUG_DRIVER("hdmi cable connected\n"); sti_hdmi_connector_detect()
653 DRM_DEBUG_DRIVER("hdmi cable disconnected\n"); sti_hdmi_connector_detect()
691 struct sti_hdmi *hdmi = dev_get_drvdata(dev); sti_hdmi_bind() local
700 hdmi->drm_dev = drm_dev; sti_hdmi_bind()
710 connector->hdmi = hdmi; sti_hdmi_bind()
716 bridge->driver_private = hdmi; sti_hdmi_bind()
743 hdmi_write(hdmi, HDMI_DEFAULT_INT, HDMI_INT_EN); sti_hdmi_bind()
768 .compatible = "st,stih416-hdmi",
771 .compatible = "st,stih407-hdmi",
782 struct sti_hdmi *hdmi; sti_hdmi_probe() local
790 hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL); sti_hdmi_probe()
791 if (!hdmi) sti_hdmi_probe()
796 hdmi->ddc_adapt = of_get_i2c_adapter_by_node(ddc); sti_hdmi_probe()
798 if (!hdmi->ddc_adapt) sti_hdmi_probe()
802 hdmi->dev = pdev->dev; sti_hdmi_probe()
805 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hdmi-reg"); sti_hdmi_probe()
807 DRM_ERROR("Invalid hdmi resource\n"); sti_hdmi_probe()
811 hdmi->regs = devm_ioremap_nocache(dev, res->start, resource_size(res)); sti_hdmi_probe()
812 if (!hdmi->regs) { sti_hdmi_probe()
817 if (of_device_is_compatible(np, "st,stih416-hdmi")) { sti_hdmi_probe()
825 hdmi->syscfg = devm_ioremap_nocache(dev, res->start, sti_hdmi_probe()
827 if (!hdmi->syscfg) { sti_hdmi_probe()
833 hdmi->phy_ops = (struct hdmi_phy_ops *) sti_hdmi_probe()
837 hdmi->clk_pix = devm_clk_get(dev, "pix"); sti_hdmi_probe()
838 if (IS_ERR(hdmi->clk_pix)) { sti_hdmi_probe()
840 ret = PTR_ERR(hdmi->clk_pix); sti_hdmi_probe()
844 hdmi->clk_tmds = devm_clk_get(dev, "tmds"); sti_hdmi_probe()
845 if (IS_ERR(hdmi->clk_tmds)) { sti_hdmi_probe()
847 ret = PTR_ERR(hdmi->clk_tmds); sti_hdmi_probe()
851 hdmi->clk_phy = devm_clk_get(dev, "phy"); sti_hdmi_probe()
852 if (IS_ERR(hdmi->clk_phy)) { sti_hdmi_probe()
854 ret = PTR_ERR(hdmi->clk_phy); sti_hdmi_probe()
858 hdmi->clk_audio = devm_clk_get(dev, "audio"); sti_hdmi_probe()
859 if (IS_ERR(hdmi->clk_audio)) { sti_hdmi_probe()
861 ret = PTR_ERR(hdmi->clk_audio); sti_hdmi_probe()
865 hdmi->hpd = readl(hdmi->regs + HDMI_STA) & HDMI_STA_HOT_PLUG; sti_hdmi_probe()
867 init_waitqueue_head(&hdmi->wait_event); sti_hdmi_probe()
869 hdmi->irq = platform_get_irq_byname(pdev, "irq"); sti_hdmi_probe()
871 ret = devm_request_threaded_irq(dev, hdmi->irq, hdmi_irq, sti_hdmi_probe()
872 hdmi_irq_thread, IRQF_ONESHOT, dev_name(dev), hdmi); sti_hdmi_probe()
878 hdmi->reset = devm_reset_control_get(dev, "hdmi"); sti_hdmi_probe()
879 /* Take hdmi out of reset */ sti_hdmi_probe()
880 if (!IS_ERR(hdmi->reset)) sti_hdmi_probe()
881 reset_control_deassert(hdmi->reset); sti_hdmi_probe()
883 platform_set_drvdata(pdev, hdmi); sti_hdmi_probe()
888 i2c_put_adapter(hdmi->ddc_adapt); sti_hdmi_probe()
895 struct sti_hdmi *hdmi = dev_get_drvdata(&pdev->dev); sti_hdmi_remove() local
897 i2c_put_adapter(hdmi->ddc_adapt); sti_hdmi_remove()
905 .name = "sti-hdmi",
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| H A D | sti_hdmi_tx3g4c28phy.c | 68 * Start hdmi phy macro cell tx3g4c28
70 * @hdmi: pointer on the hdmi internal structure
74 static bool sti_hdmi_tx3g4c28phy_start(struct sti_hdmi *hdmi) sti_hdmi_tx3g4c28phy_start() argument
76 u32 ckpxpll = hdmi->mode.clock * 1000; sti_hdmi_tx3g4c28phy_start()
114 hdmi->event_received = false; sti_hdmi_tx3g4c28phy_start()
116 hdmi_write(hdmi, (pllctrl | PLL_CFG_EN), HDMI_SRZ_PLL_CFG); sti_hdmi_tx3g4c28phy_start()
119 wait_event_interruptible_timeout(hdmi->wait_event, sti_hdmi_tx3g4c28phy_start()
120 hdmi->event_received == true, sti_hdmi_tx3g4c28phy_start()
124 if ((hdmi_read(hdmi, HDMI_STA) & HDMI_STA_DLL_LCK) == 0) { sti_hdmi_tx3g4c28phy_start()
125 DRM_ERROR("hdmi phy pll not locked\n"); sti_hdmi_tx3g4c28phy_start()
149 hdmi_write(hdmi, val, HDMI_SRZ_CFG); sti_hdmi_tx3g4c28phy_start()
152 hdmi_write(hdmi, val, HDMI_SRZ_ICNTL); sti_hdmi_tx3g4c28phy_start()
155 hdmi_write(hdmi, val, HDMI_SRZ_CALCODE_EXT); sti_hdmi_tx3g4c28phy_start()
169 hdmi_write(hdmi, val, HDMI_SRZ_CFG); sti_hdmi_tx3g4c28phy_start()
170 hdmi_write(hdmi, 0x0, HDMI_SRZ_ICNTL); sti_hdmi_tx3g4c28phy_start()
171 hdmi_write(hdmi, 0x0, HDMI_SRZ_CALCODE_EXT); sti_hdmi_tx3g4c28phy_start()
180 * Stop hdmi phy macro cell tx3g4c28
182 * @hdmi: pointer on the hdmi internal structure
184 static void sti_hdmi_tx3g4c28phy_stop(struct sti_hdmi *hdmi) sti_hdmi_tx3g4c28phy_stop() argument
190 hdmi->event_received = false; sti_hdmi_tx3g4c28phy_stop()
195 hdmi_write(hdmi, val, HDMI_SRZ_CFG); sti_hdmi_tx3g4c28phy_stop()
196 hdmi_write(hdmi, 0, HDMI_SRZ_PLL_CFG); sti_hdmi_tx3g4c28phy_stop()
199 wait_event_interruptible_timeout(hdmi->wait_event, sti_hdmi_tx3g4c28phy_stop()
200 hdmi->event_received == true, sti_hdmi_tx3g4c28phy_stop()
204 if (hdmi_read(hdmi, HDMI_STA) & HDMI_STA_DLL_LCK) sti_hdmi_tx3g4c28phy_stop()
205 DRM_ERROR("hdmi phy pll not well disabled\n"); sti_hdmi_tx3g4c28phy_stop()
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| H A D | sti_hdmi_tx3g0c55phy.c | 106 * @hdmi: pointer on the hdmi internal structure
110 static bool disable_pll_rejection(struct sti_hdmi *hdmi) disable_pll_rejection() argument
116 val = readl(hdmi->syscfg + HDMI_REJECTION_PLL_CONFIGURATION); disable_pll_rejection()
118 writel(val, hdmi->syscfg + HDMI_REJECTION_PLL_CONFIGURATION); disable_pll_rejection()
121 val = readl(hdmi->syscfg + HDMI_REJECTION_PLL_STATUS); disable_pll_rejection()
132 * @hdmi: pointer on the hdmi internal structure
136 static bool enable_pll_rejection(struct sti_hdmi *hdmi) enable_pll_rejection() argument
143 if (!disable_pll_rejection(hdmi)) enable_pll_rejection()
146 inputclock = hdmi->mode.clock * 1000; enable_pll_rejection()
148 DRM_DEBUG_DRIVER("hdmi rejection pll input clock = %dHz\n", inputclock); enable_pll_rejection()
175 val = readl(hdmi->syscfg + HDMI_REJECTION_PLL_CONFIGURATION); enable_pll_rejection()
187 writel(val, hdmi->syscfg + HDMI_REJECTION_PLL_CONFIGURATION); enable_pll_rejection()
190 val = readl(hdmi->syscfg + HDMI_REJECTION_PLL_STATUS); enable_pll_rejection()
196 * Start hdmi phy macro cell tx3g0c55
198 * @hdmi: pointer on the hdmi internal structure
202 static bool sti_hdmi_tx3g0c55phy_start(struct sti_hdmi *hdmi) sti_hdmi_tx3g0c55phy_start() argument
204 u32 ckpxpll = hdmi->mode.clock * 1000; sti_hdmi_tx3g0c55phy_start()
208 if (!enable_pll_rejection(hdmi)) sti_hdmi_tx3g0c55phy_start()
245 hdmi->event_received = false; sti_hdmi_tx3g0c55phy_start()
247 hdmi_write(hdmi, pllctrl, HDMI_SRZ_PLL_CFG); sti_hdmi_tx3g0c55phy_start()
250 wait_event_interruptible_timeout(hdmi->wait_event, sti_hdmi_tx3g0c55phy_start()
251 hdmi->event_received == true, sti_hdmi_tx3g0c55phy_start()
255 if ((hdmi_read(hdmi, HDMI_STA) & HDMI_STA_DLL_LCK) == 0) { sti_hdmi_tx3g0c55phy_start()
256 DRM_ERROR("hdmi phy pll not locked\n"); sti_hdmi_tx3g0c55phy_start()
271 hdmi_write(hdmi, val, HDMI_SRZ_TAP_1); sti_hdmi_tx3g0c55phy_start()
273 hdmi_write(hdmi, val, HDMI_SRZ_TAP_2); sti_hdmi_tx3g0c55phy_start()
275 hdmi_write(hdmi, val, HDMI_SRZ_TAP_3); sti_hdmi_tx3g0c55phy_start()
279 hdmi_write(hdmi, val, HDMI_SRZ_CTRL); sti_hdmi_tx3g0c55phy_start()
294 hdmi_write(hdmi, 0x0, HDMI_SRZ_TAP_1); sti_hdmi_tx3g0c55phy_start()
295 hdmi_write(hdmi, 0x0, HDMI_SRZ_TAP_2); sti_hdmi_tx3g0c55phy_start()
296 hdmi_write(hdmi, 0x0, HDMI_SRZ_TAP_3); sti_hdmi_tx3g0c55phy_start()
297 hdmi_write(hdmi, HDMI_SRZ_CTRL_EXTERNAL_DATA_EN, HDMI_SRZ_CTRL); sti_hdmi_tx3g0c55phy_start()
302 disable_pll_rejection(hdmi); sti_hdmi_tx3g0c55phy_start()
308 * Stop hdmi phy macro cell tx3g0c55
310 * @hdmi: pointer on the hdmi internal structure
312 static void sti_hdmi_tx3g0c55phy_stop(struct sti_hdmi *hdmi) sti_hdmi_tx3g0c55phy_stop() argument
316 hdmi->event_received = false; sti_hdmi_tx3g0c55phy_stop()
318 hdmi_write(hdmi, HDMI_SRZ_CTRL_POWER_DOWN, HDMI_SRZ_CTRL); sti_hdmi_tx3g0c55phy_stop()
319 hdmi_write(hdmi, HDMI_SRZ_PLL_CFG_POWER_DOWN, HDMI_SRZ_PLL_CFG); sti_hdmi_tx3g0c55phy_stop()
322 wait_event_interruptible_timeout(hdmi->wait_event, sti_hdmi_tx3g0c55phy_stop()
323 hdmi->event_received == true, sti_hdmi_tx3g0c55phy_stop()
327 if (hdmi_read(hdmi, HDMI_STA) & HDMI_STA_DLL_LCK) sti_hdmi_tx3g0c55phy_stop()
328 DRM_ERROR("hdmi phy pll not well disabled\n"); sti_hdmi_tx3g0c55phy_stop()
330 disable_pll_rejection(hdmi); sti_hdmi_tx3g0c55phy_stop()
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| H A D | sti_hdmi.h | 23 bool (*start)(struct sti_hdmi *hdmi);
24 void (*stop)(struct sti_hdmi *hdmi);
28 * STI hdmi structure
33 * @regs: hdmi register
35 * @clk_pix: hdmi pixel clock
36 * @clk_tmds: hdmi tmds clock
37 * @clk_phy: hdmi phy clock
38 * @clk_audio: hdmi audio clock
39 * @irq: hdmi interrupt number
42 * @enabled: true if hdmi is enabled else false
46 * @reset: reset control of the hdmi phy
69 u32 hdmi_read(struct sti_hdmi *hdmi, int offset);
70 void hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset);
73 * hdmi phy config structure
|
| H A D | sti_tvout.c | 120 struct drm_encoder *hdmi; member in struct:sti_tvout
347 DRM_DEBUG_DRIVER("main vip for hdmi\n"); tvout_hdmi_start()
348 /* select the input sync for hdmi = VTG set 1 */ tvout_hdmi_start()
352 DRM_DEBUG_DRIVER("aux vip for hdmi\n"); tvout_hdmi_start()
353 /* select the input sync for hdmi = VTG set 1 */ tvout_hdmi_start()
626 tvout->hdmi = sti_tvout_create_hdmi_encoder(dev, tvout); sti_tvout_create_encoders()
633 if (tvout->hdmi) sti_tvout_destroy_encoders()
634 drm_encoder_cleanup(tvout->hdmi); sti_tvout_destroy_encoders()
635 tvout->hdmi = NULL; sti_tvout_destroy_encoders()
|
| /linux-4.4.14/drivers/video/fbdev/omap2/dss/ |
| H A D | hdmi5.c | 42 #include <sound/omap-hdmi-audio.h>
48 static struct omap_hdmi hdmi; variable in typeref:struct:omap_hdmi
56 r = pm_runtime_get_sync(&hdmi.pdev->dev); hdmi_runtime_get()
70 r = pm_runtime_put_sync(&hdmi.pdev->dev); hdmi_runtime_put()
99 v = hdmi_read_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL); hdmi_irq_handler()
102 hdmi_write_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v); hdmi_irq_handler()
109 REG_FLD_MOD(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15); hdmi_irq_handler()
125 if (hdmi.vdda_reg != NULL) hdmi_init_regulator()
128 reg = devm_regulator_get(&hdmi.pdev->dev, "vdda"); hdmi_init_regulator()
143 hdmi.vdda_reg = reg; hdmi_init_regulator()
152 r = regulator_enable(hdmi.vdda_reg); hdmi_power_on_core()
163 hdmi.core_enabled = true; hdmi_power_on_core()
168 regulator_disable(hdmi.vdda_reg); hdmi_power_on_core()
175 hdmi.core_enabled = false; hdmi_power_off_core()
178 regulator_disable(hdmi.vdda_reg); hdmi_power_off_core()
185 struct omap_overlay_manager *mgr = hdmi.output.manager; hdmi_power_on_full()
192 p = &hdmi.cfg.timings; hdmi_power_on_full()
196 hdmi_pll_compute(&hdmi.pll, p->pixelclock, &hdmi_cinfo); hdmi_power_on_full()
199 hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff); hdmi_power_on_full()
200 hdmi_wp_set_irqstatus(&hdmi.wp, hdmi_power_on_full()
201 hdmi_wp_get_irqstatus(&hdmi.wp)); hdmi_power_on_full()
203 r = dss_pll_enable(&hdmi.pll.pll); hdmi_power_on_full()
209 r = dss_pll_set_config(&hdmi.pll.pll, &hdmi_cinfo); hdmi_power_on_full()
215 r = hdmi_phy_configure(&hdmi.phy, hdmi_cinfo.clkdco, hdmi_power_on_full()
222 r = hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_LDOON); hdmi_power_on_full()
226 hdmi5_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg); hdmi_power_on_full()
234 r = hdmi_wp_video_start(&hdmi.wp); hdmi_power_on_full()
242 hdmi_wp_set_irqenable(&hdmi.wp, hdmi_power_on_full()
248 hdmi_wp_video_stop(&hdmi.wp); hdmi_power_on_full()
250 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF); hdmi_power_on_full()
254 dss_pll_disable(&hdmi.pll.pll); hdmi_power_on_full()
262 struct omap_overlay_manager *mgr = hdmi.output.manager; hdmi_power_off_full()
264 hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff); hdmi_power_off_full()
268 hdmi_wp_video_stop(&hdmi.wp); hdmi_power_off_full()
270 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF); hdmi_power_off_full()
272 dss_pll_disable(&hdmi.pll.pll); hdmi_power_off_full()
280 struct omap_dss_device *out = &hdmi.output; hdmi_display_check_timing()
295 mutex_lock(&hdmi.lock); hdmi_display_set_timing()
297 hdmi.cfg.timings = *timings; hdmi_display_set_timing()
301 mutex_unlock(&hdmi.lock); hdmi_display_set_timing()
307 *timings = hdmi.cfg.timings; hdmi_display_get_timings()
312 mutex_lock(&hdmi.lock); hdmi_dump_regs()
315 mutex_unlock(&hdmi.lock); hdmi_dump_regs()
319 hdmi_wp_dump(&hdmi.wp, s); hdmi_dump_regs()
320 hdmi_pll_dump(&hdmi.pll, s); hdmi_dump_regs()
321 hdmi_phy_dump(&hdmi.phy, s); hdmi_dump_regs()
322 hdmi5_core_dump(&hdmi.core, s); hdmi_dump_regs()
325 mutex_unlock(&hdmi.lock); hdmi_dump_regs()
333 mutex_lock(&hdmi.lock); read_edid()
338 idlemode = REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2); read_edid()
340 REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2); read_edid()
342 r = hdmi5_read_edid(&hdmi.core, buf, len); read_edid()
344 REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2); read_edid()
347 mutex_unlock(&hdmi.lock); read_edid()
354 REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2); hdmi_start_audio_stream()
368 struct omap_dss_device *out = &hdmi.output; hdmi_display_enable()
374 mutex_lock(&hdmi.lock); hdmi_display_enable()
388 if (hdmi.audio_configured) { hdmi_display_enable()
389 r = hdmi5_audio_config(&hdmi.core, &hdmi.wp, &hdmi.audio_config, hdmi_display_enable()
390 hdmi.cfg.timings.pixelclock); hdmi_display_enable()
393 hdmi.audio_abort_cb(&hdmi.pdev->dev); hdmi_display_enable()
394 hdmi.audio_configured = false; hdmi_display_enable()
398 spin_lock_irqsave(&hdmi.audio_playing_lock, flags); hdmi_display_enable()
399 if (hdmi.audio_configured && hdmi.audio_playing) hdmi_display_enable()
400 hdmi_start_audio_stream(&hdmi); hdmi_display_enable()
401 hdmi.display_enabled = true; hdmi_display_enable()
402 spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags); hdmi_display_enable()
404 mutex_unlock(&hdmi.lock); hdmi_display_enable()
408 mutex_unlock(&hdmi.lock); hdmi_display_enable()
418 mutex_lock(&hdmi.lock); hdmi_display_disable()
420 spin_lock_irqsave(&hdmi.audio_playing_lock, flags); hdmi_display_disable()
421 hdmi_stop_audio_stream(&hdmi); hdmi_display_disable()
422 hdmi.display_enabled = false; hdmi_display_disable()
423 spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags); hdmi_display_disable()
427 mutex_unlock(&hdmi.lock); hdmi_display_disable()
436 mutex_lock(&hdmi.lock); hdmi_core_enable()
444 mutex_unlock(&hdmi.lock); hdmi_core_enable()
448 mutex_unlock(&hdmi.lock); hdmi_core_enable()
456 mutex_lock(&hdmi.lock); hdmi_core_disable()
460 mutex_unlock(&hdmi.lock); hdmi_core_disable()
512 need_enable = hdmi.core_enabled == false; hdmi_read_edid()
531 hdmi.cfg.infoframe = *avi; hdmi_set_infoframe()
538 hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI; hdmi_set_hdmi_mode()
560 struct omap_dss_device *out = &hdmi.output; hdmi_init_output()
565 out->name = "hdmi.0"; hdmi_init_output()
567 out->ops.hdmi = &hdmi_ops; hdmi_init_output()
575 struct omap_dss_device *out = &hdmi.output; hdmi_uninit_output()
590 r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy); hdmi_probe_of()
709 .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi.wp), hdmi_audio_register()
713 hdmi.audio_pdev = platform_device_register_data( hdmi_audio_register()
714 dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO, hdmi_audio_register()
717 if (IS_ERR(hdmi.audio_pdev)) hdmi_audio_register()
718 return PTR_ERR(hdmi.audio_pdev); hdmi_audio_register()
721 hdmi.wp_idlemode = hdmi_audio_register()
722 REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2); hdmi_audio_register()
735 hdmi.pdev = pdev; hdmi5_bind()
736 dev_set_drvdata(&pdev->dev, &hdmi); hdmi5_bind()
738 mutex_init(&hdmi.lock); hdmi5_bind()
739 spin_lock_init(&hdmi.audio_playing_lock); hdmi5_bind()
747 r = hdmi_wp_init(pdev, &hdmi.wp); hdmi5_bind()
751 r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp); hdmi5_bind()
755 r = hdmi_phy_init(pdev, &hdmi.phy); hdmi5_bind()
759 r = hdmi5_core_init(pdev, &hdmi.core); hdmi5_bind()
772 IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp); hdmi5_bind()
790 dss_debugfs_create_file("hdmi", hdmi_dump_regs); hdmi5_bind()
794 hdmi_pll_uninit(&hdmi.pll); hdmi5_bind()
802 if (hdmi.audio_pdev) hdmi5_unbind()
803 platform_device_unregister(hdmi.audio_pdev); hdmi5_unbind()
807 hdmi_pll_uninit(&hdmi.pll); hdmi5_unbind()
852 { .compatible = "ti,omap5-hdmi", },
853 { .compatible = "ti,dra7-hdmi", },
|
| H A D | hdmi4.c | 37 #include <sound/omap-hdmi-audio.h>
42 #include "hdmi.h"
44 static struct omap_hdmi hdmi; variable in typeref:struct:omap_hdmi
52 r = pm_runtime_get_sync(&hdmi.pdev->dev); hdmi_runtime_get()
66 r = pm_runtime_put_sync(&hdmi.pdev->dev); hdmi_runtime_put()
106 if (hdmi.vdda_reg != NULL) hdmi_init_regulator()
109 reg = devm_regulator_get(&hdmi.pdev->dev, "vdda"); hdmi_init_regulator()
126 hdmi.vdda_reg = reg; hdmi_init_regulator()
135 r = regulator_enable(hdmi.vdda_reg); hdmi_power_on_core()
146 hdmi.core_enabled = true; hdmi_power_on_core()
151 regulator_disable(hdmi.vdda_reg); hdmi_power_on_core()
158 hdmi.core_enabled = false; hdmi_power_off_core()
161 regulator_disable(hdmi.vdda_reg); hdmi_power_off_core()
168 struct omap_overlay_manager *mgr = hdmi.output.manager; hdmi_power_on_full()
169 struct hdmi_wp_data *wp = &hdmi.wp; hdmi_power_on_full()
180 p = &hdmi.cfg.timings; hdmi_power_on_full()
184 hdmi_pll_compute(&hdmi.pll, p->pixelclock, &hdmi_cinfo); hdmi_power_on_full()
186 r = dss_pll_enable(&hdmi.pll.pll); hdmi_power_on_full()
192 r = dss_pll_set_config(&hdmi.pll.pll, &hdmi_cinfo); hdmi_power_on_full()
198 r = hdmi_phy_configure(&hdmi.phy, hdmi_cinfo.clkdco, hdmi_power_on_full()
209 hdmi4_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg); hdmi_power_on_full()
217 r = hdmi_wp_video_start(&hdmi.wp); hdmi_power_on_full()
231 hdmi_wp_video_stop(&hdmi.wp); hdmi_power_on_full()
233 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF); hdmi_power_on_full()
237 dss_pll_disable(&hdmi.pll.pll); hdmi_power_on_full()
245 struct omap_overlay_manager *mgr = hdmi.output.manager; hdmi_power_off_full()
247 hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff); hdmi_power_off_full()
251 hdmi_wp_video_stop(&hdmi.wp); hdmi_power_off_full()
253 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF); hdmi_power_off_full()
255 dss_pll_disable(&hdmi.pll.pll); hdmi_power_off_full()
263 struct omap_dss_device *out = &hdmi.output; hdmi_display_check_timing()
274 mutex_lock(&hdmi.lock); hdmi_display_set_timing()
276 hdmi.cfg.timings = *timings; hdmi_display_set_timing()
280 mutex_unlock(&hdmi.lock); hdmi_display_set_timing()
286 *timings = hdmi.cfg.timings; hdmi_display_get_timings()
291 mutex_lock(&hdmi.lock); hdmi_dump_regs()
294 mutex_unlock(&hdmi.lock); hdmi_dump_regs()
298 hdmi_wp_dump(&hdmi.wp, s); hdmi_dump_regs()
299 hdmi_pll_dump(&hdmi.pll, s); hdmi_dump_regs()
300 hdmi_phy_dump(&hdmi.phy, s); hdmi_dump_regs()
301 hdmi4_core_dump(&hdmi.core, s); hdmi_dump_regs()
304 mutex_unlock(&hdmi.lock); hdmi_dump_regs()
311 mutex_lock(&hdmi.lock); read_edid()
316 r = hdmi4_read_edid(&hdmi.core, buf, len); read_edid()
319 mutex_unlock(&hdmi.lock); read_edid()
338 struct omap_dss_device *out = &hdmi.output; hdmi_display_enable()
344 mutex_lock(&hdmi.lock); hdmi_display_enable()
358 if (hdmi.audio_configured) { hdmi_display_enable()
359 r = hdmi4_audio_config(&hdmi.core, &hdmi.wp, &hdmi.audio_config, hdmi_display_enable()
360 hdmi.cfg.timings.pixelclock); hdmi_display_enable()
363 hdmi.audio_abort_cb(&hdmi.pdev->dev); hdmi_display_enable()
364 hdmi.audio_configured = false; hdmi_display_enable()
368 spin_lock_irqsave(&hdmi.audio_playing_lock, flags); hdmi_display_enable()
369 if (hdmi.audio_configured && hdmi.audio_playing) hdmi_display_enable()
370 hdmi_start_audio_stream(&hdmi); hdmi_display_enable()
371 hdmi.display_enabled = true; hdmi_display_enable()
372 spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags); hdmi_display_enable()
374 mutex_unlock(&hdmi.lock); hdmi_display_enable()
378 mutex_unlock(&hdmi.lock); hdmi_display_enable()
388 mutex_lock(&hdmi.lock); hdmi_display_disable()
390 spin_lock_irqsave(&hdmi.audio_playing_lock, flags); hdmi_display_disable()
391 hdmi_stop_audio_stream(&hdmi); hdmi_display_disable()
392 hdmi.display_enabled = false; hdmi_display_disable()
393 spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags); hdmi_display_disable()
397 mutex_unlock(&hdmi.lock); hdmi_display_disable()
406 mutex_lock(&hdmi.lock); hdmi_core_enable()
414 mutex_unlock(&hdmi.lock); hdmi_core_enable()
418 mutex_unlock(&hdmi.lock); hdmi_core_enable()
426 mutex_lock(&hdmi.lock); hdmi_core_disable()
430 mutex_unlock(&hdmi.lock); hdmi_core_disable()
482 need_enable = hdmi.core_enabled == false; hdmi_read_edid()
501 hdmi.cfg.infoframe = *avi; hdmi_set_infoframe()
508 hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI; hdmi_set_hdmi_mode()
530 struct omap_dss_device *out = &hdmi.output; hdmi_init_output()
535 out->name = "hdmi.0"; hdmi_init_output()
537 out->ops.hdmi = &hdmi_ops; hdmi_init_output()
545 struct omap_dss_device *out = &hdmi.output; hdmi_uninit_output()
560 r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy); hdmi_probe_of()
678 .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi.wp), hdmi_audio_register()
682 hdmi.audio_pdev = platform_device_register_data( hdmi_audio_register()
683 dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO, hdmi_audio_register()
686 if (IS_ERR(hdmi.audio_pdev)) hdmi_audio_register()
687 return PTR_ERR(hdmi.audio_pdev); hdmi_audio_register()
699 hdmi.pdev = pdev; hdmi4_bind()
700 dev_set_drvdata(&pdev->dev, &hdmi); hdmi4_bind()
702 mutex_init(&hdmi.lock); hdmi4_bind()
703 spin_lock_init(&hdmi.audio_playing_lock); hdmi4_bind()
711 r = hdmi_wp_init(pdev, &hdmi.wp); hdmi4_bind()
715 r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp); hdmi4_bind()
719 r = hdmi_phy_init(pdev, &hdmi.phy); hdmi4_bind()
723 r = hdmi4_core_init(pdev, &hdmi.core); hdmi4_bind()
736 IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp); hdmi4_bind()
754 dss_debugfs_create_file("hdmi", hdmi_dump_regs); hdmi4_bind()
758 hdmi_pll_uninit(&hdmi.pll); hdmi4_bind()
766 if (hdmi.audio_pdev) hdmi4_unbind()
767 platform_device_unregister(hdmi.audio_pdev); hdmi4_unbind()
771 hdmi_pll_uninit(&hdmi.pll); hdmi4_unbind()
816 { .compatible = "ti,omap4-hdmi", },
|
| H A D | hdmi_common.c | 9 #include "hdmi.h"
|
| H A D | hdmi_pll.c | 23 #include "hdmi.h"
191 pll->name = "hdmi"; dsi_init_pll_data()
|
| H A D | hdmi_phy.c | 19 #include "hdmi.h"
|
| H A D | hdmi.h | 25 #include <linux/hdmi.h>
|
| H A D | hdmi4_core.h | 22 #include "hdmi.h"
|
| H A D | hdmi5_core.h | 22 #include "hdmi.h"
|
| H A D | hdmi_wp.c | 20 #include "hdmi.h"
|
| /linux-4.4.14/drivers/gpu/drm/msm/ |
| H A D | Makefile | 9 hdmi/hdmi.o \
10 hdmi/hdmi_audio.o \
11 hdmi/hdmi_bridge.o \
12 hdmi/hdmi_connector.o \
13 hdmi/hdmi_hdcp.o \
14 hdmi/hdmi_i2c.o \
15 hdmi/hdmi_phy_8960.o \
16 hdmi/hdmi_phy_8x60.o \
17 hdmi/hdmi_phy_8x74.o \
|
| H A D | msm_drv.h | 91 struct hdmi *hdmi; member in struct:msm_drm_private
249 struct hdmi;
250 int hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev,
|
| /linux-4.4.14/drivers/gpu/drm/tegra/ |
| H A D | hdmi.c | 13 #include <linux/hdmi.h>
21 #include "hdmi.h"
49 struct regulator *hdmi; member in struct:tegra_hdmi
92 static inline u32 tegra_hdmi_readl(struct tegra_hdmi *hdmi, tegra_hdmi_readl() argument
95 return readl(hdmi->regs + (offset << 2)); tegra_hdmi_readl()
98 static inline void tegra_hdmi_writel(struct tegra_hdmi *hdmi, u32 value, tegra_hdmi_writel() argument
101 writel(value, hdmi->regs + (offset << 2)); tegra_hdmi_writel()
452 static void tegra_hdmi_setup_audio_fs_tables(struct tegra_hdmi *hdmi) tegra_hdmi_setup_audio_fs_tables() argument
475 tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_AUDIO_FS(i)); tegra_hdmi_setup_audio_fs_tables()
479 static int tegra_hdmi_setup_audio(struct tegra_hdmi *hdmi, unsigned int pclk) tegra_hdmi_setup_audio() argument
481 struct device_node *node = hdmi->dev->of_node; tegra_hdmi_setup_audio()
486 switch (hdmi->audio_source) { tegra_hdmi_setup_audio()
500 if (of_device_is_compatible(node, "nvidia,tegra30-hdmi")) { tegra_hdmi_setup_audio()
503 tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_AUDIO_CNTRL0); tegra_hdmi_setup_audio()
506 tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_SOR_AUDIO_CNTRL0); tegra_hdmi_setup_audio()
510 tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_AUDIO_CNTRL0); tegra_hdmi_setup_audio()
513 config = tegra_hdmi_get_audio_config(hdmi->audio_freq, pclk); tegra_hdmi_setup_audio()
515 dev_err(hdmi->dev, "cannot set audio to %u at %u pclk\n", tegra_hdmi_setup_audio()
516 hdmi->audio_freq, pclk); tegra_hdmi_setup_audio()
520 tegra_hdmi_writel(hdmi, 0, HDMI_NV_PDISP_HDMI_ACR_CTRL); tegra_hdmi_setup_audio()
524 tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_AUDIO_N); tegra_hdmi_setup_audio()
526 tegra_hdmi_writel(hdmi, ACR_SUBPACK_N(config->n) | ACR_ENABLE, tegra_hdmi_setup_audio()
530 tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_HDMI_ACR_0441_SUBPACK_LOW); tegra_hdmi_setup_audio()
533 tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_HDMI_SPARE); tegra_hdmi_setup_audio()
535 value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_AUDIO_N); tegra_hdmi_setup_audio()
537 tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_AUDIO_N); tegra_hdmi_setup_audio()
539 if (of_device_is_compatible(node, "nvidia,tegra30-hdmi")) { tegra_hdmi_setup_audio()
540 switch (hdmi->audio_freq) { tegra_hdmi_setup_audio()
570 tegra_hdmi_writel(hdmi, config->aval, offset); tegra_hdmi_setup_audio()
573 tegra_hdmi_setup_audio_fs_tables(hdmi); tegra_hdmi_setup_audio()
589 static void tegra_hdmi_write_infopack(struct tegra_hdmi *hdmi, const void *data, tegra_hdmi_write_infopack() argument
611 dev_err(hdmi->dev, "unsupported infoframe type: %02x\n", tegra_hdmi_write_infopack()
619 tegra_hdmi_writel(hdmi, value, offset); tegra_hdmi_write_infopack()
631 tegra_hdmi_writel(hdmi, value, offset++); tegra_hdmi_write_infopack()
636 tegra_hdmi_writel(hdmi, value, offset++); tegra_hdmi_write_infopack()
640 static void tegra_hdmi_setup_avi_infoframe(struct tegra_hdmi *hdmi, tegra_hdmi_setup_avi_infoframe() argument
647 if (hdmi->dvi) { tegra_hdmi_setup_avi_infoframe()
648 tegra_hdmi_writel(hdmi, 0, tegra_hdmi_setup_avi_infoframe()
655 dev_err(hdmi->dev, "failed to setup AVI infoframe: %zd\n", err); tegra_hdmi_setup_avi_infoframe()
661 dev_err(hdmi->dev, "failed to pack AVI infoframe: %zd\n", err); tegra_hdmi_setup_avi_infoframe()
665 tegra_hdmi_write_infopack(hdmi, buffer, err); tegra_hdmi_setup_avi_infoframe()
667 tegra_hdmi_writel(hdmi, INFOFRAME_CTRL_ENABLE, tegra_hdmi_setup_avi_infoframe()
671 static void tegra_hdmi_setup_audio_infoframe(struct tegra_hdmi *hdmi) tegra_hdmi_setup_audio_infoframe() argument
677 if (hdmi->dvi) { tegra_hdmi_setup_audio_infoframe()
678 tegra_hdmi_writel(hdmi, 0, tegra_hdmi_setup_audio_infoframe()
685 dev_err(hdmi->dev, "failed to setup audio infoframe: %zd\n", tegra_hdmi_setup_audio_infoframe()
694 dev_err(hdmi->dev, "failed to pack audio infoframe: %zd\n", tegra_hdmi_setup_audio_infoframe()
705 tegra_hdmi_write_infopack(hdmi, buffer, min_t(size_t, 10, err)); tegra_hdmi_setup_audio_infoframe()
707 tegra_hdmi_writel(hdmi, INFOFRAME_CTRL_ENABLE, tegra_hdmi_setup_audio_infoframe()
711 static void tegra_hdmi_setup_stereo_infoframe(struct tegra_hdmi *hdmi) tegra_hdmi_setup_stereo_infoframe() argument
718 if (!hdmi->stereo) { tegra_hdmi_setup_stereo_infoframe()
719 value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_HDMI_GENERIC_CTRL); tegra_hdmi_setup_stereo_infoframe()
721 tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_HDMI_GENERIC_CTRL); tegra_hdmi_setup_stereo_infoframe()
730 dev_err(hdmi->dev, "failed to pack vendor infoframe: %zd\n", tegra_hdmi_setup_stereo_infoframe()
735 tegra_hdmi_write_infopack(hdmi, buffer, err); tegra_hdmi_setup_stereo_infoframe()
737 value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_HDMI_GENERIC_CTRL); tegra_hdmi_setup_stereo_infoframe()
739 tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_HDMI_GENERIC_CTRL); tegra_hdmi_setup_stereo_infoframe()
742 static void tegra_hdmi_setup_tmds(struct tegra_hdmi *hdmi, tegra_hdmi_setup_tmds() argument
747 tegra_hdmi_writel(hdmi, tmds->pll0, HDMI_NV_PDISP_SOR_PLL0); tegra_hdmi_setup_tmds()
748 tegra_hdmi_writel(hdmi, tmds->pll1, HDMI_NV_PDISP_SOR_PLL1); tegra_hdmi_setup_tmds()
749 tegra_hdmi_writel(hdmi, tmds->pe_current, HDMI_NV_PDISP_PE_CURRENT); tegra_hdmi_setup_tmds()
751 tegra_hdmi_writel(hdmi, tmds->drive_current, tegra_hdmi_setup_tmds()
754 value = tegra_hdmi_readl(hdmi, hdmi->config->fuse_override_offset); tegra_hdmi_setup_tmds()
755 value |= hdmi->config->fuse_override_value; tegra_hdmi_setup_tmds()
756 tegra_hdmi_writel(hdmi, value, hdmi->config->fuse_override_offset); tegra_hdmi_setup_tmds()
758 if (hdmi->config->has_sor_io_peak_current) tegra_hdmi_setup_tmds()
759 tegra_hdmi_writel(hdmi, tmds->peak_current, tegra_hdmi_setup_tmds()
790 struct tegra_hdmi *hdmi = to_hdmi(output); tegra_hdmi_connector_mode_valid() local
796 parent = clk_get_parent(hdmi->clk_parent); tegra_hdmi_connector_mode_valid()
841 struct tegra_hdmi *hdmi = to_hdmi(output); tegra_hdmi_encoder_enable() local
847 hdmi->dvi = !tegra_output_is_hdmi(output); tegra_hdmi_encoder_enable()
854 err = clk_set_rate(hdmi->clk, pclk); tegra_hdmi_encoder_enable()
856 dev_err(hdmi->dev, "failed to set HDMI clock frequency: %d\n", tegra_hdmi_encoder_enable()
860 DRM_DEBUG_KMS("HDMI clock rate: %lu Hz\n", clk_get_rate(hdmi->clk)); tegra_hdmi_encoder_enable()
863 value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_SOR_PLL0); tegra_hdmi_encoder_enable()
865 tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_SOR_PLL0); tegra_hdmi_encoder_enable()
869 value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_SOR_PLL0); tegra_hdmi_encoder_enable()
871 tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_SOR_PLL0); tegra_hdmi_encoder_enable()
892 tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_HDMI_VSYNC_WINDOW); tegra_hdmi_encoder_enable()
901 tegra_hdmi_writel(hdmi, tegra_hdmi_encoder_enable()
905 tegra_hdmi_writel(hdmi, tegra_hdmi_encoder_enable()
909 div82 = clk_get_rate(hdmi->clk) / 1000000 * 4; tegra_hdmi_encoder_enable()
911 tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_SOR_REFCLK); tegra_hdmi_encoder_enable()
913 if (!hdmi->dvi) { tegra_hdmi_encoder_enable()
914 err = tegra_hdmi_setup_audio(hdmi, pclk); tegra_hdmi_encoder_enable()
916 hdmi->dvi = true; tegra_hdmi_encoder_enable()
919 if (of_device_is_compatible(node, "nvidia,tegra20-hdmi")) { tegra_hdmi_encoder_enable()
930 if (!hdmi->dvi) tegra_hdmi_encoder_enable()
933 tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_HDMI_CTRL); tegra_hdmi_encoder_enable()
935 if (hdmi->dvi) tegra_hdmi_encoder_enable()
936 tegra_hdmi_writel(hdmi, 0x0, tegra_hdmi_encoder_enable()
939 tegra_hdmi_writel(hdmi, GENERIC_CTRL_AUDIO, tegra_hdmi_encoder_enable()
942 tegra_hdmi_setup_avi_infoframe(hdmi, mode); tegra_hdmi_encoder_enable()
943 tegra_hdmi_setup_audio_infoframe(hdmi); tegra_hdmi_encoder_enable()
944 tegra_hdmi_setup_stereo_infoframe(hdmi); tegra_hdmi_encoder_enable()
947 for (i = 0; i < hdmi->config->num_tmds; i++) { tegra_hdmi_encoder_enable()
948 if (pclk <= hdmi->config->tmds[i].pclk) { tegra_hdmi_encoder_enable()
949 tegra_hdmi_setup_tmds(hdmi, &hdmi->config->tmds[i]); tegra_hdmi_encoder_enable()
954 tegra_hdmi_writel(hdmi, tegra_hdmi_encoder_enable()
968 tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_SOR_SEQ_INST(0)); tegra_hdmi_encoder_enable()
969 tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_SOR_SEQ_INST(8)); tegra_hdmi_encoder_enable()
971 value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_SOR_CSTM); tegra_hdmi_encoder_enable()
978 tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_SOR_CSTM); tegra_hdmi_encoder_enable()
981 tegra_hdmi_writel(hdmi, tegra_hdmi_encoder_enable()
987 tegra_hdmi_writel(hdmi, tegra_hdmi_encoder_enable()
996 value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_SOR_PWR); tegra_hdmi_encoder_enable()
1018 tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_SOR_STATE2); tegra_hdmi_encoder_enable()
1021 tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_SOR_STATE1); tegra_hdmi_encoder_enable()
1023 tegra_hdmi_writel(hdmi, 0, HDMI_NV_PDISP_SOR_STATE0); tegra_hdmi_encoder_enable()
1024 tegra_hdmi_writel(hdmi, SOR_STATE_UPDATE, HDMI_NV_PDISP_SOR_STATE0); tegra_hdmi_encoder_enable()
1025 tegra_hdmi_writel(hdmi, value | SOR_STATE_ATTACHED, tegra_hdmi_encoder_enable()
1027 tegra_hdmi_writel(hdmi, 0, HDMI_NV_PDISP_SOR_STATE0); tegra_hdmi_encoder_enable()
1046 struct tegra_hdmi *hdmi = to_hdmi(output); tegra_hdmi_encoder_atomic_check() local
1049 err = tegra_dc_state_setup_clock(dc, crtc_state, hdmi->clk_parent, tegra_hdmi_encoder_atomic_check()
1068 struct tegra_hdmi *hdmi = node->info_ent->data; tegra_hdmi_show_regs() local
1069 struct drm_crtc *crtc = hdmi->output.encoder.crtc; tegra_hdmi_show_regs()
1082 tegra_hdmi_readl(hdmi, name)) tegra_hdmi_show_regs()
1254 static int tegra_hdmi_debugfs_init(struct tegra_hdmi *hdmi, tegra_hdmi_debugfs_init() argument
1260 hdmi->debugfs = debugfs_create_dir("hdmi", minor->debugfs_root); tegra_hdmi_debugfs_init()
1261 if (!hdmi->debugfs) tegra_hdmi_debugfs_init()
1264 hdmi->debugfs_files = kmemdup(debugfs_files, sizeof(debugfs_files), tegra_hdmi_debugfs_init()
1266 if (!hdmi->debugfs_files) { tegra_hdmi_debugfs_init()
1272 hdmi->debugfs_files[i].data = hdmi; tegra_hdmi_debugfs_init()
1274 err = drm_debugfs_create_files(hdmi->debugfs_files, tegra_hdmi_debugfs_init()
1276 hdmi->debugfs, minor); tegra_hdmi_debugfs_init()
1280 hdmi->minor = minor; tegra_hdmi_debugfs_init()
1285 kfree(hdmi->debugfs_files); tegra_hdmi_debugfs_init()
1286 hdmi->debugfs_files = NULL; tegra_hdmi_debugfs_init()
1288 debugfs_remove(hdmi->debugfs); tegra_hdmi_debugfs_init()
1289 hdmi->debugfs = NULL; tegra_hdmi_debugfs_init()
1294 static void tegra_hdmi_debugfs_exit(struct tegra_hdmi *hdmi) tegra_hdmi_debugfs_exit() argument
1296 drm_debugfs_remove_files(hdmi->debugfs_files, ARRAY_SIZE(debugfs_files), tegra_hdmi_debugfs_exit()
1297 hdmi->minor); tegra_hdmi_debugfs_exit()
1298 hdmi->minor = NULL; tegra_hdmi_debugfs_exit()
1300 kfree(hdmi->debugfs_files); tegra_hdmi_debugfs_exit()
1301 hdmi->debugfs_files = NULL; tegra_hdmi_debugfs_exit()
1303 debugfs_remove(hdmi->debugfs); tegra_hdmi_debugfs_exit()
1304 hdmi->debugfs = NULL; tegra_hdmi_debugfs_exit()
1310 struct tegra_hdmi *hdmi = host1x_client_to_hdmi(client); tegra_hdmi_init() local
1313 hdmi->output.dev = client->dev; tegra_hdmi_init()
1315 drm_connector_init(drm, &hdmi->output.connector, tegra_hdmi_init()
1318 drm_connector_helper_add(&hdmi->output.connector, tegra_hdmi_init()
1320 hdmi->output.connector.dpms = DRM_MODE_DPMS_OFF; tegra_hdmi_init()
1322 drm_encoder_init(drm, &hdmi->output.encoder, &tegra_hdmi_encoder_funcs, tegra_hdmi_init()
1324 drm_encoder_helper_add(&hdmi->output.encoder, tegra_hdmi_init()
1327 drm_mode_connector_attach_encoder(&hdmi->output.connector, tegra_hdmi_init()
1328 &hdmi->output.encoder); tegra_hdmi_init()
1329 drm_connector_register(&hdmi->output.connector); tegra_hdmi_init()
1331 err = tegra_output_init(drm, &hdmi->output); tegra_hdmi_init()
1337 hdmi->output.encoder.possible_crtcs = 0x3; tegra_hdmi_init()
1340 err = tegra_hdmi_debugfs_init(hdmi, drm->primary); tegra_hdmi_init()
1345 err = regulator_enable(hdmi->hdmi); tegra_hdmi_init()
1352 err = regulator_enable(hdmi->pll); tegra_hdmi_init()
1354 dev_err(hdmi->dev, "failed to enable PLL regulator: %d\n", err); tegra_hdmi_init()
1358 err = regulator_enable(hdmi->vdd); tegra_hdmi_init()
1360 dev_err(hdmi->dev, "failed to enable VDD regulator: %d\n", err); tegra_hdmi_init()
1364 err = clk_prepare_enable(hdmi->clk); tegra_hdmi_init()
1366 dev_err(hdmi->dev, "failed to enable clock: %d\n", err); tegra_hdmi_init()
1370 reset_control_deassert(hdmi->rst); tegra_hdmi_init()
1377 struct tegra_hdmi *hdmi = host1x_client_to_hdmi(client); tegra_hdmi_exit() local
1379 tegra_output_exit(&hdmi->output); tegra_hdmi_exit()
1381 reset_control_assert(hdmi->rst); tegra_hdmi_exit()
1382 clk_disable_unprepare(hdmi->clk); tegra_hdmi_exit()
1384 regulator_disable(hdmi->vdd); tegra_hdmi_exit()
1385 regulator_disable(hdmi->pll); tegra_hdmi_exit()
1386 regulator_disable(hdmi->hdmi); tegra_hdmi_exit()
1389 tegra_hdmi_debugfs_exit(hdmi); tegra_hdmi_exit()
1432 { .compatible = "nvidia,tegra124-hdmi", .data = &tegra124_hdmi_config },
1433 { .compatible = "nvidia,tegra114-hdmi", .data = &tegra114_hdmi_config },
1434 { .compatible = "nvidia,tegra30-hdmi", .data = &tegra30_hdmi_config },
1435 { .compatible = "nvidia,tegra20-hdmi", .data = &tegra20_hdmi_config },
1443 struct tegra_hdmi *hdmi; tegra_hdmi_probe() local
1451 hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL); tegra_hdmi_probe()
1452 if (!hdmi) tegra_hdmi_probe()
1455 hdmi->config = match->data; tegra_hdmi_probe()
1456 hdmi->dev = &pdev->dev; tegra_hdmi_probe()
1457 hdmi->audio_source = AUTO; tegra_hdmi_probe()
1458 hdmi->audio_freq = 44100; tegra_hdmi_probe()
1459 hdmi->stereo = false; tegra_hdmi_probe()
1460 hdmi->dvi = false; tegra_hdmi_probe()
1462 hdmi->clk = devm_clk_get(&pdev->dev, NULL); tegra_hdmi_probe()
1463 if (IS_ERR(hdmi->clk)) { tegra_hdmi_probe()
1465 return PTR_ERR(hdmi->clk); tegra_hdmi_probe()
1468 hdmi->rst = devm_reset_control_get(&pdev->dev, "hdmi"); tegra_hdmi_probe()
1469 if (IS_ERR(hdmi->rst)) { tegra_hdmi_probe()
1471 return PTR_ERR(hdmi->rst); tegra_hdmi_probe()
1474 hdmi->clk_parent = devm_clk_get(&pdev->dev, "parent"); tegra_hdmi_probe()
1475 if (IS_ERR(hdmi->clk_parent)) tegra_hdmi_probe()
1476 return PTR_ERR(hdmi->clk_parent); tegra_hdmi_probe()
1478 err = clk_set_parent(hdmi->clk, hdmi->clk_parent); tegra_hdmi_probe()
1484 hdmi->hdmi = devm_regulator_get(&pdev->dev, "hdmi"); tegra_hdmi_probe()
1485 if (IS_ERR(hdmi->hdmi)) { tegra_hdmi_probe()
1487 return PTR_ERR(hdmi->hdmi); tegra_hdmi_probe()
1490 hdmi->pll = devm_regulator_get(&pdev->dev, "pll"); tegra_hdmi_probe()
1491 if (IS_ERR(hdmi->pll)) { tegra_hdmi_probe()
1493 return PTR_ERR(hdmi->pll); tegra_hdmi_probe()
1496 hdmi->vdd = devm_regulator_get(&pdev->dev, "vdd"); tegra_hdmi_probe()
1497 if (IS_ERR(hdmi->vdd)) { tegra_hdmi_probe()
1499 return PTR_ERR(hdmi->vdd); tegra_hdmi_probe()
1502 hdmi->output.dev = &pdev->dev; tegra_hdmi_probe()
1504 err = tegra_output_probe(&hdmi->output); tegra_hdmi_probe()
1509 hdmi->regs = devm_ioremap_resource(&pdev->dev, regs); tegra_hdmi_probe()
1510 if (IS_ERR(hdmi->regs)) tegra_hdmi_probe()
1511 return PTR_ERR(hdmi->regs); tegra_hdmi_probe()
1517 hdmi->irq = err; tegra_hdmi_probe()
1519 INIT_LIST_HEAD(&hdmi->client.list); tegra_hdmi_probe()
1520 hdmi->client.ops = &hdmi_client_ops; tegra_hdmi_probe()
1521 hdmi->client.dev = &pdev->dev; tegra_hdmi_probe()
1523 err = host1x_client_register(&hdmi->client); tegra_hdmi_probe()
1530 platform_set_drvdata(pdev, hdmi); tegra_hdmi_probe()
1537 struct tegra_hdmi *hdmi = platform_get_drvdata(pdev); tegra_hdmi_remove() local
1540 err = host1x_client_unregister(&hdmi->client); tegra_hdmi_remove()
1547 tegra_output_remove(&hdmi->output); tegra_hdmi_remove()
1549 clk_disable_unprepare(hdmi->clk_parent); tegra_hdmi_remove()
1550 clk_disable_unprepare(hdmi->clk); tegra_hdmi_remove()
1557 .name = "tegra-hdmi",
|
| H A D | Makefile | 10 hdmi.o \
|
| H A D | drm.c | 1047 { .compatible = "nvidia,tegra20-hdmi", },
1051 { .compatible = "nvidia,tegra30-hdmi", },
1055 { .compatible = "nvidia,tegra114-hdmi", },
1059 { .compatible = "nvidia,tegra124-hdmi", },
|
| H A D | sor.c | 2311 sor->hdmi_supply = devm_regulator_get(sor->dev, "hdmi"); tegra_sor_hdmi_probe()
|
| /linux-4.4.14/sound/pci/oxygen/ |
| H A D | xonar_hdmi.c | 48 struct xonar_hdmi *hdmi) xonar_hdmi_init_commands()
57 hdmi_write_command(chip, 0x54, 5, hdmi->params); xonar_hdmi_init_commands()
60 void xonar_hdmi_init(struct oxygen *chip, struct xonar_hdmi *hdmi) xonar_hdmi_init() argument
62 hdmi->params[1] = IEC958_AES3_CON_FS_48000; xonar_hdmi_init()
63 hdmi->params[4] = 1; xonar_hdmi_init()
64 xonar_hdmi_init_commands(chip, hdmi); xonar_hdmi_init()
74 void xonar_hdmi_resume(struct oxygen *chip, struct xonar_hdmi *hdmi) xonar_hdmi_resume() argument
76 xonar_hdmi_init_commands(chip, hdmi); xonar_hdmi_resume()
91 void xonar_set_hdmi_params(struct oxygen *chip, struct xonar_hdmi *hdmi, xonar_set_hdmi_params() argument
94 hdmi->params[0] = 0; /* 1 = non-audio */ xonar_set_hdmi_params()
97 hdmi->params[1] = IEC958_AES3_CON_FS_44100; xonar_set_hdmi_params()
100 hdmi->params[1] = IEC958_AES3_CON_FS_48000; xonar_set_hdmi_params()
103 hdmi->params[1] = IEC958_AES3_CON_FS_96000; xonar_set_hdmi_params()
106 hdmi->params[1] = IEC958_AES3_CON_FS_192000; xonar_set_hdmi_params()
109 hdmi->params[2] = params_channels(params) / 2 - 1; xonar_set_hdmi_params()
111 hdmi->params[3] = 0; xonar_set_hdmi_params()
113 hdmi->params[3] = 0xc0; xonar_set_hdmi_params()
114 hdmi->params[4] = 1; /* ? */ xonar_set_hdmi_params()
115 hdmi_write_command(chip, 0x54, 5, hdmi->params); xonar_set_hdmi_params()
47 xonar_hdmi_init_commands(struct oxygen *chip, struct xonar_hdmi *hdmi) xonar_hdmi_init_commands() argument
|
| H A D | xonar.h | 47 void xonar_hdmi_resume(struct oxygen *chip, struct xonar_hdmi *hdmi);
50 void xonar_set_hdmi_params(struct oxygen *chip, struct xonar_hdmi *hdmi,
|
| H A D | xonar_pcm179x.c | 239 struct xonar_hdmi hdmi; member in struct:xonar_hdav
404 xonar_hdmi_init(chip, &data->hdmi); xonar_hdav_init()
594 xonar_hdmi_resume(chip, &data->hdmi); xonar_hdav_resume()
713 xonar_set_hdmi_params(chip, &data->hdmi, params); set_hdav_params()
|
| H A D | xonar_wm87x6.c | 98 struct xonar_hdmi hdmi; member in struct:xonar_wm87x6
310 xonar_hdmi_init(chip, &data->hdmi); xonar_hdav_slim_init()
353 xonar_hdmi_resume(chip, &data->hdmi); xonar_hdav_slim_resume()
399 xonar_set_hdmi_params(chip, &data->hdmi, params); set_hdav_slim_dac_params()
|
| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
| H A D | hdmigk104.c | 36 const u32 hdmi = (head * 0x400); gk104_hdmi_ctrl() local
43 nvif_ioctl(object, "disp sor hdmi ctrl size %d\n", size); gk104_hdmi_ctrl()
45 nvif_ioctl(object, "disp sor hdmi ctrl vers %d state %d " gk104_hdmi_ctrl()
59 nvkm_mask(device, 0x6900c0 + hdmi, 0x00000001, 0x00000000); gk104_hdmi_ctrl()
60 nvkm_mask(device, 0x690000 + hdmi, 0x00000001, 0x00000000); gk104_hdmi_ctrl()
65 nvkm_mask(device, 0x690000 + hdmi, 0x00000001, 0x00000000); gk104_hdmi_ctrl()
66 nvkm_wr32(device, 0x690008 + hdmi, 0x000d0282); gk104_hdmi_ctrl()
67 nvkm_wr32(device, 0x69000c + hdmi, 0x0000006f); gk104_hdmi_ctrl()
68 nvkm_wr32(device, 0x690010 + hdmi, 0x00000000); gk104_hdmi_ctrl()
69 nvkm_wr32(device, 0x690014 + hdmi, 0x00000000); gk104_hdmi_ctrl()
70 nvkm_wr32(device, 0x690018 + hdmi, 0x00000000); gk104_hdmi_ctrl()
71 nvkm_mask(device, 0x690000 + hdmi, 0x00000001, 0x00000001); gk104_hdmi_ctrl()
74 nvkm_mask(device, 0x6900c0 + hdmi, 0x00000001, 0x00000000); gk104_hdmi_ctrl()
75 nvkm_wr32(device, 0x6900cc + hdmi, 0x00000010); gk104_hdmi_ctrl()
76 nvkm_mask(device, 0x6900c0 + hdmi, 0x00000001, 0x00000001); gk104_hdmi_ctrl()
79 nvkm_wr32(device, 0x690080 + hdmi, 0x82000000); gk104_hdmi_ctrl()
|
| H A D | hdmig84.c | 42 nvif_ioctl(object, "disp sor hdmi ctrl size %d\n", size); g84_hdmi_ctrl()
44 nvif_ioctl(object, "disp sor hdmi ctrl vers %d state %d " g84_hdmi_ctrl()
|
| H A D | hdmigf119.c | 42 nvif_ioctl(object, "disp sor hdmi ctrl size %d\n", size); gf119_hdmi_ctrl()
44 nvif_ioctl(object, "disp sor hdmi ctrl vers %d state %d " gf119_hdmi_ctrl()
|
| H A D | hdmigt215.c | 43 nvif_ioctl(object, "disp sor hdmi ctrl size %d\n", size); gt215_hdmi_ctrl()
45 nvif_ioctl(object, "disp sor hdmi ctrl vers %d state %d " gt215_hdmi_ctrl()
|
| H A D | g84.c | 46 .sor.hdmi = g84_hdmi_ctrl,
|
| H A D | g94.c | 47 .sor.hdmi = g84_hdmi_ctrl,
|
| H A D | gk104.c | 46 .sor.hdmi = gk104_hdmi_ctrl,
|
| H A D | gk110.c | 46 .sor.hdmi = gk104_hdmi_ctrl,
|
| H A D | gm107.c | 46 .sor.hdmi = gk104_hdmi_ctrl,
|
| H A D | gm204.c | 46 .sor.hdmi = gk104_hdmi_ctrl,
|
| H A D | gt200.c | 46 .sor.hdmi = g84_hdmi_ctrl,
|
| H A D | gt215.c | 48 .sor.hdmi = gt215_hdmi_ctrl,
|
| H A D | nv50.h | 98 int (*hdmi)(NV50_DISP_MTHD_V1); member in struct:nv50_disp_func::__anon4459
|
| H A D | rootnv50.c | 139 if (!func->sor.hdmi) nv50_disp_root_mthd_()
141 return func->sor.hdmi(object, disp, data, size, head, outp); nv50_disp_root_mthd_()
|
| H A D | gf119.c | 529 .sor.hdmi = gf119_hdmi_ctrl,
|
| /linux-4.4.14/drivers/gpu/drm/vc4/ |
| H A D | vc4_hdmi.c | 55 #define HDMI_READ(offset) readl(vc4->hdmi->hdmicore_regs + offset)
56 #define HDMI_WRITE(offset, val) writel(val, vc4->hdmi->hdmicore_regs + offset)
57 #define HD_READ(offset) readl(vc4->hdmi->hd_regs + offset)
58 #define HD_WRITE(offset, val) writel(val, vc4->hdmi->hd_regs + offset)
167 if (vc4->hdmi->hpd_gpio) { vc4_hdmi_connector_detect()
168 if (gpio_get_value(vc4->hdmi->hpd_gpio)) vc4_hdmi_connector_detect()
197 edid = drm_get_edid(connector, vc4->hdmi->ddc); vc4_hdmi_connector_get_modes()
305 clk_set_rate(vc4->hdmi->pixel_clock, mode->clock * 1000); vc4_hdmi_encoder_mode_set()
439 struct vc4_hdmi *hdmi; vc4_hdmi_bind() local
445 hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL); vc4_hdmi_bind()
446 if (!hdmi) vc4_hdmi_bind()
454 hdmi->encoder = &vc4_hdmi_encoder->base.base; vc4_hdmi_bind()
456 hdmi->pdev = pdev; vc4_hdmi_bind()
457 hdmi->hdmicore_regs = vc4_ioremap_regs(pdev, 0); vc4_hdmi_bind()
458 if (IS_ERR(hdmi->hdmicore_regs)) vc4_hdmi_bind()
459 return PTR_ERR(hdmi->hdmicore_regs); vc4_hdmi_bind()
461 hdmi->hd_regs = vc4_ioremap_regs(pdev, 1); vc4_hdmi_bind()
462 if (IS_ERR(hdmi->hd_regs)) vc4_hdmi_bind()
463 return PTR_ERR(hdmi->hd_regs); vc4_hdmi_bind()
471 hdmi->pixel_clock = devm_clk_get(dev, "pixel"); vc4_hdmi_bind()
472 if (IS_ERR(hdmi->pixel_clock)) { vc4_hdmi_bind()
474 return PTR_ERR(hdmi->pixel_clock); vc4_hdmi_bind()
476 hdmi->hsm_clock = devm_clk_get(dev, "hdmi"); vc4_hdmi_bind()
477 if (IS_ERR(hdmi->hsm_clock)) { vc4_hdmi_bind()
479 return PTR_ERR(hdmi->hsm_clock); vc4_hdmi_bind()
482 hdmi->ddc = of_find_i2c_adapter_by_node(ddc_node); vc4_hdmi_bind()
483 if (!hdmi->ddc) { vc4_hdmi_bind()
492 ret = clk_prepare_enable(hdmi->pixel_clock); vc4_hdmi_bind()
498 ret = clk_prepare_enable(hdmi->hsm_clock); vc4_hdmi_bind()
509 hdmi->hpd_gpio = of_get_named_gpio(dev->of_node, "hpd-gpios", 0); vc4_hdmi_bind()
510 if (hdmi->hpd_gpio < 0) { vc4_hdmi_bind()
511 ret = hdmi->hpd_gpio; vc4_hdmi_bind()
516 vc4->hdmi = hdmi; vc4_hdmi_bind()
521 drm_encoder_init(drm, hdmi->encoder, &vc4_hdmi_encoder_funcs, vc4_hdmi_bind()
523 drm_encoder_helper_add(hdmi->encoder, &vc4_hdmi_encoder_helper_funcs); vc4_hdmi_bind()
525 hdmi->connector = vc4_hdmi_connector_init(drm, hdmi->encoder); vc4_hdmi_bind()
526 if (IS_ERR(hdmi->connector)) { vc4_hdmi_bind()
527 ret = PTR_ERR(hdmi->connector); vc4_hdmi_bind()
534 vc4_hdmi_encoder_destroy(hdmi->encoder); vc4_hdmi_bind()
536 clk_disable_unprepare(hdmi->hsm_clock); vc4_hdmi_bind()
538 clk_disable_unprepare(hdmi->pixel_clock); vc4_hdmi_bind()
540 put_device(&vc4->hdmi->ddc->dev); vc4_hdmi_bind()
550 struct vc4_hdmi *hdmi = vc4->hdmi; vc4_hdmi_unbind() local
552 vc4_hdmi_connector_destroy(hdmi->connector); vc4_hdmi_unbind()
553 vc4_hdmi_encoder_destroy(hdmi->encoder); vc4_hdmi_unbind()
555 clk_disable_unprepare(hdmi->pixel_clock); vc4_hdmi_unbind()
556 clk_disable_unprepare(hdmi->hsm_clock); vc4_hdmi_unbind()
557 put_device(&hdmi->ddc->dev); vc4_hdmi_unbind()
559 vc4->hdmi = NULL; vc4_hdmi_unbind()
579 { .compatible = "brcm,bcm2835-hdmi" },
|
| H A D | vc4_drv.h | 15 struct vc4_hdmi *hdmi; member in struct:vc4_dev
|
| /linux-4.4.14/drivers/gpu/drm/rockchip/ |
| H A D | dw_hdmi-rockchip.c | 144 static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi) rockchip_hdmi_parse_dt() argument
146 struct device_node *np = hdmi->dev->of_node; rockchip_hdmi_parse_dt()
148 hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "rockchip,grf"); rockchip_hdmi_parse_dt()
149 if (IS_ERR(hdmi->regmap)) { rockchip_hdmi_parse_dt()
150 dev_err(hdmi->dev, "Unable to get rockchip,grf\n"); rockchip_hdmi_parse_dt()
151 return PTR_ERR(hdmi->regmap); rockchip_hdmi_parse_dt()
200 struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder); dw_hdmi_rockchip_encoder_commit() local
204 mux = rockchip_drm_encoder_get_mux_id(hdmi->dev->of_node, encoder); dw_hdmi_rockchip_encoder_commit()
210 regmap_write(hdmi->regmap, GRF_SOC_CON6, val); dw_hdmi_rockchip_encoder_commit()
211 dev_dbg(hdmi->dev, "vop %s output to hdmi\n", dw_hdmi_rockchip_encoder_commit()
238 { .compatible = "rockchip,rk3288-dw-hdmi",
253 struct rockchip_hdmi *hdmi; dw_hdmi_rockchip_bind() local
261 hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL); dw_hdmi_rockchip_bind()
262 if (!hdmi) dw_hdmi_rockchip_bind()
267 hdmi->dev = &pdev->dev; dw_hdmi_rockchip_bind()
268 encoder = &hdmi->encoder; dw_hdmi_rockchip_bind()
278 platform_set_drvdata(pdev, hdmi); dw_hdmi_rockchip_bind()
290 ret = rockchip_hdmi_parse_dt(hdmi); dw_hdmi_rockchip_bind()
292 dev_err(hdmi->dev, "Unable to parse OF data\n"); dw_hdmi_rockchip_bind()
|
| /linux-4.4.14/drivers/gpu/drm/imx/ |
| H A D | dw_hdmi-imx.c | 3 * derived from imx-hdmi.c(renamed to bridge/dw_hdmi.c now)
95 static int dw_hdmi_imx_parse_dt(struct imx_hdmi *hdmi) dw_hdmi_imx_parse_dt() argument
97 struct device_node *np = hdmi->dev->of_node; dw_hdmi_imx_parse_dt()
99 hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "gpr"); dw_hdmi_imx_parse_dt()
100 if (IS_ERR(hdmi->regmap)) { dw_hdmi_imx_parse_dt()
101 dev_err(hdmi->dev, "Unable to get gpr\n"); dw_hdmi_imx_parse_dt()
102 return PTR_ERR(hdmi->regmap); dw_hdmi_imx_parse_dt()
127 struct imx_hdmi *hdmi = container_of(encoder, struct imx_hdmi, encoder); dw_hdmi_imx_encoder_commit() local
128 int mux = imx_drm_encoder_get_mux_id(hdmi->dev->of_node, encoder); dw_hdmi_imx_encoder_commit()
130 regmap_update_bits(hdmi->regmap, IOMUXC_GPR3, dw_hdmi_imx_encoder_commit()
193 { .compatible = "fsl,imx6q-hdmi",
196 .compatible = "fsl,imx6dl-hdmi",
211 struct imx_hdmi *hdmi; dw_hdmi_imx_bind() local
219 hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL); dw_hdmi_imx_bind()
220 if (!hdmi) dw_hdmi_imx_bind()
225 hdmi->dev = &pdev->dev; dw_hdmi_imx_bind()
226 encoder = &hdmi->encoder; dw_hdmi_imx_bind()
236 platform_set_drvdata(pdev, hdmi); dw_hdmi_imx_bind()
248 ret = dw_hdmi_imx_parse_dt(hdmi); dw_hdmi_imx_bind()
|
| /linux-4.4.14/include/drm/ |
| H A D | exynos_drm.h | 51 * @hdmi_dev: device point to specific hdmi driver.
54 * this structure is used for common hdmi driver and each device object
55 * would be used to access specific device driver(hdmi or mixer driver)
65 * @is_v13: set if hdmi version 13 is.
66 * @cfg_hpd: function pointer to configure hdmi hotplug detection pin
67 * @get_hpd: function pointer to get value of hdmi hotplug detection pin
|
| H A D | drm_crtc.h | 33 #include <linux/hdmi.h>
147 /* Mask of supported hdmi deep color modes */
|
| /linux-4.4.14/drivers/video/fbdev/omap2/displays-new/ |
| H A D | connector-hdmi.c | 64 r = in->ops.hdmi->connect(in, dssdev); hdmic_connect()
81 in->ops.hdmi->disconnect(in, dssdev); hdmic_disconnect()
98 in->ops.hdmi->set_timings(in, &ddata->timings); hdmic_enable()
100 r = in->ops.hdmi->enable(in); hdmic_enable()
119 in->ops.hdmi->disable(in); hdmic_disable()
133 in->ops.hdmi->set_timings(in, timings); hdmic_set_timings()
150 return in->ops.hdmi->check_timings(in, timings); hdmic_check_timings()
159 return in->ops.hdmi->read_edid(in, edid, len); hdmic_read_edid()
170 return in->ops.hdmi->detect(in); hdmic_detect()
178 return in->ops.hdmi->set_hdmi_mode(in, hdmi_mode); hdmic_set_hdmi_mode()
187 return in->ops.hdmi->set_infoframe(in, avi); hdmic_set_infoframe()
328 { .compatible = "omapdss,hdmi-connector", },
338 .name = "connector-hdmi",
|
| H A D | encoder-tpd12s015.c | 43 r = in->ops.hdmi->connect(in, dssdev); tpd_connect()
73 in->ops.hdmi->disconnect(in, &ddata->dssdev); tpd_disconnect()
85 in->ops.hdmi->set_timings(in, &ddata->timings); tpd_enable()
87 r = in->ops.hdmi->enable(in); tpd_enable()
104 in->ops.hdmi->disable(in); tpd_disable()
118 in->ops.hdmi->set_timings(in, timings); tpd_set_timings()
136 r = in->ops.hdmi->check_timings(in, timings); tpd_check_timings()
154 r = in->ops.hdmi->read_edid(in, edid, len); tpd_read_edid()
175 return in->ops.hdmi->set_infoframe(in, avi); tpd_set_infoframe()
184 return in->ops.hdmi->set_hdmi_mode(in, hdmi_mode); tpd_set_hdmi_mode()
315 dssdev->ops.hdmi = &tpd_hdmi_ops; tpd_probe()
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| /linux-4.4.14/include/drm/bridge/ |
| H A D | dw_hdmi.h | 65 void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate);
66 void dw_hdmi_audio_enable(struct dw_hdmi *hdmi);
67 void dw_hdmi_audio_disable(struct dw_hdmi *hdmi);
|
| /linux-4.4.14/sound/soc/omap/ |
| H A D | Makefile | 6 snd-soc-omap-hdmi-audio-objs := omap-hdmi-audio.o
12 obj-$(CONFIG_SND_OMAP_SOC_HDMI_AUDIO) += snd-soc-omap-hdmi-audio.o
|
| H A D | omap-hdmi-audio.c | 2 * omap-hdmi-audio.c -- OMAP4+ DSS HDMI audio support library
30 #include <sound/omap-hdmi-audio.h>
33 #define DRV_NAME "omap-hdmi-audio"
290 .name = "omap5-hdmi-dai",
304 .name = "omap4-hdmi-dai",
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| /linux-4.4.14/sound/pci/hda/ |
| H A D | Makefile | 26 snd-hda-codec-hdmi-objs := patch_hdmi.o hda_eld.o
43 obj-$(CONFIG_SND_HDA_CODEC_HDMI) += snd-hda-codec-hdmi.o
|
| H A D | hda_intel.h | 43 /* secondary power domain for hdmi audio under vga device */
|
| H A D | hda_auto_parser.c | 716 bool hdmi; snd_hda_get_pin_label() local
735 hdmi = is_hdmi_cfg(def_conf); snd_hda_get_pin_label()
736 name = hdmi ? "HDMI" : "SPDIF"; snd_hda_get_pin_label()
744 if (hdmi == is_hdmi_cfg(c)) snd_hda_get_pin_label()
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| H A D | hda_bind.c | 187 mod = "snd-hda-codec-hdmi"; request_codec_module()
|
| H A D | hda_eld.c | 376 * hdmi-specific routine.
|
| H A D | patch_hdmi.c | 183 struct hdmi_audio_infoframe hdmi; member in union:audio_infoframe
1080 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi; hdmi_pin_setup_infoframe()
2290 codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid); intel_haswell_fixup_connect_list()
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| H A D | hda_intel.c | 1227 /* register as an optimus hdmi audio power domain */ register_vga_switcheroo()
|
| /linux-4.4.14/drivers/gpu/drm/msm/dsi/ |
| H A D | sfpb.xml.h | 19 - /home/robclark/src/freedreno/envytools/rnndb/hdmi/qfprom.xml ( 600 bytes, from 2015-05-20 20:03:07)
20 - /home/robclark/src/freedreno/envytools/rnndb/hdmi/hdmi.xml ( 29154 bytes, from 2015-08-10 21:25:43)
|
| H A D | mmss_cc.xml.h | 19 - /home/robclark/src/freedreno/envytools/rnndb/hdmi/qfprom.xml ( 600 bytes, from 2015-05-20 20:03:07)
20 - /home/robclark/src/freedreno/envytools/rnndb/hdmi/hdmi.xml ( 29154 bytes, from 2015-08-10 21:25:43)
|
| H A D | dsi.xml.h | 19 - /home/robclark/src/freedreno/envytools/rnndb/hdmi/qfprom.xml ( 600 bytes, from 2015-05-20 20:03:07)
20 - /home/robclark/src/freedreno/envytools/rnndb/hdmi/hdmi.xml ( 29154 bytes, from 2015-08-10 21:25:43)
|
| /linux-4.4.14/drivers/gpu/drm/msm/mdp/ |
| H A D | mdp_common.xml.h | 19 - /home/robclark/src/freedreno/envytools/rnndb/hdmi/qfprom.xml ( 600 bytes, from 2015-05-20 20:03:07)
20 - /home/robclark/src/freedreno/envytools/rnndb/hdmi/hdmi.xml ( 29154 bytes, from 2015-08-10 21:25:43)
|
| /linux-4.4.14/drivers/gpu/drm/rcar-du/ |
| H A D | rcar_du_encoder.h | 35 struct rcar_du_hdmienc *hdmi; member in struct:rcar_du_encoder
|
| H A D | rcar_du_hdmienc.c | 32 #define to_rcar_hdmienc(e) (to_rcar_encoder(e)->hdmi)
160 renc->hdmi = hdmienc; rcar_du_hdmienc_init()
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| /linux-4.4.14/include/sound/ |
| H A D | omap-hdmi-audio.h | 2 * hdmi-audio.c -- OMAP4+ DSS HDMI audio support library
|
| /linux-4.4.14/drivers/gpu/drm/radeon/ |
| H A D | r600_hdmi.c | 26 #include <linux/hdmi.h>
112 * update all hdmi interfaces with current audio parameters
475 u32 hdmi = HDMI0_ERROR_ACK; r600_hdmi_enable() local
483 hdmi |= HDMI0_ENABLE; r600_hdmi_enable()
488 hdmi |= HDMI0_STREAM(HDMI0_STREAM_TMDSA); r600_hdmi_enable()
496 hdmi |= HDMI0_STREAM(HDMI0_STREAM_LVTMA); r600_hdmi_enable()
504 hdmi |= HDMI0_STREAM(HDMI0_STREAM_DDIA); r600_hdmi_enable()
511 hdmi |= HDMI0_STREAM(HDMI0_STREAM_DVOA); r600_hdmi_enable()
518 WREG32(HDMI0_CONTROL + dig->afmt->offset, hdmi); r600_hdmi_enable()
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| H A D | evergreen_hdmi.c | 27 #include <linux/hdmi.h>
334 DRM_DEBUG("%s: Disabling hdmi deep color for %d bpc.\n", dce4_hdmi_set_color_depth()
340 DRM_DEBUG("%s: Enabling hdmi deep color 30 for 10 bpc.\n", dce4_hdmi_set_color_depth()
346 DRM_DEBUG("%s: Enabling hdmi deep color 36 for 12 bpc.\n", dce4_hdmi_set_color_depth()
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| H A D | dce3_1_afmt.c | 23 #include <linux/hdmi.h>
|
| H A D | dce6_afmt.c | 23 #include <linux/hdmi.h>
|
| H A D | radeon_connectors.c | 90 * passive dp->(dvi|hdmi) adaptor radeon_connector_hotplug()
180 /* hdmi deep color only implemented on DCE4+ */ radeon_get_monitor_bpc()
190 * 12 bpc is always supported on hdmi deep color sinks, as this is radeon_get_monitor_bpc()
207 DRM_DEBUG("%s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz.\n", radeon_get_monitor_bpc()
229 /* max_tmds_clock missing, but hdmi spec mandates it for deep color. */ radeon_get_monitor_bpc()
1047 * with a shared ddc line (often vga + hdmi) radeon_vga_detect()
1288 * with a shared ddc line (often vga + hdmi) radeon_dvi_detect()
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| H A D | evergreen.c | 4740 DRM_DEBUG("evergreen_irq_set: hdmi 0\n"); evergreen_irq_set()
4744 DRM_DEBUG("evergreen_irq_set: hdmi 1\n"); evergreen_irq_set()
4748 DRM_DEBUG("evergreen_irq_set: hdmi 2\n"); evergreen_irq_set()
4752 DRM_DEBUG("evergreen_irq_set: hdmi 3\n"); evergreen_irq_set()
4756 DRM_DEBUG("evergreen_irq_set: hdmi 4\n"); evergreen_irq_set()
4760 DRM_DEBUG("evergreen_irq_set: hdmi 5\n"); evergreen_irq_set()
5366 case 44: /* hdmi */ evergreen_irq_process()
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| H A D | rv770d.h | 862 # define AFMT_AUDIO_INFO_SOURCE (1 << 6) /* 0 - sound block; 1 - hdmi regs */
|
| H A D | radeon_display.c | 1537 * Allocate hdmi structs and determine register offsets
1766 /* fix up for overscan on hdmi */ radeon_crtc_scaling_mode_fixup()
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| H A D | radeon_mode.h | 548 /* some systems have an hdmi and vga port with a shared ddc line */
|
| H A D | r600.c | 3819 DRM_DEBUG("r600_irq_set: hdmi 0\n"); r600_irq_set()
3823 DRM_DEBUG("r600_irq_set: hdmi 0\n"); r600_irq_set()
4212 case 21: /* hdmi */ r600_irq_process()
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| H A D | atombios_crtc.c | 979 /* Assign mode clock for hdmi deep color max clock limit check */ atombios_crtc_prepare_pll()
|
| H A D | r600d.h | 1068 # define HDMI0_AUDIO_INFO_SOURCE (1 << 6) /* 0 - sound block; 1 - hdmi regs */
|
| /linux-4.4.14/drivers/media/platform/s5p-tv/ |
| H A D | hdmi_drv.c | 42 #include "regs-hdmi.h"
65 struct clk *hdmi; member in struct:hdmi_resources
101 .name = "s5pv210-hdmi",
103 .name = "exynos4-hdmi",
588 /* power-on hdmi physical interface */ hdmi_resource_poweron()
783 res->hdmi = ERR_PTR(-EINVAL); hdmi_resource_clear_clocks()
808 if (!IS_ERR(res->hdmi)) hdmi_resources_cleanup()
809 clk_put(res->hdmi); hdmi_resources_cleanup()
819 "hdmi-en", hdmi_resources_init()
832 res->hdmi = clk_get(dev, "hdmi"); hdmi_resources_init()
833 if (IS_ERR(res->hdmi)) { hdmi_resources_init()
834 dev_err(dev, "failed to get clock 'hdmi'\n"); hdmi_resources_init()
937 "hdmi", hdmi_dev); hdmi_probe()
999 clk_enable(hdmi_dev->res.hdmi); hdmi_probe()
1007 strlcpy(sd->name, "s5p-hdmi", sizeof(sd->name)); hdmi_probe()
1040 clk_disable(hdmi_dev->res.hdmi); hdmi_remove()
1054 .name = "s5p-hdmi",
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| H A D | regs-hdmi.h | 1 /* linux/arch/arm/mach-exynos4/include/mach/regs-hdmi.h
|
| H A D | sii9234_drv.c | 333 ctx->power = devm_regulator_get(dev, "hdmi-en"); sii9234_probe()
335 dev_err(dev, "failed to acquire regulator hdmi-en\n"); sii9234_probe()
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| H A D | mixer_drv.c | 35 .module_name = "s5p-hdmi",
|
| /linux-4.4.14/drivers/gpu/drm/exynos/ |
| H A D | exynos_hdmi.c | 22 #include "regs-hdmi.h"
38 #include <linux/hdmi.h>
119 struct clk *hdmi; member in struct:hdmi_context
984 (hdata->dvi_mode ? "dvi monitor" : "hdmi monitor"), hdmi_get_modes()
1602 clk_prepare_enable(hdata->hdmi); hdmi_enable()
1637 clk_disable_unprepare(hdata->hdmi); hdmi_disable()
1700 hdata->hdmi = devm_clk_get(dev, "hdmi"); hdmi_resources_init()
1701 if (IS_ERR(hdata->hdmi)) { hdmi_resources_init()
1702 DRM_ERROR("failed to get clock 'hdmi'\n"); hdmi_resources_init()
1703 ret = PTR_ERR(hdata->hdmi); hdmi_resources_init()
1743 hdata->reg_hdmi_en = devm_regulator_get_optional(dev, "hdmi-en"); hdmi_resources_init()
1753 DRM_ERROR("failed to enable hdmi-en regulator\n"); hdmi_resources_init()
1763 .compatible = "samsung,exynos4210-hdmi",
1766 .compatible = "samsung,exynos4212-hdmi",
1769 .compatible = "samsung,exynos5420-hdmi",
1908 DRM_ERROR("failed to ioremap hdmi phy\n"); hdmi_probe()
1915 DRM_ERROR("Failed to get hdmi phy i2c client\n"); hdmi_probe()
1926 "hdmi", hdata); hdmi_probe()
1928 DRM_ERROR("failed to register hdmi interrupt\n"); hdmi_probe()
1985 .name = "exynos-hdmi",
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| H A D | exynos_mixer.c | 60 struct clk *hdmi; member in struct:mixer_resources
799 mixer_res->hdmi = devm_clk_get(dev, "hdmi"); mixer_resources_init()
800 if (IS_ERR(mixer_res->hdmi)) { mixer_resources_init()
801 dev_err(dev, "failed to get clock 'hdmi'\n"); mixer_resources_init()
802 return PTR_ERR(mixer_res->hdmi); mixer_resources_init()
1035 ret = clk_prepare_enable(res->hdmi); mixer_enable()
1037 DRM_ERROR("Failed to prepare_enable the hdmi clk [%d]\n", ret); mixer_enable()
1086 clk_disable_unprepare(res->hdmi); mixer_disable()
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| H A D | exynos_drm_fbdev.c | 187 * to any specific driver such as fimd or hdmi driver. exynos_drm_fbdev_create()
|
| H A D | regs-hdmi.h | 3 * Cloned from drivers/media/video/s5p-tv/regs-hdmi.h
|
| /linux-4.4.14/drivers/pinctrl/berlin/ |
| H A D | berlin-bg2q.c | 320 BERLIN_PINCTRL_FUNCTION(0x1, "hdmi")),
323 BERLIN_PINCTRL_FUNCTION(0x1, "hdmi")),
326 BERLIN_PINCTRL_FUNCTION(0x1, "hdmi")),
329 BERLIN_PINCTRL_FUNCTION(0x1, "hdmi")),
332 BERLIN_PINCTRL_FUNCTION(0x1, "hdmi")),
335 BERLIN_PINCTRL_FUNCTION(0x1, "hdmi")),
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| H A D | berlin-bg2.c | 194 BERLIN_PINCTRL_FUNCTION(0x1, "hdmi")),
197 BERLIN_PINCTRL_FUNCTION(0x1, "hdmi")),
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| H A D | berlin-bg4ct.c | 308 BERLIN_PINCTRL_FUNCTION(0x4, "hdmi"), /* FBCLK */
424 BERLIN_PINCTRL_FUNCTION(0x1, "hdmi")), /* HPD */
427 BERLIN_PINCTRL_FUNCTION(0x1, "hdmi")), /* CEC */
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| /linux-4.4.14/drivers/gpu/drm/i2c/ |
| H A D | tda998x_drv.c | 19 #include <linux/hdmi.h>
34 struct i2c_client *hdmi; member in struct:tda998x_priv
396 struct i2c_client *client = priv->hdmi; set_page()
415 struct i2c_client *client = priv->hdmi; reg_read_range()
444 struct i2c_client *client = priv->hdmi; reg_write_range()
478 struct i2c_client *client = priv->hdmi; reg_write()
497 struct i2c_client *client = priv->hdmi; reg_write16()
657 dev_err(&priv->hdmi->dev, tda998x_write_if()
1114 if (priv->hdmi->irq) { read_edid_block()
1119 dev_err(&priv->hdmi->dev, "read edid wait err %d\n", i); read_edid_block()
1134 dev_err(&priv->hdmi->dev, "read edid timeout\n"); read_edid_block()
1140 dev_err(&priv->hdmi->dev, "failed to read edid block %d: %d\n", read_edid_block()
1171 dev_warn(&priv->hdmi->dev, "failed to read EDID\n"); tda998x_connector_get_modes()
1186 if (priv->hdmi->irq) tda998x_encoder_set_polling()
1199 if (priv->hdmi->irq) tda998x_destroy()
1200 free_irq(priv->hdmi->irq, priv); tda998x_destroy()
1222 priv->hdmi = client; tda998x_create()
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| H A D | adv7511.h | 12 #include <linux/hdmi.h>
|
| /linux-4.4.14/drivers/gpu/drm/i915/ |
| H A D | intel_hdmi.c | 32 #include <linux/hdmi.h>
63 return &intel_dig_port->hdmi; enc_to_intel_hdmi()
425 * The hdmi pack() functions don't know about that hardware specific hole so we
501 ret = drm_hdmi_vendor_infoframe_from_display_mode(&frame.vendor.hdmi, intel_hdmi_set_hdmi_infoframe()
515 struct intel_hdmi *intel_hdmi = &intel_dig_port->hdmi; g4x_set_infoframes()
668 struct intel_hdmi *intel_hdmi = &intel_dig_port->hdmi; ibx_set_infoframes()
1153 static int hdmi_port_clock_limit(struct intel_hdmi *hdmi, bool respect_dvi_limit) hdmi_port_clock_limit() argument
1155 struct drm_device *dev = intel_hdmi_to_dev(hdmi); hdmi_port_clock_limit()
1157 if ((respect_dvi_limit && !hdmi->has_hdmi_sink) || IS_G4X(dev)) hdmi_port_clock_limit()
1166 hdmi_port_clock_valid(struct intel_hdmi *hdmi, hdmi_port_clock_valid() argument
1169 struct drm_device *dev = intel_hdmi_to_dev(hdmi); hdmi_port_clock_valid()
1173 if (clock > hdmi_port_clock_limit(hdmi, respect_dvi_limit)) hdmi_port_clock_valid()
1191 struct intel_hdmi *hdmi = intel_attached_hdmi(connector); intel_hdmi_mode_valid() local
1192 struct drm_device *dev = intel_hdmi_to_dev(hdmi); intel_hdmi_mode_valid()
1204 status = hdmi_port_clock_valid(hdmi, clock, true); intel_hdmi_mode_valid()
1208 status = hdmi_port_clock_valid(hdmi, clock * 3 / 2, true); intel_hdmi_mode_valid()
1284 * through, clamp it down. Note that g4x/vlv don't support 12bpc hdmi intel_hdmi_compute_config()
1563 struct intel_hdmi *intel_hdmi = &dport->hdmi; vlv_hdmi_pre_enable()
1829 struct intel_hdmi *intel_hdmi = &dport->hdmi; chv_hdmi_pre_enable()
2026 struct intel_hdmi *intel_hdmi = &intel_dig_port->hdmi; intel_hdmi_init_connector()
2213 intel_dig_port->hdmi.hdmi_reg = hdmi_reg; intel_hdmi_init()
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| H A D | intel_drv.h | 30 #include <linux/hdmi.h>
431 * adjusted dotclock e.g. for DP or 12bpc hdmi mode. This is also
799 struct intel_hdmi hdmi; member in struct:intel_digital_port
923 return container_of(intel_hdmi, struct intel_digital_port, hdmi); hdmi_to_dig_port()
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| H A D | i915_drv.c | 826 * FIXME: This should be solved with a special hdmi sink device or i915_drm_resume_early()
1018 * FIXME: This should be solved with a special hdmi sink device or i915_pm_suspend_late()
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| H A D | intel_bios.c | 987 * dvi/hdmi couldn't exist on the shared port. parse_ddi_port()
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| H A D | intel_ddi.c | 348 return intel_dig_port->hdmi.hdmi_reg; intel_dig_port_supports_hdmi()
3250 intel_dig_port->hdmi.hdmi_reg = DDI_BUF_CTL(port); intel_ddi_init_hdmi_connector()
|
| H A D | i915_irq.c | 634 * -vbs-2---> <---vbs-2---> <---vbs-1---> <---vbs-----> <---vbs+1---> <---vbs+2- (scanline counter hsw+ hdmi)
|
| H A D | intel_display.c | 1571 "IBX PCH hdmi port still using transcoder B\n"); assert_pch_hdmi_disabled()
|
| /linux-4.4.14/drivers/gpu/drm/msm/edp/ |
| H A D | edp.xml.h | 19 - /home/robclark/src/freedreno/envytools/rnndb/hdmi/qfprom.xml ( 600 bytes, from 2015-05-20 20:03:07)
20 - /home/robclark/src/freedreno/envytools/rnndb/hdmi/hdmi.xml ( 29154 bytes, from 2015-08-10 21:25:43)
|
| /linux-4.4.14/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_afmt.c | 26 #include <linux/hdmi.h>
|
| H A D | amdgpu_connectors.c | 70 * passive dp->(dvi|hdmi) adaptor amdgpu_connector_hotplug()
161 * 12 bpc is always supported on hdmi deep color sinks, as this is amdgpu_connector_get_monitor_bpc()
178 DRM_DEBUG("%s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz.\n", amdgpu_connector_get_monitor_bpc()
199 /* max_tmds_clock missing, but hdmi spec mandates it for deep color. */ amdgpu_connector_get_monitor_bpc()
889 * with a shared ddc line (often vga + hdmi) amdgpu_connector_vga_detect()
1010 * with a shared ddc line (often vga + hdmi) amdgpu_connector_dvi_detect()
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| H A D | amdgpu_mode.h | 506 /* some systems have an hdmi and vga port with a shared ddc line */
|
| H A D | dce_v10_0.c | 1752 /* XXX two dtos; generally use dto0 for hdmi */ dce_v10_0_audio_set_dto()
1789 /* hdmi deep color mode general control packets setup, if bpc > 8 */ dce_v10_0_afmt_setmode()
1816 DRM_DEBUG("%s: Disabling hdmi deep color for %d bpc.\n", dce_v10_0_afmt_setmode()
1822 DRM_DEBUG("%s: Enabling hdmi deep color 30 for 10 bpc.\n", dce_v10_0_afmt_setmode()
1828 DRM_DEBUG("%s: Enabling hdmi deep color 36 for 12 bpc.\n", dce_v10_0_afmt_setmode()
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| H A D | dce_v11_0.c | 1740 /* XXX two dtos; generally use dto0 for hdmi */ dce_v11_0_audio_set_dto()
1777 /* hdmi deep color mode general control packets setup, if bpc > 8 */ dce_v11_0_afmt_setmode()
1804 DRM_DEBUG("%s: Disabling hdmi deep color for %d bpc.\n", dce_v11_0_afmt_setmode()
1810 DRM_DEBUG("%s: Enabling hdmi deep color 30 for 10 bpc.\n", dce_v11_0_afmt_setmode()
1816 DRM_DEBUG("%s: Enabling hdmi deep color 36 for 12 bpc.\n", dce_v11_0_afmt_setmode()
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| H A D | dce_v8_0.c | 1710 /* XXX two dtos; generally use dto0 for hdmi */ dce_v8_0_audio_set_dto()
1745 /* hdmi deep color mode general control packets setup, if bpc > 8 */ dce_v8_0_afmt_setmode()
1772 DRM_DEBUG("%s: Disabling hdmi deep color for %d bpc.\n", dce_v8_0_afmt_setmode()
1778 DRM_DEBUG("%s: Enabling hdmi deep color 30 for 10 bpc.\n", dce_v8_0_afmt_setmode()
1784 DRM_DEBUG("%s: Enabling hdmi deep color 36 for 12 bpc.\n", dce_v8_0_afmt_setmode()
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| H A D | atombios_crtc.c | 692 /* Assign mode clock for hdmi deep color max clock limit check */ amdgpu_atombios_crtc_prepare_pll()
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| H A D | amdgpu_display.c | 721 /* fix up for overscan on hdmi */ amdgpu_crtc_scaling_mode_fixup()
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| /linux-4.4.14/drivers/gpu/drm/gma500/ |
| H A D | cdv_intel_hdmi.c | 40 /* hdmi control bits */
46 /* hdmi-b control bits */
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| H A D | oaktrail_hdmi.c | 244 /* scu ipc: assert hdmi controller reset */ oaktrail_hdmi_reset()
250 /* scu ipc: de-assert hdmi controller reset */ oaktrail_hdmi_reset()
702 dev_err(dev->dev, "failed to enable hdmi controller\n"); oaktrail_hdmi_setup()
710 dev_err(dev->dev, "failed to map hdmi mmio\n"); oaktrail_hdmi_setup()
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| /linux-4.4.14/drivers/pinctrl/qcom/ |
| H A D | pinctrl-apq8064.c | 474 FUNCTION(hdmi),
559 PINGROUP(69, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
560 PINGROUP(70, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
561 PINGROUP(71, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
562 PINGROUP(72, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
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| H A D | pinctrl-msm8660.c | 734 FUNCTION(hdmi),
924 PINGROUP(169, hdmi, _, _, _, _, _, _),
925 PINGROUP(170, hdmi, _, _, _, _, _, _),
926 PINGROUP(171, hdmi, _, _, _, _, _, _),
927 PINGROUP(172, hdmi, _, _, _, _, _, _),
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| /linux-4.4.14/drivers/gpu/drm/msm/mdp/mdp5/ |
| H A D | mdp5_kms.c | 282 if (!priv->hdmi) modeset_init_intf()
298 ret = hdmi_modeset_init(priv->hdmi, dev, encoder); modeset_init_intf()
365 /* register our interrupt-controller for hdmi/eDP/dsi/etc modeset_init()
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| H A D | mdp5_irq.c | 140 * interrupt-controller implementation, so sub-blocks (hdmi/eDP/dsi/etc)
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| H A D | mdp5.xml.h | 19 - /home/robclark/src/freedreno/envytools/rnndb/hdmi/qfprom.xml ( 600 bytes, from 2015-05-20 20:03:07)
20 - /home/robclark/src/freedreno/envytools/rnndb/hdmi/hdmi.xml ( 29154 bytes, from 2015-08-10 21:25:43)
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| /linux-4.4.14/drivers/gpu/drm/tilcdc/ |
| H A D | tilcdc_drv.h | 95 * hdmi encoder, various lcd panels), the connector/encoder(s) are split into
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| /linux-4.4.14/drivers/gpu/drm/ |
| H A D | drm_edid.c | 32 #include <linux/hdmi.h>
3078 const u8 *db, *hdmi = NULL, *video = NULL; add_cea_modes() local
3098 hdmi = db; for_each_cea_db()
3108 if (hdmi)
3109 modes += do_hdmi_vsdb_modes(connector, hdmi, hdmi_len, video,
3587 * hdmi deep color modes and update drm_display_info if so.
3600 u8 *edid_ext, *hdmi; drm_assign_hdmi_deep_color_info() local
3621 hdmi = &edid_ext[i]; for_each_cea_db()
3622 if (cea_db_payload_len(hdmi) < 6) for_each_cea_db()
3625 if (hdmi[6] & DRM_EDID_HDMI_DC_30) { for_each_cea_db()
3632 if (hdmi[6] & DRM_EDID_HDMI_DC_36) { for_each_cea_db()
3639 if (hdmi[6] & DRM_EDID_HDMI_DC_48) { for_each_cea_db()
3659 if (hdmi[6] & DRM_EDID_HDMI_DC_Y444) { for_each_cea_db()
3669 if (!(hdmi[6] & DRM_EDID_HDMI_DC_36)) { for_each_cea_db()
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| H A D | drm_crtc_helper.c | 257 * example for changing whether audio is enabled on a hdmi link or for changing
|
| /linux-4.4.14/drivers/video/ |
| H A D | hdmi.c | 28 #include <linux/hdmi.h>
402 return hdmi_vendor_infoframe_pack(&frame->hdmi, buffer, size); hdmi_vendor_any_infoframe_pack()
688 hdmi_log(" hdmi content type: %s\n", hdmi_avi_infoframe_log()
942 struct hdmi_vendor_infoframe *hvf = &frame->hdmi; hdmi_vendor_any_infoframe_log()
1160 struct hdmi_vendor_infoframe *hvf = &frame->hdmi; hdmi_vendor_any_infoframe_unpack()
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| /linux-4.4.14/drivers/ps3/ |
| H A D | ps3av.c | 451 /* hdmi only */ ps3av_set_audio_mode()
769 /* get mode id for hdmi */ ps3av_auto_videomode()
817 pr_debug("av_h_conf: num of hdmi: %u\n", hw_conf->num_of_hdmi); ps3av_get_hw_conf()
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| /linux-4.4.14/drivers/pinctrl/sunxi/ |
| H A D | pinctrl-sun8i-a83t.c | 548 SUNXI_FUNCTION(0x2, "hdmi"), /* HSCL */
553 SUNXI_FUNCTION(0x2, "hdmi"), /* HSDA */
558 SUNXI_FUNCTION(0x2, "hdmi"), /* HCEC */
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| H A D | pinctrl-sun9i-a80.c | 709 SUNXI_FUNCTION(0x2, "hdmi")), /* SCL */
713 SUNXI_FUNCTION(0x2, "hdmi")), /* SDA */
717 SUNXI_FUNCTION(0x2, "hdmi")), /* CEC */
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| H A D | pinctrl-sun4i-a10.c | 1012 SUNXI_FUNCTION(0x4, "hdmi")), /* HSCL */
1018 SUNXI_FUNCTION(0x4, "hdmi")), /* HSDA */
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| H A D | pinctrl-sun7i-a20.c | 1027 SUNXI_FUNCTION(0x4, "hdmi")), /* HSCL */
1033 SUNXI_FUNCTION(0x4, "hdmi")), /* HSDA */
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| /linux-4.4.14/arch/powerpc/include/asm/ |
| H A D | ps3av.h | 387 u16 num_of_hdmi; /* out: number of hdmi */
389 u16 num_of_spdif; /* out: number of hdmi */
703 #define PS3AV_STATUS_UNSUPPORTED_HDMI_MODE 0x0012 /* unsupported hdmi mode */
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| /linux-4.4.14/drivers/platform/x86/ |
| H A D | alienware-wmi.c | 529 pr_debug("alienware-wmi: setting hdmi to %d : %s", args.arg, buf); toggle_hdmi_source()
550 .name = "hdmi",
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| /linux-4.4.14/drivers/gpu/drm/msm/mdp/mdp4/ |
| H A D | mdp4_kms.c | 386 if (priv->hdmi) { modeset_init()
388 ret = hdmi_modeset_init(priv->hdmi, dev, encoder); modeset_init()
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| H A D | mdp4.xml.h | 19 - /home/robclark/src/freedreno/envytools/rnndb/hdmi/qfprom.xml ( 600 bytes, from 2015-05-20 20:03:07)
20 - /home/robclark/src/freedreno/envytools/rnndb/hdmi/hdmi.xml ( 29154 bytes, from 2015-08-10 21:25:43)
|
| /linux-4.4.14/drivers/video/fbdev/mmp/ |
| H A D | core.c | 50 * for HDMI/parallel or dsi to hdmi cases, get from phy
|
| /linux-4.4.14/drivers/gpu/drm/nouveau/ |
| H A D | nouveau_drm.c | 368 /* subfunction one is a hdmi audio device? */ nouveau_get_hdmi_dev()
373 NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1); nouveau_get_hdmi_dev()
378 NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class); nouveau_get_hdmi_dev()
765 /* if we have a hdmi audio device - make sure it has a driver loaded */ nouveau_pmops_runtime_idle()
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| /linux-4.4.14/include/linux/ |
| H A D | hdmi.h | 307 struct hdmi_vendor_infoframe hdmi; member in union:hdmi_vendor_any_infoframe
|
| /linux-4.4.14/drivers/clk/ux500/ |
| H A D | u8540_clk.c | 132 clk_register_clkdev(clk, NULL, "hdmi"); u8540_clk_init()
133 clk_register_clkdev(clk, "hdmi", "mcde"); u8540_clk_init()
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| /linux-4.4.14/drivers/media/i2c/ |
| H A D | adv7511.c | 29 #include <linux/hdmi.h>
1081 ec = 5; /* Not yet available in hdmi.h */ adv7511_set_fmt()
1083 ec = 6; /* Not yet available in hdmi.h */ adv7511_set_fmt()
1218 /* Configure hdmi transmitter. */ adv7511_setup()
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| H A D | ad9389b.c | 870 /* Configure hdmi transmitter. */ ad9389b_setup()
|
| H A D | adv7604.c | 32 #include <linux/hdmi.h>
2938 .name = "hdmi",
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| H A D | adv7842.c | 41 #include <linux/hdmi.h>
3171 state->i2c_hdmi = adv7842_dummy_client(sd, "hdmi", pdata->i2c_hdmi, 0xfb); adv7842_register_clients()
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| H A D | tc358743.c | 39 #include <linux/hdmi.h>
|
| /linux-4.4.14/drivers/clk/ingenic/ |
| H A D | jz4780-cgu.c | 461 "hdmi", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
|
| /linux-4.4.14/drivers/clk/samsung/ |
| H A D | clk-exynos4.c | 510 FRATE(CLK_SCLK_HDMIPHY, "sclk_hdmiphy", "hdmi", 0, 27000000),
882 GATE(CLK_HDMI, "hdmi", "aclk160", GATE_IP_TV, 3, 0, 0),
1007 GATE(CLK_I2C_HDMI, "i2c-hdmi", "aclk100", GATE_IP_PERIL, 14,
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| H A D | clk-exynos5250.c | 583 GATE(CLK_HDMI, "hdmi", "mout_aclk200_disp1_sub", GATE_IP_DISP1, 6, 0,
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| H A D | clk-s5pv210.c | 678 GATE(CLK_HDMI, "hdmi", "dout_hclkd", CLK_GATE_IP1, 11, 0, 0),
|
| H A D | clk-exynos4415.c | 793 GATE(CLK_HDMI, "hdmi", "div_aclk_100", GATE_IP_TV, 3, 0, 0),
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| H A D | clk-exynos5420.c | 1171 GATE(CLK_HDMI, "hdmi", "aclk200_disp1", GATE_IP_DISP1, 6, 0, 0),
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| /linux-4.4.14/arch/arm/mach-omap2/ |
| H A D | omap_hwmod_54xx_data.c | 492 * 'hdmi' class
493 * hdmi controller
507 .name = "hdmi",
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| H A D | omap_hwmod_7xx_data.c | 529 * 'hdmi' class
530 * hdmi controller
544 .name = "hdmi",
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| H A D | omap_hwmod_44xx_data.c | 747 * 'hdmi' class
748 * hdmi controller
762 .name = "hdmi",
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| /linux-4.4.14/drivers/pinctrl/bcm/ |
| H A D | pinctrl-bcm281xx.c | 424 BCM281XX_PIN_DESC(BCM281XX_PIN_HDMI_SCL, "hdmi_scl", hdmi),
425 BCM281XX_PIN_DESC(BCM281XX_PIN_HDMI_SDA, "hdmi_sda", hdmi),
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| /linux-4.4.14/drivers/clk/tegra/ |
| H A D | clk-tegra20.c | 512 { .dev_id = "hdmi", .dt_id = TEGRA20_CLK_HDMI },
787 TEGRA_INIT_DATA_MUX("hdmi", mux_pllpdc_clkm, CLK_SOURCE_HDMI, 51, 0, TEGRA20_CLK_HDMI),
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| H A D | clk-tegra30.c | 729 { .dev_id = "hdmi", .dt_id = TEGRA30_CLK_HDMI },
1126 TEGRA_INIT_DATA_MUX8("hdmi", mux_pllpmdacd2_clkm, CLK_SOURCE_HDMI, 51, 0, TEGRA30_CLK_HDMI),
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| H A D | clk-tegra-periph.c | 484 MUX8("hdmi", mux_pllp_pllm_plld_plla_pllc_plld2_clkm, CLK_SOURCE_HDMI, 51, 0, tegra_clk_hdmi),
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| /linux-4.4.14/sound/soc/sti/ |
| H A D | uniperif_player.c | 851 * If iec958 formatting is required for hdmi or spdif, then it must be uni_player_start()
1015 if (strcasecmp(mode, "hdmi") == 0) uni_player_parse_dt()
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| /linux-4.4.14/drivers/regulator/ |
| H A D | qcom_rpm-regulator.c | 867 { "hdmi-switch", QCOM_RPM_HDMI_SWITCH, &pm8921_switch, "vin_5vs" },
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| /linux-4.4.14/include/video/ |
| H A D | omapdss.h | 753 const struct omapdss_hdmi_ops *hdmi; member in union:omap_dss_device::__anon14708
|
| /linux-4.4.14/drivers/pinctrl/sh-pfc/ |
| H A D | pfc-r8a7740.c | 2811 SH_PFC_PIN_GROUP(hdmi),
3016 "hdmi",
3215 SH_PFC_FUNCTION(hdmi),
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| /linux-4.4.14/drivers/media/pci/cobalt/ |
| H A D | cobalt-v4l2.c | 231 s->input == 0 ? "hdmi" : "generator", cobalt_enable_input()
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| /linux-4.4.14/drivers/pinctrl/meson/ |
| H A D | pinctrl-meson8.c | 891 FUNCTION(hdmi),
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| H A D | pinctrl-meson8b.c | 829 FUNCTION(hdmi),
|
| /linux-4.4.14/sound/soc/mediatek/ |
| H A D | mtk-afe-pcm.c | 961 .name = "mtk-afe-hdmi-dai",
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| /linux-4.4.14/drivers/pinctrl/ |
| H A D | pinctrl-tegra20.c | 1918 FUNCTION(hdmi),
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| H A D | pinctrl-tegra30.c | 2045 FUNCTION(hdmi),
|