Searched refs:R4600_V1_INDEX_ICACHEOP_WAR (Results 1 - 15 of 15) sorted by relevance

/linux-4.1.27/arch/mips/include/asm/mach-cavium-octeon/
H A Dwar.h12 #define R4600_V1_INDEX_ICACHEOP_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-generic/
H A Dwar.h11 #define R4600_V1_INDEX_ICACHEOP_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-ip22/
H A Dwar.h15 #define R4600_V1_INDEX_ICACHEOP_WAR 1 macro
/linux-4.1.27/arch/mips/include/asm/mach-ip27/
H A Dwar.h11 #define R4600_V1_INDEX_ICACHEOP_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-ip28/
H A Dwar.h11 #define R4600_V1_INDEX_ICACHEOP_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-ip32/
H A Dwar.h11 #define R4600_V1_INDEX_ICACHEOP_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-malta/
H A Dwar.h11 #define R4600_V1_INDEX_ICACHEOP_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-pmcs-msp71xx/
H A Dwar.h11 #define R4600_V1_INDEX_ICACHEOP_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-rc32434/
H A Dwar.h11 #define R4600_V1_INDEX_ICACHEOP_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-rm/
H A Dwar.h15 #define R4600_V1_INDEX_ICACHEOP_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-sead3/
H A Dwar.h11 #define R4600_V1_INDEX_ICACHEOP_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-tx49xx/
H A Dwar.h11 #define R4600_V1_INDEX_ICACHEOP_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-sibyte/
H A Dwar.h11 #define R4600_V1_INDEX_ICACHEOP_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/
H A Dwar.h81 #ifndef R4600_V1_INDEX_ICACHEOP_WAR
82 #error Check setting of R4600_V1_INDEX_ICACHEOP_WAR for your platform
/linux-4.1.27/arch/mips/mm/
H A Dc-r4k.c333 if (R4600_V1_INDEX_ICACHEOP_WAR && cpu_is_r4600_v1_x()) r4k_blast_icache_page_indexed_setup()
361 if (R4600_V1_INDEX_ICACHEOP_WAR && cpu_is_r4600_v1_x()) r4k_blast_icache_setup()

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