Searched refs:MIPS4K_ICACHE_REFILL_WAR (Results 1 - 15 of 15) sorted by relevance

/linux-4.1.27/arch/mips/include/asm/mach-cavium-octeon/
H A Dwar.h18 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-generic/
H A Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-ip22/
H A Dwar.h21 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-ip27/
H A Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-ip28/
H A Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-ip32/
H A Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-malta/
H A Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 1 macro
/linux-4.1.27/arch/mips/include/asm/mach-pmcs-msp71xx/
H A Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-rc32434/
H A Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 1 macro
/linux-4.1.27/arch/mips/include/asm/mach-rm/
H A Dwar.h21 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-sead3/
H A Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 1 macro
/linux-4.1.27/arch/mips/include/asm/mach-tx49xx/
H A Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-sibyte/
H A Dwar.h33 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/
H A Dwar.h177 #ifndef MIPS4K_ICACHE_REFILL_WAR
178 #error Check setting of MIPS4K_ICACHE_REFILL_WAR for your platform
/linux-4.1.27/arch/mips/mm/
H A Dc-r4k.c802 if (MIPS4K_ICACHE_REFILL_WAR) { local_r4k_flush_cache_sigtramp()

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