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Searched refs:viafb_write_reg_mask (Results 1 – 6 of 6) sorted by relevance

/linux-4.4.14/drivers/video/fbdev/via/
Ddvi.c59 viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1); in viafb_tmds_trasmitter_identify()
66 viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1); in viafb_tmds_trasmitter_identify()
69 viafb_write_reg_mask(SR1E, VIASR, 0xC0, BIT6 + BIT7); in viafb_tmds_trasmitter_identify()
75 viafb_write_reg_mask(SR1E, VIASR, 0xF0, BIT4 + in viafb_tmds_trasmitter_identify()
80 viafb_write_reg_mask(SR3E, VIASR, 0x0, BIT5); in viafb_tmds_trasmitter_identify()
339 viafb_write_reg_mask(SR1B, VIASR, 0, BIT1); in dvi_patch_skew_dvp0()
340 viafb_write_reg_mask(SR2A, VIASR, 0, BIT4); in dvi_patch_skew_dvp0()
348 viafb_write_reg_mask(CR96, VIACR, 0x03, in dvi_patch_skew_dvp0()
351 viafb_write_reg_mask(CR96, VIACR, 0x07, in dvi_patch_skew_dvp0()
358 viafb_write_reg_mask(CR96, VIACR, 0x07, in dvi_patch_skew_dvp0()
[all …]
Dlcd.c359 viafb_write_reg_mask(CR79, VIACR, 0x07, BIT0 + BIT1 + BIT2); in load_lcd_scaling()
390 viafb_write_reg_mask(CRA2, VIACR, 0xC0, BIT7 + BIT6); in load_lcd_scaling()
402 viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT7); in load_lcd_scaling()
434 viafb_write_reg_mask(CRA2, VIACR, 0x08, BIT3); in load_lcd_scaling()
446 viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT3); in load_lcd_scaling()
533 viafb_write_reg_mask(CR99, VIACR, 0x08, in lcd_patch_skew()
599 viafb_write_reg_mask(CR6A, VIACR, 0x01, BIT0); in viafb_lcd_set_mode()
622 viafb_write_reg_mask(CRD4, VIACR, 0, BIT1); in integrated_lvds_disable()
625 viafb_write_reg_mask(CRD3, VIACR, 0xC0, BIT6 + BIT7); in integrated_lvds_disable()
631 viafb_write_reg_mask(CR6A, VIACR, 0, BIT3); in integrated_lvds_disable()
[all …]
Dvia_utility.c152 viafb_write_reg_mask(SR16, VIASR, 0x80, BIT7); in viafb_set_gamma_table()
162 viafb_write_reg_mask(CR33, VIACR, 0x80, BIT7); in viafb_set_gamma_table()
166 viafb_write_reg_mask(SR1A, VIASR, 0x0, BIT0); in viafb_set_gamma_table()
183 viafb_write_reg_mask(SR1A, VIASR, 0x01, BIT0); in viafb_set_gamma_table()
184 viafb_write_reg_mask(CR6A, VIACR, 0x02, BIT1); in viafb_set_gamma_table()
207 viafb_write_reg_mask(SR16, VIASR, 0x80, BIT7); in viafb_get_gamma_table()
217 viafb_write_reg_mask(CR33, VIACR, 0x80, BIT7); in viafb_get_gamma_table()
221 viafb_write_reg_mask(SR1A, VIASR, 0x0, BIT0); in viafb_get_gamma_table()
Dhw.c481 viafb_write_reg_mask(CR11, VIACR, BIT7, BIT7); in viafb_lock_crt()
486 viafb_write_reg_mask(CR11, VIACR, 0, BIT7); in viafb_unlock_crt()
487 viafb_write_reg_mask(CR47, VIACR, 0, BIT0); in viafb_unlock_crt()
683 viafb_write_reg_mask(0x1A, VIASR, 0x00, 0x01); in viafb_set_primary_color_register()
689 viafb_write_reg_mask(0x1A, VIASR, 0x01, 0x01); in viafb_set_secondary_color_register()
960 viafb_write_reg_mask(CR03, VIACR, 0x80, BIT7); in load_fix_bit_crtc_reg()
962 viafb_write_reg_mask(CR35, VIACR, 0x10, BIT4); in load_fix_bit_crtc_reg()
964 viafb_write_reg_mask(CR33, VIACR, 0x06, BIT0 + BIT1 + BIT2); in load_fix_bit_crtc_reg()
972 viafb_write_reg_mask(CR33, VIACR, 0x08, BIT3); in load_fix_bit_crtc_reg()
975 viafb_write_reg_mask(SR1A, VIASR, 0x02, BIT1); in load_fix_bit_crtc_reg()
[all …]
Dviafbdev.c1164 viafb_write_reg_mask(CR96, VIACR, in viafb_dvp0_proc_write()
1168 viafb_write_reg_mask(SR2A, VIASR, in viafb_dvp0_proc_write()
1170 viafb_write_reg_mask(SR1B, VIASR, in viafb_dvp0_proc_write()
1174 viafb_write_reg_mask(SR2A, VIASR, in viafb_dvp0_proc_write()
1176 viafb_write_reg_mask(SR1E, VIASR, in viafb_dvp0_proc_write()
1233 viafb_write_reg_mask(CR9B, VIACR, in viafb_dvp1_proc_write()
1237 viafb_write_reg_mask(SR65, VIASR, in viafb_dvp1_proc_write()
1241 viafb_write_reg_mask(SR65, VIASR, in viafb_dvp1_proc_write()
1285 viafb_write_reg_mask(CR97, VIACR, reg_val, 0x0f); in viafb_dfph_proc_write()
1320 viafb_write_reg_mask(CR99, VIACR, reg_val, 0x0f); in viafb_dfpl_proc_write()
Dhw.h33 #define viafb_write_reg_mask(i, p, d, m) via_write_reg_mask(p, i, d, m) macro