Home
last modified time | relevance | path

Searched refs:pll8 (Results 1 – 7 of 7) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/i915/
Dintel_ddi.c1752 crtc_state->dpll_hw_state.pll8 = targ_cnt; in bxt_ddi_pll_select()
2866 temp |= pll->config.hw_state.pll8; in bxt_ddi_pll_enable()
2958 hw_state->pll8 = I915_READ(BXT_PORT_PLL(port, 8)); in bxt_ddi_pll_get_hw_state()
2959 hw_state->pll8 &= PORT_PLL_TARGET_CNT_MASK; in bxt_ddi_pll_get_hw_state()
Di915_drv.h387 uint32_t ebb0, ebb4, pll0, pll1, pll2, pll3, pll6, pll8, pll9, pll10, member
Dintel_display.c12073 pipe_config->dpll_hw_state.pll8, in intel_dump_pipe_config()
/linux-4.4.14/drivers/clk/qcom/
Dgcc-msm8960.c62 static struct clk_pll pll8 = { variable
3040 [PLL8] = &pll8.clkr,
3265 [PLL8] = &pll8.clkr,
Dgcc-msm8660.c35 static struct clk_pll pll8 = { variable
2468 [PLL8] = &pll8.clkr,
Dgcc-ipq806x.c89 static struct clk_pll pll8 = { variable
2727 [PLL8] = &pll8.clkr,
/linux-4.4.14/arch/arm/boot/dts/
Dsun7i-a20.dtsi237 pll8: clk@01c20040 { label
242 clock-output-names = "pll8";