Searched refs:pipe_src_w (Results 1 – 7 of 7) sorted by relevance
112 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w && in intel_pch_panel_fitting()118 width = pipe_config->pipe_src_w; in intel_pch_panel_fitting()129 u32 scaled_height = pipe_config->pipe_src_w in intel_pch_panel_fitting()139 height = scaled_width / pipe_config->pipe_src_w; in intel_pch_panel_fitting()232 u32 scaled_height = pipe_config->pipe_src_w * in i965_scale_aspect()242 else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w) in i965_scale_aspect()253 u32 scaled_height = pipe_config->pipe_src_w * in i9xx_scale_aspect()281 pipe_config->pipe_src_w); in i9xx_scale_aspect()284 if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) { in i9xx_scale_aspect()285 bits = panel_fitter_scaling(pipe_config->pipe_src_w, in i9xx_scale_aspect()[all …]
153 crtc_state->base.active ? crtc_state->pipe_src_w : 0; in intel_plane_atomic_check()
399 if (crtc->config->pipe_src_w > 3200 || in intel_psr_enable()
2730 (intel_crtc->config->pipe_src_w - 1)); in i9xx_update_primary_plane()2735 (intel_crtc->config->pipe_src_w - 1)); in i9xx_update_primary_plane()2789 x += (intel_crtc->config->pipe_src_w - 1); in i9xx_update_primary_plane()2796 (intel_crtc->config->pipe_src_w - 1) * pixel_size; in i9xx_update_primary_plane()2891 x += (intel_crtc->config->pipe_src_w - 1); in ironlake_update_primary_plane()2898 (intel_crtc->config->pipe_src_w - 1) * pixel_size; in ironlake_update_primary_plane()3365 old_crtc_state->pipe_src_w, old_crtc_state->pipe_src_h, in intel_update_pipe_config()3366 pipe_config->pipe_src_w, pipe_config->pipe_src_h); in intel_update_pipe_config()3381 ((pipe_config->pipe_src_w - 1) << 16) | in intel_update_pipe_config()4451 state->pipe_src_w, state->pipe_src_h, in skl_update_scaler_crtc()[all …]
705 hdisplay = to_intel_crtc(crtc)->config->pipe_src_w; in g4x_compute_wm0()792 hdisplay = to_intel_crtc(crtc)->config->pipe_src_w; in g4x_compute_srwm()945 width = crtc->config->pipe_src_w; in vlv_compute_wm_level()1431 int hdisplay = to_intel_crtc(crtc)->config->pipe_src_w; in i965_update_wm()1578 int hdisplay = to_intel_crtc(enabled)->config->pipe_src_w; in i9xx_update_wm()1657 pipe_w = pipe_config->pipe_src_w; in ilk_pipe_pixel_rate()3106 p->plane[0].horiz_pixels = intel_crtc->config->pipe_src_w; in skl_compute_wm_pipe_parameters()
356 int pipe_src_w, pipe_src_h; member
2971 pipe_config->pipe_src_w, pipe_config->pipe_src_h); in i915_display_info()