| /linux-4.4.14/sound/pci/au88x0/ |
| D | au88x0_xtalk.c | 260 hwwrite(vortex->mmio, 0x24200 + i * 0x24, coefs[i][0]); in vortex_XtalkHw_SetLeftEQ()
261 hwwrite(vortex->mmio, 0x24204 + i * 0x24, coefs[i][1]); in vortex_XtalkHw_SetLeftEQ()
262 hwwrite(vortex->mmio, 0x24208 + i * 0x24, coefs[i][2]); in vortex_XtalkHw_SetLeftEQ()
263 hwwrite(vortex->mmio, 0x2420c + i * 0x24, coefs[i][3]); in vortex_XtalkHw_SetLeftEQ()
264 hwwrite(vortex->mmio, 0x24210 + i * 0x24, coefs[i][4]); in vortex_XtalkHw_SetLeftEQ()
266 hwwrite(vortex->mmio, 0x24538, arg_0 & 0xffff); in vortex_XtalkHw_SetLeftEQ()
267 hwwrite(vortex->mmio, 0x2453C, arg_4 & 0xffff); in vortex_XtalkHw_SetLeftEQ()
277 hwwrite(vortex->mmio, 0x242b4 + i * 0x24, coefs[i][0]); in vortex_XtalkHw_SetRightEQ()
278 hwwrite(vortex->mmio, 0x242b8 + i * 0x24, coefs[i][1]); in vortex_XtalkHw_SetRightEQ()
279 hwwrite(vortex->mmio, 0x242bc + i * 0x24, coefs[i][2]); in vortex_XtalkHw_SetRightEQ()
[all …]
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| D | au88x0_core.c | 91 hwwrite(vortex->mmio, VORTEX_MIXER_SR, in vortex_mixer_en_sr()
92 hwread(vortex->mmio, VORTEX_MIXER_SR) | (0x1 << channel)); in vortex_mixer_en_sr()
96 hwwrite(vortex->mmio, VORTEX_MIXER_SR, in vortex_mixer_dis_sr()
97 hwread(vortex->mmio, VORTEX_MIXER_SR) & ~(0x1 << channel)); in vortex_mixer_dis_sr()
105 hwwrite(vortex->mmio, VORTEX_MIX_INVOL_A + ((mix << 5) + channel),
107 hwwrite(vortex->mmio, VORTEX_MIX_INVOL_B + ((mix << 5) + channel),
114 a = hwread(vortex->mmio, VORTEX_MIX_VOL_A + (mix << 2)) & 0xff;
126 a = hwread(vortex->mmio,
151 a = hwread(vortex->mmio,
155 hwwrite(vortex->mmio,
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| D | au88x0_mpu401.c | 56 (hwread(vortex->mmio, VORTEX_CTRL) & ~CTRL_MIDI_PORT) | in snd_vortex_midi()
58 hwwrite(vortex->mmio, VORTEX_CTRL, temp); in snd_vortex_midi()
62 (hwread(vortex->mmio, VORTEX_CTRL) & ~CTRL_MIDI_PORT) & in snd_vortex_midi()
64 hwwrite(vortex->mmio, VORTEX_CTRL, temp); in snd_vortex_midi()
68 temp = hwread(vortex->mmio, VORTEX_CTRL2) & 0xffff00cf; in snd_vortex_midi()
70 hwwrite(vortex->mmio, VORTEX_CTRL2, temp); in snd_vortex_midi()
71 hwwrite(vortex->mmio, VORTEX_MIDI_CMD, MPU401_RESET); in snd_vortex_midi()
74 temp = hwread(vortex->mmio, VORTEX_MIDI_DATA); in snd_vortex_midi()
80 hwwrite(vortex->mmio, VORTEX_IRQ_CTRL, in snd_vortex_midi()
81 hwread(vortex->mmio, VORTEX_IRQ_CTRL) | IRQ_MIDI); in snd_vortex_midi()
[all …]
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| D | au88x0_synth.c | 45 temp = hwread(vortex->mmio, WT_STEREO(wt)); in vortex_wt_setstereo()
48 hwwrite(vortex->mmio, WT_STEREO(wt), temp); in vortex_wt_setstereo()
57 temp = hwread(vortex->mmio, WT_DSREG((wt >= 0x20) ? 1 : 0)); in vortex_wt_setdsout()
62 hwwrite(vortex->mmio, WT_DSREG((wt >= 0x20) ? 1 : 0), temp); in vortex_wt_setdsout()
82 hwwrite(vortex->mmio, WT_SRAMP(0), 0x880000); in vortex_wt_allocroute()
85 hwwrite(vortex->mmio, WT_SRAMP(1), 0x880000); in vortex_wt_allocroute()
88 hwwrite(vortex->mmio, WT_PARM(wt, 0), 0); in vortex_wt_allocroute()
89 hwwrite(vortex->mmio, WT_PARM(wt, 1), 0); in vortex_wt_allocroute()
90 hwwrite(vortex->mmio, WT_PARM(wt, 2), 0); in vortex_wt_allocroute()
92 temp = hwread(vortex->mmio, WT_PARM(wt, 3)); in vortex_wt_allocroute()
[all …]
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| D | au88x0_eq.c | 53 hwwrite(vortex->mmio, 0x2b3c4, gain); in vortex_EqHw_SetTimeConsts()
54 hwwrite(vortex->mmio, 0x2b3c8, level); in vortex_EqHw_SetTimeConsts()
72 hwwrite(vortex->mmio, 0x2b000 + n * 0x30, coefs[i + 0]); in vortex_EqHw_SetLeftCoefs()
73 hwwrite(vortex->mmio, 0x2b004 + n * 0x30, coefs[i + 1]); in vortex_EqHw_SetLeftCoefs()
76 hwwrite(vortex->mmio, 0x2b008 + n * 0x30, coefs[i + 2]); in vortex_EqHw_SetLeftCoefs()
77 hwwrite(vortex->mmio, 0x2b00c + n * 0x30, coefs[i + 3]); in vortex_EqHw_SetLeftCoefs()
78 hwwrite(vortex->mmio, 0x2b010 + n * 0x30, coefs[i + 4]); in vortex_EqHw_SetLeftCoefs()
80 hwwrite(vortex->mmio, 0x2b008 + n * 0x30, sign_invert(coefs[2 + i])); in vortex_EqHw_SetLeftCoefs()
81 hwwrite(vortex->mmio, 0x2b00c + n * 0x30, sign_invert(coefs[3 + i])); in vortex_EqHw_SetLeftCoefs()
82 hwwrite(vortex->mmio, 0x2b010 + n * 0x30, sign_invert(coefs[4 + i])); in vortex_EqHw_SetLeftCoefs()
[all …]
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| D | au88x0_a3d.c | 37 hwwrite(vortex->mmio, in a3dsrc_SetTimeConsts()
39 hwwrite(vortex->mmio, in a3dsrc_SetTimeConsts()
41 hwwrite(vortex->mmio, in a3dsrc_SetTimeConsts()
43 hwwrite(vortex->mmio, in a3dsrc_SetTimeConsts()
63 hwwrite(vortex->mmio, in a3dsrc_SetAtmosTarget()
66 hwwrite(vortex->mmio, in a3dsrc_SetAtmosTarget()
69 hwwrite(vortex->mmio, in a3dsrc_SetAtmosTarget()
78 hwwrite(vortex->mmio, in a3dsrc_SetAtmosCurrent()
81 hwwrite(vortex->mmio, in a3dsrc_SetAtmosCurrent()
84 hwwrite(vortex->mmio, in a3dsrc_SetAtmosCurrent()
[all …]
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| D | au88x0_game.c | 46 return hwread(vortex->mmio, VORTEX_GAME_LEGACY); in vortex_game_read()
52 hwwrite(vortex->mmio, VORTEX_GAME_LEGACY, 0xff); in vortex_game_trigger()
61 *buttons = (~hwread(vortex->mmio, VORTEX_GAME_LEGACY) >> 4) & 0xf; in vortex_game_cooked_read()
65 hwread(vortex->mmio, VORTEX_GAME_AXIS + (i * AXIS_SIZE)); in vortex_game_cooked_read()
78 hwwrite(vortex->mmio, VORTEX_CTRL2, in vortex_game_open()
79 hwread(vortex->mmio, in vortex_game_open()
84 hwwrite(vortex->mmio, VORTEX_CTRL2, in vortex_game_open()
85 hwread(vortex->mmio, in vortex_game_open()
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| D | au88x0.c | 129 iounmap(vortex->mmio); in snd_vortex_dev_free()
182 chip->mmio = pci_ioremap_bar(pci, 0); in snd_vortex_create()
183 if (!chip->mmio) { in snd_vortex_create()
222 iounmap(chip->mmio); in snd_vortex_create()
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| /linux-4.4.14/sound/soc/nuc900/ |
| D | nuc900-ac97.c | 37 if (!(AUDIO_READ(nuc900_audio->mmio + ACTL_ACIS0) & CODEC_READY)) in nuc900_checkready()
59 AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS1, R_WB | reg); in nuc900_ac97_read()
62 val = AUDIO_READ(nuc900_audio->mmio + ACTL_ACOS0); in nuc900_ac97_read()
64 AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS0, val); in nuc900_ac97_read()
69 while (!(AUDIO_READ(nuc900_audio->mmio + ACTL_ACCON) & AC_R_FINISH) in nuc900_ac97_read()
79 val = AUDIO_READ(nuc900_audio->mmio + ACTL_ACOS0) ; in nuc900_ac97_read()
81 AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS0, val); in nuc900_ac97_read()
83 if (AUDIO_READ(nuc900_audio->mmio + ACTL_ACIS1) >> 2 != reg) { in nuc900_ac97_read()
89 val = (AUDIO_READ(nuc900_audio->mmio + ACTL_ACIS2) & 0xFFFF); in nuc900_ac97_read()
110 AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS1, reg); in nuc900_ac97_write()
[all …]
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| D | nuc900-pcm.c | 55 mmio_addr = nuc900_audio->mmio + ACTL_PDSTB; in nuc900_update_dma_register()
56 mmio_len = nuc900_audio->mmio + ACTL_PDST_LENGTH; in nuc900_update_dma_register()
58 mmio_addr = nuc900_audio->mmio + ACTL_RDSTB; in nuc900_update_dma_register()
59 mmio_len = nuc900_audio->mmio + ACTL_RDST_LENGTH; in nuc900_update_dma_register()
72 val = AUDIO_READ(nuc900_audio->mmio + ACTL_CON); in nuc900_dma_start()
74 AUDIO_WRITE(nuc900_audio->mmio + ACTL_CON, val); in nuc900_dma_start()
83 val = AUDIO_READ(nuc900_audio->mmio + ACTL_CON); in nuc900_dma_stop()
85 AUDIO_WRITE(nuc900_audio->mmio + ACTL_CON, val); in nuc900_dma_stop()
96 val = AUDIO_READ(nuc900_audio->mmio + ACTL_CON); in nuc900_dma_interrupt()
99 AUDIO_WRITE(nuc900_audio->mmio + ACTL_CON, val | R_DMA_IRQ); in nuc900_dma_interrupt()
[all …]
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| D | nuc900-audio.h | 101 void __iomem *mmio; member
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| /linux-4.4.14/drivers/video/fbdev/i810/ |
| D | i810_main.c | 167 static void i810_screen_off(u8 __iomem *mmio, u8 mode) in i810_screen_off() argument
172 i810_writeb(SR_INDEX, mmio, SR01); in i810_screen_off()
173 val = i810_readb(SR_DATA, mmio); in i810_screen_off()
177 while((i810_readw(DISP_SL, mmio) & 0xFFF) && count--); in i810_screen_off()
178 i810_writeb(SR_INDEX, mmio, SR01); in i810_screen_off()
179 i810_writeb(SR_DATA, mmio, val); in i810_screen_off()
191 static void i810_dram_off(u8 __iomem *mmio, u8 mode) in i810_dram_off() argument
195 val = i810_readb(DRAMCH, mmio); in i810_dram_off()
198 i810_writeb(DRAMCH, mmio, val); in i810_dram_off()
210 static void i810_protect_regs(u8 __iomem *mmio, int mode) in i810_protect_regs() argument
[all …]
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| D | i810-i2c.c | 46 u8 __iomem *mmio = par->mmio_start_virtual; in i810i2c_setscl() local
49 i810_writel(mmio, chan->ddc_base, SCL_DIR_MASK | SCL_VAL_MASK); in i810i2c_setscl()
51 i810_writel(mmio, chan->ddc_base, SCL_DIR | SCL_DIR_MASK | SCL_VAL_MASK); in i810i2c_setscl()
52 i810_readl(mmio, chan->ddc_base); /* flush posted write */ in i810i2c_setscl()
59 u8 __iomem *mmio = par->mmio_start_virtual; in i810i2c_setsda() local
62 i810_writel(mmio, chan->ddc_base, SDA_DIR_MASK | SDA_VAL_MASK); in i810i2c_setsda()
64 i810_writel(mmio, chan->ddc_base, SDA_DIR | SDA_DIR_MASK | SDA_VAL_MASK); in i810i2c_setsda()
65 i810_readl(mmio, chan->ddc_base); /* flush posted write */ in i810i2c_setsda()
72 u8 __iomem *mmio = par->mmio_start_virtual; in i810i2c_getscl() local
74 i810_writel(mmio, chan->ddc_base, SCL_DIR_MASK); in i810i2c_getscl()
[all …]
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| D | i810_accel.c | 36 static inline void i810_report_error(u8 __iomem *mmio) in i810_report_error() argument
43 i810_readw(IIR, mmio), in i810_report_error()
44 i810_readb(EIR, mmio), in i810_report_error()
45 i810_readl(PGTBL_ER, mmio), in i810_report_error()
46 i810_readl(IPEIR, mmio), in i810_report_error()
47 i810_readl(IPEHR, mmio)); in i810_report_error()
63 u8 __iomem *mmio = par->mmio_start_virtual; in wait_for_space() local
67 head = i810_readl(IRING + 4, mmio) & RBUFFER_HEAD_MASK; in wait_for_space()
76 i810_report_error(mmio); in wait_for_space()
93 u8 __iomem *mmio = par->mmio_start_virtual; in wait_for_engine_idle() local
[all …]
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| D | i810.h | 291 #define i810_readb(where, mmio) readb(mmio + where) argument
292 #define i810_readw(where, mmio) readw(mmio + where) argument
293 #define i810_readl(where, mmio) readl(mmio + where) argument
294 #define i810_writeb(where, mmio, val) writeb(val, mmio + where) argument
295 #define i810_writew(where, mmio, val) writew(val, mmio + where) argument
296 #define i810_writel(where, mmio, val) writel(val, mmio + where) argument
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| D | i810_gtf.c | 128 u8 __iomem *mmio = par->mmio_start_virtual; in i810fb_encode_registers() local
168 par->regs.cr11 = i810_readb(CR11, mmio) & ~0x0F; in i810fb_encode_registers()
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| /linux-4.4.14/drivers/net/ethernet/amd/ |
| D | amd8111e.c | 115 void __iomem *mmio = lp->mmio; in amd8111e_read_phy() local
119 reg_val = readl(mmio + PHY_ACCESS); in amd8111e_read_phy()
121 reg_val = readl( mmio + PHY_ACCESS ); in amd8111e_read_phy()
124 ((reg & 0x1f) << 16), mmio +PHY_ACCESS); in amd8111e_read_phy()
126 reg_val = readl(mmio + PHY_ACCESS); in amd8111e_read_phy()
145 void __iomem *mmio = lp->mmio; in amd8111e_write_phy() local
148 reg_val = readl(mmio + PHY_ACCESS); in amd8111e_write_phy()
150 reg_val = readl( mmio + PHY_ACCESS ); in amd8111e_write_phy()
153 ((reg & 0x1f) << 16)|val, mmio + PHY_ACCESS); in amd8111e_write_phy()
156 reg_val = readl(mmio + PHY_ACCESS); in amd8111e_write_phy()
[all …]
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| /linux-4.4.14/drivers/staging/comedi/drivers/ |
| D | ni_pcidio.c | 314 dev->mmio + DMA_Line_Control_Group1); in ni_pcidio_request_di_mite_channel()
333 dev->mmio + DMA_Line_Control_Group1); in ni_pcidio_release_di_mite_channel()
402 status = readb(dev->mmio + Interrupt_And_Window_Status); in nidio_interrupt()
403 flags = readb(dev->mmio + Group_1_Flags); in nidio_interrupt()
432 dev->mmio + Master_DMA_And_Interrupt_Control); in nidio_interrupt()
444 writeb(0x00, dev->mmio + in nidio_interrupt()
449 auxdata = readl(dev->mmio + Group_1_FIFO); in nidio_interrupt()
451 flags = readb(dev->mmio + Group_1_Flags); in nidio_interrupt()
456 writeb(ClearExpired, dev->mmio + Group_1_Second_Clear); in nidio_interrupt()
459 writeb(0x00, dev->mmio + OpMode); in nidio_interrupt()
[all …]
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| D | rtd520.c | 474 writel(0, dev->mmio + LAS0_CGT_CLEAR); in rtd_load_channelgain_list()
475 writel(1, dev->mmio + LAS0_CGT_ENABLE); in rtd_load_channelgain_list()
478 dev->mmio + LAS0_CGT_WRITE); in rtd_load_channelgain_list()
481 writel(0, dev->mmio + LAS0_CGT_ENABLE); in rtd_load_channelgain_list()
483 dev->mmio + LAS0_CGL_WRITE); in rtd_load_channelgain_list()
498 writel(0, dev->mmio + LAS0_ADC_FIFO_CLEAR); in rtd520_probe_fifo_depth()
501 writel(0, dev->mmio + LAS0_ADC_CONVERSION); in rtd520_probe_fifo_depth()
506 writew(0, dev->mmio + LAS0_ADC); in rtd520_probe_fifo_depth()
508 fifo_status = readl(dev->mmio + LAS0_ADC); in rtd520_probe_fifo_depth()
518 writel(0, dev->mmio + LAS0_ADC_FIFO_CLEAR); in rtd520_probe_fifo_depth()
[all …]
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| D | ni_6527.c | 99 writeb(val & 0xff, dev->mmio + NI6527_FILT_INTERVAL_REG(0)); in ni6527_set_filter_interval()
101 dev->mmio + NI6527_FILT_INTERVAL_REG(1)); in ni6527_set_filter_interval()
103 dev->mmio + NI6527_FILT_INTERVAL_REG(2)); in ni6527_set_filter_interval()
105 writeb(NI6527_CLR_INTERVAL, dev->mmio + NI6527_CLR_REG); in ni6527_set_filter_interval()
114 writeb(val & 0xff, dev->mmio + NI6527_FILT_ENA_REG(0)); in ni6527_set_filter_enable()
115 writeb((val >> 8) & 0xff, dev->mmio + NI6527_FILT_ENA_REG(1)); in ni6527_set_filter_enable()
116 writeb((val >> 16) & 0xff, dev->mmio + NI6527_FILT_ENA_REG(2)); in ni6527_set_filter_enable()
160 val = readb(dev->mmio + NI6527_DI_REG(0)); in ni6527_di_insn_bits()
161 val |= (readb(dev->mmio + NI6527_DI_REG(1)) << 8); in ni6527_di_insn_bits()
162 val |= (readb(dev->mmio + NI6527_DI_REG(2)) << 16); in ni6527_di_insn_bits()
[all …]
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| D | me_daq.c | 186 writew(devpriv->ctrl2, dev->mmio + ME_CTRL2_REG); in me_dio_insn_config()
196 void __iomem *mmio_porta = dev->mmio + ME_DIO_PORT_A_REG; in me_dio_insn_bits()
197 void __iomem *mmio_portb = dev->mmio + ME_DIO_PORT_B_REG; in me_dio_insn_bits()
231 status = readw(dev->mmio + ME_STATUS_REG); in me_ai_eoc()
261 writew(devpriv->ctrl2, dev->mmio + ME_CTRL2_REG); in me_ai_insn_read()
263 writew(0x00, dev->mmio + ME_STATUS_REG); /* clear interrupts */ in me_ai_insn_read()
267 writew(devpriv->ctrl2, dev->mmio + ME_CTRL2_REG); in me_ai_insn_read()
275 writew(val, dev->mmio + ME_AI_FIFO_REG); in me_ai_insn_read()
279 writew(devpriv->ctrl1, dev->mmio + ME_CTRL1_REG); in me_ai_insn_read()
283 readw(dev->mmio + ME_CTRL1_REG); in me_ai_insn_read()
[all …]
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| D | dt3000.c | 241 writew(cmd, dev->mmio + DPR_CMD_MBX); in dt3k_send_cmd()
244 status = readw(dev->mmio + DPR_CMD_MBX); in dt3k_send_cmd()
260 writew(subsys, dev->mmio + DPR_SUBSYS); in dt3k_readsingle()
262 writew(chan, dev->mmio + DPR_PARAMS(0)); in dt3k_readsingle()
263 writew(gain, dev->mmio + DPR_PARAMS(1)); in dt3k_readsingle()
267 return readw(dev->mmio + DPR_PARAMS(2)); in dt3k_readsingle()
273 writew(subsys, dev->mmio + DPR_SUBSYS); in dt3k_writesingle()
275 writew(chan, dev->mmio + DPR_PARAMS(0)); in dt3k_writesingle()
276 writew(0, dev->mmio + DPR_PARAMS(1)); in dt3k_writesingle()
277 writew(data, dev->mmio + DPR_PARAMS(2)); in dt3k_writesingle()
[all …]
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| D | daqboard2000.c | 282 writew(entry & 0x00ff, dev->mmio + acqScanListFIFO); in writeAcqScanListEntry()
284 writew((entry >> 8) & 0x00ff, dev->mmio + acqScanListFIFO); in writeAcqScanListEntry()
338 status = readw(dev->mmio + acqControl); in daqboard2000_ai_status()
355 DAQBOARD2000_AcqResetConfigPipe, dev->mmio + acqControl); in daqboard2000_ai_insn_read()
362 writel(1000000, dev->mmio + acqPacerClockDivLow); in daqboard2000_ai_insn_read()
363 writew(0, dev->mmio + acqPacerClockDivHigh); in daqboard2000_ai_insn_read()
375 writew(DAQBOARD2000_SeqStartScanList, dev->mmio + acqControl); in daqboard2000_ai_insn_read()
382 writew(DAQBOARD2000_AdcPacerEnable, dev->mmio + acqControl); in daqboard2000_ai_insn_read()
394 data[i] = readw(dev->mmio + acqResultsFIFO); in daqboard2000_ai_insn_read()
395 writew(DAQBOARD2000_AdcPacerDisable, dev->mmio + acqControl); in daqboard2000_ai_insn_read()
[all …]
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| D | icp_multi.c | 104 status = readw(dev->mmio + ICP_MULTI_ADC_CSR); in icp_multi_ai_eoc()
130 writew(adc_csr, dev->mmio + ICP_MULTI_ADC_CSR); in icp_multi_ai_insn_read()
135 dev->mmio + ICP_MULTI_ADC_CSR); in icp_multi_ai_insn_read()
144 data[n] = (readw(dev->mmio + ICP_MULTI_AI) >> 4) & 0x0fff; in icp_multi_ai_insn_read()
157 status = readw(dev->mmio + ICP_MULTI_DAC_CSR); in icp_multi_ao_ready()
176 writew(dac_csr, dev->mmio + ICP_MULTI_DAC_CSR); in icp_multi_ao_insn_write()
187 writew(val, dev->mmio + ICP_MULTI_AO); in icp_multi_ao_insn_write()
191 dev->mmio + ICP_MULTI_DAC_CSR); in icp_multi_ao_insn_write()
204 data[1] = readw(dev->mmio + ICP_MULTI_DI); in icp_multi_di_insn_bits()
215 writew(s->state, dev->mmio + ICP_MULTI_DO); in icp_multi_do_insn_bits()
[all …]
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| D | ni_65xx.c | 292 writeb(0x00, dev->mmio + NI_65XX_FILTER_ENA(i)); in ni_65xx_disable_input_filters()
295 writel(0x00000000, dev->mmio + NI_65XX_FILTER_REG); in ni_65xx_disable_input_filters()
329 readb(dev->mmio + in ni_65xx_update_edge_detection()
333 readb(dev->mmio + in ni_65xx_update_edge_detection()
338 dev->mmio + NI_65XX_RISE_EDGE_ENA_REG(port)); in ni_65xx_update_edge_detection()
340 dev->mmio + NI_65XX_FALL_EDGE_ENA_REG(port)); in ni_65xx_update_edge_detection()
384 val = readb(dev->mmio + NI_65XX_FILTER_ENA(port)); in ni_65xx_dio_insn_config()
386 writel(interval, dev->mmio + NI_65XX_FILTER_REG); in ni_65xx_dio_insn_config()
391 writeb(val, dev->mmio + NI_65XX_FILTER_ENA(port)); in ni_65xx_dio_insn_config()
398 dev->mmio + NI_65XX_IO_SEL_REG(port)); in ni_65xx_dio_insn_config()
[all …]
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| D | s626.c | 113 writel(val, dev->mmio + reg); in s626_mc_enable()
119 writel(cmd << 16, dev->mmio + reg); in s626_mc_disable()
128 val = readl(dev->mmio + reg); in s626_mc_test()
171 if (!(readl(dev->mmio + S626_P_PSR) & S626_PSR_DEBI_S)) in s626_debi_transfer()
185 writel(S626_DEBI_CMD_RDWORD | addr, dev->mmio + S626_P_DEBICMD); in s626_debi_read()
190 return readl(dev->mmio + S626_P_DEBIAD); in s626_debi_read()
200 writel(S626_DEBI_CMD_WRWORD | addr, dev->mmio + S626_P_DEBICMD); in s626_debi_write()
201 writel(wdata, dev->mmio + S626_P_DEBIAD); in s626_debi_write()
218 writel(S626_DEBI_CMD_RDWORD | addr, dev->mmio + S626_P_DEBICMD); in s626_debi_replace()
221 writel(S626_DEBI_CMD_WRWORD | addr, dev->mmio + S626_P_DEBICMD); in s626_debi_replace()
[all …]
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| D | comedi_8254.c | 141 if (i8254->mmio) in __i8254_read()
142 val = readb(i8254->mmio + reg_offset); in __i8254_read()
147 if (i8254->mmio) in __i8254_read()
148 val = readw(i8254->mmio + reg_offset); in __i8254_read()
153 if (i8254->mmio) in __i8254_read()
154 val = readl(i8254->mmio + reg_offset); in __i8254_read()
170 if (i8254->mmio) in __i8254_write()
171 writeb(val, i8254->mmio + reg_offset); in __i8254_write()
176 if (i8254->mmio) in __i8254_write()
177 writew(val, i8254->mmio + reg_offset); in __i8254_write()
[all …]
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| D | ii_pci20kc.c | 139 return dev->mmio + (s->index + 1) * II20K_MOD_OFFSET; in ii20k_module_iobase()
311 writeb(ctrl01, dev->mmio + II20K_CTRL01_REG); in ii20k_dio_config()
312 writeb(ctrl23, dev->mmio + II20K_CTRL23_REG); in ii20k_dio_config()
313 writeb(dir_ena, dev->mmio + II20K_DIR_ENA_REG); in ii20k_dio_config()
354 dev->mmio + II20K_DIO0_REG); in ii20k_dio_insn_bits()
357 dev->mmio + II20K_DIO1_REG); in ii20k_dio_insn_bits()
360 dev->mmio + II20K_DIO2_REG); in ii20k_dio_insn_bits()
363 dev->mmio + II20K_DIO3_REG); in ii20k_dio_insn_bits()
366 data[1] = readb(dev->mmio + II20K_DIO0_REG); in ii20k_dio_insn_bits()
367 data[1] |= readb(dev->mmio + II20K_DIO1_REG) << 8; in ii20k_dio_insn_bits()
[all …]
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| D | addi_apci_3xxx.c | 365 status = readl(dev->mmio + 16); in apci3xxx_irq_handler()
368 writel(status, dev->mmio + 16); in apci3xxx_irq_handler()
370 val = readl(dev->mmio + 28); in apci3xxx_irq_handler()
383 if ((readl(dev->mmio + 8) & 0x80000) == 0x80000) in apci3xxx_ai_started()
401 writel(0x10000, dev->mmio + 12); in apci3xxx_ai_setup()
404 delay_mode = readl(dev->mmio + 4); in apci3xxx_ai_setup()
408 writel(delay_mode, dev->mmio + 4); in apci3xxx_ai_setup()
413 writel(val, dev->mmio + 0); in apci3xxx_ai_setup()
416 writel(delay_mode | 0x100, dev->mmio + 4); in apci3xxx_ai_setup()
417 writel(chan, dev->mmio + 0); in apci3xxx_ai_setup()
[all …]
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| D | ni_670x.c | 110 dev->mmio + AO_CHAN_OFFSET); in ni_670x_ao_insn_write()
112 writel(val, dev->mmio + AO_VALUE_OFFSET); in ni_670x_ao_insn_write()
125 writel(s->state, dev->mmio + DIO_PORT0_DATA_OFFSET); in ni_670x_dio_insn_bits()
127 data[1] = readl(dev->mmio + DIO_PORT0_DATA_OFFSET); in ni_670x_dio_insn_bits()
143 writel(s->io_bits, dev->mmio + DIO_PORT0_DIR_OFFSET); in ni_670x_dio_insn_config()
200 dev->mmio = pci_ioremap_bar(pcidev, 1); in ni_670x_auto_attach()
201 if (!dev->mmio) in ni_670x_auto_attach()
246 writel(0x10, dev->mmio + MISC_CONTROL_OFFSET); in ni_670x_auto_attach()
248 writel(0x00, dev->mmio + AO_CONTROL_OFFSET); in ni_670x_auto_attach()
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| D | gsc_hpdi.c | 208 hpdi_intr_status = readl(dev->mmio + INTERRUPT_STATUS_REG); in gsc_hpdi_interrupt()
209 hpdi_board_status = readl(dev->mmio + BOARD_STATUS_REG); in gsc_hpdi_interrupt()
212 writel(hpdi_intr_status, dev->mmio + INTERRUPT_STATUS_REG); in gsc_hpdi_interrupt()
278 writel(0, dev->mmio + BOARD_CONTROL_REG); in gsc_hpdi_cancel()
279 writel(0, dev->mmio + INTERRUPT_CONTROL_REG); in gsc_hpdi_cancel()
298 writel(RX_FIFO_RESET_BIT, dev->mmio + BOARD_CONTROL_REG); in gsc_hpdi_cmd()
331 writel(RX_UNDERRUN_BIT | RX_OVERRUN_BIT, dev->mmio + BOARD_STATUS_REG); in gsc_hpdi_cmd()
334 writel(RX_FULL_INTR, dev->mmio + INTERRUPT_CONTROL_REG); in gsc_hpdi_cmd()
336 writel(RX_ENABLE_BIT, dev->mmio + BOARD_CONTROL_REG); in gsc_hpdi_cmd()
522 writel(BOARD_RESET_BIT, dev->mmio + BOARD_CONTROL_REG); in gsc_hpdi_init()
[all …]
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| D | mf6x4.c | 98 data[1] = ioread16(dev->mmio + MF6X4_DIN_REG) & MF6X4_DIN_MASK; in mf6x4_di_insn_bits()
109 iowrite16(s->state, dev->mmio + MF6X4_DOUT_REG); in mf6x4_do_insn_bits()
141 iowrite16(MF6X4_ADCTRL_CHAN(chan), dev->mmio + MF6X4_ADCTRL_REG); in mf6x4_ai_insn_read()
145 ioread16(dev->mmio + MF6X4_ADSTART_REG); in mf6x4_ai_insn_read()
152 d = ioread16(dev->mmio + MF6X4_ADDATA_REG); in mf6x4_ai_insn_read()
158 iowrite16(0x0, dev->mmio + MF6X4_ADCTRL_REG); in mf6x4_ai_insn_read()
181 iowrite16(val, dev->mmio + MF6X4_DAC_REG(chan)); in mf6x4_ao_insn_write()
216 dev->mmio = pci_ioremap_bar(pcidev, board->bar_nums[1]); in mf6x4_auto_attach()
217 if (!dev->mmio) in mf6x4_auto_attach()
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| D | amplc_dio200_common.c | 119 if (dev->mmio) in dio200_read8()
120 return readb(dev->mmio + offset); in dio200_read8()
132 if (dev->mmio) in dio200_write8()
133 writeb(val, dev->mmio + offset); in dio200_write8()
146 if (dev->mmio) in dio200_read32()
147 return readl(dev->mmio + offset); in dio200_read32()
159 if (dev->mmio) in dio200_write32()
160 writel(val, dev->mmio + offset); in dio200_write32()
173 if (dev->mmio) in dio200_subdev_8254_offset()
174 offset = i8254->mmio - dev->mmio; in dio200_subdev_8254_offset()
[all …]
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| D | comedi_8254.h | 87 void __iomem *mmio; member
134 struct comedi_8254 *comedi_8254_mm_init(void __iomem *mmio,
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| D | 8255_pci.c | 230 dev->mmio = pci_ioremap_bar(pcidev, board->dio_badr); in pci_8255_auto_attach()
231 if (!dev->mmio) in pci_8255_auto_attach()
248 if (dev->mmio) in pci_8255_auto_attach()
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| D | ni_labpc_pci.c | 98 dev->mmio = pci_ioremap_bar(pcidev, 1); in labpc_pci_auto_attach()
99 if (!dev->mmio) in labpc_pci_auto_attach()
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| D | amplc_dio200_pci.c | 371 dev->mmio = pci_ioremap_bar(pci_dev, bar); in dio200_pci_auto_attach()
372 if (!dev->mmio) { in dio200_pci_auto_attach()
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| D | comedi_8255.c | 65 writeb(data, dev->mmio + regbase + port); in subdev_8255_mmio()
68 return readb(dev->mmio + regbase + port); in subdev_8255_mmio()
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| /linux-4.4.14/drivers/ata/ |
| D | sata_sx4.c | 458 void __iomem *mmio = ap->host->iomap[PDC_MMIO_BAR]; in pdc20621_dma_prep() local
469 mmio += PDC_CHIP0_OFS; in pdc20621_dma_prep()
507 writel(0x00000001, mmio + PDC_20621_GENERAL_CTL); in pdc20621_dma_prep()
518 void __iomem *mmio = ap->host->iomap[PDC_MMIO_BAR]; in pdc20621_nodata_prep() local
526 mmio += PDC_CHIP0_OFS; in pdc20621_nodata_prep()
542 writel(0x00000001, mmio + PDC_20621_GENERAL_CTL); in pdc20621_nodata_prep()
569 void __iomem *mmio = host->iomap[PDC_MMIO_BAR]; in __pdc20621_push_hdma() local
572 mmio += PDC_CHIP0_OFS; in __pdc20621_push_hdma()
574 writel(0x00000001, mmio + PDC_20621_SEQCTL + (seq * 4)); in __pdc20621_push_hdma()
575 readl(mmio + PDC_20621_SEQCTL + (seq * 4)); /* flush */ in __pdc20621_push_hdma()
[all …]
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| D | ahci_imx.c | 78 static int imx_phy_crbit_assert(void __iomem *mmio, u32 bit, bool assert) in imx_phy_crbit_assert() argument
85 crval = readl(mmio + IMX_P0PHYCR); in imx_phy_crbit_assert()
90 writel(crval, mmio + IMX_P0PHYCR); in imx_phy_crbit_assert()
94 srval = readl(mmio + IMX_P0PHYSR); in imx_phy_crbit_assert()
103 static int imx_phy_reg_addressing(u16 addr, void __iomem *mmio) in imx_phy_reg_addressing() argument
109 writel(crval, mmio + IMX_P0PHYCR); in imx_phy_reg_addressing()
112 ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_CAP_ADDR, true); in imx_phy_reg_addressing()
117 ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_CAP_ADDR, false); in imx_phy_reg_addressing()
124 static int imx_phy_reg_write(u16 val, void __iomem *mmio) in imx_phy_reg_write() argument
130 writel(crval, mmio + IMX_P0PHYCR); in imx_phy_reg_write()
[all …]
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| D | ahci_ceva.c | 106 void __iomem *mmio = hpriv->mmio; in ahci_ceva_setup() local
117 writel(tmp, mmio + AHCI_VEND_PAXIC); in ahci_ceva_setup()
120 tmp = readl(mmio + HOST_CTL); in ahci_ceva_setup()
122 writel(tmp, mmio + HOST_CTL); in ahci_ceva_setup()
127 writel(tmp, mmio + AHCI_VEND_PCFG); in ahci_ceva_setup()
131 writel(tmp, mmio + AHCI_VEND_PPCFG); in ahci_ceva_setup()
135 writel(tmp, mmio + AHCI_VEND_PP2C); in ahci_ceva_setup()
139 writel(tmp, mmio + AHCI_VEND_PP3C); in ahci_ceva_setup()
143 writel(tmp, mmio + AHCI_VEND_PP4C); in ahci_ceva_setup()
147 writel(tmp, mmio + AHCI_VEND_PP5C); in ahci_ceva_setup()
[all …]
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| D | sata_nv.c | 608 void __iomem *mmio = pp->ctl_block; in nv_adma_register_mode() local
615 status = readw(mmio + NV_ADMA_STAT); in nv_adma_register_mode()
618 status = readw(mmio + NV_ADMA_STAT); in nv_adma_register_mode()
625 tmp = readw(mmio + NV_ADMA_CTL); in nv_adma_register_mode()
626 writew(tmp & ~NV_ADMA_CTL_GO, mmio + NV_ADMA_CTL); in nv_adma_register_mode()
629 status = readw(mmio + NV_ADMA_STAT); in nv_adma_register_mode()
632 status = readw(mmio + NV_ADMA_STAT); in nv_adma_register_mode()
646 void __iomem *mmio = pp->ctl_block; in nv_adma_mode() local
655 tmp = readw(mmio + NV_ADMA_CTL); in nv_adma_mode()
656 writew(tmp | NV_ADMA_CTL_GO, mmio + NV_ADMA_CTL); in nv_adma_mode()
[all …]
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| D | ahci_mvebu.c | 37 writel(0, hpriv->mmio + AHCI_WINDOW_CTRL(i)); in ahci_mvebu_mbus_config()
38 writel(0, hpriv->mmio + AHCI_WINDOW_BASE(i)); in ahci_mvebu_mbus_config()
39 writel(0, hpriv->mmio + AHCI_WINDOW_SIZE(i)); in ahci_mvebu_mbus_config()
47 hpriv->mmio + AHCI_WINDOW_CTRL(i)); in ahci_mvebu_mbus_config()
48 writel(cs->base >> 16, hpriv->mmio + AHCI_WINDOW_BASE(i)); in ahci_mvebu_mbus_config()
50 hpriv->mmio + AHCI_WINDOW_SIZE(i)); in ahci_mvebu_mbus_config()
61 writel(0x4, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_ADDR); in ahci_mvebu_regret_option()
62 writel(0x80, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_DATA); in ahci_mvebu_regret_option()
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| D | ahci_xgene.c | 282 void __iomem *mmio = ctx->hpriv->mmio; in xgene_ahci_set_phy_cfg() local
286 mmio, channel); in xgene_ahci_set_phy_cfg()
287 val = readl(mmio + PORTCFG); in xgene_ahci_set_phy_cfg()
289 writel(val, mmio + PORTCFG); in xgene_ahci_set_phy_cfg()
290 readl(mmio + PORTCFG); /* Force a barrier */ in xgene_ahci_set_phy_cfg()
292 writel(0x0001fffe, mmio + PORTPHY1CFG); in xgene_ahci_set_phy_cfg()
293 readl(mmio + PORTPHY1CFG); /* Force a barrier */ in xgene_ahci_set_phy_cfg()
294 writel(0x28183219, mmio + PORTPHY2CFG); in xgene_ahci_set_phy_cfg()
295 readl(mmio + PORTPHY2CFG); /* Force a barrier */ in xgene_ahci_set_phy_cfg()
296 writel(0x13081008, mmio + PORTPHY3CFG); in xgene_ahci_set_phy_cfg()
[all …]
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| D | sata_mv.c | 590 void (*phy_errata)(struct mv_host_priv *hpriv, void __iomem *mmio,
592 void (*enable_leds)(struct mv_host_priv *hpriv, void __iomem *mmio);
594 void __iomem *mmio);
595 int (*reset_hc)(struct mv_host_priv *hpriv, void __iomem *mmio,
597 void (*reset_flash)(struct mv_host_priv *hpriv, void __iomem *mmio);
598 void (*reset_bus)(struct ata_host *host, void __iomem *mmio);
617 static void mv5_phy_errata(struct mv_host_priv *hpriv, void __iomem *mmio,
619 static void mv5_enable_leds(struct mv_host_priv *hpriv, void __iomem *mmio);
621 void __iomem *mmio);
622 static int mv5_reset_hc(struct mv_host_priv *hpriv, void __iomem *mmio,
[all …]
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| D | libahci.c | 201 static void ahci_enable_ahci(void __iomem *mmio) in ahci_enable_ahci() argument
207 tmp = readl(mmio + HOST_CTL); in ahci_enable_ahci()
216 writel(tmp, mmio + HOST_CTL); in ahci_enable_ahci()
217 tmp = readl(mmio + HOST_CTL); /* flush && sanity check */ in ahci_enable_ahci()
252 void __iomem *mmio = hpriv->mmio; in ahci_show_host_version() local
254 return sprintf(buf, "%x\n", readl(mmio + HOST_VERSION)); in ahci_show_host_version()
273 void __iomem *mmio = hpriv->mmio; in ahci_read_em_buffer() local
274 void __iomem *em_mmio = mmio + hpriv->em_loc; in ahci_read_em_buffer()
282 em_ctl = readl(mmio + HOST_EM_CTL); in ahci_read_em_buffer()
329 void __iomem *mmio = hpriv->mmio; in ahci_store_em_buffer() local
[all …]
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| D | sata_svw.c | 144 void __iomem *mmio = link->ap->ioaddr.bmdma_addr; in k2_sata_softreset() local
146 dmactl = readb(mmio + ATA_DMA_CMD); in k2_sata_softreset()
151 writeb(dmactl, mmio + ATA_DMA_CMD); in k2_sata_softreset()
161 void __iomem *mmio = link->ap->ioaddr.bmdma_addr; in k2_sata_hardreset() local
163 dmactl = readb(mmio + ATA_DMA_CMD); in k2_sata_hardreset()
168 writeb(dmactl, mmio + ATA_DMA_CMD); in k2_sata_hardreset()
251 void __iomem *mmio = ap->ioaddr.bmdma_addr; in k2_bmdma_setup_mmio() local
255 writel(ap->bmdma_prd_dma, mmio + ATA_DMA_TABLE_OFS); in k2_bmdma_setup_mmio()
258 dmactl = readb(mmio + ATA_DMA_CMD); in k2_bmdma_setup_mmio()
262 writeb(dmactl, mmio + ATA_DMA_CMD); in k2_bmdma_setup_mmio()
[all …]
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| D | ahci_st.c | 42 static void st_ahci_configure_oob(void __iomem *mmio) in st_ahci_configure_oob() argument
51 old_val = readl(mmio + ST_AHCI_OOBR); in st_ahci_configure_oob()
52 writel(old_val | ST_AHCI_OOBR_WE, mmio + ST_AHCI_OOBR); in st_ahci_configure_oob()
53 writel(new_val | ST_AHCI_OOBR_WE, mmio + ST_AHCI_OOBR); in st_ahci_configure_oob()
54 writel(new_val, mmio + ST_AHCI_OOBR); in st_ahci_configure_oob()
171 st_ahci_configure_oob(hpriv->mmio); in st_ahci_probe()
224 st_ahci_configure_oob(hpriv->mmio); in st_ahci_resume()
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| D | pata_ixp4xx_cf.c | 50 void __iomem *mmio = ap->ioaddr.data_addr; in ixp4xx_mmio_data_xfer() local
62 buf16[i] = readw(mmio); in ixp4xx_mmio_data_xfer()
65 writew(buf16[i], mmio); in ixp4xx_mmio_data_xfer()
73 align_buf[0] = readw(mmio); in ixp4xx_mmio_data_xfer()
77 writew(align_buf[0], mmio); in ixp4xx_mmio_data_xfer()
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| D | libahci_platform.c | 366 hpriv->mmio = devm_ioremap_resource(dev, in ahci_platform_get_resources()
368 if (IS_ERR(hpriv->mmio)) { in ahci_platform_get_resources()
370 rc = PTR_ERR(hpriv->mmio); in ahci_platform_get_resources()
620 void __iomem *mmio = hpriv->mmio; in ahci_platform_suspend_host() local
633 ctl = readl(mmio + HOST_CTL); in ahci_platform_suspend_host()
635 writel(ctl, mmio + HOST_CTL); in ahci_platform_suspend_host()
636 readl(mmio + HOST_CTL); /* flush */ in ahci_platform_suspend_host()
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| D | pata_platform.c | 108 unsigned int mmio; in __pata_platform_probe() local
115 mmio = (( io_res->flags == IORESOURCE_MEM) && in __pata_platform_probe()
149 if (mmio) { in __pata_platform_probe()
169 ata_port_desc(ap, "%s cmd 0x%llx ctl 0x%llx", mmio ? "mmio" : "ioport", in __pata_platform_probe()
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| D | acard-ahci.c | 132 void __iomem *mmio = hpriv->mmio; in acard_ahci_pci_device_suspend() local
147 ctl = readl(mmio + HOST_CTL); in acard_ahci_pci_device_suspend()
149 writel(ctl, mmio + HOST_CTL); in acard_ahci_pci_device_suspend()
150 readl(mmio + HOST_CTL); /* flush */ in acard_ahci_pci_device_suspend()
443 hpriv->mmio = pcim_iomap_table(pdev)[AHCI_PCI_BAR]; in acard_ahci_init_one()
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| D | ahci.h | 328 void __iomem * mmio; /* bus-independent mem map */ member
408 void __iomem *mmio = hpriv->mmio; in __ahci_port_base() local
410 return mmio + 0x100 + (port_no * 0x80); in __ahci_port_base()
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| D | sata_sis.c | 297 void __iomem *mmio; in sis_init_one() local
302 mmio = host->iomap[SIS_SCR_PCI_BAR]; in sis_init_one()
304 host->ports[0]->ioaddr.scr_addr = mmio; in sis_init_one()
305 host->ports[1]->ioaddr.scr_addr = mmio + port2_start; in sis_init_one()
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| D | sata_highbank.c | 505 hpriv->mmio = devm_ioremap(dev, mem->start, resource_size(mem)); in ahci_highbank_probe()
506 if (!hpriv->mmio) { in ahci_highbank_probe()
511 rc = highbank_initialize_phys(dev, hpriv->mmio); in ahci_highbank_probe()
586 void __iomem *mmio = hpriv->mmio; in ahci_highbank_suspend() local
600 ctl = readl(mmio + HOST_CTL); in ahci_highbank_suspend()
602 writel(ctl, mmio + HOST_CTL); in ahci_highbank_suspend()
603 readl(mmio + HOST_CTL); /* flush */ in ahci_highbank_suspend()
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| D | ahci_sunxi.c | 161 sunxi_clrsetbits(hpriv->mmio + AHCI_P0DMACR, 0x0000ff00, 0x00004400); in ahci_sunxi_start_engine()
194 rc = ahci_sunxi_phy_init(dev, hpriv->mmio); in ahci_sunxi_probe()
232 rc = ahci_sunxi_phy_init(dev, hpriv->mmio); in ahci_sunxi_resume()
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| D | pata_ns87415.c | 183 void __iomem *mmio = ap->ioaddr.bmdma_addr; in ns87415_irq_clear() local
185 if (!mmio) in ns87415_irq_clear()
187 iowrite8((ioread8(mmio + ATA_DMA_CMD) | ATA_DMA_INTR | ATA_DMA_ERR), in ns87415_irq_clear()
188 mmio + ATA_DMA_CMD); in ns87415_irq_clear()
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| D | pata_hpt3x3.c | 100 void __iomem *mmio = ap->ioaddr.bmdma_addr; in hpt3x3_freeze() local
102 iowrite8(ioread8(mmio + ATA_DMA_CMD) & ~ ATA_DMA_START, in hpt3x3_freeze()
103 mmio + ATA_DMA_CMD); in hpt3x3_freeze()
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| D | sata_sil.c | 414 void __iomem *mmio = sil_scr_addr(link->ap, sc_reg); in sil_scr_read() local
416 if (mmio) { in sil_scr_read()
417 *val = readl(mmio); in sil_scr_read()
425 void __iomem *mmio = sil_scr_addr(link->ap, sc_reg); in sil_scr_write() local
427 if (mmio) { in sil_scr_write()
428 writel(val, mmio); in sil_scr_write()
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| /linux-4.4.14/virt/kvm/arm/ |
| D | vgic-v3-emul.c | 53 struct kvm_exit_mmio *mmio, phys_addr_t offset) in handle_mmio_rao_wi() argument
57 vgic_reg_access(mmio, ®, offset, in handle_mmio_rao_wi()
64 struct kvm_exit_mmio *mmio, phys_addr_t offset) in handle_mmio_ctlr() argument
76 vgic_reg_access(mmio, ®, offset, in handle_mmio_ctlr()
78 if (mmio->is_write) { in handle_mmio_ctlr()
94 struct kvm_exit_mmio *mmio, phys_addr_t offset) in handle_mmio_typer() argument
102 vgic_reg_access(mmio, ®, offset, in handle_mmio_typer()
109 struct kvm_exit_mmio *mmio, phys_addr_t offset) in handle_mmio_iidr() argument
114 vgic_reg_access(mmio, ®, offset, in handle_mmio_iidr()
121 struct kvm_exit_mmio *mmio, in handle_mmio_set_enable_reg_dist() argument
[all …]
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| D | vgic-v2-emul.c | 44 struct kvm_exit_mmio *mmio, phys_addr_t offset) in handle_mmio_misc() argument
52 vgic_reg_access(mmio, ®, word_offset, in handle_mmio_misc()
54 if (mmio->is_write) { in handle_mmio_misc()
64 vgic_reg_access(mmio, ®, word_offset, in handle_mmio_misc()
70 vgic_reg_access(mmio, ®, word_offset, in handle_mmio_misc()
79 struct kvm_exit_mmio *mmio, in handle_mmio_set_enable_reg() argument
82 return vgic_handle_enable_reg(vcpu->kvm, mmio, offset, in handle_mmio_set_enable_reg()
87 struct kvm_exit_mmio *mmio, in handle_mmio_clear_enable_reg() argument
90 return vgic_handle_enable_reg(vcpu->kvm, mmio, offset, in handle_mmio_clear_enable_reg()
95 struct kvm_exit_mmio *mmio, in handle_mmio_set_pending_reg() argument
[all …]
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| D | vgic.h | 70 void vgic_reg_access(struct kvm_exit_mmio *mmio, u32 *reg,
72 bool handle_mmio_raz_wi(struct kvm_vcpu *vcpu, struct kvm_exit_mmio *mmio,
76 u32 mmio_data_read(struct kvm_exit_mmio *mmio, u32 mask) in mmio_data_read() argument
78 return le32_to_cpu(*((u32 *)mmio->data)) & mask; in mmio_data_read()
82 void mmio_data_write(struct kvm_exit_mmio *mmio, u32 mask, u32 value) in mmio_data_write() argument
84 *((u32 *)mmio->data) = cpu_to_le32(value) & mask; in mmio_data_write()
91 bool (*handle_mmio)(struct kvm_vcpu *vcpu, struct kvm_exit_mmio *mmio,
110 bool vgic_handle_enable_reg(struct kvm *kvm, struct kvm_exit_mmio *mmio,
113 bool vgic_handle_set_pending_reg(struct kvm *kvm, struct kvm_exit_mmio *mmio,
116 bool vgic_handle_clear_pending_reg(struct kvm *kvm, struct kvm_exit_mmio *mmio,
[all …]
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| D | vgic.c | 427 void vgic_reg_access(struct kvm_exit_mmio *mmio, u32 *reg, in vgic_reg_access() argument
431 u32 mask = (1UL << (mmio->len * 8)) - 1; in vgic_reg_access()
446 if (mmio->is_write) { in vgic_reg_access()
447 u32 data = mmio_data_read(mmio, mask) << word_offset; in vgic_reg_access()
472 mmio_data_write(mmio, mask, regval >> word_offset); in vgic_reg_access()
477 bool handle_mmio_raz_wi(struct kvm_vcpu *vcpu, struct kvm_exit_mmio *mmio, in handle_mmio_raz_wi() argument
480 vgic_reg_access(mmio, NULL, offset, in handle_mmio_raz_wi()
485 bool vgic_handle_enable_reg(struct kvm *kvm, struct kvm_exit_mmio *mmio, in vgic_handle_enable_reg() argument
493 vgic_reg_access(mmio, reg, offset, mode); in vgic_handle_enable_reg()
494 if (mmio->is_write) { in vgic_handle_enable_reg()
[all …]
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| /linux-4.4.14/sound/soc/au1x/ |
| D | psc.h | 17 void __iomem *mmio; member
30 #define PSC_CTRL(x) ((x)->mmio + PSC_CTRL_OFFSET)
31 #define PSC_SEL(x) ((x)->mmio + PSC_SEL_OFFSET)
32 #define I2S_STAT(x) ((x)->mmio + PSC_I2SSTAT_OFFSET)
33 #define I2S_CFG(x) ((x)->mmio + PSC_I2SCFG_OFFSET)
34 #define I2S_PCR(x) ((x)->mmio + PSC_I2SPCR_OFFSET)
35 #define AC97_CFG(x) ((x)->mmio + PSC_AC97CFG_OFFSET)
36 #define AC97_CDC(x) ((x)->mmio + PSC_AC97CDC_OFFSET)
37 #define AC97_EVNT(x) ((x)->mmio + PSC_AC97EVNT_OFFSET)
38 #define AC97_PCR(x) ((x)->mmio + PSC_AC97PCR_OFFSET)
[all …]
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| D | i2sc.c | 71 return __raw_readl(ctx->mmio + reg); in RD()
76 __raw_writel(v, ctx->mmio + reg); in WR()
250 ctx->mmio = devm_ioremap_nocache(&pdev->dev, iores->start, in au1xi2s_drvprobe()
252 if (!ctx->mmio) in au1xi2s_drvprobe()
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| D | ac97c.c | 73 return __raw_readl(ctx->mmio + reg); in RD()
78 __raw_writel(v, ctx->mmio + reg); in WR()
250 ctx->mmio = devm_ioremap_nocache(&pdev->dev, iores->start, in au1xac97c_drvprobe()
252 if (!ctx->mmio) in au1xac97c_drvprobe()
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| D | psc-i2s.c | 307 wd->mmio = devm_ioremap_resource(&pdev->dev, iores); in au1xpsc_i2s_drvprobe()
308 if (IS_ERR(wd->mmio)) in au1xpsc_i2s_drvprobe()
309 return PTR_ERR(wd->mmio); in au1xpsc_i2s_drvprobe()
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| D | psc-ac97.c | 382 wd->mmio = devm_ioremap_resource(&pdev->dev, iores); in au1xpsc_ac97_drvprobe()
383 if (IS_ERR(wd->mmio)) in au1xpsc_ac97_drvprobe()
384 return PTR_ERR(wd->mmio); in au1xpsc_ac97_drvprobe()
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| /linux-4.4.14/drivers/phy/ |
| D | phy-qcom-ipq806x-sata.c | 27 void __iomem *mmio; member
67 reg = readl_relaxed(phy->mmio + SATA_PHY_P0_PARAM3); in qcom_ipq806x_sata_phy_init()
69 writel_relaxed(reg, phy->mmio + SATA_PHY_P0_PARAM3); in qcom_ipq806x_sata_phy_init()
71 reg = readl_relaxed(phy->mmio + SATA_PHY_P0_PARAM0) & in qcom_ipq806x_sata_phy_init()
76 writel_relaxed(reg, phy->mmio + SATA_PHY_P0_PARAM0); in qcom_ipq806x_sata_phy_init()
78 reg = readl_relaxed(phy->mmio + SATA_PHY_P0_PARAM1) & in qcom_ipq806x_sata_phy_init()
85 writel_relaxed(reg, phy->mmio + SATA_PHY_P0_PARAM1); in qcom_ipq806x_sata_phy_init()
87 reg = readl_relaxed(phy->mmio + SATA_PHY_P0_PARAM2) & in qcom_ipq806x_sata_phy_init()
90 writel_relaxed(reg, phy->mmio + SATA_PHY_P0_PARAM2); in qcom_ipq806x_sata_phy_init()
93 reg = readl_relaxed(phy->mmio + SATA_PHY_P0_PARAM4); in qcom_ipq806x_sata_phy_init()
[all …]
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| D | phy-qcom-ufs-qmp-20nm.c | 97 writel_relaxed(0x1, phy->mmio + UFS_PHY_POWER_DOWN_CONTROL); in ufs_qcom_phy_qmp_20nm_power_control()
110 writel_relaxed(0x0A, phy->mmio + in ufs_qcom_phy_qmp_20nm_power_control()
112 writel_relaxed(0x08, phy->mmio + in ufs_qcom_phy_qmp_20nm_power_control()
122 writel_relaxed(0x0A, phy->mmio + in ufs_qcom_phy_qmp_20nm_power_control()
124 writel_relaxed(0x02, phy->mmio + in ufs_qcom_phy_qmp_20nm_power_control()
133 writel_relaxed(0x0, phy->mmio + UFS_PHY_POWER_DOWN_CONTROL); in ufs_qcom_phy_qmp_20nm_power_control()
146 phy->mmio + UFS_PHY_TX_LANE_ENABLE); in ufs_qcom_phy_qmp_20nm_set_tx_lane_enable()
154 tmp = readl_relaxed(phy->mmio + UFS_PHY_PHY_START); in ufs_qcom_phy_qmp_20nm_start_serdes()
157 writel_relaxed(tmp, phy->mmio + UFS_PHY_PHY_START); in ufs_qcom_phy_qmp_20nm_start_serdes()
166 err = readl_poll_timeout(phy_common->mmio + UFS_PHY_PCS_READY_STATUS, in ufs_qcom_phy_qmp_20nm_is_pcs_ready()
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| D | phy-qcom-apq8064-sata.c | 77 void __iomem *mmio; member
100 void __iomem *base = phy->mmio; in qcom_apq8064_sata_phy_init()
195 void __iomem *base = phy->mmio; in qcom_apq8064_sata_phy_exit()
227 phy->mmio = devm_ioremap_resource(dev, res); in qcom_apq8064_sata_phy_probe()
228 if (IS_ERR(phy->mmio)) in qcom_apq8064_sata_phy_probe()
229 return PTR_ERR(phy->mmio); in qcom_apq8064_sata_phy_probe()
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| D | phy-qcom-ufs-qmp-14nm.c | 76 writel_relaxed(val ? 0x1 : 0x0, phy->mmio + UFS_PHY_POWER_DOWN_CONTROL); in ufs_qcom_phy_qmp_14nm_power_control()
97 tmp = readl_relaxed(phy->mmio + UFS_PHY_PHY_START); in ufs_qcom_phy_qmp_14nm_start_serdes()
100 writel_relaxed(tmp, phy->mmio + UFS_PHY_PHY_START); in ufs_qcom_phy_qmp_14nm_start_serdes()
110 err = readl_poll_timeout(phy_common->mmio + UFS_PHY_PCS_READY_STATUS, in ufs_qcom_phy_qmp_14nm_is_pcs_ready()
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| D | phy-qcom-ufs.c | 49 ufs_qcom_phy->mmio + tbl_A[i].reg_offset); in ufs_qcom_phy_calibrate()
67 ufs_qcom_phy->mmio + tbl_B[i].reg_offset); in ufs_qcom_phy_calibrate()
138 phy_common->mmio = devm_ioremap_resource(dev, res); in ufs_qcom_phy_base_init()
139 if (IS_ERR((void const *)phy_common->mmio)) { in ufs_qcom_phy_base_init()
140 err = PTR_ERR((void const *)phy_common->mmio); in ufs_qcom_phy_base_init()
141 phy_common->mmio = NULL; in ufs_qcom_phy_base_init()
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| /linux-4.4.14/drivers/ntb/hw/intel/ |
| D | ntb_hw_intel.c | 153 static inline u64 _ioread64(void __iomem *mmio) in _ioread64() argument
157 low = ioread32(mmio); in _ioread64()
158 high = ioread32(mmio + sizeof(u32)); in _ioread64()
169 static inline void _iowrite64(u64 val, void __iomem *mmio) in _iowrite64() argument
171 iowrite32(val, mmio); in _iowrite64()
172 iowrite32(val >> 32, mmio + sizeof(u32)); in _iowrite64()
269 void __iomem *mmio) in ndev_db_read() argument
274 return ndev->reg->db_ioread(mmio); in ndev_db_read()
278 void __iomem *mmio) in ndev_db_write() argument
286 ndev->reg->db_iowrite(db_bits, mmio); in ndev_db_write()
[all …]
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| D | ntb_hw_intel.h | 253 u64 (*db_ioread)(void __iomem *mmio);
254 void (*db_iowrite)(u64 db_bits, void __iomem *mmio);
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| /linux-4.4.14/drivers/ssb/ |
| D | scan.c | 177 lo = readw(bus->mmio + offset); in scan_read32()
178 hi = readw(bus->mmio + offset + 2); in scan_read32()
184 return readl(bus->mmio + offset); in scan_read32()
207 iounmap(bus->mmio); in ssb_iounmap()
211 pci_iounmap(bus->host_pci, bus->mmio); in ssb_iounmap()
219 bus->mmio = NULL; in ssb_iounmap()
226 void __iomem *mmio = NULL; in ssb_ioremap() local
233 mmio = ioremap(baseaddr, SSB_CORE_SIZE); in ssb_ioremap()
237 mmio = pci_iomap(bus->host_pci, 0, ~0UL); in ssb_ioremap()
244 mmio = (void __iomem *)baseaddr; in ssb_ioremap()
[all …]
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| D | host_soc.c | 20 return readb(bus->mmio + offset); in ssb_host_soc_read8()
28 return readw(bus->mmio + offset); in ssb_host_soc_read16()
36 return readl(bus->mmio + offset); in ssb_host_soc_read32()
47 addr = bus->mmio + offset; in ssb_host_soc_block_read()
93 writeb(value, bus->mmio + offset); in ssb_host_soc_write8()
101 writew(value, bus->mmio + offset); in ssb_host_soc_write16()
109 writel(value, bus->mmio + offset); in ssb_host_soc_write32()
120 addr = bus->mmio + offset; in ssb_host_soc_block_write()
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| D | driver_pcicore.c | 116 void __iomem *mmio; in ssb_extpci_read_config() local
125 mmio = ioremap_nocache(addr, len); in ssb_extpci_read_config()
126 if (!mmio) in ssb_extpci_read_config()
129 if (mips_busprobe32(val, mmio)) { in ssb_extpci_read_config()
134 val = readl(mmio); in ssb_extpci_read_config()
150 iounmap(mmio); in ssb_extpci_read_config()
162 void __iomem *mmio; in ssb_extpci_write_config() local
171 mmio = ioremap_nocache(addr, len); in ssb_extpci_write_config()
172 if (!mmio) in ssb_extpci_write_config()
175 if (mips_busprobe32(val, mmio)) { in ssb_extpci_write_config()
[all …]
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| D | pcmcia.c | 234 value = readb(bus->mmio + offset); in ssb_pcmcia_read8()
250 value = readw(bus->mmio + offset); in ssb_pcmcia_read16()
266 lo = readw(bus->mmio + offset); in ssb_pcmcia_read32()
267 hi = readw(bus->mmio + offset + 2); in ssb_pcmcia_read32()
280 void __iomem *addr = bus->mmio + offset; in ssb_pcmcia_block_read()
341 writeb(value, bus->mmio + offset); in ssb_pcmcia_write8()
355 writew(value, bus->mmio + offset); in ssb_pcmcia_write16()
369 writew((value & 0x0000FFFF), bus->mmio + offset); in ssb_pcmcia_write32()
370 writew(((value & 0xFFFF0000) >> 16), bus->mmio + offset + 2); in ssb_pcmcia_write32()
382 void __iomem *addr = bus->mmio + offset; in ssb_pcmcia_block_write()
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| D | pci.c | 277 sprom[i] = ioread16(bus->mmio + bus->sprom_offset + (i * 2)); in sprom_do_read()
308 writew(sprom[i], bus->mmio + bus->sprom_offset + (i * 2)); in sprom_do_write()
981 return ioread8(bus->mmio + offset); in ssb_pci_read8()
994 return ioread16(bus->mmio + offset); in ssb_pci_read16()
1007 return ioread32(bus->mmio + offset); in ssb_pci_read32()
1015 void __iomem *addr = bus->mmio + offset; in ssb_pci_block_read()
1055 iowrite8(value, bus->mmio + offset); in ssb_pci_write8()
1068 iowrite16(value, bus->mmio + offset); in ssb_pci_write16()
1081 iowrite32(value, bus->mmio + offset); in ssb_pci_write32()
1089 void __iomem *addr = bus->mmio + offset; in ssb_pci_block_write()
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| /linux-4.4.14/drivers/gpu/drm/bochs/ |
| D | bochs_hw.c | 17 if (bochs->mmio) { in bochs_vga_writeb()
19 writeb(val, bochs->mmio + offset); in bochs_vga_writeb()
29 if (bochs->mmio) { in bochs_dispi_read()
31 ret = readw(bochs->mmio + offset); in bochs_dispi_read()
41 if (bochs->mmio) { in bochs_dispi_write()
43 writew(val, bochs->mmio + offset); in bochs_dispi_write()
65 bochs->mmio = ioremap(ioaddr, iosize); in bochs_hw_init()
66 if (bochs->mmio == NULL) { in bochs_hw_init()
119 if (bochs->mmio && pdev->revision >= 2) { in bochs_hw_init()
120 qext_size = readl(bochs->mmio + 0x600); in bochs_hw_init()
[all …]
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| /linux-4.4.14/drivers/net/ethernet/cavium/liquidio/ |
| D | octeon_main.h | 76 if (oct->mmio[baridx].done) in octeon_unmap_pci_barx()
77 iounmap(oct->mmio[baridx].hw_addr); in octeon_unmap_pci_barx()
79 if (oct->mmio[baridx].start) in octeon_unmap_pci_barx()
100 oct->mmio[baridx].start = pci_resource_start(oct->pci_dev, baridx * 2); in octeon_map_pci_barx()
101 oct->mmio[baridx].len = pci_resource_len(oct->pci_dev, baridx * 2); in octeon_map_pci_barx()
103 mapped_len = oct->mmio[baridx].len; in octeon_map_pci_barx()
110 oct->mmio[baridx].hw_addr = in octeon_map_pci_barx()
111 ioremap(oct->mmio[baridx].start, mapped_len); in octeon_map_pci_barx()
112 oct->mmio[baridx].mapped_len = mapped_len; in octeon_map_pci_barx()
115 baridx, oct->mmio[baridx].start, mapped_len, in octeon_map_pci_barx()
[all …]
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| D | octeon_device.h | 313 struct octeon_mmio mmio[OCT_MEM_REGIONS]; member
508 writel(value, oct_dev->mmio[0].hw_addr + reg_off)
511 writeq(val64, oct_dev->mmio[0].hw_addr + reg_off)
514 readl(oct_dev->mmio[0].hw_addr + reg_off)
517 readq(oct_dev->mmio[0].hw_addr + reg_off)
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| D | cn66xx_device.c | 299 iq->doorbell_reg = oct->mmio[0].hw_addr + CN6XXX_SLI_IQ_DOORBELL(iq_no); in lio_cn6xxx_setup_iq_regs()
300 iq->inst_cnt_reg = oct->mmio[0].hw_addr in lio_cn6xxx_setup_iq_regs()
336 oct->mmio[0].hw_addr + CN6XXX_SLI_OQ_PKTS_SENT(oq_no); in lio_cn6xxx_setup_oq_regs()
338 oct->mmio[0].hw_addr + CN6XXX_SLI_OQ_PKTS_CREDIT(oq_no); in lio_cn6xxx_setup_oq_regs()
666 u8 __iomem *bar0_pciaddr = oct->mmio[0].hw_addr; in lio_cn6xxx_setup_reg_address()
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| /linux-4.4.14/sound/soc/intel/common/ |
| D | sst-acpi.c | 121 struct resource *mmio; in sst_acpi_probe() local
156 mmio = platform_get_resource(pdev, IORESOURCE_MEM, in sst_acpi_probe()
158 if (mmio) { in sst_acpi_probe()
159 sst_pdata->lpe_base = mmio->start; in sst_acpi_probe()
160 sst_pdata->lpe_size = resource_size(mmio); in sst_acpi_probe()
165 mmio = platform_get_resource(pdev, IORESOURCE_MEM, in sst_acpi_probe()
167 if (mmio) { in sst_acpi_probe()
168 sst_pdata->pcicfg_base = mmio->start; in sst_acpi_probe()
169 sst_pdata->pcicfg_size = resource_size(mmio); in sst_acpi_probe()
174 mmio = platform_get_resource(pdev, IORESOURCE_MEM, in sst_acpi_probe()
[all …]
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| /linux-4.4.14/drivers/mtd/nand/brcmnand/ |
| D | iproc_nand.c | 44 void __iomem *mmio = priv->ext_base + IPROC_NAND_CTLR_READY_OFFSET; in iproc_nand_intc_ack() local
45 u32 val = brcmnand_readl(mmio); in iproc_nand_intc_ack()
48 brcmnand_writel(IPROC_NAND_CTLR_READY, mmio); in iproc_nand_intc_ack()
59 void __iomem *mmio = priv->idm_base + IPROC_NAND_IO_CTRL_OFFSET; in iproc_nand_intc_set() local
65 val = brcmnand_readl(mmio); in iproc_nand_intc_set()
72 brcmnand_writel(val, mmio); in iproc_nand_intc_set()
81 void __iomem *mmio = priv->idm_base + IPROC_NAND_IO_CTRL_OFFSET; in iproc_nand_apb_access() local
87 val = brcmnand_readl(mmio); in iproc_nand_apb_access()
94 brcmnand_writel(val, mmio); in iproc_nand_apb_access()
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| D | bcm63138_nand.c | 41 void __iomem *mmio = priv->base + BCM63138_NAND_INT_STATUS; in bcm63138_nand_intc_ack() local
42 u32 val = brcmnand_readl(mmio); in bcm63138_nand_intc_ack()
45 brcmnand_writel(val & ~BCM63138_CTLRDY, mmio); in bcm63138_nand_intc_ack()
56 void __iomem *mmio = priv->base + BCM63138_NAND_INT_EN; in bcm63138_nand_intc_set() local
57 u32 val = brcmnand_readl(mmio); in bcm63138_nand_intc_set()
64 brcmnand_writel(val, mmio); in bcm63138_nand_intc_set()
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| /linux-4.4.14/drivers/ide/ |
| D | ide-io-std.c | 94 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; in ide_tf_load() local
96 if (mmio) in ide_tf_load()
121 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; in ide_tf_read() local
123 if (mmio) in ide_tf_read()
172 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; in ide_input_data() local
177 if ((io_32bit & 2) && !mmio) { in ide_input_data()
183 if (mmio) in ide_input_data()
188 if ((io_32bit & 2) && !mmio) in ide_input_data()
198 if (mmio) in ide_input_data()
216 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; in ide_output_data() local
[all …]
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| D | ide_platform.c | 55 int ret = 0, mmio = 0; in plat_ide_probe() local
72 mmio = 1; in plat_ide_probe()
81 if (mmio) { in plat_ide_probe()
101 if (mmio) in plat_ide_probe()
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| D | siimage.c | 253 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; in sil_set_pio_mode() local
254 u8 addr_mask = hwif->channel ? (mmio ? 0xF4 : 0x84) in sil_set_pio_mode()
255 : (mmio ? 0xB4 : 0x80); in sil_set_pio_mode()
308 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; in sil_set_dma_mode() local
309 u8 scsc = 0, addr_mask = hwif->channel ? (mmio ? 0xF4 : 0x84) in sil_set_dma_mode()
310 : (mmio ? 0xB4 : 0x80); in sil_set_dma_mode()
315 scsc = sil_ioread8 (dev, base + (mmio ? 0x4A : 0x8A)); in sil_set_dma_mode()
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| D | ide-dma-sff.c | 190 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; in ide_dma_setup() local
201 if (mmio) in ide_dma_setup()
208 if (mmio) in ide_dma_setup()
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| /linux-4.4.14/drivers/input/keyboard/ |
| D | tegra-kbc.c | 103 void __iomem *mmio; member
169 val = readl(kbc->mmio + KBC_KP_ENT0_0 + i); in tegra_kbc_report_keys()
246 val = readl(kbc->mmio + KBC_CONTROL_0); in tegra_kbc_set_fifo_interrupt()
251 writel(val, kbc->mmio + KBC_CONTROL_0); in tegra_kbc_set_fifo_interrupt()
263 val = (readl(kbc->mmio + KBC_INT_0) >> 4) & 0xf; in tegra_kbc_keypress_timer()
302 val = readl(kbc->mmio + KBC_INT_0); in tegra_kbc_isr()
303 writel(val, kbc->mmio + KBC_INT_0); in tegra_kbc_isr()
331 writel(rst_val, kbc->mmio + KBC_ROW0_MASK_0 + i * 4); in tegra_kbc_setup_wakekeys()
345 u32 row_cfg = readl(kbc->mmio + r_offs); in tegra_kbc_config_pins()
346 u32 col_cfg = readl(kbc->mmio + c_offs); in tegra_kbc_config_pins()
[all …]
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| /linux-4.4.14/drivers/media/pci/mantis/ |
| D | mantis_pci.c | 88 mantis->mmio = ioremap(pci_resource_start(pdev, 0), in mantis_pci_init()
91 if (!mantis->mmio) { in mantis_pci_init()
111 mantis->mmio); in mantis_pci_init()
132 if (mantis->mmio) in mantis_pci_init()
133 iounmap(mantis->mmio); in mantis_pci_init()
154 dprintk(MANTIS_NOTICE, 1, " mem: 0x%p", mantis->mmio); in mantis_pci_exit()
156 if (mantis->mmio) { in mantis_pci_exit()
157 iounmap(mantis->mmio); in mantis_pci_exit()
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| D | mantis_common.h | 60 #define mmwrite(dat, addr) mwrite((dat), (mantis->mmio + (addr)))
61 #define mmread(addr) mread(mantis->mmio + (addr))
125 void __iomem *mmio; member
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| /linux-4.4.14/arch/powerpc/boot/ |
| D | cuboot-pq2.c | 125 struct pci_range *mem = NULL, *mmio = NULL, in fixup_pci() local
167 mmio = &pci_ranges_buf[i]; in fixup_pci()
172 if (!mem || !mmio || !io) in fixup_pci()
174 if (mem->size[1] != mmio->size[1]) in fixup_pci()
181 if (mem->phys_addr + mem->size[1] == mmio->phys_addr) in fixup_pci()
183 else if (mmio->phys_addr + mmio->size[1] == mem->phys_addr) in fixup_pci()
184 mem_base = mmio; in fixup_pci()
189 out_be32(&pci_regs[2][0], ~(mem->size[1] + mmio->size[1] - 1)); in fixup_pci()
198 out_le32(&pci_regs[0][6], mmio->pci_addr[1] >> 12); in fixup_pci()
199 out_le32(&pci_regs[0][8], mmio->phys_addr >> 12); in fixup_pci()
[all …]
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| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/ |
| D | gt215.c | 106 u32 *mmio = gt215_devinit_mmio_part; in gt215_devinit_mmio() local
123 while (mmio[0]) { in gt215_devinit_mmio()
124 if (addr >= mmio[0] && addr <= mmio[1]) { in gt215_devinit_mmio()
125 u32 part = (addr / mmio[2]) & 7; in gt215_devinit_mmio()
132 mmio += 3; in gt215_devinit_mmio()
143 .mmio = gt215_devinit_mmio,
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| D | base.c | 32 if (init->func->mmio) in nvkm_devinit_mmio()
33 addr = init->func->mmio(init, addr); in nvkm_devinit_mmio()
|
| D | priv.h | 11 u32 (*mmio)(struct nvkm_devinit *, u32); member
|
| /linux-4.4.14/drivers/acpi/ |
| D | nfit.c | 1038 static u64 to_interleave_offset(u64 offset, struct nfit_blk_mmio *mmio) in to_interleave_offset() argument
1040 struct acpi_nfit_interleave *idt = mmio->idt; in to_interleave_offset()
1044 line_no = div_u64_rem(offset, mmio->line_size, &sub_line_offset); in to_interleave_offset()
1045 table_skip_count = div_u64_rem(line_no, mmio->num_lines, &line_index); in to_interleave_offset()
1047 * mmio->line_size; in to_interleave_offset()
1048 table_offset = table_skip_count * mmio->table_size; in to_interleave_offset()
1050 return mmio->base_offset + line_offset + table_offset + sub_line_offset; in to_interleave_offset()
1073 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; in read_blk_stat() local
1074 u64 offset = nfit_blk->stat_offset + mmio->size * bw; in read_blk_stat()
1076 if (mmio->num_lines) in read_blk_stat()
[all …]
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| /linux-4.4.14/drivers/block/ |
| D | sx8.c | 269 void __iomem *mmio; member
459 static void carm_init_buckets(void __iomem *mmio) in carm_init_buckets() argument
464 writel(msg_sizes[i], mmio + CARM_CMS0 + (4 * i)); in carm_init_buckets()
482 void __iomem *mmio = host->mmio; in carm_send_msg() local
490 tmp = readl(mmio + CARM_HMUC); in carm_send_msg()
493 tmp = readl(mmio + CARM_INT_MASK); in carm_send_msg()
495 writel(tmp, mmio + CARM_INT_MASK); in carm_send_msg()
496 readl(mmio + CARM_INT_MASK); /* flush */ in carm_send_msg()
501 writel(msg | (cm_bucket << 1), mmio + CARM_IHQP); in carm_send_msg()
502 readl(mmio + CARM_IHQP); /* flush */ in carm_send_msg()
[all …]
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| /linux-4.4.14/drivers/bcma/ |
| D | host_pci.c | 45 return ioread8(core->bus->mmio + offset); in bcma_host_pci_read8()
51 return ioread16(core->bus->mmio + offset); in bcma_host_pci_read16()
57 return ioread32(core->bus->mmio + offset); in bcma_host_pci_read32()
64 iowrite8(value, core->bus->mmio + offset); in bcma_host_pci_write8()
71 iowrite16(value, core->bus->mmio + offset); in bcma_host_pci_write16()
78 iowrite32(value, core->bus->mmio + offset); in bcma_host_pci_write32()
85 void __iomem *addr = core->bus->mmio + offset; in bcma_host_pci_block_read()
109 void __iomem *addr = core->bus->mmio + offset; in bcma_host_pci_block_write()
134 return ioread32(core->bus->mmio + (1 * BCMA_CORE_SIZE) + offset); in bcma_host_pci_aread32()
142 iowrite32(value, core->bus->mmio + (1 * BCMA_CORE_SIZE) + offset); in bcma_host_pci_awrite32()
[all …]
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| D | host_soc.c | 175 bus->mmio = ioremap_nocache(BCMA_ADDR_BASE, BCMA_CORE_SIZE * 1); in bcma_host_soc_register()
176 if (!bus->mmio) in bcma_host_soc_register()
198 iounmap(bus->mmio); in bcma_host_soc_init()
217 bus->mmio = of_iomap(np, 0); in bcma_host_soc_probe()
218 if (!bus->mmio) in bcma_host_soc_probe()
239 iounmap(bus->mmio); in bcma_host_soc_probe()
248 iounmap(bus->mmio); in bcma_host_soc_remove()
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| D | driver_pci_host.c | 90 void __iomem *mmio = 0; in bcma_extpci_read_config() local
118 mmio = ioremap_nocache(addr, sizeof(val)); in bcma_extpci_read_config()
119 if (!mmio) in bcma_extpci_read_config()
122 if (mips_busprobe32(val, mmio)) { in bcma_extpci_read_config()
142 if (mmio) in bcma_extpci_read_config()
143 iounmap(mmio); in bcma_extpci_read_config()
154 void __iomem *mmio = 0; in bcma_extpci_write_config() local
183 mmio = ioremap_nocache(addr, sizeof(val)); in bcma_extpci_write_config()
184 if (!mmio) in bcma_extpci_write_config()
187 if (mips_busprobe32(val, mmio)) { in bcma_extpci_write_config()
[all …]
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| /linux-4.4.14/drivers/misc/mic/host/ |
| D | mic_x100.c | 48 mic_mmio_write(&mdev->mmio, val, in mic_x100_write_spad()
65 u32 val = mic_mmio_read(&mdev->mmio, in mic_x100_read_spad()
81 struct mic_mw *mw = &mdev->mmio; in mic_x100_enable_interrupts()
108 struct mic_mw *mw = &mdev->mmio; in mic_x100_disable_interrupts()
131 struct mic_mw *mw = &mdev->mmio; in mic_x100_send_sbox_intr()
155 mic_mmio_write(&mdev->mmio, 0, in mic_x100_send_rdmasr_intr()
185 u32 reg = mic_mmio_read(&mdev->mmio, sicr0); in mic_x100_ack_interrupt()
186 mic_mmio_write(&mdev->mmio, reg, sicr0); in mic_x100_ack_interrupt()
199 struct mic_mw *mw = &mdev->mmio; in mic_x100_intr_workarounds()
232 return mic_mmio_read(&mdev->mmio, in mic_x100_read_msi_to_src_map()
[all …]
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| D | mic_main.c | 224 mdev->mmio.pa = pci_resource_start(pdev, mdev->ops->mmio_bar); in mic_probe()
225 mdev->mmio.len = pci_resource_len(pdev, mdev->ops->mmio_bar); in mic_probe()
226 mdev->mmio.va = pci_ioremap_bar(pdev, mdev->ops->mmio_bar); in mic_probe()
227 if (!mdev->mmio.va) { in mic_probe()
296 iounmap(mdev->mmio.va); in mic_probe()
332 iounmap(mdev->mmio.va); in mic_remove()
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| /linux-4.4.14/arch/arm/kvm/ |
| D | mmio.c | 102 if (!run->mmio.is_write) { in kvm_handle_mmio_return()
103 len = run->mmio.len; in kvm_handle_mmio_return()
107 data = mmio_read_buf(run->mmio.data, len); in kvm_handle_mmio_return()
115 trace_kvm_mmio(KVM_TRACE_MMIO_READ, len, run->mmio.phys_addr, in kvm_handle_mmio_return()
206 run->mmio.is_write = is_write; in io_mem_abort()
207 run->mmio.phys_addr = fault_ipa; in io_mem_abort()
208 run->mmio.len = len; in io_mem_abort()
209 memcpy(run->mmio.data, data_buf, len); in io_mem_abort()
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| /linux-4.4.14/drivers/watchdog/ |
| D | via_wdt.c | 69 static unsigned int mmio; variable
186 pci_read_config_dword(pdev, VIA_WDT_MMIO_BASE, &mmio); in wdt_probe()
187 if (mmio) { in wdt_probe()
188 dev_info(&pdev->dev, "VIA Chipset watchdog MMIO: %x\n", mmio); in wdt_probe()
194 if (!request_mem_region(mmio, VIA_WDT_MMIO_LEN, "via_wdt")) { in wdt_probe()
199 wdt_mem = ioremap(mmio, VIA_WDT_MMIO_LEN); in wdt_probe()
225 release_mem_region(mmio, VIA_WDT_MMIO_LEN); in wdt_probe()
238 release_mem_region(mmio, VIA_WDT_MMIO_LEN); in wdt_remove()
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| /linux-4.4.14/drivers/gpu/drm/msm/hdmi/ |
| D | hdmi_phy_8x74.c | 22 void __iomem *mmio; member
29 msm_writel(data, phy->mmio + reg); in phy_write()
87 phy_8x74->mmio = msm_ioremap(hdmi->pdev, in hdmi_phy_8x74_init()
89 if (IS_ERR(phy_8x74->mmio)) { in hdmi_phy_8x74_init()
90 ret = PTR_ERR(phy_8x74->mmio); in hdmi_phy_8x74_init()
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| D | hdmi.h | 55 void __iomem *mmio; member
121 msm_writel(data, hdmi->mmio + reg); in hdmi_write()
126 return msm_readl(hdmi->mmio + reg); in hdmi_read()
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| /linux-4.4.14/drivers/video/fbdev/matrox/ |
| D | matroxfb_accel.c | 414 vaddr_t mmio; in matroxfb_1bpp_imageblit() local
443 mmio = minfo->mmio.vbase; in matroxfb_1bpp_imageblit()
447 mga_writel(mmio, M_FXBNDRY, fxbndry); in matroxfb_1bpp_imageblit()
448 mga_writel(mmio, M_AR0, ar0); in matroxfb_1bpp_imageblit()
449 mga_writel(mmio, M_AR3, 0); in matroxfb_1bpp_imageblit()
451 mga_writel(mmio, M_YDSTLEN | M_EXEC, ydstlen); in matroxfb_1bpp_imageblit()
452 mga_memcpy_toio(mmio, chardata, xlen); in matroxfb_1bpp_imageblit()
454 mga_writel(mmio, M_AR5, 0); in matroxfb_1bpp_imageblit()
455 mga_writel(mmio, M_YDSTLEN | M_EXEC, ydstlen); in matroxfb_1bpp_imageblit()
459 mga_memcpy_toio(mmio, chardata, charcell); in matroxfb_1bpp_imageblit()
[all …]
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| D | matroxfb_base.h | 403 } mmio; member
666 #define mga_inb(addr) mga_readb(minfo->mmio.vbase, (addr))
667 #define mga_inl(addr) mga_readl(minfo->mmio.vbase, (addr))
668 #define mga_outb(addr,val) mga_writeb(minfo->mmio.vbase, (addr), (val))
669 #define mga_outw(addr,val) mga_writew(minfo->mmio.vbase, (addr), (val))
670 #define mga_outl(addr,val) mga_writel(minfo->mmio.vbase, (addr), (val))
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| D | matroxfb_crtc2.c | 308 fix->mmio_start = m2info->mmio.base; in matroxfb_dh_init_fix()
309 fix->mmio_len = m2info->mmio.len; in matroxfb_dh_init_fix()
628 m2info->mmio.base = minfo->mmio.base; in matroxfb_dh_regit()
629 m2info->mmio.vbase = minfo->mmio.vbase; in matroxfb_dh_regit()
630 m2info->mmio.len = minfo->mmio.len; in matroxfb_dh_regit()
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| D | matroxfb_crtc2.h | 27 } mmio; member
|
| /linux-4.4.14/drivers/mailbox/ |
| D | mailbox-test.c | 34 void __iomem *mmio; member
115 if (tdev->mmio && tdev->signal) { in mbox_test_message_write()
223 if (tdev->mmio) { in mbox_test_receive_message()
224 memcpy_fromio(tdev->rx_buffer, tdev->mmio, MBOX_MAX_MSG_LEN); in mbox_test_receive_message()
241 if (tdev->mmio) { in mbox_test_prepare_message()
243 memcpy_toio(tdev->mmio, tdev->message, MBOX_MAX_MSG_LEN); in mbox_test_prepare_message()
245 memcpy_toio(tdev->mmio, message, MBOX_MAX_MSG_LEN); in mbox_test_prepare_message()
299 tdev->mmio = devm_ioremap_resource(&pdev->dev, res); in mbox_test_probe()
300 if (IS_ERR(tdev->mmio)) in mbox_test_probe()
301 tdev->mmio = NULL; in mbox_test_probe()
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| /linux-4.4.14/arch/powerpc/kvm/ |
| D | powerpc.c | 725 if (run->mmio.len > sizeof(gpr)) { in kvmppc_complete_mmio_load()
726 printk(KERN_ERR "bad MMIO length: %d\n", run->mmio.len); in kvmppc_complete_mmio_load()
731 switch (run->mmio.len) { in kvmppc_complete_mmio_load()
732 case 8: gpr = *(u64 *)run->mmio.data; break; in kvmppc_complete_mmio_load()
733 case 4: gpr = *(u32 *)run->mmio.data; break; in kvmppc_complete_mmio_load()
734 case 2: gpr = *(u16 *)run->mmio.data; break; in kvmppc_complete_mmio_load()
735 case 1: gpr = *(u8 *)run->mmio.data; break; in kvmppc_complete_mmio_load()
738 switch (run->mmio.len) { in kvmppc_complete_mmio_load()
739 case 8: gpr = swab64(*(u64 *)run->mmio.data); break; in kvmppc_complete_mmio_load()
740 case 4: gpr = swab32(*(u32 *)run->mmio.data); break; in kvmppc_complete_mmio_load()
[all …]
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| /linux-4.4.14/drivers/gpu/drm/msm/dsi/pll/ |
| D | dsi_pll_28nm.c | 82 void __iomem *mmio; member
106 val = pll_read(pll_28nm->mmio + REG_DSI_28nm_PHY_PLL_STATUS); in pll_28nm_poll_for_ready()
121 void __iomem *base = pll_28nm->mmio; in pll_28nm_software_reset()
141 void __iomem *base = pll_28nm->mmio; in dsi_pll_28nm_clk_set_rate()
265 void __iomem *base = pll_28nm->mmio; in dsi_pll_28nm_clk_recalc_rate()
325 void __iomem *base = pll_28nm->mmio; in dsi_pll_28nm_enable_seq_hpm()
400 void __iomem *base = pll_28nm->mmio; in dsi_pll_28nm_enable_seq_lp()
444 pll_write(pll_28nm->mmio + REG_DSI_28nm_PHY_PLL_GLB_CFG, 0x00); in dsi_pll_28nm_disable_seq()
451 void __iomem *base = pll_28nm->mmio; in dsi_pll_28nm_save_state()
465 void __iomem *base = pll_28nm->mmio; in dsi_pll_28nm_restore_state()
[all …]
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| /linux-4.4.14/drivers/misc/mic/card/ |
| D | mic_x100.c | 50 return mic_mmio_read(&mdev->mmio, in mic_read_spad()
62 struct mic_mw *mw = &mdev->mmio; in mic_send_intr()
252 mdev->mmio.pa = MIC_X100_MMIO_BASE; in mic_probe()
253 mdev->mmio.len = MIC_X100_MMIO_LEN; in mic_probe()
254 mdev->mmio.va = devm_ioremap(&pdev->dev, MIC_X100_MMIO_BASE, in mic_probe()
256 if (!mdev->mmio.va) { in mic_probe()
265 mdrv->mdev.mmio.va); in mic_probe()
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| /linux-4.4.14/arch/mips/kvm/ |
| D | emulate.c | 1323 void *data = run->mmio.data; in kvm_mips_emulate_store()
1343 if (bytes > sizeof(run->mmio.data)) { in kvm_mips_emulate_store()
1345 run->mmio.len); in kvm_mips_emulate_store()
1347 run->mmio.phys_addr = in kvm_mips_emulate_store()
1350 if (run->mmio.phys_addr == KVM_INVALID_ADDR) { in kvm_mips_emulate_store()
1354 run->mmio.len = bytes; in kvm_mips_emulate_store()
1355 run->mmio.is_write = 1; in kvm_mips_emulate_store()
1367 if (bytes > sizeof(run->mmio.data)) { in kvm_mips_emulate_store()
1369 run->mmio.len); in kvm_mips_emulate_store()
1371 run->mmio.phys_addr = in kvm_mips_emulate_store()
[all …]
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| /linux-4.4.14/drivers/video/backlight/ |
| D | ep93xx_bl.c | 25 void __iomem *mmio; member
33 writel((brightness << 8) | EP93XX_MAX_COUNT, ep93xxbl->mmio); in ep93xxbl_set()
87 ep93xxbl->mmio = devm_ioremap(&dev->dev, res->start, in ep93xxbl_probe()
89 if (!ep93xxbl->mmio) in ep93xxbl_probe()
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| /linux-4.4.14/tools/lguest/ |
| D | lguest.c | 191 struct virtio_pci_mmio *mmio; member
725 vq->dev->mmio->isr = 0x1; in trigger_irq()
1171 dev->mmio->cfg.queue_enable = 0; in reset_device()
1892 d->mmio->cfg.device_feature = d->features; in emulate_mmio_write()
1894 d->mmio->cfg.device_feature = (d->features >> 32); in emulate_mmio_write()
1896 d->mmio->cfg.device_feature = 0; in emulate_mmio_write()
1903 if (d->mmio->cfg.guest_feature_select == 0) { in emulate_mmio_write()
1907 assert(d->mmio->cfg.guest_feature_select == 1); in emulate_mmio_write()
1937 if (d->mmio->cfg.device_status & ~val) in emulate_mmio_write()
1939 d->mmio->cfg.device_status, val); in emulate_mmio_write()
[all …]
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| /linux-4.4.14/drivers/gpu/drm/rcar-du/ |
| D | rcar_du_lvdsenc.c | 29 void __iomem *mmio; member
38 iowrite32(data, lvds->mmio + reg); in rcar_lvds_write()
152 lvds->mmio = devm_ioremap_resource(&pdev->dev, mem); in rcar_du_lvdsenc_get_resources()
153 if (IS_ERR(lvds->mmio)) in rcar_du_lvdsenc_get_resources()
154 return PTR_ERR(lvds->mmio); in rcar_du_lvdsenc_get_resources()
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| D | rcar_du_drv.h | 76 void __iomem *mmio; member
115 return ioread32(rcdu->mmio + reg); in rcar_du_read()
120 iowrite32(data, rcdu->mmio + reg); in rcar_du_write()
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| D | rcar_du_drv.c | 192 rcdu->mmio = devm_ioremap_resource(&pdev->dev, mem); in rcar_du_load()
193 if (IS_ERR(rcdu->mmio)) in rcar_du_load()
194 return PTR_ERR(rcdu->mmio); in rcar_du_load()
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| /linux-4.4.14/drivers/block/mtip32xx/ |
| D | mtip32xx.c | 261 writel(HOST_RESET, dd->mmio + HOST_CTL); in mtip_hba_reset()
264 readl(dd->mmio + HOST_CTL); in mtip_hba_reset()
276 } while ((readl(dd->mmio + HOST_CTL) & HOST_RESET) in mtip_hba_reset()
279 if (readl(dd->mmio + HOST_CTL) & HOST_RESET) in mtip_hba_reset()
324 tmp = readl(port->mmio + PORT_CMD); in mtip_enable_fis()
326 writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD); in mtip_enable_fis()
328 writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD); in mtip_enable_fis()
331 readl(port->mmio + PORT_CMD); in mtip_enable_fis()
350 tmp = readl(port->mmio + PORT_CMD); in mtip_enable_engine()
352 writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD); in mtip_enable_engine()
[all …]
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| D | mtip32xx.h | 367 void __iomem *mmio; member
459 void __iomem *mmio; /* Base address of the HBA registers. */ member
|
| /linux-4.4.14/drivers/media/platform/vsp1/ |
| D | vsp1.h | 57 void __iomem *mmio; member
84 return ioread32(vsp1->mmio + reg); in vsp1_read()
89 iowrite32(data, vsp1->mmio + reg); in vsp1_write()
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| /linux-4.4.14/drivers/video/fbdev/ |
| D | pmag-ba-fb.c | 41 volatile void __iomem *mmio; member
185 par->mmio = ioremap_nocache(info->fix.mmio_start, info->fix.mmio_len); in pmagbafb_probe()
186 if (!par->mmio) { in pmagbafb_probe()
191 par->dac = par->mmio + PMAG_BA_BT459; in pmagbafb_probe()
225 iounmap(par->mmio); in pmagbafb_probe()
248 iounmap(par->mmio); in pmagbafb_remove()
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| D | pmagb-b-fb.c | 37 volatile void __iomem *mmio; member
91 writel(v, par->mmio + PMAGB_B_GP0); in gp0_write()
292 par->mmio = ioremap_nocache(info->fix.mmio_start, info->fix.mmio_len); in pmagbbfb_probe()
293 if (!par->mmio) { in pmagbbfb_probe()
298 par->sfb = par->mmio + PMAGB_B_SFB; in pmagbbfb_probe()
299 par->dac = par->mmio + PMAGB_B_BT459; in pmagbbfb_probe()
343 iounmap(par->mmio); in pmagbbfb_probe()
366 iounmap(par->mmio); in pmagbbfb_remove()
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| D | s3fb.c | 39 u8 __iomem *mmio; member
194 return readb(par->mmio + DDC_MMIO_REG); in s3fb_ddc_read()
202 writeb(val, par->mmio + DDC_MMIO_REG); in s3fb_ddc_write()
1269 par->mmio = ioremap(info->fix.smem_start + MMIO_OFFSET, MMIO_SIZE); in s3_pci_probe()
1270 if (par->mmio) in s3_pci_probe()
1276 if (!s3fb_ddc_needs_mmio(par->chip) || par->mmio) in s3_pci_probe()
1371 if (par->mmio) in s3_pci_probe()
1372 iounmap(par->mmio); in s3_pci_probe()
1401 if (par->mmio) in s3_pci_remove()
1402 iounmap(par->mmio); in s3_pci_remove()
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| /linux-4.4.14/arch/arm/boot/dts/ |
| D | lpc4350.dtsi | 25 compatible = "mmio-sram";
30 compatible = "mmio-sram";
35 compatible = "mmio-sram";
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| D | lpc4357.dtsi | 25 compatible = "mmio-sram";
30 compatible = "mmio-sram";
35 compatible = "mmio-sram";
|
| /linux-4.4.14/Documentation/devicetree/bindings/arm/rockchip/ |
| D | smp-sram.txt | 8 Therefore a reserved section sub-node has to be added to the mmio-sram
14 The rest of the properties should follow the generic mmio-sram discription
20 compatible = "mmio-sram";
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| D | pmu-sram.txt | 14 compatible = "rockchip,rk3288-pmu-sram", "mmio-sram";
|
| /linux-4.4.14/drivers/video/fbdev/savage/ |
| D | savagefb.h | 223 } mmio; member
256 return readb(par->mmio.vbase + addr); in savage_in8()
261 return readw(par->mmio.vbase + addr); in savage_in16()
266 return readl(par->mmio.vbase + addr); in savage_in32()
271 writeb(val, par->mmio.vbase + addr); in savage_out8()
276 writew(val, par->mmio.vbase + addr); in savage_out16()
281 writel(val, par->mmio.vbase + addr); in savage_out32()
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| D | savagefb-i2c.c | 177 par->chan.ioaddr = par->mmio.vbase; in savagefb_create_i2c_busses()
187 par->chan.ioaddr = par->mmio.vbase; in savagefb_create_i2c_busses()
195 par->chan.ioaddr = par->mmio.vbase; in savagefb_create_i2c_busses()
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| D | savagefb_driver.c | 1614 par->vgastate.vgabase = par->mmio.vbase + 0x8000; in savagefb_open()
1720 par->mmio.pbase = pci_resource_start(par->pcidev, 0) + in savage_map_mmio()
1723 par->mmio.pbase = pci_resource_start(par->pcidev, 0) + in savage_map_mmio()
1726 par->mmio.len = SAVAGE_NEWMMIO_REGSIZE; in savage_map_mmio()
1728 par->mmio.vbase = ioremap(par->mmio.pbase, par->mmio.len); in savage_map_mmio()
1729 if (!par->mmio.vbase) { in savage_map_mmio()
1734 par->mmio.vbase); in savage_map_mmio()
1736 info->fix.mmio_start = par->mmio.pbase; in savage_map_mmio()
1737 info->fix.mmio_len = par->mmio.len; in savage_map_mmio()
1739 par->bci_base = (u32 __iomem *)(par->mmio.vbase + BCI_BUFFER_OFFSET); in savage_map_mmio()
[all …]
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| /linux-4.4.14/Documentation/devicetree/bindings/arm/exynos/ |
| D | smp-sysram.txt | 8 Therefore reserved section sub-nodes have to be added to the mmio-sram
17 The rest of the properties should follow the generic mmio-sram discription
23 compatible = "mmio-sram";
|
| /linux-4.4.14/drivers/staging/comedi/ |
| D | comedi_pci.c | 126 if (dev->mmio) { in comedi_pci_detach()
127 iounmap(dev->mmio); in comedi_pci_detach()
128 dev->mmio = NULL; in comedi_pci_detach()
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| /linux-4.4.14/drivers/memstick/host/ |
| D | r592.c | 60 u32 value = readl(dev->mmio + address); in r592_read_reg()
70 writel(value, dev->mmio + address); in r592_write_reg()
76 u32 value = __raw_readl(dev->mmio + address); in r592_read_reg_raw_be()
86 __raw_writel(cpu_to_be32(value), dev->mmio + address); in r592_write_reg_raw_be()
93 u32 reg = readl(dev->mmio + address); in r592_set_reg_mask()
95 writel(reg | mask , dev->mmio + address); in r592_set_reg_mask()
102 u32 reg = readl(dev->mmio + address); in r592_clear_reg_mask()
105 writel(reg & ~mask, dev->mmio + address); in r592_clear_reg_mask()
765 dev->mmio = pci_ioremap_bar(pdev, 0); in r592_probe()
766 if (!dev->mmio) in r592_probe()
[all …]
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| /linux-4.4.14/sound/soc/sh/ |
| D | hac.c | 78 unsigned long mmio; /* HAC base address */ member
82 .mmio = 0xFE240000,
85 .mmio = 0xFE250000,
89 .mmio = 0xFFE40000,
96 #define HACREG(reg) (*(unsigned long *)(hac->mmio + (reg)))
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| D | ssi.c | 65 #define SSIREG(reg) (*(unsigned long *)(ssi->mmio + (reg)))
68 unsigned long mmio; member
74 .mmio = 0xFE680000,
77 .mmio = 0xFE690000,
81 .mmio = 0xFFE70000,
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| D | dma-sh7760.c | 53 unsigned long mmio; /* DMABRG audio channel control reg MMIO */ member
66 .mmio = 0xFE3C0040,
70 .mmio = 0xFE3C0060,
75 #define BRGREG(x) (*(unsigned long *)(cam->mmio + (x)))
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| /linux-4.4.14/arch/powerpc/sysdev/ |
| D | dcr.c | 55 return dcr_map_ok_mmio(host.host.mmio); in dcr_map_ok_generic()
84 host.host.mmio = dcr_map_mmio(dev, dcr_n, dcr_c); in dcr_map_generic()
97 dcr_unmap_mmio(host.host.mmio, dcr_c); in dcr_unmap_generic()
108 return dcr_read_mmio(host.host.mmio, dcr_n); in dcr_read_generic()
120 dcr_write_mmio(host.host.mmio, dcr_n, value); in dcr_write_generic()
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| /linux-4.4.14/drivers/gpio/ |
| D | gpio-bt8xx.c | 62 void __iomem *mmio; member
72 #define bgwrite(dat, adr) writel((dat), bg->mmio+(adr))
73 #define bgread(adr) readl(bg->mmio+(adr))
204 bg->mmio = devm_ioremap(&dev->dev, pci_resource_start(dev, 0), 0x1000); in bt8xxgpio_probe()
205 if (!bg->mmio) { in bt8xxgpio_probe()
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| /linux-4.4.14/Documentation/devicetree/bindings/virtio/ |
| D | mmio.txt | 7 - compatible: "virtio,mmio" compatibility string
14 compatible = "virtio,mmio";
|
| /linux-4.4.14/drivers/misc/genwqe/ |
| D | card_base.c | 187 void __iomem *mmio; in genwqe_bus_reset() local
192 mmio = cd->mmio; in genwqe_bus_reset()
193 cd->mmio = NULL; in genwqe_bus_reset()
194 pci_iounmap(pci_dev, mmio); in genwqe_bus_reset()
228 cd->mmio = pci_iomap(pci_dev, 0, 0); in genwqe_bus_reset()
229 if (cd->mmio == NULL) { in genwqe_bus_reset()
998 readq(cd->mmio + IO_SLC_CFGREG_GFIR); in genwqe_health_thread()
1124 cd->mmio = pci_iomap(pci_dev, 0, 0); in genwqe_pci_setup()
1125 if (cd->mmio == NULL) { in genwqe_pci_setup()
1143 pci_iounmap(pci_dev, cd->mmio); in genwqe_pci_setup()
[all …]
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| D | card_utils.c | 61 if (cd->mmio == NULL) in __genwqe_writeq()
67 __raw_writeq((__force u64)cpu_to_be64(val), cd->mmio + byte_offs); in __genwqe_writeq()
91 if (cd->mmio == NULL) in __genwqe_readq()
94 return be64_to_cpu((__force __be64)__raw_readq(cd->mmio + byte_offs)); in __genwqe_readq()
112 if (cd->mmio == NULL) in __genwqe_writel()
118 __raw_writel((__force u32)cpu_to_be32(val), cd->mmio + byte_offs); in __genwqe_writel()
134 if (cd->mmio == NULL) in __genwqe_readl()
137 return be32_to_cpu((__force __be32)__raw_readl(cd->mmio + byte_offs)); in __genwqe_readl()
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| /linux-4.4.14/drivers/firmware/ |
| D | pcdp.c | 26 int mmio; in setup_serial_console() local
30 mmio = (uart->addr.space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY); in setup_serial_console()
32 mmio ? "mmio" : "io", uart->addr.address); in setup_serial_console()
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| /linux-4.4.14/drivers/gpu/drm/sis/ |
| D | sis_drv.h | 52 #define SIS_BASE (dev_priv->mmio)
57 drm_local_map_t *mmio; member
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| D | sis_mm.c | 249 if (dev_priv->mmio == NULL) { in sis_idle()
250 dev_priv->mmio = sis_reg_init(dev); in sis_idle()
251 if (dev_priv->mmio == NULL) { in sis_idle()
309 dev_priv->mmio = NULL; in sis_lastclose()
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| /linux-4.4.14/drivers/gpu/drm/shmobile/ |
| D | shmob_drm_regs.h | 282 iowrite32(data, sdev->mmio + reg + LCDC_MIRROR_OFFSET); in lcdc_write_mirror()
287 iowrite32(data, sdev->mmio + reg); in lcdc_write()
289 iowrite32(data, sdev->mmio + reg + LCDC_SIDE_B_OFFSET); in lcdc_write()
294 return ioread32(sdev->mmio + reg); in lcdc_read()
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| D | shmob_drm_drv.h | 32 void __iomem *mmio; member
|
| /linux-4.4.14/drivers/gpu/drm/msm/ |
| D | msm_gpu.h | 95 void __iomem *mmio; member
146 msm_writel(data, gpu->mmio + (reg << 2)); in gpu_write()
151 return msm_readl(gpu->mmio + (reg << 2)); in gpu_read()
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| /linux-4.4.14/Documentation/devicetree/bindings/soc/sunxi/ |
| D | sram.txt | 18 Each SRAM is described using the mmio-sram bindings documented in
23 once again the representation described in the mmio-sram binding.
53 compatible = "mmio-sram";
|
| /linux-4.4.14/drivers/pwm/ |
| D | pwm-sti.c | 63 void __iomem *mmio; member
317 pc->mmio = devm_ioremap_resource(dev, res); in sti_pwm_probe()
318 if (IS_ERR(pc->mmio)) in sti_pwm_probe()
319 return PTR_ERR(pc->mmio); in sti_pwm_probe()
321 pc->regmap = devm_regmap_init_mmio(dev, pc->mmio, in sti_pwm_probe()
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| /linux-4.4.14/drivers/rtc/ |
| D | rtc-snvs.c | 238 void __iomem *mmio; in snvs_rtc_probe() local
250 mmio = devm_ioremap_resource(&pdev->dev, res); in snvs_rtc_probe()
251 if (IS_ERR(mmio)) in snvs_rtc_probe()
252 return PTR_ERR(mmio); in snvs_rtc_probe()
254 data->regmap = devm_regmap_init_mmio(&pdev->dev, mmio, &snvs_rtc_config); in snvs_rtc_probe()
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| /linux-4.4.14/drivers/mtd/nand/ |
| D | cafe_nand.c | 62 void __iomem *mmio; member
99 #define cafe_readl(cafe, addr) readl((cafe)->mmio + CAFE_##addr)
100 #define cafe_writel(cafe, datum, addr) writel(datum, (cafe)->mmio + CAFE_##addr)
125 memcpy_toio(cafe->mmio + CAFE_NAND_WRITE_DATA + cafe->datalen, buf, len); in cafe_write_buf()
140 memcpy_fromio(buf, cafe->mmio + CAFE_NAND_READ_DATA + cafe->datalen, len); in cafe_read_buf()
269 printk("Register %x: %08x\n", i, readl(cafe->mmio + i)); in cafe_nand_cmdfunc()
443 printk("Register %x: %08x\n", i, readl(cafe->mmio + i)); in cafe_nand_read_page()
610 cafe->mmio = pci_iomap(pdev, 0, 0); in cafe_nand_probe()
611 if (!cafe->mmio) { in cafe_nand_probe()
785 pci_iounmap(pdev, cafe->mmio); in cafe_nand_probe()
[all …]
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| D | hisi504_nand.c | 140 void __iomem *mmio; member
375 return *(uint8_t *)(host->mmio); in hisi_nfc_read_byte()
380 return *(uint8_t *)(host->mmio + host->offset - 1); in hisi_nfc_read_byte()
490 memset(host->mmio, 0, 0x10); in hisi_nfc_cmdfunc()
502 memset(host->mmio, 0, 0x10); in hisi_nfc_cmdfunc()
626 memset(host->mmio, 0xff, HINFC504_BUFFER_BASE_ADDRESS_LEN); in hisi_nfc_host_init()
733 host->mmio = devm_ioremap_resource(dev, res); in hisi_nfc_probe()
734 if (IS_ERR(host->mmio)) { in hisi_nfc_probe()
735 ret = PTR_ERR(host->mmio); in hisi_nfc_probe()
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| D | r852.c | 36 uint8_t reg = readb(dev->mmio + address); in r852_read_reg()
44 writeb(value, dev->mmio + address); in r852_write_reg()
52 uint32_t reg = le32_to_cpu(readl(dev->mmio + address)); in r852_read_reg_dword()
60 writel(cpu_to_le32(value), dev->mmio + address); in r852_write_reg_dword()
901 dev->mmio = pci_ioremap_bar(pci_dev, 0); in r852_probe()
903 if (!dev->mmio) in r852_probe()
952 pci_iounmap(pci_dev, dev->mmio); in r852_probe()
988 pci_iounmap(pci_dev, dev->mmio); in r852_remove()
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| D | cs553x_nand.c | 186 static int __init cs553x_init_one(int cs, int mmio, unsigned long adr) in cs553x_init_one() argument
192 …printk(KERN_NOTICE "Probing CS553x NAND controller CS#%d at %sIO 0x%08lx\n", cs, mmio?"MM":"P", ad… in cs553x_init_one()
194 if (!mmio) { in cs553x_init_one()
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| /linux-4.4.14/drivers/gpu/drm/r128/ |
| D | r128_drv.h | 122 drm_local_map_t *mmio; member
396 #define R128_READ(reg) DRM_READ32(dev_priv->mmio, (reg))
397 #define R128_WRITE(reg, val) DRM_WRITE32(dev_priv->mmio, (reg), (val))
398 #define R128_READ8(reg) DRM_READ8(dev_priv->mmio, (reg))
399 #define R128_WRITE8(reg, val) DRM_WRITE8(dev_priv->mmio, (reg), (val))
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| /linux-4.4.14/drivers/misc/mic/bus/ |
| D | scif_bus.h | 55 struct mic_mw *mmio; member
118 struct mic_mw *mmio, struct mic_mw *aper,
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| D | scif_bus.c | 143 struct mic_mw *mmio, struct mic_mw *aper, void *dp, in scif_register_device() argument
164 sdev->mmio = mmio; in scif_register_device()
|
| /linux-4.4.14/drivers/gpu/drm/via/ |
| D | via_map.c | 49 dev_priv->mmio = drm_legacy_findmap(dev, init->mmio_offset); in via_do_init_map()
50 if (!dev_priv->mmio) { in via_do_init_map()
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| D | via_drv.h | 66 drm_local_map_t *mmio; member
116 #define VIA_BASE ((dev_priv->mmio))
|
| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/ |
| D | com.fuc | 152 // mmctx_size - determine size of a mmio list transfer
154 // In : $r14 mmio list head
155 // $r15 mmio list tail
172 // mmctx_xfer - execute a list of mmio transfers
179 // $r12 mmio list head
180 // $r13 mmio list tail
207 // loop over the mmio list, and send requests to the hw
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| D | gpc.fuc | 158 // determine which GPC we are, setup (optional) mmio access offset
198 // calculate GPC mmio context size
205 // calculate per-TPC mmio context size
215 // calculate per-UNK mmio context size
429 // mmio context
441 // per-TPC mmio context
457 // per-UNK mmio context
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| /linux-4.4.14/drivers/gpu/drm/msm/mdp/mdp5/ |
| D | mdp5_kms.h | 46 void __iomem *mmio, *vbif; member
113 msm_writel(data, mdp5_kms->mmio + reg); in mdp5_write()
118 return msm_readl(mdp5_kms->mmio + reg); in mdp5_read()
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| /linux-4.4.14/drivers/gpu/drm/msm/mdp/mdp4/ |
| D | mdp4_kms.h | 38 void __iomem *mmio; member
65 msm_writel(data, mdp4_kms->mmio + reg); in mdp4_write()
70 return msm_readl(mdp4_kms->mmio + reg); in mdp4_read()
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| /linux-4.4.14/drivers/gpu/drm/mga/ |
| D | mga_drv.h | 144 drm_local_map_t *mmio; member
200 #define MGA_READ8(reg) DRM_READ8(dev_priv->mmio, (reg))
201 #define MGA_READ(reg) DRM_READ32(dev_priv->mmio, (reg))
202 #define MGA_WRITE8(reg, val) DRM_WRITE8(dev_priv->mmio, (reg), (val))
203 #define MGA_WRITE(reg, val) DRM_WRITE32(dev_priv->mmio, (reg), (val))
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| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
| D | gf100.c | 332 nvkm_memory_del(&chan->mmio); in gf100_gr_chan_dtor()
349 struct gf100_gr_mmio *mmio = gr->mmio_list; in gf100_gr_chan_new() local
365 false, &chan->mmio); in gf100_gr_chan_new()
374 nvkm_memory_map(chan->mmio, &chan->mmio_vma, 0); in gf100_gr_chan_new()
395 nvkm_kmap(chan->mmio); in gf100_gr_chan_new()
396 for (i = 0; mmio->addr && i < ARRAY_SIZE(gr->mmio_list); i++) { in gf100_gr_chan_new()
397 u32 addr = mmio->addr; in gf100_gr_chan_new()
398 u32 data = mmio->data; in gf100_gr_chan_new()
400 if (mmio->buffer >= 0) { in gf100_gr_chan_new()
401 u64 info = chan->data[mmio->buffer].vma.offset; in gf100_gr_chan_new()
[all …]
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| D | ctxgf100.c | 1010 info->mmio->addr = addr; in gf100_grctx_mmio_item()
1011 info->mmio->data = data; in gf100_grctx_mmio_item()
1012 info->mmio->shift = shift; in gf100_grctx_mmio_item()
1013 info->mmio->buffer = buffer; in gf100_grctx_mmio_item()
1016 info->mmio++; in gf100_grctx_mmio_item()
1325 info.mmio = gr->mmio_list; in gf100_grctx_generate()
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| D | gm206.c | 32 .mmio = gm204_gr_pack_mmio,
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| D | gk110b.c | 106 .mmio = gk110b_gr_pack_mmio,
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| D | gf104.c | 118 .mmio = gf104_gr_pack_mmio,
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| D | gf110.c | 90 .mmio = gf110_gr_pack_mmio,
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| D | gf108.c | 109 .mmio = gf108_gr_pack_mmio,
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| D | gf119.c | 181 .mmio = gf119_gr_pack_mmio,
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| D | gf100.h | 125 const struct gf100_gr_pack *mmio; member
154 struct nvkm_memory *mmio; member
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| D | gm204.c | 261 gf100_gr_mmio(gr, gr->func->mmio); in gm204_gr_init()
357 .mmio = gm204_gr_pack_mmio,
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| D | gk104.c | 199 gf100_gr_mmio(gr, gr->func->mmio); in gk104_gr_init()
312 .mmio = gk104_gr_pack_mmio,
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| D | gk208.c | 165 .mmio = gk208_gr_pack_mmio,
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| D | gf117.c | 126 .mmio = gf117_gr_pack_mmio,
|
| /linux-4.4.14/drivers/gpu/drm/tilcdc/ |
| D | tilcdc_regs.h | 119 iowrite32(data, priv->mmio + reg); in tilcdc_write()
125 return ioread32(priv->mmio + reg); in tilcdc_read()
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| D | tilcdc_drv.c | 132 if (priv->mmio) in tilcdc_unload()
133 iounmap(priv->mmio); in tilcdc_unload()
181 priv->mmio = ioremap_nocache(res->start, resource_size(res)); in tilcdc_load()
182 if (!priv->mmio) { in tilcdc_load()
340 iounmap(priv->mmio); in tilcdc_load()
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| /linux-4.4.14/drivers/gpu/drm/nouveau/include/nvkm/core/ |
| D | pci.h | 12 bool detect, bool mmio, u64 subdev_mask,
|
| D | tegra.h | 44 bool detect, bool mmio, u64 subdev_mask,
|
| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/device/ |
| D | priv.h | 46 bool detect, bool mmio, u64 subdev_mask,
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| D | tegra.c | 247 bool detect, bool mmio, u64 subdev_mask, in nvkm_device_tegra_new() argument
293 cfg, dbg, detect, mmio, subdev_mask, in nvkm_device_tegra_new()
315 bool detect, bool mmio, u64 subdev_mask, in nvkm_device_tegra_new() argument
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| /linux-4.4.14/drivers/staging/sm750fb/ |
| D | sm750_cursor.c | 24 readl(cursor->mmio + (addr))
27 writel((data), cursor->mmio + (addr))
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| /linux-4.4.14/Documentation/devicetree/bindings/misc/ |
| D | sram.txt | 7 - compatible : mmio-sram
46 compatible = "mmio-sram";
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| /linux-4.4.14/drivers/staging/fsl-mc/ |
| D | README.txt | 120 A DPRC has a mappable mmio region (an MC portal) that can be used
171 supports and a summary of key resources of the object (mmio regions
177 -mmio regions: none
185 -mmio regions: none
194 -mmio regions: queue operations, buffer mgmt
201 -mmio regions: none
208 -mmio regions: MC command portal
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| /linux-4.4.14/arch/powerpc/include/asm/ |
| D | dcr-generic.h | 30 dcr_host_mmio_t mmio; member
|
| /linux-4.4.14/sound/pci/ |
| D | bt87x.c | 196 void __iomem *mmio; member
219 return readl(chip->mmio + reg); in snd_bt87x_readl()
224 writel(value, chip->mmio + reg); in snd_bt87x_writel()
689 if (chip->mmio) in snd_bt87x_free()
693 iounmap(chip->mmio); in snd_bt87x_free()
755 chip->mmio = pci_ioremap_bar(pci, 0); in snd_bt87x_create()
756 if (!chip->mmio) { in snd_bt87x_create()
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| /linux-4.4.14/drivers/base/regmap/ |
| D | Makefile | 11 obj-$(CONFIG_REGMAP_MMIO) += regmap-mmio.o
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| /linux-4.4.14/drivers/dma/ |
| D | mic_x100_dma.h | 145 void __iomem *mmio; member
180 return to_mic_dma_dev(ch)->mmio; in mic_dma_chan_to_mmio()
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| /linux-4.4.14/Documentation/trace/ |
| D | stm.txt | 62 Some STM devices may allow direct mapping of the channel mmio regions
67 stm device's channel mmio region is 64 bytes and hardware page size is
70 descriptor and obtain direct access to an mmio region for 64 channels.
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| /linux-4.4.14/drivers/misc/mic/scif/ |
| D | scif_nodeqp.c | 290 sdev->hw_ops->send_p2p_intr(sdev, scifdev->rdb, &scifdev->mmio); in scif_send_msg_intr()
396 num_mmio_pages = psdev->mmio->len >> PAGE_SHIFT; in scif_init_p2p_info()
402 p2p->ppi_sg[SCIF_PPI_MMIO] = scif_p2p_setsg(psdev->mmio->pa, in scif_init_p2p_info()
800 newdev->mmio.va = ioremap_nocache(msg->payload[1], sdev->mmio->len); in scif_node_add()
801 if (!newdev->mmio.va) { in scif_node_add()
843 iounmap(newdev->mmio.va); in scif_node_add()
844 newdev->mmio.va = NULL; in scif_node_add()
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| /linux-4.4.14/arch/openrisc/boot/dts/ |
| D | or1ksim.dts | 9 bootargs = "console=uart,mmio,0x90000000,115200";
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| /linux-4.4.14/drivers/gpu/drm/savage/ |
| D | savage_drv.h | 157 drm_local_map_t *mmio; member
487 #define SAVAGE_READ(reg) DRM_READ32( dev_priv->mmio, (reg) )
488 #define SAVAGE_WRITE(reg) DRM_WRITE32( dev_priv->mmio, (reg) )
|