| /linux-4.4.14/arch/arm/vfp/ |
| D | vfpinstr.h | 13 #define INST_CPRTDO(inst) (((inst) & 0x0f000000) == 0x0e000000) argument
14 #define INST_CPRT(inst) ((inst) & (1 << 4)) argument
15 #define INST_CPRT_L(inst) ((inst) & (1 << 20)) argument
16 #define INST_CPRT_Rd(inst) (((inst) & (15 << 12)) >> 12) argument
17 #define INST_CPRT_OP(inst) (((inst) >> 21) & 7) argument
18 #define INST_CPNUM(inst) ((inst) & 0xf00) argument
33 #define FOP_TO_IDX(inst) ((inst & 0x00b00000) >> 20 | (inst & (1 << 6)) >> 4) argument
52 #define FEXT_TO_IDX(inst) ((inst & 0x000f0000) >> 15 | (inst & (1 << 7)) >> 7) argument
54 #define vfp_get_sd(inst) ((inst & 0x0000f000) >> 11 | (inst & (1 << 22)) >> 22) argument
55 #define vfp_get_dd(inst) ((inst & 0x0000f000) >> 12 | (inst & (1 << 22)) >> 18) argument
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| /linux-4.4.14/arch/powerpc/include/asm/ |
| D | disassemble.h | 25 static inline unsigned int get_op(u32 inst) in get_op() argument
27 return inst >> 26; in get_op()
30 static inline unsigned int get_xop(u32 inst) in get_xop() argument
32 return (inst >> 1) & 0x3ff; in get_xop()
35 static inline unsigned int get_sprn(u32 inst) in get_sprn() argument
37 return ((inst >> 16) & 0x1f) | ((inst >> 6) & 0x3e0); in get_sprn()
40 static inline unsigned int get_dcrn(u32 inst) in get_dcrn() argument
42 return ((inst >> 16) & 0x1f) | ((inst >> 6) & 0x3e0); in get_dcrn()
45 static inline unsigned int get_tmrn(u32 inst) in get_tmrn() argument
47 return ((inst >> 16) & 0x1f) | ((inst >> 6) & 0x3e0); in get_tmrn()
[all …]
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| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
| D | nv25.c | 36 &chan->inst); in nv25_gr_chan_new()
40 nvkm_kmap(chan->inst); in nv25_gr_chan_new()
41 nvkm_wo32(chan->inst, 0x0028, 0x00000001 | (chan->chid << 24)); in nv25_gr_chan_new()
42 nvkm_wo32(chan->inst, 0x035c, 0xffff0000); in nv25_gr_chan_new()
43 nvkm_wo32(chan->inst, 0x03c0, 0x0fff0000); in nv25_gr_chan_new()
44 nvkm_wo32(chan->inst, 0x03c4, 0x0fff0000); in nv25_gr_chan_new()
45 nvkm_wo32(chan->inst, 0x049c, 0x00000101); in nv25_gr_chan_new()
46 nvkm_wo32(chan->inst, 0x04b0, 0x00000111); in nv25_gr_chan_new()
47 nvkm_wo32(chan->inst, 0x04c8, 0x00000080); in nv25_gr_chan_new()
48 nvkm_wo32(chan->inst, 0x04cc, 0xffff0000); in nv25_gr_chan_new()
[all …]
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| D | nv34.c | 36 &chan->inst); in nv34_gr_chan_new()
40 nvkm_kmap(chan->inst); in nv34_gr_chan_new()
41 nvkm_wo32(chan->inst, 0x0028, 0x00000001 | (chan->chid << 24)); in nv34_gr_chan_new()
42 nvkm_wo32(chan->inst, 0x040c, 0x01000101); in nv34_gr_chan_new()
43 nvkm_wo32(chan->inst, 0x0420, 0x00000111); in nv34_gr_chan_new()
44 nvkm_wo32(chan->inst, 0x0424, 0x00000060); in nv34_gr_chan_new()
45 nvkm_wo32(chan->inst, 0x0440, 0x00000080); in nv34_gr_chan_new()
46 nvkm_wo32(chan->inst, 0x0444, 0xffff0000); in nv34_gr_chan_new()
47 nvkm_wo32(chan->inst, 0x0448, 0x00000001); in nv34_gr_chan_new()
48 nvkm_wo32(chan->inst, 0x045c, 0x44400000); in nv34_gr_chan_new()
[all …]
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| D | nv35.c | 36 &chan->inst); in nv35_gr_chan_new()
40 nvkm_kmap(chan->inst); in nv35_gr_chan_new()
41 nvkm_wo32(chan->inst, 0x0028, 0x00000001 | (chan->chid << 24)); in nv35_gr_chan_new()
42 nvkm_wo32(chan->inst, 0x040c, 0x00000101); in nv35_gr_chan_new()
43 nvkm_wo32(chan->inst, 0x0420, 0x00000111); in nv35_gr_chan_new()
44 nvkm_wo32(chan->inst, 0x0424, 0x00000060); in nv35_gr_chan_new()
45 nvkm_wo32(chan->inst, 0x0440, 0x00000080); in nv35_gr_chan_new()
46 nvkm_wo32(chan->inst, 0x0444, 0xffff0000); in nv35_gr_chan_new()
47 nvkm_wo32(chan->inst, 0x0448, 0x00000001); in nv35_gr_chan_new()
48 nvkm_wo32(chan->inst, 0x045c, 0x44400000); in nv35_gr_chan_new()
[all …]
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| D | nv2a.c | 36 &chan->inst); in nv2a_gr_chan_new()
40 nvkm_kmap(chan->inst); in nv2a_gr_chan_new()
41 nvkm_wo32(chan->inst, 0x0000, 0x00000001 | (chan->chid << 24)); in nv2a_gr_chan_new()
42 nvkm_wo32(chan->inst, 0x033c, 0xffff0000); in nv2a_gr_chan_new()
43 nvkm_wo32(chan->inst, 0x03a0, 0x0fff0000); in nv2a_gr_chan_new()
44 nvkm_wo32(chan->inst, 0x03a4, 0x0fff0000); in nv2a_gr_chan_new()
45 nvkm_wo32(chan->inst, 0x047c, 0x00000101); in nv2a_gr_chan_new()
46 nvkm_wo32(chan->inst, 0x0490, 0x00000111); in nv2a_gr_chan_new()
47 nvkm_wo32(chan->inst, 0x04a8, 0x44400000); in nv2a_gr_chan_new()
49 nvkm_wo32(chan->inst, i, 0x00030303); in nv2a_gr_chan_new()
[all …]
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| D | nv30.c | 37 &chan->inst); in nv30_gr_chan_new()
41 nvkm_kmap(chan->inst); in nv30_gr_chan_new()
42 nvkm_wo32(chan->inst, 0x0028, 0x00000001 | (chan->chid << 24)); in nv30_gr_chan_new()
43 nvkm_wo32(chan->inst, 0x0410, 0x00000101); in nv30_gr_chan_new()
44 nvkm_wo32(chan->inst, 0x0424, 0x00000111); in nv30_gr_chan_new()
45 nvkm_wo32(chan->inst, 0x0428, 0x00000060); in nv30_gr_chan_new()
46 nvkm_wo32(chan->inst, 0x0444, 0x00000080); in nv30_gr_chan_new()
47 nvkm_wo32(chan->inst, 0x0448, 0xffff0000); in nv30_gr_chan_new()
48 nvkm_wo32(chan->inst, 0x044c, 0x00000001); in nv30_gr_chan_new()
49 nvkm_wo32(chan->inst, 0x0460, 0x44400000); in nv30_gr_chan_new()
[all …]
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| D | nv04.c | 445 nv04_gr_set_ctx1(struct nvkm_device *device, u32 inst, u32 mask, u32 value) in nv04_gr_set_ctx1() argument
450 tmp = nvkm_rd32(device, 0x700000 + inst); in nv04_gr_set_ctx1()
453 nvkm_wr32(device, 0x700000 + inst, tmp); in nv04_gr_set_ctx1()
460 nv04_gr_set_ctx_val(struct nvkm_device *device, u32 inst, u32 mask, u32 value) in nv04_gr_set_ctx_val() argument
465 ctx1 = nvkm_rd32(device, 0x700000 + inst); in nv04_gr_set_ctx_val()
469 tmp = nvkm_rd32(device, 0x70000c + inst); in nv04_gr_set_ctx_val()
472 nvkm_wr32(device, 0x70000c + inst, tmp); in nv04_gr_set_ctx_val()
504 nv04_gr_set_ctx1(device, inst, 0x01000000, valid << 24); in nv04_gr_set_ctx_val()
508 nv04_gr_mthd_set_operation(struct nvkm_device *device, u32 inst, u32 data) in nv04_gr_mthd_set_operation() argument
516 nv04_gr_set_ctx1(device, inst, 0x00038000, data << 15); in nv04_gr_mthd_set_operation()
[all …]
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| D | nv20.c | 20 u32 inst = nvkm_memory_addr(chan->inst); in nv20_gr_chan_init() local
23 nvkm_wo32(gr->ctxtab, chan->chid * 4, inst >> 4); in nv20_gr_chan_init()
34 u32 inst = nvkm_memory_addr(chan->inst); in nv20_gr_chan_fini() local
41 nvkm_wr32(device, 0x400784, inst >> 4); in nv20_gr_chan_fini()
62 nvkm_memory_del(&chan->inst); in nv20_gr_chan_dtor()
90 &chan->inst); in nv20_gr_chan_new()
94 nvkm_kmap(chan->inst); in nv20_gr_chan_new()
95 nvkm_wo32(chan->inst, 0x0000, 0x00000001 | (chan->chid << 24)); in nv20_gr_chan_new()
96 nvkm_wo32(chan->inst, 0x033c, 0xffff0000); in nv20_gr_chan_new()
97 nvkm_wo32(chan->inst, 0x03a0, 0x0fff0000); in nv20_gr_chan_new()
[all …]
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| /linux-4.4.14/net/netfilter/ |
| D | nfnetlink_log.c | 105 struct nfulnl_instance *inst; in __instance_lookup() local
108 hlist_for_each_entry_rcu(inst, head, hlist) { in __instance_lookup()
109 if (inst->group_num == group_num) in __instance_lookup()
110 return inst; in __instance_lookup()
116 instance_get(struct nfulnl_instance *inst) in instance_get() argument
118 atomic_inc(&inst->use); in instance_get()
124 struct nfulnl_instance *inst; in instance_lookup_get() local
127 inst = __instance_lookup(log, group_num); in instance_lookup_get()
128 if (inst && !atomic_inc_not_zero(&inst->use)) in instance_lookup_get()
129 inst = NULL; in instance_lookup_get()
[all …]
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| D | nfnetlink_queue.c | 102 struct nfqnl_instance *inst; in instance_lookup() local
105 hlist_for_each_entry_rcu(inst, head, hlist) { in instance_lookup()
106 if (inst->queue_num == queue_num) in instance_lookup()
107 return inst; in instance_lookup()
115 struct nfqnl_instance *inst; in instance_create() local
125 inst = kzalloc(sizeof(*inst), GFP_ATOMIC); in instance_create()
126 if (!inst) { in instance_create()
131 inst->queue_num = queue_num; in instance_create()
132 inst->peer_portid = portid; in instance_create()
133 inst->queue_maxlen = NFQNL_QMAX_DEFAULT; in instance_create()
[all …]
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| /linux-4.4.14/arch/arm64/kernel/ |
| D | kuser32.S | 38 .inst 0xe92d00f0 // push {r4, r5, r6, r7}
39 .inst 0xe1c040d0 // ldrd r4, r5, [r0]
40 .inst 0xe1c160d0 // ldrd r6, r7, [r1]
41 .inst 0xe1b20f9f // 1: ldrexd r0, r1, [r2]
42 .inst 0xe0303004 // eors r3, r0, r4
43 .inst 0x00313005 // eoreqs r3, r1, r5
44 .inst 0x01a23e96 // stlexdeq r3, r6, [r2]
45 .inst 0x03330001 // teqeq r3, #1
46 .inst 0x0afffff9 // beq 1b
47 .inst 0xf57ff05b // dmb ish
[all …]
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| /linux-4.4.14/arch/powerpc/kernel/ |
| D | kvm.c | 80 static inline void kvm_patch_ins(u32 *inst, u32 new_inst) in kvm_patch_ins() argument
82 *inst = new_inst; in kvm_patch_ins()
83 flush_icache_range((ulong)inst, (ulong)inst + 4); in kvm_patch_ins()
86 static void kvm_patch_ins_ll(u32 *inst, long addr, u32 rt) in kvm_patch_ins_ll() argument
89 kvm_patch_ins(inst, KVM_INST_LD | rt | (addr & 0x0000fffc)); in kvm_patch_ins_ll()
91 kvm_patch_ins(inst, KVM_INST_LWZ | rt | (addr & 0x0000fffc)); in kvm_patch_ins_ll()
95 static void kvm_patch_ins_ld(u32 *inst, long addr, u32 rt) in kvm_patch_ins_ld() argument
98 kvm_patch_ins(inst, KVM_INST_LD | rt | (addr & 0x0000fffc)); in kvm_patch_ins_ld()
100 kvm_patch_ins(inst, KVM_INST_LWZ | rt | ((addr + 4) & 0x0000fffc)); in kvm_patch_ins_ld()
104 static void kvm_patch_ins_lwz(u32 *inst, long addr, u32 rt) in kvm_patch_ins_lwz() argument
[all …]
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| D | epapr_paravirt.c | 51 u32 inst = be32_to_cpu(insts[i]); in early_init_dt_scan_epapr() local
52 patch_instruction(epapr_hypercall_start + i, inst); in early_init_dt_scan_epapr()
54 patch_instruction(epapr_ev_idle_start + i, inst); in early_init_dt_scan_epapr()
|
| /linux-4.4.14/arch/cris/include/arch-v32/arch/hwregs/ |
| D | dma.h | 75 #define DMA_ENABLE( inst ) \ argument
76 do { reg_dma_rw_cfg e = REG_RD( dma, inst, rw_cfg );\
78 REG_WR( dma, inst, rw_cfg, e); } while( 0 )
81 #define DMA_RESET( inst ) \ argument
82 do { reg_dma_rw_cfg r = REG_RD( dma, inst, rw_cfg );\
84 REG_WR( dma, inst, rw_cfg, r); } while( 0 )
87 #define DMA_STOP( inst ) \ argument
88 do { reg_dma_rw_cfg s = REG_RD( dma, inst, rw_cfg );\
90 REG_WR( dma, inst, rw_cfg, s); } while( 0 )
93 #define DMA_CONTINUE( inst ) \ argument
[all …]
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| D | marb_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | irq_nmi_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | strcop_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | config_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | rt_trace_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | ata_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | bif_slave_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | ser_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | bif_core_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | marb_bp_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | eth_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | sser_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | dma_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | extmem_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | bif_dma_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| /linux-4.4.14/arch/arm/mach-omap2/ |
| D | cm33xx.c | 51 static inline u32 am33xx_cm_read_reg(u16 inst, u16 idx) in am33xx_cm_read_reg() argument
53 return readl_relaxed(cm_base + inst + idx); in am33xx_cm_read_reg()
57 static inline void am33xx_cm_write_reg(u32 val, u16 inst, u16 idx) in am33xx_cm_write_reg() argument
59 writel_relaxed(val, cm_base + inst + idx); in am33xx_cm_write_reg()
63 static inline u32 am33xx_cm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx) in am33xx_cm_rmw_reg_bits() argument
67 v = am33xx_cm_read_reg(inst, idx); in am33xx_cm_rmw_reg_bits()
70 am33xx_cm_write_reg(v, inst, idx); in am33xx_cm_rmw_reg_bits()
83 static u32 _clkctrl_idlest(u16 inst, u16 clkctrl_offs) in _clkctrl_idlest() argument
85 u32 v = am33xx_cm_read_reg(inst, clkctrl_offs); in _clkctrl_idlest()
99 static bool _is_module_ready(u16 inst, u16 clkctrl_offs) in _is_module_ready() argument
[all …]
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| D | prminst44xx.c | 59 u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx) in omap4_prminst_read_inst_reg() argument
64 return readl_relaxed(_prm_bases[part] + inst + idx); in omap4_prminst_read_inst_reg()
68 void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx) in omap4_prminst_write_inst_reg() argument
73 writel_relaxed(val, _prm_bases[part] + inst + idx); in omap4_prminst_write_inst_reg()
77 u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16 inst, in omap4_prminst_rmw_inst_reg_bits() argument
82 v = omap4_prminst_read_inst_reg(part, inst, idx); in omap4_prminst_rmw_inst_reg_bits()
85 omap4_prminst_write_inst_reg(v, part, inst, idx); in omap4_prminst_rmw_inst_reg_bits()
100 int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst, in omap4_prminst_is_hardreset_asserted() argument
105 v = omap4_prminst_read_inst_reg(part, inst, rstctrl_offs); in omap4_prminst_is_hardreset_asserted()
124 int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, in omap4_prminst_assert_hardreset() argument
[all …]
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| D | cminst44xx.c | 76 static u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx);
87 static u32 _clkctrl_idlest(u8 part, u16 inst, u16 clkctrl_offs) in _clkctrl_idlest() argument
89 u32 v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs); in _clkctrl_idlest()
104 static bool _is_module_ready(u8 part, u16 inst, u16 clkctrl_offs) in _is_module_ready() argument
108 v = _clkctrl_idlest(part, inst, clkctrl_offs); in _is_module_ready()
115 static u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx) in omap4_cminst_read_inst_reg() argument
120 return readl_relaxed(_cm_bases[part] + inst + idx); in omap4_cminst_read_inst_reg()
124 static void omap4_cminst_write_inst_reg(u32 val, u8 part, u16 inst, u16 idx) in omap4_cminst_write_inst_reg() argument
129 writel_relaxed(val, _cm_bases[part] + inst + idx); in omap4_cminst_write_inst_reg()
133 static u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, u16 inst, in omap4_cminst_rmw_inst_reg_bits() argument
[all …]
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| D | prm44xx.c | 92 static u32 omap4_prm_read_inst_reg(s16 inst, u16 reg) in omap4_prm_read_inst_reg() argument
94 return readl_relaxed(prm_base + inst + reg); in omap4_prm_read_inst_reg()
98 static void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 reg) in omap4_prm_write_inst_reg() argument
100 writel_relaxed(val, prm_base + inst + reg); in omap4_prm_write_inst_reg()
104 static u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg) in omap4_prm_rmw_inst_reg_bits() argument
108 v = omap4_prm_read_inst_reg(inst, reg); in omap4_prm_rmw_inst_reg_bits()
111 omap4_prm_write_inst_reg(v, inst, reg); in omap4_prm_rmw_inst_reg_bits()
166 s32 inst = omap4_prmst_get_prm_dev_inst(); in omap4_prm_vcvp_read() local
168 if (inst == PRM_INSTANCE_UNKNOWN) in omap4_prm_vcvp_read()
172 inst, offset); in omap4_prm_vcvp_read()
[all …]
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| D | prcm_mpu44xx.c | 31 u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 reg) in omap4_prcm_mpu_read_inst_reg() argument
33 return readl_relaxed(OMAP44XX_PRCM_MPU_REGADDR(inst, reg)); in omap4_prcm_mpu_read_inst_reg()
36 void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 reg) in omap4_prcm_mpu_write_inst_reg() argument
38 writel_relaxed(val, OMAP44XX_PRCM_MPU_REGADDR(inst, reg)); in omap4_prcm_mpu_write_inst_reg()
41 u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg) in omap4_prcm_mpu_rmw_inst_reg_bits() argument
45 v = omap4_prcm_mpu_read_inst_reg(inst, reg); in omap4_prcm_mpu_rmw_inst_reg_bits()
48 omap4_prcm_mpu_write_inst_reg(v, inst, reg); in omap4_prcm_mpu_rmw_inst_reg_bits()
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| D | prm33xx.c | 31 static u32 am33xx_prm_read_reg(s16 inst, u16 idx) in am33xx_prm_read_reg() argument
33 return readl_relaxed(prm_base + inst + idx); in am33xx_prm_read_reg()
37 static void am33xx_prm_write_reg(u32 val, s16 inst, u16 idx) in am33xx_prm_write_reg() argument
39 writel_relaxed(val, prm_base + inst + idx); in am33xx_prm_write_reg()
43 static u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx) in am33xx_prm_rmw_reg_bits() argument
47 v = am33xx_prm_read_reg(inst, idx); in am33xx_prm_rmw_reg_bits()
50 am33xx_prm_write_reg(v, inst, idx); in am33xx_prm_rmw_reg_bits()
67 static int am33xx_prm_is_hardreset_asserted(u8 shift, u8 part, s16 inst, in am33xx_prm_is_hardreset_asserted() argument
72 v = am33xx_prm_read_reg(inst, rstctrl_offs); in am33xx_prm_is_hardreset_asserted()
93 static int am33xx_prm_assert_hardreset(u8 shift, u8 part, s16 inst, in am33xx_prm_assert_hardreset() argument
[all …]
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| D | prminst44xx.h | 23 extern u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx);
24 extern void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx);
26 s16 inst, u16 idx);
30 extern int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst,
32 extern int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst,
35 s16 inst, u16 rstctrl_offs,
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| D | cm.h | 59 void (*module_enable)(u8 mode, u8 part, u16 inst, u16 clkctrl_offs);
60 void (*module_disable)(u8 part, u16 inst, u16 clkctrl_offs);
69 int omap_cm_module_enable(u8 mode, u8 part, u16 inst, u16 clkctrl_offs);
70 int omap_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs);
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| D | prcm_mpu_44xx_54xx.h | 29 extern u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 idx);
30 extern void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 idx);
31 extern u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst,
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| /linux-4.4.14/drivers/crypto/qat/qat_common/ |
| D | qat_crypto.c | 61 void qat_crypto_put_instance(struct qat_crypto_instance *inst) in qat_crypto_put_instance() argument
63 atomic_dec(&inst->refctr); in qat_crypto_put_instance()
64 adf_dev_put(inst->accel_dev); in qat_crypto_put_instance()
69 struct qat_crypto_instance *inst; in qat_crypto_free_instances() local
74 inst = list_entry(list_ptr, struct qat_crypto_instance, list); in qat_crypto_free_instances()
76 for (i = 0; i < atomic_read(&inst->refctr); i++) in qat_crypto_free_instances()
77 qat_crypto_put_instance(inst); in qat_crypto_free_instances()
79 if (inst->sym_tx) in qat_crypto_free_instances()
80 adf_remove_ring(inst->sym_tx); in qat_crypto_free_instances()
82 if (inst->sym_rx) in qat_crypto_free_instances()
[all …]
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| D | qat_algs.c | 114 struct qat_crypto_instance *inst; member
124 struct qat_crypto_instance *inst; member
582 dev = &GET_DEV(ctx->inst->accel_dev); in qat_alg_aead_setkey()
590 struct qat_crypto_instance *inst = in qat_alg_aead_setkey() local
592 if (!inst) { in qat_alg_aead_setkey()
596 dev = &GET_DEV(inst->accel_dev); in qat_alg_aead_setkey()
597 ctx->inst = inst; in qat_alg_aead_setkey()
630 static void qat_alg_free_bufl(struct qat_crypto_instance *inst, in qat_alg_free_bufl() argument
633 struct device *dev = &GET_DEV(inst->accel_dev); in qat_alg_free_bufl()
662 static int qat_alg_sgl_to_bufl(struct qat_crypto_instance *inst, in qat_alg_sgl_to_bufl() argument
[all …]
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| D | qat_asym_algs.c | 102 struct qat_crypto_instance *inst; member
121 struct device *dev = &GET_DEV(req->ctx->inst->accel_dev); in qat_rsa_cb()
244 struct qat_crypto_instance *inst = ctx->inst; in qat_rsa_enc() local
245 struct device *dev = &GET_DEV(inst->accel_dev); in qat_rsa_enc()
338 ret = adf_send_message(ctx->inst->pke_tx, (uint32_t *)msg); in qat_rsa_enc()
375 struct qat_crypto_instance *inst = ctx->inst; in qat_rsa_dec() local
376 struct device *dev = &GET_DEV(inst->accel_dev); in qat_rsa_dec()
470 ret = adf_send_message(ctx->inst->pke_tx, (uint32_t *)msg); in qat_rsa_dec()
507 struct qat_crypto_instance *inst = ctx->inst; in qat_rsa_get_n() local
508 struct device *dev = &GET_DEV(inst->accel_dev); in qat_rsa_get_n()
[all …]
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| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
| D | gpfifogf100.c | 59 struct nvkm_gpuobj *inst = chan->base.inst; in gf100_fifo_gpfifo_engine_fini() local
75 nvkm_kmap(inst); in gf100_fifo_gpfifo_engine_fini()
76 nvkm_wo32(inst, offset + 0x00, 0x00000000); in gf100_fifo_gpfifo_engine_fini()
77 nvkm_wo32(inst, offset + 0x04, 0x00000000); in gf100_fifo_gpfifo_engine_fini()
78 nvkm_done(inst); in gf100_fifo_gpfifo_engine_fini()
90 struct nvkm_gpuobj *inst = chan->base.inst; in gf100_fifo_gpfifo_engine_init() local
94 nvkm_kmap(inst); in gf100_fifo_gpfifo_engine_init()
95 nvkm_wo32(inst, offset + 0x00, lower_32_bits(addr) | 4); in gf100_fifo_gpfifo_engine_init()
96 nvkm_wo32(inst, offset + 0x04, upper_32_bits(addr)); in gf100_fifo_gpfifo_engine_init()
97 nvkm_done(inst); in gf100_fifo_gpfifo_engine_init()
[all …]
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| D | gpfifogk104.c | 80 struct nvkm_gpuobj *inst = chan->base.inst; in gk104_fifo_gpfifo_engine_fini() local
88 nvkm_kmap(inst); in gk104_fifo_gpfifo_engine_fini()
89 nvkm_wo32(inst, offset + 0x00, 0x00000000); in gk104_fifo_gpfifo_engine_fini()
90 nvkm_wo32(inst, offset + 0x04, 0x00000000); in gk104_fifo_gpfifo_engine_fini()
91 nvkm_done(inst); in gk104_fifo_gpfifo_engine_fini()
103 struct nvkm_gpuobj *inst = chan->base.inst; in gk104_fifo_gpfifo_engine_init() local
107 nvkm_kmap(inst); in gk104_fifo_gpfifo_engine_init()
108 nvkm_wo32(inst, offset + 0x00, lower_32_bits(addr) | 4); in gk104_fifo_gpfifo_engine_init()
109 nvkm_wo32(inst, offset + 0x04, upper_32_bits(addr)); in gk104_fifo_gpfifo_engine_init()
110 nvkm_done(inst); in gk104_fifo_gpfifo_engine_init()
[all …]
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| /linux-4.4.14/arch/cris/include/arch-v32/mach-fs/mach/hwregs/ |
| D | marb_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | strmux_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | config_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | timer_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | intr_vect_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | bif_slave_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | gio_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | bif_core_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | marb_bp_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | pinmux_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | bif_dma_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| /linux-4.4.14/arch/cris/include/arch-v32/mach-a3/mach/hwregs/ |
| D | marb_bar_defs.h | 15 #define REG_RD( scope, inst, reg ) \ argument
17 (inst) + REG_RD_ADDR_##scope##_##reg )
21 #define REG_WR( scope, inst, reg, val ) \ argument
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
41 #define REG_RD_INT( scope, inst, reg ) \ argument
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | strmux_defs.h | 15 #define REG_RD( scope, inst, reg ) \ argument
17 (inst) + REG_RD_ADDR_##scope##_##reg )
21 #define REG_WR( scope, inst, reg, val ) \ argument
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
41 #define REG_RD_INT( scope, inst, reg ) \ argument
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | l2cache_defs.h | 15 #define REG_RD( scope, inst, reg ) \ argument
17 (inst) + REG_RD_ADDR_##scope##_##reg )
21 #define REG_WR( scope, inst, reg, val ) \ argument
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
41 #define REG_RD_INT( scope, inst, reg ) \ argument
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | clkgen_defs.h | 15 #define REG_RD( scope, inst, reg ) \ argument
17 (inst) + REG_RD_ADDR_##scope##_##reg )
21 #define REG_WR( scope, inst, reg, val ) \ argument
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
41 #define REG_RD_INT( scope, inst, reg ) \ argument
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
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| D | marb_foo_defs.h | 15 #define REG_RD( scope, inst, reg ) \ argument
17 (inst) + REG_RD_ADDR_##scope##_##reg )
21 #define REG_WR( scope, inst, reg, val ) \ argument
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
41 #define REG_RD_INT( scope, inst, reg ) \ argument
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | timer_defs.h | 15 #define REG_RD( scope, inst, reg ) \ argument
17 (inst) + REG_RD_ADDR_##scope##_##reg )
21 #define REG_WR( scope, inst, reg, val ) \ argument
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
41 #define REG_RD_INT( scope, inst, reg ) \ argument
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | ddr2_defs.h | 15 #define REG_RD( scope, inst, reg ) \ argument
17 (inst) + REG_RD_ADDR_##scope##_##reg )
21 #define REG_WR( scope, inst, reg, val ) \ argument
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
41 #define REG_RD_INT( scope, inst, reg ) \ argument
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | pinmux_defs.h | 15 #define REG_RD( scope, inst, reg ) \ argument
17 (inst) + REG_RD_ADDR_##scope##_##reg )
21 #define REG_WR( scope, inst, reg, val ) \ argument
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
41 #define REG_RD_INT( scope, inst, reg ) \ argument
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | pio_defs.h | 15 #define REG_RD( scope, inst, reg ) \ argument
17 (inst) + REG_RD_ADDR_##scope##_##reg )
21 #define REG_WR( scope, inst, reg, val ) \ argument
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
41 #define REG_RD_INT( scope, inst, reg ) \ argument
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | intr_vect_defs.h | 15 #define REG_RD( scope, inst, reg ) \ argument
17 (inst) + REG_RD_ADDR_##scope##_##reg )
21 #define REG_WR( scope, inst, reg, val ) \ argument
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
41 #define REG_RD_INT( scope, inst, reg ) \ argument
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | gio_defs.h | 15 #define REG_RD( scope, inst, reg ) \ argument
17 (inst) + REG_RD_ADDR_##scope##_##reg )
21 #define REG_WR( scope, inst, reg, val ) \ argument
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
41 #define REG_RD_INT( scope, inst, reg ) \ argument
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| /linux-4.4.14/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/ |
| D | iop_version_defs.h | 15 #define REG_RD( scope, inst, reg ) \ argument
17 (inst) + REG_RD_ADDR_##scope##_##reg )
21 #define REG_WR( scope, inst, reg, val ) \ argument
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
41 #define REG_RD_INT( scope, inst, reg ) \ argument
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | iop_sap_in_defs.h | 15 #define REG_RD( scope, inst, reg ) \ argument
17 (inst) + REG_RD_ADDR_##scope##_##reg )
21 #define REG_WR( scope, inst, reg, val ) \ argument
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
41 #define REG_RD_INT( scope, inst, reg ) \ argument
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | iop_sap_out_defs.h | 15 #define REG_RD( scope, inst, reg ) \ argument
17 (inst) + REG_RD_ADDR_##scope##_##reg )
21 #define REG_WR( scope, inst, reg, val ) \ argument
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
41 #define REG_RD_INT( scope, inst, reg ) \ argument
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | iop_sw_spu_defs.h | 15 #define REG_RD( scope, inst, reg ) \ argument
17 (inst) + REG_RD_ADDR_##scope##_##reg )
21 #define REG_WR( scope, inst, reg, val ) \ argument
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
41 #define REG_RD_INT( scope, inst, reg ) \ argument
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | iop_sw_cpu_defs.h | 15 #define REG_RD( scope, inst, reg ) \ argument
17 (inst) + REG_RD_ADDR_##scope##_##reg )
21 #define REG_WR( scope, inst, reg, val ) \ argument
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
41 #define REG_RD_INT( scope, inst, reg ) \ argument
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | iop_sw_mpu_defs.h | 15 #define REG_RD( scope, inst, reg ) \ argument
17 (inst) + REG_RD_ADDR_##scope##_##reg )
21 #define REG_WR( scope, inst, reg, val ) \ argument
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
41 #define REG_RD_INT( scope, inst, reg ) \ argument
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | iop_sw_cfg_defs.h | 15 #define REG_RD( scope, inst, reg ) \ argument
17 (inst) + REG_RD_ADDR_##scope##_##reg )
21 #define REG_WR( scope, inst, reg, val ) \ argument
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
41 #define REG_RD_INT( scope, inst, reg ) \ argument
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| /linux-4.4.14/arch/cris/include/arch-v32/arch/hwregs/iop/ |
| D | iop_version_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | iop_scrc_in_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | iop_scrc_out_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | iop_trigger_grp_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | iop_fifo_in_extra_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | iop_fifo_out_extra_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | iop_sap_in_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | iop_mpu_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | iop_crc_par_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | iop_fifo_in_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | iop_timer_grp_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | iop_fifo_out_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | iop_sap_out_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | iop_dmc_out_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | iop_dmc_in_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | iop_spu_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | iop_sw_spu_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | iop_sw_cpu_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | iop_sw_mpu_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| D | iop_sw_cfg_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument
20 (inst) + REG_RD_ADDR_##scope##_##reg )
24 #define REG_WR( scope, inst, reg, val ) \ argument
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
44 #define REG_RD_INT( scope, inst, reg ) \ argument
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
[all …]
|
| /linux-4.4.14/crypto/ |
| D | ctr.c | 160 struct crypto_instance *inst = (void *)tfm->__crt_alg; in crypto_ctr_init_tfm() local
161 struct crypto_spawn *spawn = crypto_instance_ctx(inst); in crypto_ctr_init_tfm()
183 struct crypto_instance *inst; in crypto_ctr_alloc() local
205 inst = crypto_alloc_instance("ctr", alg); in crypto_ctr_alloc()
206 if (IS_ERR(inst)) in crypto_ctr_alloc()
209 inst->alg.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER; in crypto_ctr_alloc()
210 inst->alg.cra_priority = alg->cra_priority; in crypto_ctr_alloc()
211 inst->alg.cra_blocksize = 1; in crypto_ctr_alloc()
212 inst->alg.cra_alignmask = alg->cra_alignmask | (__alignof__(u32) - 1); in crypto_ctr_alloc()
213 inst->alg.cra_type = &crypto_blkcipher_type; in crypto_ctr_alloc()
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| D | ecb.c | 99 struct crypto_instance *inst = (void *)tfm->__crt_alg; in crypto_ecb_init_tfm() local
100 struct crypto_spawn *spawn = crypto_instance_ctx(inst); in crypto_ecb_init_tfm()
120 struct crypto_instance *inst; in crypto_ecb_alloc() local
133 inst = crypto_alloc_instance("ecb", alg); in crypto_ecb_alloc()
134 if (IS_ERR(inst)) in crypto_ecb_alloc()
137 inst->alg.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER; in crypto_ecb_alloc()
138 inst->alg.cra_priority = alg->cra_priority; in crypto_ecb_alloc()
139 inst->alg.cra_blocksize = alg->cra_blocksize; in crypto_ecb_alloc()
140 inst->alg.cra_alignmask = alg->cra_alignmask; in crypto_ecb_alloc()
141 inst->alg.cra_type = &crypto_blkcipher_type; in crypto_ecb_alloc()
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| D | cryptd.c | 166 struct crypto_instance *inst = crypto_tfm_alg_instance(tfm); in cryptd_get_queue() local
167 struct cryptd_instance_ctx *ictx = crypto_instance_ctx(inst); in cryptd_get_queue()
274 struct crypto_instance *inst = crypto_tfm_alg_instance(tfm); in cryptd_blkcipher_init_tfm() local
275 struct cryptd_instance_ctx *ictx = crypto_instance_ctx(inst); in cryptd_blkcipher_init_tfm()
297 static int cryptd_init_instance(struct crypto_instance *inst, in cryptd_init_instance() argument
300 if (snprintf(inst->alg.cra_driver_name, CRYPTO_MAX_ALG_NAME, in cryptd_init_instance()
305 memcpy(inst->alg.cra_name, alg->cra_name, CRYPTO_MAX_ALG_NAME); in cryptd_init_instance()
307 inst->alg.cra_priority = alg->cra_priority + 50; in cryptd_init_instance()
308 inst->alg.cra_blocksize = alg->cra_blocksize; in cryptd_init_instance()
309 inst->alg.cra_alignmask = alg->cra_alignmask; in cryptd_init_instance()
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| D | algapi.c | 70 static void crypto_free_instance(struct crypto_instance *inst) in crypto_free_instance() argument
72 if (!inst->alg.cra_type->free) { in crypto_free_instance()
73 inst->tmpl->free(inst); in crypto_free_instance()
77 inst->alg.cra_type->free(inst); in crypto_free_instance()
82 struct crypto_instance *inst = (void *)alg; in crypto_destroy_instance() local
83 struct crypto_template *tmpl = inst->tmpl; in crypto_destroy_instance()
85 crypto_free_instance(inst); in crypto_destroy_instance()
105 list)->inst->alg; in crypto_more_spawns()
109 return &n->list == stack ? top : &n->inst->alg.cra_users; in crypto_more_spawns()
112 static void crypto_remove_instance(struct crypto_instance *inst, in crypto_remove_instance() argument
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| D | seqiv.c | 33 static void seqiv_free(struct crypto_instance *inst);
256 struct crypto_instance *inst; in seqiv_ablkcipher_create() local
259 inst = skcipher_geniv_alloc(tmpl, tb, 0, 0); in seqiv_ablkcipher_create()
261 if (IS_ERR(inst)) in seqiv_ablkcipher_create()
262 return PTR_ERR(inst); in seqiv_ablkcipher_create()
265 if (inst->alg.cra_ablkcipher.ivsize < sizeof(u64)) in seqiv_ablkcipher_create()
268 inst->alg.cra_init = seqiv_init; in seqiv_ablkcipher_create()
269 inst->alg.cra_exit = skcipher_geniv_exit; in seqiv_ablkcipher_create()
271 inst->alg.cra_ctxsize += inst->alg.cra_ablkcipher.ivsize; in seqiv_ablkcipher_create()
272 inst->alg.cra_ctxsize += sizeof(struct seqiv_ctx); in seqiv_ablkcipher_create()
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| D | hmac.c | 160 struct crypto_instance *inst = (void *)tfm->__crt_alg; in hmac_init_tfm() local
161 struct crypto_shash_spawn *spawn = crypto_instance_ctx(inst); in hmac_init_tfm()
183 struct shash_instance *inst; in hmac_create() local
206 inst = shash_alloc_instance("hmac", alg); in hmac_create()
207 err = PTR_ERR(inst); in hmac_create()
208 if (IS_ERR(inst)) in hmac_create()
211 err = crypto_init_shash_spawn(shash_instance_ctx(inst), salg, in hmac_create()
212 shash_crypto_instance(inst)); in hmac_create()
216 inst->alg.base.cra_priority = alg->cra_priority; in hmac_create()
217 inst->alg.base.cra_blocksize = alg->cra_blocksize; in hmac_create()
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| D | aead.c | 149 static void crypto_aead_free_instance(struct crypto_instance *inst) in crypto_aead_free_instance() argument
151 struct aead_instance *aead = aead_instance(inst); in crypto_aead_free_instance()
154 inst->tmpl->free(inst); in crypto_aead_free_instance()
197 struct aead_instance *inst; in aead_geniv_alloc() local
214 inst = kzalloc(sizeof(*inst) + sizeof(*spawn), GFP_KERNEL); in aead_geniv_alloc()
215 if (!inst) in aead_geniv_alloc()
218 spawn = aead_instance_ctx(inst); in aead_geniv_alloc()
223 crypto_set_aead_spawn(spawn, aead_crypto_instance(inst)); in aead_geniv_alloc()
238 if (snprintf(inst->alg.base.cra_name, CRYPTO_MAX_ALG_NAME, in aead_geniv_alloc()
242 if (snprintf(inst->alg.base.cra_driver_name, CRYPTO_MAX_ALG_NAME, in aead_geniv_alloc()
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| D | authenc.c | 122 struct aead_instance *inst = aead_alg_instance(authenc); in authenc_geniv_ahash_done() local
123 struct authenc_instance_ctx *ictx = aead_instance_ctx(inst); in authenc_geniv_ahash_done()
141 struct aead_instance *inst = aead_alg_instance(authenc); in crypto_authenc_genicv() local
143 struct authenc_instance_ctx *ictx = aead_instance_ctx(inst); in crypto_authenc_genicv()
198 struct aead_instance *inst = aead_alg_instance(authenc); in crypto_authenc_encrypt() local
200 struct authenc_instance_ctx *ictx = aead_instance_ctx(inst); in crypto_authenc_encrypt()
238 struct aead_instance *inst = aead_alg_instance(authenc); in crypto_authenc_decrypt_tail() local
240 struct authenc_instance_ctx *ictx = aead_instance_ctx(inst); in crypto_authenc_decrypt_tail()
290 struct aead_instance *inst = aead_alg_instance(authenc); in crypto_authenc_decrypt() local
292 struct authenc_instance_ctx *ictx = aead_instance_ctx(inst); in crypto_authenc_decrypt()
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| D | gcm.c | 566 struct aead_instance *inst = aead_alg_instance(tfm); in crypto_gcm_init_tfm() local
567 struct gcm_instance_ctx *ictx = aead_instance_ctx(inst); in crypto_gcm_init_tfm()
610 static void crypto_gcm_free(struct aead_instance *inst) in crypto_gcm_free() argument
612 struct gcm_instance_ctx *ctx = aead_instance_ctx(inst); in crypto_gcm_free()
616 kfree(inst); in crypto_gcm_free()
626 struct aead_instance *inst; in crypto_gcm_create_common() local
649 inst = kzalloc(sizeof(*inst) + sizeof(*ctx), GFP_KERNEL); in crypto_gcm_create_common()
650 if (!inst) in crypto_gcm_create_common()
653 ctx = aead_instance_ctx(inst); in crypto_gcm_create_common()
655 aead_crypto_instance(inst)); in crypto_gcm_create_common()
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| D | xcbc.c | 180 struct crypto_instance *inst = (void *)tfm->__crt_alg; in xcbc_init_tfm() local
181 struct crypto_spawn *spawn = crypto_instance_ctx(inst); in xcbc_init_tfm()
201 struct shash_instance *inst; in xcbc_create() local
222 inst = shash_alloc_instance("xcbc", alg); in xcbc_create()
223 err = PTR_ERR(inst); in xcbc_create()
224 if (IS_ERR(inst)) in xcbc_create()
227 err = crypto_init_spawn(shash_instance_ctx(inst), alg, in xcbc_create()
228 shash_crypto_instance(inst), in xcbc_create()
234 inst->alg.base.cra_alignmask = alignmask; in xcbc_create()
235 inst->alg.base.cra_priority = alg->cra_priority; in xcbc_create()
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| D | keywrap.c | 323 struct crypto_instance *inst = crypto_tfm_alg_instance(tfm); in crypto_kw_init_tfm() local
324 struct crypto_spawn *spawn = crypto_instance_ctx(inst); in crypto_kw_init_tfm()
345 struct crypto_instance *inst = NULL; in crypto_kw_alloc() local
358 inst = ERR_PTR(-EINVAL); in crypto_kw_alloc()
363 inst = crypto_alloc_instance("kw", alg); in crypto_kw_alloc()
364 if (IS_ERR(inst)) in crypto_kw_alloc()
367 inst->alg.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER; in crypto_kw_alloc()
368 inst->alg.cra_priority = alg->cra_priority; in crypto_kw_alloc()
369 inst->alg.cra_blocksize = SEMIBSIZE; in crypto_kw_alloc()
370 inst->alg.cra_alignmask = 0; in crypto_kw_alloc()
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| D | cbc.c | 195 struct crypto_instance *inst = (void *)tfm->__crt_alg; in crypto_cbc_init_tfm() local
196 struct crypto_spawn *spawn = crypto_instance_ctx(inst); in crypto_cbc_init_tfm()
216 struct crypto_instance *inst; in crypto_cbc_alloc() local
229 inst = ERR_PTR(-EINVAL); in crypto_cbc_alloc()
233 inst = crypto_alloc_instance("cbc", alg); in crypto_cbc_alloc()
234 if (IS_ERR(inst)) in crypto_cbc_alloc()
237 inst->alg.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER; in crypto_cbc_alloc()
238 inst->alg.cra_priority = alg->cra_priority; in crypto_cbc_alloc()
239 inst->alg.cra_blocksize = alg->cra_blocksize; in crypto_cbc_alloc()
240 inst->alg.cra_alignmask = alg->cra_alignmask; in crypto_cbc_alloc()
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| D | ccm.c | 453 struct aead_instance *inst = aead_alg_instance(tfm); in crypto_ccm_init_tfm() local
454 struct ccm_instance_ctx *ictx = aead_instance_ctx(inst); in crypto_ccm_init_tfm()
495 static void crypto_ccm_free(struct aead_instance *inst) in crypto_ccm_free() argument
497 struct ccm_instance_ctx *ctx = aead_instance_ctx(inst); in crypto_ccm_free()
501 kfree(inst); in crypto_ccm_free()
511 struct aead_instance *inst; in crypto_ccm_create_common() local
533 inst = kzalloc(sizeof(*inst) + sizeof(*ictx), GFP_KERNEL); in crypto_ccm_create_common()
535 if (!inst) in crypto_ccm_create_common()
538 ictx = aead_instance_ctx(inst); in crypto_ccm_create_common()
541 aead_crypto_instance(inst), in crypto_ccm_create_common()
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| D | echainiv.c | 181 struct aead_instance *inst; in echainiv_aead_create() local
186 inst = aead_geniv_alloc(tmpl, tb, 0, 0); in echainiv_aead_create()
188 if (IS_ERR(inst)) in echainiv_aead_create()
189 return PTR_ERR(inst); in echainiv_aead_create()
191 spawn = aead_instance_ctx(inst); in echainiv_aead_create()
195 if (inst->alg.ivsize & (sizeof(u32) - 1) || in echainiv_aead_create()
196 inst->alg.ivsize > MAX_IV_SIZE) in echainiv_aead_create()
199 inst->alg.encrypt = echainiv_encrypt; in echainiv_aead_create()
200 inst->alg.decrypt = echainiv_decrypt; in echainiv_aead_create()
202 inst->alg.init = aead_init_geniv; in echainiv_aead_create()
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| D | cmac.c | 206 struct crypto_instance *inst = (void *)tfm->__crt_alg; in cmac_init_tfm() local
207 struct crypto_spawn *spawn = crypto_instance_ctx(inst); in cmac_init_tfm()
227 struct shash_instance *inst; in cmac_create() local
249 inst = shash_alloc_instance("cmac", alg); in cmac_create()
250 err = PTR_ERR(inst); in cmac_create()
251 if (IS_ERR(inst)) in cmac_create()
254 err = crypto_init_spawn(shash_instance_ctx(inst), alg, in cmac_create()
255 shash_crypto_instance(inst), in cmac_create()
261 inst->alg.base.cra_alignmask = alignmask; in cmac_create()
262 inst->alg.base.cra_priority = alg->cra_priority; in cmac_create()
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| D | pcbc.c | 205 struct crypto_instance *inst = (void *)tfm->__crt_alg; in crypto_pcbc_init_tfm() local
206 struct crypto_spawn *spawn = crypto_instance_ctx(inst); in crypto_pcbc_init_tfm()
226 struct crypto_instance *inst; in crypto_pcbc_alloc() local
239 inst = crypto_alloc_instance("pcbc", alg); in crypto_pcbc_alloc()
240 if (IS_ERR(inst)) in crypto_pcbc_alloc()
243 inst->alg.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER; in crypto_pcbc_alloc()
244 inst->alg.cra_priority = alg->cra_priority; in crypto_pcbc_alloc()
245 inst->alg.cra_blocksize = alg->cra_blocksize; in crypto_pcbc_alloc()
246 inst->alg.cra_alignmask = alg->cra_alignmask; in crypto_pcbc_alloc()
247 inst->alg.cra_type = &crypto_blkcipher_type; in crypto_pcbc_alloc()
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| D | cts.c | 255 struct crypto_instance *inst = (void *)tfm->__crt_alg; in crypto_cts_init_tfm() local
256 struct crypto_spawn *spawn = crypto_instance_ctx(inst); in crypto_cts_init_tfm()
276 struct crypto_instance *inst; in crypto_cts_alloc() local
289 inst = ERR_PTR(-EINVAL); in crypto_cts_alloc()
296 inst = crypto_alloc_instance("cts", alg); in crypto_cts_alloc()
297 if (IS_ERR(inst)) in crypto_cts_alloc()
300 inst->alg.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER; in crypto_cts_alloc()
301 inst->alg.cra_priority = alg->cra_priority; in crypto_cts_alloc()
302 inst->alg.cra_blocksize = alg->cra_blocksize; in crypto_cts_alloc()
303 inst->alg.cra_alignmask = alg->cra_alignmask; in crypto_cts_alloc()
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| D | pcrypt.c | 225 struct aead_instance *inst = aead_alg_instance(tfm); in pcrypt_aead_init_tfm() local
226 struct pcrypt_instance_ctx *ictx = aead_instance_ctx(inst); in pcrypt_aead_init_tfm()
257 static int pcrypt_init_instance(struct crypto_instance *inst, in pcrypt_init_instance() argument
260 if (snprintf(inst->alg.cra_driver_name, CRYPTO_MAX_ALG_NAME, in pcrypt_init_instance()
264 memcpy(inst->alg.cra_name, alg->cra_name, CRYPTO_MAX_ALG_NAME); in pcrypt_init_instance()
266 inst->alg.cra_priority = alg->cra_priority + 100; in pcrypt_init_instance()
267 inst->alg.cra_blocksize = alg->cra_blocksize; in pcrypt_init_instance()
268 inst->alg.cra_alignmask = alg->cra_alignmask; in pcrypt_init_instance()
278 struct aead_instance *inst; in pcrypt_create_aead() local
291 inst = kzalloc(sizeof(*inst) + sizeof(*ctx), GFP_KERNEL); in pcrypt_create_aead()
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| D | xts.c | 244 struct crypto_instance *inst = (void *)tfm->__crt_alg; in init_tfm() local
245 struct crypto_spawn *spawn = crypto_instance_ctx(inst); in init_tfm()
289 struct crypto_instance *inst; in alloc() local
302 inst = crypto_alloc_instance("xts", alg); in alloc()
303 if (IS_ERR(inst)) in alloc()
306 inst->alg.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER; in alloc()
307 inst->alg.cra_priority = alg->cra_priority; in alloc()
308 inst->alg.cra_blocksize = alg->cra_blocksize; in alloc()
311 inst->alg.cra_alignmask = 7; in alloc()
313 inst->alg.cra_alignmask = alg->cra_alignmask; in alloc()
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| D | lrw.c | 299 struct crypto_instance *inst = (void *)tfm->__crt_alg; in init_tfm() local
300 struct crypto_spawn *spawn = crypto_instance_ctx(inst); in init_tfm()
328 struct crypto_instance *inst; in alloc() local
341 inst = crypto_alloc_instance("lrw", alg); in alloc()
342 if (IS_ERR(inst)) in alloc()
345 inst->alg.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER; in alloc()
346 inst->alg.cra_priority = alg->cra_priority; in alloc()
347 inst->alg.cra_blocksize = alg->cra_blocksize; in alloc()
349 if (alg->cra_alignmask < 7) inst->alg.cra_alignmask = 7; in alloc()
350 else inst->alg.cra_alignmask = alg->cra_alignmask; in alloc()
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| D | mcryptd.c | 222 struct crypto_instance *inst = crypto_tfm_alg_instance(tfm); in mcryptd_get_queue() local
223 struct mcryptd_instance_ctx *ictx = crypto_instance_ctx(inst); in mcryptd_get_queue()
232 struct crypto_instance *inst; in mcryptd_alloc_instance() local
235 p = kzalloc(head + sizeof(*inst) + tail, GFP_KERNEL); in mcryptd_alloc_instance()
239 inst = (void *)(p + head); in mcryptd_alloc_instance()
242 if (snprintf(inst->alg.cra_driver_name, CRYPTO_MAX_ALG_NAME, in mcryptd_alloc_instance()
246 memcpy(inst->alg.cra_name, alg->cra_name, CRYPTO_MAX_ALG_NAME); in mcryptd_alloc_instance()
248 inst->alg.cra_priority = alg->cra_priority + 50; in mcryptd_alloc_instance()
249 inst->alg.cra_blocksize = alg->cra_blocksize; in mcryptd_alloc_instance()
250 inst->alg.cra_alignmask = alg->cra_alignmask; in mcryptd_alloc_instance()
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| D | authencesn.c | 330 struct aead_instance *inst = aead_alg_instance(tfm); in crypto_authenc_esn_init_tfm() local
331 struct authenc_esn_instance_ctx *ictx = aead_instance_ctx(inst); in crypto_authenc_esn_init_tfm()
387 static void crypto_authenc_esn_free(struct aead_instance *inst) in crypto_authenc_esn_free() argument
389 struct authenc_esn_instance_ctx *ctx = aead_instance_ctx(inst); in crypto_authenc_esn_free()
393 kfree(inst); in crypto_authenc_esn_free()
400 struct aead_instance *inst; in crypto_authenc_esn_create() local
427 inst = kzalloc(sizeof(*inst) + sizeof(*ctx), GFP_KERNEL); in crypto_authenc_esn_create()
429 if (!inst) in crypto_authenc_esn_create()
432 ctx = aead_instance_ctx(inst); in crypto_authenc_esn_create()
435 aead_crypto_instance(inst)); in crypto_authenc_esn_create()
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| D | eseqiv.c | 194 struct crypto_instance *inst; in eseqiv_alloc() local
197 inst = skcipher_geniv_alloc(&eseqiv_tmpl, tb, 0, 0); in eseqiv_alloc()
198 if (IS_ERR(inst)) in eseqiv_alloc()
202 if (inst->alg.cra_ablkcipher.ivsize != inst->alg.cra_blocksize) in eseqiv_alloc()
205 inst->alg.cra_init = eseqiv_init; in eseqiv_alloc()
206 inst->alg.cra_exit = skcipher_geniv_exit; in eseqiv_alloc()
208 inst->alg.cra_ctxsize = sizeof(struct eseqiv_ctx); in eseqiv_alloc()
209 inst->alg.cra_ctxsize += inst->alg.cra_ablkcipher.ivsize; in eseqiv_alloc()
212 return inst; in eseqiv_alloc()
215 skcipher_geniv_free(inst); in eseqiv_alloc()
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| D | chacha20poly1305.c | 516 struct aead_instance *inst = aead_alg_instance(tfm); in chachapoly_init() local
517 struct chachapoly_instance_ctx *ictx = aead_instance_ctx(inst); in chachapoly_init()
560 static void chachapoly_free(struct aead_instance *inst) in chachapoly_free() argument
562 struct chachapoly_instance_ctx *ctx = aead_instance_ctx(inst); in chachapoly_free()
566 kfree(inst); in chachapoly_free()
573 struct aead_instance *inst; in chachapoly_create() local
605 inst = kzalloc(sizeof(*inst) + sizeof(*ctx), GFP_KERNEL); in chachapoly_create()
606 if (!inst) in chachapoly_create()
609 ctx = aead_instance_ctx(inst); in chachapoly_create()
613 aead_crypto_instance(inst)); in chachapoly_create()
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| D | blkcipher.c | 576 err = crypto_init_spawn(&spawn->base, alg, spawn->base.inst, mask); in crypto_grab_nivcipher()
600 struct crypto_instance *inst; in skcipher_geniv_alloc() local
616 inst = kzalloc(sizeof(*inst) + sizeof(*spawn), GFP_KERNEL); in skcipher_geniv_alloc()
617 if (!inst) in skcipher_geniv_alloc()
620 spawn = crypto_instance_ctx(inst); in skcipher_geniv_alloc()
625 crypto_set_skcipher_spawn(spawn, inst); in skcipher_geniv_alloc()
671 memcpy(inst->alg.cra_name, alg->cra_name, CRYPTO_MAX_ALG_NAME); in skcipher_geniv_alloc()
672 memcpy(inst->alg.cra_driver_name, alg->cra_driver_name, in skcipher_geniv_alloc()
676 if (snprintf(inst->alg.cra_name, CRYPTO_MAX_ALG_NAME, in skcipher_geniv_alloc()
680 if (snprintf(inst->alg.cra_driver_name, CRYPTO_MAX_ALG_NAME, in skcipher_geniv_alloc()
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| D | chainiv.c | 265 struct crypto_instance *inst; in chainiv_alloc() local
271 inst = skcipher_geniv_alloc(&chainiv_tmpl, tb, 0, 0); in chainiv_alloc()
272 if (IS_ERR(inst)) in chainiv_alloc()
275 inst->alg.cra_init = chainiv_init; in chainiv_alloc()
276 inst->alg.cra_exit = skcipher_geniv_exit; in chainiv_alloc()
278 inst->alg.cra_ctxsize = sizeof(struct chainiv_ctx); in chainiv_alloc()
281 inst->alg.cra_flags |= CRYPTO_ALG_ASYNC; in chainiv_alloc()
283 inst->alg.cra_init = async_chainiv_init; in chainiv_alloc()
284 inst->alg.cra_exit = async_chainiv_exit; in chainiv_alloc()
286 inst->alg.cra_ctxsize = sizeof(struct async_chainiv_ctx); in chainiv_alloc()
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| D | vmac.c | 625 struct crypto_instance *inst = (void *)tfm->__crt_alg; in vmac_init_tfm() local
626 struct crypto_spawn *spawn = crypto_instance_ctx(inst); in vmac_init_tfm()
645 struct shash_instance *inst; in vmac_create() local
658 inst = shash_alloc_instance("vmac", alg); in vmac_create()
659 err = PTR_ERR(inst); in vmac_create()
660 if (IS_ERR(inst)) in vmac_create()
663 err = crypto_init_spawn(shash_instance_ctx(inst), alg, in vmac_create()
664 shash_crypto_instance(inst), in vmac_create()
669 inst->alg.base.cra_priority = alg->cra_priority; in vmac_create()
670 inst->alg.base.cra_blocksize = alg->cra_blocksize; in vmac_create()
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| /linux-4.4.14/drivers/phy/ |
| D | phy-exynos4x12-usb2.c | 168 static void exynos4x12_isol(struct samsung_usb2_phy_instance *inst, bool on) in exynos4x12_isol() argument
170 struct samsung_usb2_phy_driver *drv = inst->drv; in exynos4x12_isol()
174 switch (inst->cfg->id) { in exynos4x12_isol()
195 static void exynos4x12_setup_clk(struct samsung_usb2_phy_instance *inst) in exynos4x12_setup_clk() argument
197 struct samsung_usb2_phy_driver *drv = inst->drv; in exynos4x12_setup_clk()
211 static void exynos4x12_phy_pwr(struct samsung_usb2_phy_instance *inst, bool on) in exynos4x12_phy_pwr() argument
213 struct samsung_usb2_phy_driver *drv = inst->drv; in exynos4x12_phy_pwr()
219 switch (inst->cfg->id) { in exynos4x12_phy_pwr()
263 static void exynos4x12_power_on_int(struct samsung_usb2_phy_instance *inst) in exynos4x12_power_on_int() argument
265 if (inst->int_cnt++ > 0) in exynos4x12_power_on_int()
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| D | phy-s5pv210-usb2.c | 92 static void s5pv210_isol(struct samsung_usb2_phy_instance *inst, bool on) in s5pv210_isol() argument
94 struct samsung_usb2_phy_driver *drv = inst->drv; in s5pv210_isol()
97 switch (inst->cfg->id) { in s5pv210_isol()
112 static void s5pv210_phy_pwr(struct samsung_usb2_phy_instance *inst, bool on) in s5pv210_phy_pwr() argument
114 struct samsung_usb2_phy_driver *drv = inst->drv; in s5pv210_phy_pwr()
120 switch (inst->cfg->id) { in s5pv210_phy_pwr()
152 static int s5pv210_power_on(struct samsung_usb2_phy_instance *inst) in s5pv210_power_on() argument
154 s5pv210_isol(inst, 0); in s5pv210_power_on()
155 s5pv210_phy_pwr(inst, 1); in s5pv210_power_on()
160 static int s5pv210_power_off(struct samsung_usb2_phy_instance *inst) in s5pv210_power_off() argument
[all …]
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| D | phy-exynos4210-usb2.c | 127 static void exynos4210_isol(struct samsung_usb2_phy_instance *inst, bool on) in exynos4210_isol() argument
129 struct samsung_usb2_phy_driver *drv = inst->drv; in exynos4210_isol()
133 switch (inst->cfg->id) { in exynos4210_isol()
149 static void exynos4210_phy_pwr(struct samsung_usb2_phy_instance *inst, bool on) in exynos4210_phy_pwr() argument
151 struct samsung_usb2_phy_driver *drv = inst->drv; in exynos4210_phy_pwr()
158 switch (inst->cfg->id) { in exynos4210_phy_pwr()
210 static int exynos4210_power_on(struct samsung_usb2_phy_instance *inst) in exynos4210_power_on() argument
213 exynos4210_phy_pwr(inst, 1); in exynos4210_power_on()
214 exynos4210_isol(inst, 0); in exynos4210_power_on()
219 static int exynos4210_power_off(struct samsung_usb2_phy_instance *inst) in exynos4210_power_off() argument
[all …]
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| D | phy-exynos5-usbdrd.c | 135 void (*phy_isol)(struct phy_usb_instance *inst, u32 on);
137 unsigned int (*set_refclk)(struct phy_usb_instance *inst);
187 struct exynos5_usbdrd_phy *to_usbdrd_phy(struct phy_usb_instance *inst) in to_usbdrd_phy() argument
189 return container_of((inst), struct exynos5_usbdrd_phy, in to_usbdrd_phy()
190 phys[(inst)->index]); in to_usbdrd_phy()
230 static void exynos5_usbdrd_phy_isol(struct phy_usb_instance *inst, in exynos5_usbdrd_phy_isol() argument
235 if (!inst->reg_pmu) in exynos5_usbdrd_phy_isol()
240 regmap_update_bits(inst->reg_pmu, inst->pmu_offset, in exynos5_usbdrd_phy_isol()
250 exynos5_usbdrd_pipe3_set_refclk(struct phy_usb_instance *inst) in exynos5_usbdrd_pipe3_set_refclk() argument
253 struct exynos5_usbdrd_phy *phy_drd = to_usbdrd_phy(inst); in exynos5_usbdrd_pipe3_set_refclk()
[all …]
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| D | phy-samsung-usb2.c | 24 struct samsung_usb2_phy_instance *inst = phy_get_drvdata(phy); in samsung_usb2_phy_power_on() local
25 struct samsung_usb2_phy_driver *drv = inst->drv; in samsung_usb2_phy_power_on()
29 inst->cfg->label); in samsung_usb2_phy_power_on()
43 if (inst->cfg->power_on) { in samsung_usb2_phy_power_on()
45 ret = inst->cfg->power_on(inst); in samsung_usb2_phy_power_on()
66 struct samsung_usb2_phy_instance *inst = phy_get_drvdata(phy); in samsung_usb2_phy_power_off() local
67 struct samsung_usb2_phy_driver *drv = inst->drv; in samsung_usb2_phy_power_off()
71 inst->cfg->label); in samsung_usb2_phy_power_off()
72 if (inst->cfg->power_off) { in samsung_usb2_phy_power_off()
74 ret = inst->cfg->power_off(inst); in samsung_usb2_phy_power_off()
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| D | phy-exynos5250-usb2.c | 178 static void exynos5250_isol(struct samsung_usb2_phy_instance *inst, bool on) in exynos5250_isol() argument
180 struct samsung_usb2_phy_driver *drv = inst->drv; in exynos5250_isol()
184 switch (inst->cfg->id) { in exynos5250_isol()
200 static int exynos5250_power_on(struct samsung_usb2_phy_instance *inst) in exynos5250_power_on() argument
202 struct samsung_usb2_phy_driver *drv = inst->drv; in exynos5250_power_on()
209 switch (inst->cfg->id) { in exynos5250_power_on()
321 exynos5250_isol(inst, 0); in exynos5250_power_on()
326 static int exynos5250_power_off(struct samsung_usb2_phy_instance *inst) in exynos5250_power_off() argument
328 struct samsung_usb2_phy_driver *drv = inst->drv; in exynos5250_power_off()
333 exynos5250_isol(inst, 1); in exynos5250_power_off()
[all …]
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| /linux-4.4.14/arch/x86/crypto/ |
| D | fpu.c | 83 struct crypto_instance *inst = crypto_tfm_alg_instance(tfm); in crypto_fpu_init_tfm() local
84 struct crypto_spawn *spawn = crypto_instance_ctx(inst); in crypto_fpu_init_tfm()
104 struct crypto_instance *inst; in crypto_fpu_alloc() local
117 inst = crypto_alloc_instance("fpu", alg); in crypto_fpu_alloc()
118 if (IS_ERR(inst)) in crypto_fpu_alloc()
121 inst->alg.cra_flags = alg->cra_flags; in crypto_fpu_alloc()
122 inst->alg.cra_priority = alg->cra_priority; in crypto_fpu_alloc()
123 inst->alg.cra_blocksize = alg->cra_blocksize; in crypto_fpu_alloc()
124 inst->alg.cra_alignmask = alg->cra_alignmask; in crypto_fpu_alloc()
125 inst->alg.cra_type = alg->cra_type; in crypto_fpu_alloc()
[all …]
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| /linux-4.4.14/drivers/soc/ti/ |
| D | knav_qmss_queue.c | 63 #define for_each_handle_rcu(qh, inst) \ argument
64 list_for_each_entry_rcu(qh, &inst->handles, list)
66 #define for_each_instance(idx, inst, kdev) \ argument
67 for (idx = 0, inst = kdev->instances; \
69 idx++, inst = knav_queue_idx_to_inst(kdev, idx))
82 void knav_queue_notify(struct knav_queue_inst *inst) in knav_queue_notify() argument
86 if (!inst) in knav_queue_notify()
90 for_each_handle_rcu(qh, inst) { in knav_queue_notify()
104 struct knav_queue_inst *inst = _instdata; in knav_queue_int_handler() local
106 knav_queue_notify(inst); in knav_queue_int_handler()
[all …]
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| /linux-4.4.14/include/crypto/internal/ |
| D | hash.h | 83 struct ahash_instance *inst);
84 void ahash_free_instance(struct crypto_instance *inst);
88 struct crypto_instance *inst);
102 struct shash_instance *inst);
103 void shash_free_instance(struct crypto_instance *inst);
107 struct crypto_instance *inst);
149 struct ahash_instance *inst) in ahash_crypto_instance() argument
151 return container_of(&inst->alg.halg.base, struct crypto_instance, alg); in ahash_crypto_instance()
155 struct crypto_instance *inst) in ahash_instance() argument
157 return container_of(&inst->alg, struct ahash_instance, alg.halg.base); in ahash_instance()
[all …]
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| D | aead.h | 24 void (*free)(struct aead_instance *inst);
48 struct aead_instance *inst) in aead_crypto_instance() argument
50 return container_of(&inst->alg.base, struct crypto_instance, alg); in aead_crypto_instance()
53 static inline struct aead_instance *aead_instance(struct crypto_instance *inst) in aead_instance() argument
55 return container_of(&inst->alg, struct aead_instance, alg.base); in aead_instance()
63 static inline void *aead_instance_ctx(struct aead_instance *inst) in aead_instance_ctx() argument
65 return crypto_instance_ctx(aead_crypto_instance(inst)); in aead_instance_ctx()
84 struct crypto_aead_spawn *spawn, struct crypto_instance *inst) in crypto_set_aead_spawn() argument
86 crypto_set_spawn(&spawn->base, inst); in crypto_set_aead_spawn()
161 struct aead_instance *inst);
|
| /linux-4.4.14/sound/drivers/opl3/ |
| D | opl3_synth.c | 200 struct sbi_patch inst; in snd_opl3_write() local
202 while (count >= sizeof(inst)) { in snd_opl3_write()
204 if (copy_from_user(&inst, buf, sizeof(inst))) in snd_opl3_write()
206 if (!memcmp(inst.key, FM_KEY_SBI, 4) || in snd_opl3_write()
207 !memcmp(inst.key, FM_KEY_2OP, 4)) in snd_opl3_write()
209 else if (!memcmp(inst.key, FM_KEY_4OP, 4)) in snd_opl3_write()
213 err = snd_opl3_load_patch(opl3, inst.prog, inst.bank, type, in snd_opl3_write()
214 inst.name, inst.extension, in snd_opl3_write()
215 inst.data); in snd_opl3_write()
218 result += sizeof(inst); in snd_opl3_write()
[all …]
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| /linux-4.4.14/arch/mips/kvm/ |
| D | dyntrans.c | 31 int kvm_mips_trans_cache_index(uint32_t inst, uint32_t *opc, in kvm_mips_trans_cache_index() argument
52 int kvm_mips_trans_cache_va(uint32_t inst, uint32_t *opc, in kvm_mips_trans_cache_va() argument
59 base = (inst >> 21) & 0x1f; in kvm_mips_trans_cache_va()
60 offset = inst & 0xffff; in kvm_mips_trans_cache_va()
73 int kvm_mips_trans_mfc0(uint32_t inst, uint32_t *opc, struct kvm_vcpu *vcpu) in kvm_mips_trans_mfc0() argument
79 rt = (inst >> 16) & 0x1f; in kvm_mips_trans_mfc0()
80 rd = (inst >> 11) & 0x1f; in kvm_mips_trans_mfc0()
81 sel = inst & 0x7; in kvm_mips_trans_mfc0()
115 int kvm_mips_trans_mtc0(uint32_t inst, uint32_t *opc, struct kvm_vcpu *vcpu) in kvm_mips_trans_mtc0() argument
121 rt = (inst >> 16) & 0x1f; in kvm_mips_trans_mtc0()
[all …]
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| D | emulate.c | 976 enum emulation_result kvm_mips_emulate_CP0(uint32_t inst, uint32_t *opc, in kvm_mips_emulate_CP0() argument
995 copz = (inst >> 21) & 0x1f; in kvm_mips_emulate_CP0()
996 rt = (inst >> 16) & 0x1f; in kvm_mips_emulate_CP0()
997 rd = (inst >> 11) & 0x1f; in kvm_mips_emulate_CP0()
998 sel = inst & 0x7; in kvm_mips_emulate_CP0()
999 co_bit = (inst >> 25) & 1; in kvm_mips_emulate_CP0()
1002 op = (inst) & 0xff; in kvm_mips_emulate_CP0()
1040 kvm_mips_trans_mfc0(inst, opc, vcpu); in kvm_mips_emulate_CP0()
1046 kvm_mips_trans_mfc0(inst, opc, vcpu); in kvm_mips_emulate_CP0()
1182 kvm_mips_trans_mtc0(inst, opc, vcpu); in kvm_mips_emulate_CP0()
[all …]
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| /linux-4.4.14/arch/sh/kernel/ |
| D | traps_32.c | 573 unsigned short inst = 0; in is_dsp_inst() local
582 get_user(inst, ((unsigned short *) regs->pc)); in is_dsp_inst()
584 inst &= 0xf000; in is_dsp_inst()
587 if ((inst == 0xf000) || (inst == 0x4000)) in is_dsp_inst()
621 unsigned short inst = 0; in do_reserved_inst() local
624 get_user(inst, (unsigned short*)regs->pc); in do_reserved_inst()
626 err = do_fpu_inst(inst, regs); in do_reserved_inst()
628 regs->pc += instruction_size(inst); in do_reserved_inst()
653 static int emulate_branch(unsigned short inst, struct pt_regs *regs) in emulate_branch() argument
666 if (((inst & 0xf000) == 0xb000) || /* bsr */ in emulate_branch()
[all …]
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| /linux-4.4.14/net/netfilter/ipset/ |
| D | ip_set_core.c | 61 #define ip_set(inst, id) \ argument
62 ip_set_dereference((inst)->ip_set_list)[id]
510 struct ip_set_net *inst = ip_set_pernet(net); in ip_set_rcu_get() local
514 set = rcu_dereference(inst->ip_set_list)[index]; in ip_set_rcu_get()
611 struct ip_set_net *inst = ip_set_pernet(net); in ip_set_get_byname() local
614 for (i = 0; i < inst->ip_set_max; i++) { in ip_set_get_byname()
615 s = rcu_dereference(inst->ip_set_list)[i]; in ip_set_get_byname()
636 __ip_set_put_byindex(struct ip_set_net *inst, ip_set_id_t index) in __ip_set_put_byindex() argument
641 set = rcu_dereference(inst->ip_set_list)[index]; in __ip_set_put_byindex()
650 struct ip_set_net *inst = ip_set_pernet(net); in ip_set_put_byindex() local
[all …]
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| /linux-4.4.14/arch/powerpc/kvm/ |
| D | emulate.c | 214 u32 inst; in kvmppc_emulate_instruction() local
222 emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &inst); in kvmppc_emulate_instruction()
226 pr_debug("Emulating opcode %d / %d\n", get_op(inst), get_xop(inst)); in kvmppc_emulate_instruction()
228 rs = get_rs(inst); in kvmppc_emulate_instruction()
229 rt = get_rt(inst); in kvmppc_emulate_instruction()
230 sprn = get_sprn(inst); in kvmppc_emulate_instruction()
232 switch (get_op(inst)) { in kvmppc_emulate_instruction()
245 switch (get_xop(inst)) { in kvmppc_emulate_instruction()
282 if (inst == KVMPPC_INST_SW_BREAKPOINT) { in kvmppc_emulate_instruction()
297 emulated = vcpu->kvm->arch.kvm_ops->emulate_op(run, vcpu, inst, in kvmppc_emulate_instruction()
[all …]
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| D | book3s_paired_singles.c | 350 static inline u32 inst_get_field(u32 inst, int msb, int lsb) in inst_get_field() argument
352 return kvmppc_get_field(inst, msb + 32, lsb + 32); in inst_get_field()
355 static bool kvmppc_inst_is_paired_single(struct kvm_vcpu *vcpu, u32 inst) in kvmppc_inst_is_paired_single() argument
360 switch (get_op(inst)) { in kvmppc_inst_is_paired_single()
376 switch (inst_get_field(inst, 21, 30)) { in kvmppc_inst_is_paired_single()
394 switch (inst_get_field(inst, 25, 30)) { in kvmppc_inst_is_paired_single()
400 switch (inst_get_field(inst, 26, 30)) { in kvmppc_inst_is_paired_single()
422 switch (inst_get_field(inst, 21, 30)) { in kvmppc_inst_is_paired_single()
430 switch (inst_get_field(inst, 26, 30)) { in kvmppc_inst_is_paired_single()
440 switch (inst_get_field(inst, 21, 30)) { in kvmppc_inst_is_paired_single()
[all …]
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| D | book3s_emulate.c | 91 unsigned int inst, int *advance) in kvmppc_core_emulate_op_pr() argument
94 int rt = get_rt(inst); in kvmppc_core_emulate_op_pr()
95 int rs = get_rs(inst); in kvmppc_core_emulate_op_pr()
96 int ra = get_ra(inst); in kvmppc_core_emulate_op_pr()
97 int rb = get_rb(inst); in kvmppc_core_emulate_op_pr()
100 switch (get_op(inst)) { in kvmppc_core_emulate_op_pr()
104 (inst == swab32(inst_sc))) { in kvmppc_core_emulate_op_pr()
118 switch (get_xop(inst)) { in kvmppc_core_emulate_op_pr()
132 switch (get_xop(inst)) { in kvmppc_core_emulate_op_pr()
139 if (inst & 0x10000) { in kvmppc_core_emulate_op_pr()
[all …]
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| D | emulate_loadstore.c | 53 u32 inst; in kvmppc_emulate_loadstore() local
61 emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &inst); in kvmppc_emulate_loadstore()
65 ra = get_ra(inst); in kvmppc_emulate_loadstore()
66 rs = get_rs(inst); in kvmppc_emulate_loadstore()
67 rt = get_rt(inst); in kvmppc_emulate_loadstore()
69 switch (get_op(inst)) { in kvmppc_emulate_loadstore()
71 switch (get_xop(inst)) { in kvmppc_emulate_loadstore()
172 rt = get_rt(inst); in kvmppc_emulate_loadstore()
198 rs = get_rs(inst); in kvmppc_emulate_loadstore()
265 trace_kvm_ppc_instr(inst, kvmppc_get_pc(vcpu), emulated); in kvmppc_emulate_loadstore()
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| D | e500_emulate.c | 90 unsigned int inst, int *advance) in kvmppc_e500_emul_ehpriv() argument
94 switch (get_oc(inst)) { in kvmppc_e500_emul_ehpriv()
118 static int kvmppc_e500_emul_mftmr(struct kvm_vcpu *vcpu, unsigned int inst, in kvmppc_e500_emul_mftmr() argument
122 if (get_tmrn(inst) == TMRN_TMCFG0) { in kvmppc_e500_emul_mftmr()
132 unsigned int inst, int *advance) in kvmppc_core_emulate_op_e500() argument
135 int ra = get_ra(inst); in kvmppc_core_emulate_op_e500()
136 int rb = get_rb(inst); in kvmppc_core_emulate_op_e500()
137 int rt = get_rt(inst); in kvmppc_core_emulate_op_e500()
140 switch (get_op(inst)) { in kvmppc_core_emulate_op_e500()
142 switch (get_xop(inst)) { in kvmppc_core_emulate_op_e500()
[all …]
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| D | trace.h | 15 TP_PROTO(unsigned int inst, unsigned long _pc, unsigned int emulate),
16 TP_ARGS(inst, _pc, emulate),
19 __field( unsigned int, inst )
25 __entry->inst = inst;
31 __entry->inst, __entry->pc, __entry->emulate)
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| /linux-4.4.14/arch/powerpc/mm/ |
| D | icswx.c | 175 u32 inst; in acop_get_inst() local
182 if (__get_user(inst, p)) in acop_get_inst()
185 return inst; in acop_get_inst()
201 u32 inst = 0; in acop_handle_fault() local
221 inst = acop_get_inst(regs); in acop_handle_fault()
222 if (inst == 0) in acop_handle_fault()
225 rs = (inst >> (31 - 10)) & 0x1f; in acop_handle_fault()
257 if (inst == 0) { in acop_handle_fault()
258 inst = acop_get_inst(regs); in acop_handle_fault()
259 if (inst == 0) in acop_handle_fault()
[all …]
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| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/core/ |
| D | ramht.c | 48 return ramht->data[co].inst; in nvkm_ramht_search()
63 u64 inst = 0x00000040; /* just non-zero for <=g8x fifo ramht */ in nvkm_ramht_update() local
66 nvkm_gpuobj_del(&data->inst); in nvkm_ramht_update()
71 ret = nvkm_object_bind(object, ramht->parent, 16, &data->inst); in nvkm_ramht_update()
77 data->inst = NULL; in nvkm_ramht_update()
80 if (data->inst) { in nvkm_ramht_update()
82 inst = data->inst->node->offset; in nvkm_ramht_update()
84 inst = data->inst->addr; in nvkm_ramht_update()
87 if (addr < 0) context |= inst << -addr; in nvkm_ramht_update()
88 else context |= inst >> addr; in nvkm_ramht_update()
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| /linux-4.4.14/arch/mips/kernel/ |
| D | mips-r2-to-r6-emul.c | 884 static inline int mipsr2_find_op_func(struct pt_regs *regs, u32 inst, in mipsr2_find_op_func() argument
891 if ((inst & p->mask) == p->code) { in mipsr2_find_op_func()
892 err = (p->func)(regs, inst); in mipsr2_find_op_func()
905 int mipsr2_decoder(struct pt_regs *regs, u32 inst, unsigned long *fcr31) in mipsr2_decoder() argument
924 inst, epc, pass); in mipsr2_decoder()
926 switch (MIPSInst_OPCODE(inst)) { in mipsr2_decoder()
928 err = mipsr2_find_op_func(regs, inst, spec_op_table); in mipsr2_decoder()
936 err = mipsr2_find_op_func(regs, inst, spec2_op_table); in mipsr2_decoder()
939 rt = MIPSInst_RT(inst); in mipsr2_decoder()
940 rs = MIPSInst_RS(inst); in mipsr2_decoder()
[all …]
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| D | uprobes.c | 88 union mips_instruction inst; in arch_uprobe_analyze_insn() local
97 inst.word = aup->insn[0]; in arch_uprobe_analyze_insn()
98 aup->ixol[0] = aup->insn[insn_has_delay_slot(inst)]; in arch_uprobe_analyze_insn()
116 union mips_instruction inst; in is_trap_insn() local
118 inst.word = *insn; in is_trap_insn()
120 switch (inst.i_format.opcode) { in is_trap_insn()
122 switch (inst.r_format.func) { in is_trap_insn()
135 switch (inst.u_format.rt) { in is_trap_insn()
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| /linux-4.4.14/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/asm/ |
| D | iop_version_defs_asm.h | 41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
42 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
46 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
47 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
49 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
50 ((inst) + offs + (index) * stride)
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| D | iop_sap_in_defs_asm.h | 41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
42 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
46 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
47 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
49 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
50 ((inst) + offs + (index) * stride)
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| D | iop_sap_out_defs_asm.h | 41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
42 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
46 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
47 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
49 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
50 ((inst) + offs + (index) * stride)
|
| /linux-4.4.14/arch/cris/include/arch-v32/arch/hwregs/iop/asm/ |
| D | iop_version_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
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| D | iop_scrc_in_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
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| D | iop_scrc_out_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
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| D | iop_trigger_grp_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | iop_fifo_out_extra_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | iop_crc_par_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | iop_fifo_in_extra_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | iop_mpu_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | iop_sap_in_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | iop_timer_grp_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | iop_fifo_out_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | iop_fifo_in_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | iop_dmc_in_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | iop_dmc_out_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | iop_sap_out_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| /linux-4.4.14/arch/powerpc/platforms/powermac/ |
| D | low_i2c.c | 1235 struct pmac_i2c_pf_inst *inst; in pmac_i2c_do_begin() local
1255 inst = kzalloc(sizeof(struct pmac_i2c_pf_inst), GFP_KERNEL); in pmac_i2c_do_begin()
1256 if (inst == NULL) { in pmac_i2c_do_begin()
1260 inst->bus = bus; in pmac_i2c_do_begin()
1261 inst->addr = pmac_i2c_get_dev_addr(func->node); in pmac_i2c_do_begin()
1262 inst->quirks = (int)(long)func->driver_data; in pmac_i2c_do_begin()
1263 return inst; in pmac_i2c_do_begin()
1268 struct pmac_i2c_pf_inst *inst = instdata; in pmac_i2c_do_end() local
1270 if (inst == NULL) in pmac_i2c_do_end()
1272 pmac_i2c_close(inst->bus); in pmac_i2c_do_end()
[all …]
|
| /linux-4.4.14/arch/cris/include/arch-v32/arch/hwregs/asm/ |
| D | irq_nmi_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | strcop_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | cris_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | strmux_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | config_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | rt_trace_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | marb_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
351 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
352 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
356 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
357 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
[all …]
|
| D | timer_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | mmu_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | ata_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | bif_slave_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | gio_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | dma_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | bif_core_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | ser_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | intr_vect_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | sser_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | eth_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| /linux-4.4.14/arch/h8300/kernel/ |
| D | ptrace_h.c | 21 *(child->thread.breakinfo.addr) = child->thread.breakinfo.inst; in user_disable_single_step()
165 unsigned char inst) in decode() argument
198 if (inst == 0x55 || isbranch(child, inst & 0x0f)) in decode()
203 if (inst == 0x5c || isbranch(child, (*fetch_p & 0xf0) >> 4)) in decode()
217 unsigned char inst; in nextpc() local
222 inst = *fetch_p++; in nextpc()
224 if ((inst & op->bitmask) == op->bitpattern) { in nextpc()
228 inst = *fetch_p++; in nextpc()
230 return decode(child, op, fetch_p, pc, inst); in nextpc()
245 child->thread.breakinfo.inst = *next; in user_enable_single_step()
|
| /linux-4.4.14/arch/cris/include/arch-v32/mach-fs/mach/hwregs/asm/ |
| D | config_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | timer_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | gio_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| D | bif_core_defs_asm.h | 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
|
| /linux-4.4.14/arch/cris/include/arch-v32/mach-a3/mach/hwregs/asm/ |
| D | clkgen_defs_asm.h | 41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
42 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
46 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
47 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
49 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
50 ((inst) + offs + (index) * stride)
|
| D | timer_defs_asm.h | 41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
42 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
46 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
47 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
49 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
50 ((inst) + offs + (index) * stride)
|
| D | ddr2_defs_asm.h | 41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
42 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
46 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
47 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
49 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
50 ((inst) + offs + (index) * stride)
|
| D | pio_defs_asm.h | 41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) argument
42 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
46 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
47 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
49 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
50 ((inst) + offs + (index) * stride)
|
| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/mpeg/ |
| D | nv44.c | 48 u32 inst; member
59 chan->inst = (*pgpuobj)->addr; in nv44_mpeg_chan_bind()
74 u32 inst = 0x80000000 | (chan->inst >> 4); in nv44_mpeg_chan_fini() local
77 if (nvkm_rd32(device, 0x00b318) == inst) in nv44_mpeg_chan_fini()
150 u32 inst = nvkm_rd32(device, 0x00b318) & 0x000fffff; in nv44_mpeg_intr() local
159 if (temp->inst >> 4 == inst) { in nv44_mpeg_intr()
185 chan ? chan->fifo->chid : -1, inst << 4, in nv44_mpeg_intr()
|
| D | nv40.c | 34 u32 inst = data << 4; in nv40_mpeg_mthd_dma() local
35 u32 dma0 = nvkm_instmem_rd32(imem, inst + 0); in nv40_mpeg_mthd_dma()
36 u32 dma1 = nvkm_instmem_rd32(imem, inst + 4); in nv40_mpeg_mthd_dma()
37 u32 dma2 = nvkm_instmem_rd32(imem, inst + 8); in nv40_mpeg_mthd_dma()
|
| /linux-4.4.14/drivers/net/ethernet/broadcom/ |
| D | bnx2_fw.h | 21 .inst = BNX2_COM_CPU_INSTRUCTION,
37 .inst = BNX2_CP_CPU_INSTRUCTION,
53 .inst = BNX2_RXP_CPU_INSTRUCTION,
69 .inst = BNX2_TPAT_CPU_INSTRUCTION,
85 .inst = BNX2_TXP_CPU_INSTRUCTION,
|
| /linux-4.4.14/include/crypto/ |
| D | algapi.h | 34 void (*free)(struct crypto_instance *inst);
57 void (*free)(struct crypto_instance *inst);
66 struct crypto_instance *inst; member
141 struct crypto_instance *inst);
142 int crypto_unregister_instance(struct crypto_instance *inst);
145 struct crypto_instance *inst, u32 mask);
147 struct crypto_instance *inst,
158 struct crypto_instance *inst) in crypto_set_spawn() argument
160 spawn->inst = inst; in crypto_set_spawn()
224 static inline void *crypto_instance_ctx(struct crypto_instance *inst) in crypto_instance_ctx() argument
[all …]
|
| /linux-4.4.14/drivers/edac/ |
| D | amd8131_edac.c | 71 .inst = NORTH_A,
76 .inst = NORTH_B,
81 .inst = SOUTH_A,
86 .inst = SOUTH_B,
90 {.inst = NO_BRIDGE,},
253 for (dev_info = amd8131_chipset.devices; dev_info->inst != NO_BRIDGE; in amd8131_probe()
258 if (dev_info->inst == NO_BRIDGE) /* should never happen */ in amd8131_probe()
317 for (dev_info = amd8131_chipset.devices; dev_info->inst != NO_BRIDGE; in amd8131_remove()
322 if (dev_info->inst == NO_BRIDGE) /* should never happen */ in amd8131_remove()
|
| /linux-4.4.14/drivers/staging/most/mostcore/ |
| D | core.c | 57 struct most_inst_obj *inst; member
665 struct most_inst_obj *inst = to_inst_obj(kobj); in most_inst_release() local
667 kfree(inst); in most_inst_release()
736 struct most_inst_obj *inst; in create_most_inst_obj() local
739 inst = kzalloc(sizeof(*inst), GFP_KERNEL); in create_most_inst_obj()
740 if (!inst) in create_most_inst_obj()
742 inst->kobj.kset = most_inst_kset; in create_most_inst_obj()
743 retval = kobject_init_and_add(&inst->kobj, &most_inst_ktype, NULL, in create_most_inst_obj()
746 kobject_put(&inst->kobj); in create_most_inst_obj()
749 kobject_uevent(&inst->kobj, KOBJ_ADD); in create_most_inst_obj()
[all …]
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| /linux-4.4.14/arch/parisc/mm/ |
| D | fault.c | 51 parisc_acctyp(unsigned long code, unsigned int inst) in parisc_acctyp() argument
56 switch (inst & 0xf0000000) { in parisc_acctyp()
67 if (bit22set(inst)) in parisc_acctyp()
71 if (bit22set(inst)) { in parisc_acctyp()
89 if (isGraphicsFlushRead(inst)) in parisc_acctyp()
105 if (bits23_25set(inst) == BITSSET) in parisc_acctyp()
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| /linux-4.4.14/arch/tile/lib/ |
| D | memcpy_user_64.c | 28 #define _ST(p, inst, v) \ argument
30 asm("1: " #inst " %0, %1;" \
40 #define _LD(p, inst) \ argument
43 asm("1: " #inst " %0, %1;" \
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| /linux-4.4.14/arch/mips/netlogic/xlp/ |
| D | usb-init.c | 65 #define nlm_get_usb_pcibase(node, inst) \ argument
66 nlm_pcicfg_base(XLP_IO_USB_OFFSET(node, inst))
67 #define nlm_get_usb_regbase(node, inst) \ argument
68 (nlm_get_usb_pcibase(node, inst) + XLP_IO_PCI_HDRSZ)
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