Home
last modified time | relevance | path

Searched refs:gpc_base (Results 1 – 4 of 4) sorted by relevance

/linux-4.4.14/arch/arm/mach-imx/
Dgpc.c54 static void __iomem *gpc_base; variable
61 (sw << GPC_PGC_SW_SHIFT), gpc_base + GPC_PGC_CPU_PUPSCR); in imx_gpc_set_arm_power_up_timing()
67 (sw << GPC_PGC_SW_SHIFT), gpc_base + GPC_PGC_CPU_PDNSCR); in imx_gpc_set_arm_power_down_timing()
72 writel_relaxed(power_off, gpc_base + GPC_PGC_CPU_PDN); in imx_gpc_set_arm_power_in_lpm()
77 void __iomem *reg_imr1 = gpc_base + GPC_IMR1; in imx_gpc_pre_suspend()
92 void __iomem *reg_imr1 = gpc_base + GPC_IMR1; in imx_gpc_post_resume()
120 void __iomem *reg_imr1 = gpc_base + GPC_IMR1; in imx_gpc_mask_all()
132 void __iomem *reg_imr1 = gpc_base + GPC_IMR1; in imx_gpc_restore_all()
144 reg = gpc_base + GPC_IMR1 + hwirq / 32 * 4; in imx_gpc_hwirq_unmask()
155 reg = gpc_base + GPC_IMR1 + hwirq / 32 * 4; in imx_gpc_hwirq_mask()
[all …]
Dpm-imx5.c141 static void __iomem *gpc_base; variable
160 arm_srpgcr = __raw_readl(gpc_base + MXC_SRPG_ARM_SRPGCR) & in mx5_cpu_lp_set()
162 empgc0 = __raw_readl(gpc_base + MXC_SRPG_EMPGC0_SRPGCR) & in mx5_cpu_lp_set()
164 empgc1 = __raw_readl(gpc_base + MXC_SRPG_EMPGC1_SRPGCR) & in mx5_cpu_lp_set()
201 __raw_writel(arm_srpgcr, gpc_base + MXC_SRPG_ARM_SRPGCR); in mx5_cpu_lp_set()
202 __raw_writel(arm_srpgcr, gpc_base + MXC_SRPG_NEON_SRPGCR); in mx5_cpu_lp_set()
208 __raw_writel(empgc0, gpc_base + MXC_SRPG_EMPGC0_SRPGCR); in mx5_cpu_lp_set()
209 __raw_writel(empgc1, gpc_base + MXC_SRPG_EMPGC1_SRPGCR); in mx5_cpu_lp_set()
231 __raw_writel(0, gpc_base + MXC_SRPG_EMPGC0_SRPGCR); in mx5_suspend_enter()
232 __raw_writel(0, gpc_base + MXC_SRPG_EMPGC1_SRPGCR); in mx5_suspend_enter()
[all …]
Dpm-imx6.c214 struct imx6_pm_base gpc_base; member
529 ret = imx6_pm_get_base(&pm_info->gpc_base, socdata->gpc_compat); in imx6q_suspend_init()
564 iounmap(&pm_info->gpc_base.vbase); in imx6q_suspend_init()
/linux-4.4.14/drivers/irqchip/
Dirq-imx-gpcv2.c23 void __iomem *gpc_base; member
56 reg = cd->gpc_base + cd->cpu2wakeup + i * 4; in gpcv2_wakeup_source_save()
75 reg = cd->gpc_base + cd->cpu2wakeup + i * 4; in gpcv2_wakeup_source_restore()
94 reg = cd->gpc_base + cd->cpu2wakeup + idx * 4; in imx_gpcv2_irq_set_wake()
116 reg = cd->gpc_base + cd->cpu2wakeup + d->hwirq / 32 * 4; in imx_gpcv2_irq_unmask()
132 reg = cd->gpc_base + cd->cpu2wakeup + d->hwirq / 32 * 4; in imx_gpcv2_irq_mask()
233 cd->gpc_base = of_iomap(node, 0); in imx_gpcv2_irqchip_init()
234 if (!cd->gpc_base) { in imx_gpcv2_irqchip_init()
243 iounmap(cd->gpc_base); in imx_gpcv2_irqchip_init()
251 writel_relaxed(~0, cd->gpc_base + GPC_IMR1_CORE0 + i * 4); in imx_gpcv2_irqchip_init()
[all …]