141 static void __iomem *gpc_base;  variable
160 	arm_srpgcr = __raw_readl(gpc_base + MXC_SRPG_ARM_SRPGCR) &  in mx5_cpu_lp_set()
162 	empgc0 = __raw_readl(gpc_base + MXC_SRPG_EMPGC0_SRPGCR) &  in mx5_cpu_lp_set()
164 	empgc1 = __raw_readl(gpc_base + MXC_SRPG_EMPGC1_SRPGCR) &  in mx5_cpu_lp_set()
201 	__raw_writel(arm_srpgcr, gpc_base + MXC_SRPG_ARM_SRPGCR);  in mx5_cpu_lp_set()
202 	__raw_writel(arm_srpgcr, gpc_base + MXC_SRPG_NEON_SRPGCR);  in mx5_cpu_lp_set()
208 		__raw_writel(empgc0, gpc_base + MXC_SRPG_EMPGC0_SRPGCR);  in mx5_cpu_lp_set()
209 		__raw_writel(empgc1, gpc_base + MXC_SRPG_EMPGC1_SRPGCR);  in mx5_cpu_lp_set()
231 		__raw_writel(0, gpc_base + MXC_SRPG_EMPGC0_SRPGCR);  in mx5_suspend_enter()
232 		__raw_writel(0, gpc_base + MXC_SRPG_EMPGC1_SRPGCR);  in mx5_suspend_enter()
394 	gpc_base = ioremap(data->gpc_addr, SZ_16K);  in imx5_pm_common_init()
395 	WARN_ON(!ccm_base || !cortex_base || !gpc_base);  in imx5_pm_common_init()