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Searched refs:gart (Results 1 – 29 of 29) sorted by relevance

/linux-4.4.14/drivers/iommu/
Dtegra-gart.c68 struct gart_device *gart; /* link to gart device */ member
86 #define FLUSH_GART_REGS(gart) ((void)readl((gart)->regs + GART_CONFIG)) argument
88 #define for_each_gart_pte(gart, iova) \ argument
89 for (iova = gart->iovmm_base; \
90 iova < gart->iovmm_base + GART_PAGE_SIZE * gart->page_count; \
93 static inline void gart_set_pte(struct gart_device *gart, in gart_set_pte() argument
96 writel(offs, gart->regs + GART_ENTRY_ADDR); in gart_set_pte()
97 writel(pte, gart->regs + GART_ENTRY_DATA); in gart_set_pte()
99 dev_dbg(gart->dev, "%s %08lx:%08x\n", in gart_set_pte()
103 static inline unsigned long gart_read_pte(struct gart_device *gart, in gart_read_pte() argument
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DMakefile22 obj-$(CONFIG_TEGRA_IOMMU_GART) += tegra-gart.o
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
Damdgpu_gart.c69 ptr = pci_alloc_consistent(adev->pdev, adev->gart.table_size, in amdgpu_gart_table_ram_alloc()
70 &adev->gart.table_addr); in amdgpu_gart_table_ram_alloc()
77 adev->gart.table_size >> PAGE_SHIFT); in amdgpu_gart_table_ram_alloc()
80 adev->gart.ptr = ptr; in amdgpu_gart_table_ram_alloc()
81 memset((void *)adev->gart.ptr, 0, adev->gart.table_size); in amdgpu_gart_table_ram_alloc()
96 if (adev->gart.ptr == NULL) { in amdgpu_gart_table_ram_free()
101 set_memory_wb((unsigned long)adev->gart.ptr, in amdgpu_gart_table_ram_free()
102 adev->gart.table_size >> PAGE_SHIFT); in amdgpu_gart_table_ram_free()
105 pci_free_consistent(adev->pdev, adev->gart.table_size, in amdgpu_gart_table_ram_free()
106 (void *)adev->gart.ptr, in amdgpu_gart_table_ram_free()
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Dgmc_v8_0.c581 if (adev->gart.robj == NULL) { in gmc_v8_0_gart_enable()
633 WREG32(mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR, adev->gart.table_addr >> 12); in gmc_v8_0_gart_enable()
657 adev->gart.table_addr >> 12); in gmc_v8_0_gart_enable()
660 adev->gart.table_addr >> 12); in gmc_v8_0_gart_enable()
688 (unsigned long long)adev->gart.table_addr); in gmc_v8_0_gart_enable()
689 adev->gart.ready = true; in gmc_v8_0_gart_enable()
697 if (adev->gart.robj) { in gmc_v8_0_gart_init()
705 adev->gart.table_size = adev->gart.num_gpu_pages * 8; in gmc_v8_0_gart_init()
1347 if (adev->gart.gart_funcs == NULL) in gmc_v8_0_set_gart_funcs()
1348 adev->gart.gart_funcs = &gmc_v8_0_gart_funcs; in gmc_v8_0_set_gart_funcs()
Dgmc_v7_0.c518 if (adev->gart.robj == NULL) { in gmc_v7_0_gart_enable()
554 WREG32(mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR, adev->gart.table_addr >> 12); in gmc_v7_0_gart_enable()
578 adev->gart.table_addr >> 12); in gmc_v7_0_gart_enable()
581 adev->gart.table_addr >> 12); in gmc_v7_0_gart_enable()
608 (unsigned long long)adev->gart.table_addr); in gmc_v7_0_gart_enable()
609 adev->gart.ready = true; in gmc_v7_0_gart_enable()
617 if (adev->gart.robj) { in gmc_v7_0_gart_init()
625 adev->gart.table_size = adev->gart.num_gpu_pages * 8; in gmc_v7_0_gart_init()
1401 if (adev->gart.gart_funcs == NULL) in gmc_v7_0_set_gart_funcs()
1402 adev->gart.gart_funcs = &gmc_v7_0_gart_funcs; in gmc_v7_0_set_gart_funcs()
Damdgpu_ttm.c624 if (gtt->adev->gart.ready) in amdgpu_ttm_backend_unbind()
1175 if (p >= adev->gart.num_cpu_pages) in amdgpu_ttm_gtt_read()
1178 page = adev->gart.pages[p]; in amdgpu_ttm_gtt_read()
1184 kunmap(adev->gart.pages[p]); in amdgpu_ttm_gtt_read()
Damdgpu_vm.c308 uint64_t src = adev->gart.table_addr + (addr >> 12) * 8; in amdgpu_vm_update_pages()
405 result = adev->gart.pages_addr[addr >> PAGE_SHIFT]; in amdgpu_vm_map_gart()
Damdgpu.h2029 struct amdgpu_gart gart; member
2240 #define amdgpu_gart_flush_gpu_tlb(adev, vmid) (adev)->gart.gart_funcs->flush_gpu_tlb((adev), (vmid))
2241 #define amdgpu_gart_set_pte_pde(adev, pt, idx, addr, flags) (adev)->gart.gart_funcs->set_pte_pde((a…
Damdgpu_device.c1396 adev->gart.gart_funcs = NULL; in amdgpu_device_init()
/linux-4.4.14/drivers/gpu/drm/radeon/
Dradeon_gart.c69 ptr = pci_alloc_consistent(rdev->pdev, rdev->gart.table_size, in radeon_gart_table_ram_alloc()
70 &rdev->gart.table_addr); in radeon_gart_table_ram_alloc()
78 rdev->gart.table_size >> PAGE_SHIFT); in radeon_gart_table_ram_alloc()
81 rdev->gart.ptr = ptr; in radeon_gart_table_ram_alloc()
82 memset((void *)rdev->gart.ptr, 0, rdev->gart.table_size); in radeon_gart_table_ram_alloc()
97 if (rdev->gart.ptr == NULL) { in radeon_gart_table_ram_free()
103 set_memory_wb((unsigned long)rdev->gart.ptr, in radeon_gart_table_ram_free()
104 rdev->gart.table_size >> PAGE_SHIFT); in radeon_gart_table_ram_free()
107 pci_free_consistent(rdev->pdev, rdev->gart.table_size, in radeon_gart_table_ram_free()
108 (void *)rdev->gart.ptr, in radeon_gart_table_ram_free()
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Drs400.c80 if (rdev->gart.ptr) { in rs400_gart_init()
103 rdev->gart.table_size = rdev->gart.num_gpu_pages * 4; in rs400_gart_init()
161 tmp = (u32)rdev->gart.table_addr & 0xfffff000; in rs400_gart_enable()
162 tmp |= (upper_32_bits(rdev->gart.table_addr) & 0xff) << 4; in rs400_gart_enable()
189 (unsigned long long)rdev->gart.table_addr); in rs400_gart_enable()
190 rdev->gart.ready = true; in rs400_gart_enable()
233 u32 *gtt = rdev->gart.ptr; in rs400_gart_set_page()
Dradeon_asic.c165 rdev->asic->gart.tlb_flush = &rv370_pcie_gart_tlb_flush; in radeon_agp_disable()
166 rdev->asic->gart.get_page_entry = &rv370_pcie_gart_get_page_entry; in radeon_agp_disable()
167 rdev->asic->gart.set_page = &rv370_pcie_gart_set_page; in radeon_agp_disable()
171 rdev->asic->gart.tlb_flush = &r100_pci_gart_tlb_flush; in radeon_agp_disable()
172 rdev->asic->gart.get_page_entry = &r100_pci_gart_get_page_entry; in radeon_agp_disable()
173 rdev->asic->gart.set_page = &r100_pci_gart_set_page; in radeon_agp_disable()
207 .gart = {
275 .gart = {
371 .gart = {
439 .gart = {
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Drs600.c534 if (rdev->gart.robj) { in rs600_gart_init()
543 rdev->gart.table_size = rdev->gart.num_gpu_pages * 8; in rs600_gart_init()
552 if (rdev->gart.robj == NULL) { in rs600_gart_enable()
589 rdev->gart.table_addr); in rs600_gart_enable()
606 (unsigned long long)rdev->gart.table_addr); in rs600_gart_enable()
607 rdev->gart.ready = true; in rs600_gart_enable()
647 void __iomem *ptr = (void *)rdev->gart.ptr; in rs600_gart_set_page()
Dr300.c117 void __iomem *ptr = rdev->gart.ptr; in rv370_pcie_gart_set_page()
129 if (rdev->gart.robj) { in rv370_pcie_gart_init()
140 rdev->gart.table_size = rdev->gart.num_gpu_pages * 4; in rv370_pcie_gart_init()
141 rdev->asic->gart.tlb_flush = &rv370_pcie_gart_tlb_flush; in rv370_pcie_gart_init()
142 rdev->asic->gart.get_page_entry = &rv370_pcie_gart_get_page_entry; in rv370_pcie_gart_init()
143 rdev->asic->gart.set_page = &rv370_pcie_gart_set_page; in rv370_pcie_gart_init()
153 if (rdev->gart.robj == NULL) { in rv370_pcie_gart_enable()
168 table_addr = rdev->gart.table_addr; in rv370_pcie_gart_enable()
183 rdev->gart.ready = true; in rv370_pcie_gart_enable()
Drv770.c896 if (rdev->gart.robj == NULL) { in rv770_pcie_gart_enable()
925 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); in rv770_pcie_gart_enable()
936 (unsigned long long)rdev->gart.table_addr); in rv770_pcie_gart_enable()
937 rdev->gart.ready = true; in rv770_pcie_gart_enable()
Dr100.c637 if (rdev->gart.ptr) { in r100_pci_gart_init()
645 rdev->gart.table_size = rdev->gart.num_gpu_pages * 4; in r100_pci_gart_init()
646 rdev->asic->gart.tlb_flush = &r100_pci_gart_tlb_flush; in r100_pci_gart_init()
647 rdev->asic->gart.get_page_entry = &r100_pci_gart_get_page_entry; in r100_pci_gart_init()
648 rdev->asic->gart.set_page = &r100_pci_gart_set_page; in r100_pci_gart_init()
663 WREG32(RADEON_AIC_PT_BASE, rdev->gart.table_addr); in r100_pci_gart_enable()
669 (unsigned long long)rdev->gart.table_addr); in r100_pci_gart_enable()
670 rdev->gart.ready = true; in r100_pci_gart_enable()
693 u32 *gtt = rdev->gart.ptr; in r100_pci_gart_set_page()
Dradeon_ttm.c1118 if (p >= rdev->gart.num_cpu_pages) in radeon_ttm_gtt_read()
1121 page = rdev->gart.pages[p]; in radeon_ttm_gtt_read()
1127 kunmap(rdev->gart.pages[p]); in radeon_ttm_gtt_read()
Dni.c1282 if (rdev->gart.robj == NULL) { in cayman_pcie_gart_enable()
1311 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); in cayman_pcie_gart_enable()
1357 (unsigned long long)rdev->gart.table_addr); in cayman_pcie_gart_enable()
1358 rdev->gart.ready = true; in cayman_pcie_gart_enable()
Dradeon_vm.c368 uint64_t src = rdev->gart.table_addr + (addr >> 12) * 8; in radeon_vm_set_pages()
599 result = rdev->gart.pages_entry[addr >> RADEON_GPU_PAGE_SHIFT]; in radeon_vm_map_gart()
Dr600.c1074 void __iomem *ptr = (void *)rdev->gart.ptr; in r600_pcie_gart_tlb_flush()
1109 if (rdev->gart.robj) { in r600_pcie_gart_init()
1117 rdev->gart.table_size = rdev->gart.num_gpu_pages * 8; in r600_pcie_gart_init()
1126 if (rdev->gart.robj == NULL) { in r600_pcie_gart_enable()
1163 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); in r600_pcie_gart_enable()
1174 (unsigned long long)rdev->gart.table_addr); in r600_pcie_gart_enable()
1175 rdev->gart.ready = true; in r600_pcie_gart_enable()
Dradeon.h1872 } gart; member
2373 struct radeon_gart gart; member
2719 #define radeon_gart_tlb_flush(rdev) (rdev)->asic->gart.tlb_flush((rdev))
2720 #define radeon_gart_get_page_entry(a, f) (rdev)->asic->gart.get_page_entry((a), (f))
2721 #define radeon_gart_set_page(rdev, i, e) (rdev)->asic->gart.set_page((rdev), (i), (e))
Devergreen.c2499 if (rdev->gart.robj == NULL) { in evergreen_pcie_gart_enable()
2537 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); in evergreen_pcie_gart_enable()
2547 (unsigned long long)rdev->gart.table_addr); in evergreen_pcie_gart_enable()
2548 rdev->gart.ready = true; in evergreen_pcie_gart_enable()
Dsi.c4281 if (rdev->gart.robj == NULL) { in si_pcie_gart_enable()
4310 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); in si_pcie_gart_enable()
4360 (unsigned long long)rdev->gart.table_addr); in si_pcie_gart_enable()
4361 rdev->gart.ready = true; in si_pcie_gart_enable()
Dcik.c5852 if (rdev->gart.robj == NULL) { in cik_pcie_gart_enable()
5881 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); in cik_pcie_gart_enable()
5955 (unsigned long long)rdev->gart.table_addr); in cik_pcie_gart_enable()
5956 rdev->gart.ready = true; in cik_pcie_gart_enable()
/linux-4.4.14/Documentation/devicetree/bindings/iommu/
Dnvidia,tegra20-gart.txt4 - compatible: "nvidia,tegra20-gart"
10 gart {
11 compatible = "nvidia,tegra20-gart";
/linux-4.4.14/drivers/gpu/drm/nouveau/
Dnouveau_chan.c74 nvif_object_fini(&chan->gart); in nouveau_channel_del()
293 nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart) in nouveau_channel_init() argument
341 ret = nvif_object_init(&chan->user, gart, NV_DMA_IN_MEMORY, in nouveau_channel_init()
342 &args, sizeof(args), &chan->gart); in nouveau_channel_init()
Dnouveau_chan.h14 struct nvif_object gart; member
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/
Dnv44.c193 struct nvkm_memory *gart = mmu->vm->pgt[0].mem[0]; in nv44_mmu_init() local
201 addr -= ((nvkm_memory_addr(gart) >> 19) + 1) << 19; in nv44_mmu_init()
/linux-4.4.14/arch/arm/boot/dts/
Dtegra20.dtsi555 compatible = "nvidia,tegra20-gart";