Searched refs:eint_reg_base (Results 1 - 2 of 2) sorted by relevance
| /linux-4.4.14/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mtk-common.c | 835 reg = pctl->eint_reg_base + offset + ((eint_num - eint_base) / 32) * 4; mtk_eint_get_offset()
890 void __iomem *reg = pctl->eint_reg_base + (port << 2); mtk_eint_flip_edge()
977 writel(clr_bit, pctl->eint_reg_base + clr_offset); mtk_gpio_set_debounce()
982 writel(rst | bit, pctl->eint_reg_base + set_offset); mtk_gpio_set_debounce()
1069 void __iomem *eint_reg_base, u32 *buf) mtk_eint_chip_write_mask()
1075 reg = eint_reg_base + (port << 2); mtk_eint_chip_write_mask()
1082 void __iomem *eint_reg_base, u32 *buf) mtk_eint_chip_read_mask()
1088 reg = eint_reg_base + chip->mask + (port << 2); mtk_eint_chip_read_mask()
1101 reg = pctl->eint_reg_base; mtk_eint_suspend()
1115 pctl->eint_reg_base, pctl->cur_mask); mtk_eint_resume()
1153 void __iomem *reg = pctl->eint_reg_base + eint_offsets->dom_en; mtk_eint_init()
1172 dbnc = readl(pctl->eint_reg_base + ctrl_offset); mtk_eint_debounce_process()
1177 writel(rst, pctl->eint_reg_base + ctrl_offset); mtk_eint_debounce_process()
1378 pctl->eint_reg_base = devm_ioremap_resource(&pdev->dev, res); mtk_pctrl_init()
1379 if (IS_ERR(pctl->eint_reg_base)) { mtk_pctrl_init()
1068 mtk_eint_chip_write_mask(const struct mtk_eint_offsets *chip, void __iomem *eint_reg_base, u32 *buf) mtk_eint_chip_write_mask() argument
1081 mtk_eint_chip_read_mask(const struct mtk_eint_offsets *chip, void __iomem *eint_reg_base, u32 *buf) mtk_eint_chip_read_mask() argument
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| H A D | pinctrl-mtk-common.h | 267 void __iomem *eint_reg_base; member in struct:mtk_pinctrl
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