1/* 2 * Copyright (c) 2014 MediaTek Inc. 3 * Author: Hongzhou.Yang <hongzhou.yang@mediatek.com> 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 */ 14 15#ifndef __PINCTRL_MTK_COMMON_H 16#define __PINCTRL_MTK_COMMON_H 17 18#include <linux/pinctrl/pinctrl.h> 19#include <linux/regmap.h> 20#include <linux/pinctrl/pinconf-generic.h> 21 22#define NO_EINT_SUPPORT 255 23#define MT_EDGE_SENSITIVE 0 24#define MT_LEVEL_SENSITIVE 1 25#define EINT_DBNC_SET_DBNC_BITS 4 26#define EINT_DBNC_RST_BIT (0x1 << 1) 27#define EINT_DBNC_SET_EN (0x1 << 0) 28 29#define MTK_PINCTRL_NOT_SUPPORT (0xffff) 30 31struct mtk_desc_function { 32 const char *name; 33 unsigned char muxval; 34}; 35 36struct mtk_desc_eint { 37 unsigned char eintmux; 38 unsigned char eintnum; 39}; 40 41struct mtk_desc_pin { 42 struct pinctrl_pin_desc pin; 43 const struct mtk_desc_eint eint; 44 const struct mtk_desc_function *functions; 45}; 46 47#define MTK_PIN(_pin, _pad, _chip, _eint, ...) \ 48 { \ 49 .pin = _pin, \ 50 .eint = _eint, \ 51 .functions = (struct mtk_desc_function[]){ \ 52 __VA_ARGS__, { } }, \ 53 } 54 55#define MTK_EINT_FUNCTION(_eintmux, _eintnum) \ 56 { \ 57 .eintmux = _eintmux, \ 58 .eintnum = _eintnum, \ 59 } 60 61#define MTK_FUNCTION(_val, _name) \ 62 { \ 63 .muxval = _val, \ 64 .name = _name, \ 65 } 66 67#define SET_ADDR(x, y) (x + (y->devdata->port_align)) 68#define CLR_ADDR(x, y) (x + (y->devdata->port_align << 1)) 69 70struct mtk_pinctrl_group { 71 const char *name; 72 unsigned long config; 73 unsigned pin; 74}; 75 76/** 77 * struct mtk_drv_group_desc - Provide driving group data. 78 * @max_drv: The maximum current of this group. 79 * @min_drv: The minimum current of this group. 80 * @low_bit: The lowest bit of this group. 81 * @high_bit: The highest bit of this group. 82 * @step: The step current of this group. 83 */ 84struct mtk_drv_group_desc { 85 unsigned char min_drv; 86 unsigned char max_drv; 87 unsigned char low_bit; 88 unsigned char high_bit; 89 unsigned char step; 90}; 91 92#define MTK_DRV_GRP(_min, _max, _low, _high, _step) \ 93 { \ 94 .min_drv = _min, \ 95 .max_drv = _max, \ 96 .low_bit = _low, \ 97 .high_bit = _high, \ 98 .step = _step, \ 99 } 100 101/** 102 * struct mtk_pin_drv_grp - Provide each pin driving info. 103 * @pin: The pin number. 104 * @offset: The offset of driving register for this pin. 105 * @bit: The bit of driving register for this pin. 106 * @grp: The group for this pin belongs to. 107 */ 108struct mtk_pin_drv_grp { 109 unsigned short pin; 110 unsigned short offset; 111 unsigned char bit; 112 unsigned char grp; 113}; 114 115#define MTK_PIN_DRV_GRP(_pin, _offset, _bit, _grp) \ 116 { \ 117 .pin = _pin, \ 118 .offset = _offset, \ 119 .bit = _bit, \ 120 .grp = _grp, \ 121 } 122 123/** 124 * struct mtk_pin_spec_pupd_set_samereg 125 * - For special pins' pull up/down setting which resides in same register 126 * @pin: The pin number. 127 * @offset: The offset of special pull up/down setting register. 128 * @pupd_bit: The pull up/down bit in this register. 129 * @r0_bit: The r0 bit of pull resistor. 130 * @r1_bit: The r1 bit of pull resistor. 131 */ 132struct mtk_pin_spec_pupd_set_samereg { 133 unsigned short pin; 134 unsigned short offset; 135 unsigned char pupd_bit; 136 unsigned char r1_bit; 137 unsigned char r0_bit; 138}; 139 140#define MTK_PIN_PUPD_SPEC_SR(_pin, _offset, _pupd, _r1, _r0) \ 141 { \ 142 .pin = _pin, \ 143 .offset = _offset, \ 144 .pupd_bit = _pupd, \ 145 .r1_bit = _r1, \ 146 .r0_bit = _r0, \ 147 } 148 149/** 150 * struct mtk_pin_ies_set - For special pins' ies and smt setting. 151 * @start: The start pin number of those special pins. 152 * @end: The end pin number of those special pins. 153 * @offset: The offset of special setting register. 154 * @bit: The bit of special setting register. 155 */ 156struct mtk_pin_ies_smt_set { 157 unsigned short start; 158 unsigned short end; 159 unsigned short offset; 160 unsigned char bit; 161}; 162 163#define MTK_PIN_IES_SMT_SPEC(_start, _end, _offset, _bit) \ 164 { \ 165 .start = _start, \ 166 .end = _end, \ 167 .bit = _bit, \ 168 .offset = _offset, \ 169 } 170 171struct mtk_eint_offsets { 172 const char *name; 173 unsigned int stat; 174 unsigned int ack; 175 unsigned int mask; 176 unsigned int mask_set; 177 unsigned int mask_clr; 178 unsigned int sens; 179 unsigned int sens_set; 180 unsigned int sens_clr; 181 unsigned int soft; 182 unsigned int soft_set; 183 unsigned int soft_clr; 184 unsigned int pol; 185 unsigned int pol_set; 186 unsigned int pol_clr; 187 unsigned int dom_en; 188 unsigned int dbnc_ctrl; 189 unsigned int dbnc_set; 190 unsigned int dbnc_clr; 191 u8 port_mask; 192 u8 ports; 193}; 194 195/** 196 * struct mtk_pinctrl_devdata - Provide HW GPIO related data. 197 * @pins: An array describing all pins the pin controller affects. 198 * @npins: The number of entries in @pins. 199 * 200 * @grp_desc: The driving group info. 201 * @pin_drv_grp: The driving group for all pins. 202 * @spec_pull_set: Each SoC may have special pins for pull up/down setting, 203 * these pins' pull setting are very different, they have separate pull 204 * up/down bit, R0 and R1 resistor bit, so they need special pull setting. 205 * If special setting is success, this should return 0, otherwise it should 206 * return non-zero value. 207 * @spec_ies_smt_set: Some pins are irregular, their input enable and smt 208 * control register are discontinuous, but they are mapping together. That 209 * means when user set smt, input enable is set at the same time. So they 210 * also need special control. If special control is success, this should 211 * return 0, otherwise return non-zero value. 212 * 213 * @dir_offset: The direction register offset. 214 * @pullen_offset: The pull-up/pull-down enable register offset. 215 * @pinmux_offset: The pinmux register offset. 216 * 217 * @type1_start: Some chips have two base addresses for pull select register, 218 * that means some pins use the first address and others use the second. This 219 * member record the start of pin number to use the second address. 220 * @type1_end: The end of pin number to use the second address. 221 * 222 * @port_shf: The shift between two registers. 223 * @port_mask: The mask of register. 224 * @port_align: Provide clear register and set register step. 225 */ 226struct mtk_pinctrl_devdata { 227 const struct mtk_desc_pin *pins; 228 unsigned int npins; 229 const struct mtk_drv_group_desc *grp_desc; 230 unsigned int n_grp_cls; 231 const struct mtk_pin_drv_grp *pin_drv_grp; 232 unsigned int n_pin_drv_grps; 233 int (*spec_pull_set)(struct regmap *reg, unsigned int pin, 234 unsigned char align, bool isup, unsigned int arg); 235 int (*spec_ies_smt_set)(struct regmap *reg, unsigned int pin, 236 unsigned char align, int value, enum pin_config_param arg); 237 unsigned int dir_offset; 238 unsigned int ies_offset; 239 unsigned int smt_offset; 240 unsigned int pullen_offset; 241 unsigned int pullsel_offset; 242 unsigned int drv_offset; 243 unsigned int dout_offset; 244 unsigned int din_offset; 245 unsigned int pinmux_offset; 246 unsigned short type1_start; 247 unsigned short type1_end; 248 unsigned char port_shf; 249 unsigned char port_mask; 250 unsigned char port_align; 251 struct mtk_eint_offsets eint_offsets; 252 unsigned int ap_num; 253 unsigned int db_cnt; 254}; 255 256struct mtk_pinctrl { 257 struct regmap *regmap1; 258 struct regmap *regmap2; 259 struct pinctrl_desc pctl_desc; 260 struct device *dev; 261 struct gpio_chip *chip; 262 struct mtk_pinctrl_group *groups; 263 unsigned ngroups; 264 const char **grp_names; 265 struct pinctrl_dev *pctl_dev; 266 const struct mtk_pinctrl_devdata *devdata; 267 void __iomem *eint_reg_base; 268 struct irq_domain *domain; 269 int *eint_dual_edges; 270 u32 *wake_mask; 271 u32 *cur_mask; 272}; 273 274int mtk_pctrl_init(struct platform_device *pdev, 275 const struct mtk_pinctrl_devdata *data, 276 struct regmap *regmap); 277 278int mtk_pctrl_spec_pull_set_samereg(struct regmap *regmap, 279 const struct mtk_pin_spec_pupd_set_samereg *pupd_infos, 280 unsigned int info_num, unsigned int pin, 281 unsigned char align, bool isup, unsigned int r1r0); 282 283int mtk_pconf_spec_set_ies_smt_range(struct regmap *regmap, 284 const struct mtk_pin_ies_smt_set *ies_smt_infos, unsigned int info_num, 285 unsigned int pin, unsigned char align, int value); 286 287extern const struct dev_pm_ops mtk_eint_pm_ops; 288 289#endif /* __PINCTRL_MTK_COMMON_H */ 290