835 	reg = pctl->eint_reg_base + offset + ((eint_num - eint_base) / 32) * 4;  in mtk_eint_get_offset()
890 	void __iomem *reg = pctl->eint_reg_base + (port << 2);  in mtk_eint_flip_edge()
977 	writel(clr_bit, pctl->eint_reg_base + clr_offset);  in mtk_gpio_set_debounce()
982 	writel(rst | bit, pctl->eint_reg_base + set_offset);  in mtk_gpio_set_debounce()
1069 		void __iomem *eint_reg_base, u32 *buf)  in mtk_eint_chip_write_mask()  argument
1075 		reg = eint_reg_base + (port << 2);  in mtk_eint_chip_write_mask()
1082 		void __iomem *eint_reg_base, u32 *buf)  in mtk_eint_chip_read_mask()  argument
1088 		reg = eint_reg_base + chip->mask + (port << 2);  in mtk_eint_chip_read_mask()
1101 	reg = pctl->eint_reg_base;  in mtk_eint_suspend()
1115 			pctl->eint_reg_base, pctl->cur_mask);  in mtk_eint_resume()
1153 	void __iomem *reg = pctl->eint_reg_base + eint_offsets->dom_en;  in mtk_eint_init()
1172 	dbnc = readl(pctl->eint_reg_base + ctrl_offset);  in mtk_eint_debounce_process()
1177 		writel(rst, pctl->eint_reg_base + ctrl_offset);  in mtk_eint_debounce_process()
1378 	pctl->eint_reg_base = devm_ioremap_resource(&pdev->dev, res);  in mtk_pctrl_init()
1379 	if (IS_ERR(pctl->eint_reg_base)) {  in mtk_pctrl_init()