| /linux-4.4.14/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_dpm.c | 365 ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk, in amdgpu_parse_extended_power_table()
376 ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in amdgpu_parse_extended_power_table()
387 ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in amdgpu_parse_extended_power_table()
398 ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.mvdd_dependency_on_mclk, in amdgpu_parse_extended_power_table()
411 adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk = in amdgpu_parse_extended_power_table()
414 adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk = in amdgpu_parse_extended_power_table()
417 adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc = in amdgpu_parse_extended_power_table()
419 adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddci = in amdgpu_parse_extended_power_table()
430 adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries = in amdgpu_parse_extended_power_table()
434 if (!adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries) { in amdgpu_parse_extended_power_table()
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| D | ci_dpm.c | 398 if (adev->pm.dpm.dyn_state.cac_leakage_table.entries == NULL) in ci_populate_bapm_vddc_vid_sidd()
400 if (adev->pm.dpm.dyn_state.cac_leakage_table.count > 8) in ci_populate_bapm_vddc_vid_sidd()
402 if (adev->pm.dpm.dyn_state.cac_leakage_table.count != in ci_populate_bapm_vddc_vid_sidd()
403 adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count) in ci_populate_bapm_vddc_vid_sidd()
406 for (i = 0; i < adev->pm.dpm.dyn_state.cac_leakage_table.count; i++) { in ci_populate_bapm_vddc_vid_sidd()
408 lo_vid[i] = ci_convert_to_vid(adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc1); in ci_populate_bapm_vddc_vid_sidd()
409 hi_vid[i] = ci_convert_to_vid(adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc2); in ci_populate_bapm_vddc_vid_sidd()
410 hi2_vid[i] = ci_convert_to_vid(adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc3); in ci_populate_bapm_vddc_vid_sidd()
412 lo_vid[i] = ci_convert_to_vid(adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc); in ci_populate_bapm_vddc_vid_sidd()
413 hi_vid[i] = ci_convert_to_vid((u16)adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].leakage); in ci_populate_bapm_vddc_vid_sidd()
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| D | cz_dpm.c | 75 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in cz_construct_max_power_limits_table()
167 &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac); in cz_parse_sys_info_table()
177 &adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; in cz_patch_voltage_values()
179 &adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in cz_patch_voltage_values()
181 &adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; in cz_patch_voltage_values()
244 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in cz_parse_pplib_clock_info()
510 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in cz_dpm_debugfs_print_current_performance_level()
512 &adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; in cz_dpm_debugfs_print_current_performance_level()
514 &adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in cz_dpm_debugfs_print_current_performance_level()
694 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in cz_dpm_upload_pptable_to_smu()
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| D | kv_dpm.c | 78 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_convert_vid2_to_vid7()
100 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_convert_vid7_to_vid2()
808 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_program_bootup_state()
910 &adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; in kv_populate_uvd_table()
983 &adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in kv_populate_vce_table()
1044 &adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table; in kv_populate_samu_table()
1110 &adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; in kv_populate_acp_table()
1169 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_calculate_dfs_bypass_settings()
1497 &adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; in kv_update_uvd_dpm()
1533 &adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in kv_get_vce_boot_level()
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| D | amdgpu_amdkfd.c | 268 return rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk / 100; in get_max_engine_clock_in_mhz()
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| D | amdgpu_kms.c | 442 adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk * 10; in amdgpu_info_ioctl()
444 adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk * 10; in amdgpu_info_ioctl()
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| D | amdgpu_atombios.c | 1264 u32 count = adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; in amdgpu_atombios_get_voltage_evv()
1268 if (adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[entry_id].v == in amdgpu_atombios_get_voltage_evv()
1280 cpu_to_le32(adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[entry_id].clk); in amdgpu_atombios_get_voltage_evv()
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| D | amdgpu.h | 1618 struct amdgpu_dpm_dynamic_state dyn_state; member
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| /linux-4.4.14/drivers/gpu/drm/radeon/ |
| D | r600_dpm.c | 923 ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, in r600_parse_extended_power_table()
932 ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in r600_parse_extended_power_table()
935 kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries); in r600_parse_extended_power_table()
943 ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in r600_parse_extended_power_table()
946 kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries); in r600_parse_extended_power_table()
947 kfree(rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.entries); in r600_parse_extended_power_table()
955 ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk, in r600_parse_extended_power_table()
958 kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries); in r600_parse_extended_power_table()
959 kfree(rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.entries); in r600_parse_extended_power_table()
960 kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.entries); in r600_parse_extended_power_table()
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| D | btc_dpm.c | 1231 return btc_find_valid_clock(&rdev->pm.dpm.dyn_state.valid_mclk_values, in btc_get_valid_mclk()
1238 return btc_find_valid_clock(&rdev->pm.dpm.dyn_state.valid_sclk_values, in btc_get_valid_sclk()
1281 if (((pl->mclk + (pl->sclk - 1)) / pl->sclk) > rdev->pm.dpm.dyn_state.mclk_sclk_ratio) in btc_adjust_clock_combinations()
1285 (rdev->pm.dpm.dyn_state.mclk_sclk_ratio - 1)) / in btc_adjust_clock_combinations()
1286 rdev->pm.dpm.dyn_state.mclk_sclk_ratio); in btc_adjust_clock_combinations()
1288 if ((pl->sclk - pl->mclk) > rdev->pm.dpm.dyn_state.sclk_mclk_delta) in btc_adjust_clock_combinations()
1292 rdev->pm.dpm.dyn_state.sclk_mclk_delta); in btc_adjust_clock_combinations()
1319 if ((*vddc - *vddci) > rdev->pm.dpm.dyn_state.vddc_vddci_delta) { in btc_apply_voltage_delta_rules()
1321 (*vddc - rdev->pm.dpm.dyn_state.vddc_vddci_delta)); in btc_apply_voltage_delta_rules()
1325 if ((*vddci - *vddc) > rdev->pm.dpm.dyn_state.vddc_vddci_delta) { in btc_apply_voltage_delta_rules()
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| D | ci_dpm.c | 280 if (rdev->pm.dpm.dyn_state.cac_leakage_table.entries == NULL) in ci_populate_bapm_vddc_vid_sidd()
282 if (rdev->pm.dpm.dyn_state.cac_leakage_table.count > 8) in ci_populate_bapm_vddc_vid_sidd()
284 if (rdev->pm.dpm.dyn_state.cac_leakage_table.count != in ci_populate_bapm_vddc_vid_sidd()
285 rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count) in ci_populate_bapm_vddc_vid_sidd()
288 for (i = 0; i < rdev->pm.dpm.dyn_state.cac_leakage_table.count; i++) { in ci_populate_bapm_vddc_vid_sidd()
290 lo_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc1); in ci_populate_bapm_vddc_vid_sidd()
291 hi_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc2); in ci_populate_bapm_vddc_vid_sidd()
292 hi2_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc3); in ci_populate_bapm_vddc_vid_sidd()
294 lo_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc); in ci_populate_bapm_vddc_vid_sidd()
295 hi_vid[i] = ci_convert_to_vid((u16)rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].leakage); in ci_populate_bapm_vddc_vid_sidd()
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| D | si_dpm.c | 2163 struct radeon_ppm_table *ppm = rdev->pm.dpm.dyn_state.ppm_table; in si_populate_smc_tdp_limits()
2536 &rdev->pm.dpm.dyn_state.cac_leakage_table; in si_get_cac_std_voltage_max_min()
2962 &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in si_get_vce_clock_voltage()
3039 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in si_apply_state_adjust_rules()
3041 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in si_apply_state_adjust_rules()
3061 btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, in si_apply_state_adjust_rules()
3063 btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in si_apply_state_adjust_rules()
3065 btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in si_apply_state_adjust_rules()
3167 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, in si_apply_state_adjust_rules()
3170 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in si_apply_state_adjust_rules()
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| D | ni_dpm.c | 802 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ni_apply_state_adjust_rules()
804 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ni_apply_state_adjust_rules()
873 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, in ni_apply_state_adjust_rules()
876 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in ni_apply_state_adjust_rules()
879 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in ni_apply_state_adjust_rules()
882 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk, in ni_apply_state_adjust_rules()
896 if (ps->performance_levels[i].vddc > rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc) in ni_apply_state_adjust_rules()
899 if (ps->performance_levels[i].vddc < rdev->pm.dpm.dyn_state.min_vddc_for_pcie_gen2) in ni_apply_state_adjust_rules()
1012 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk); in ni_patch_dependency_tables_based_on_leakage()
1015 &rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk); in ni_patch_dependency_tables_based_on_leakage()
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| D | kv_dpm.c | 556 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_convert_vid2_to_vid7()
578 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_convert_vid7_to_vid2()
719 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_program_bootup_state()
821 &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; in kv_populate_uvd_table()
894 &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in kv_populate_vce_table()
955 &rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table; in kv_populate_samu_table()
1021 &rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; in kv_populate_acp_table()
1080 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_calculate_dfs_bypass_settings()
1427 &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; in kv_update_uvd_dpm()
1463 &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in kv_get_vce_boot_level()
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| D | rv770_dpm.c | 2260 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk = pl->sclk; in rv7xx_parse_pplib_clock_info()
2261 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk = pl->mclk; in rv7xx_parse_pplib_clock_info()
2262 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc = pl->vddc; in rv7xx_parse_pplib_clock_info()
2263 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = pl->vddci; in rv7xx_parse_pplib_clock_info()
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| D | radeon_kfd.c | 326 return rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk / 100; in get_max_engine_clock_in_mhz()
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| D | radeon_kms.c | 511 *value = rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk * 10; in radeon_info_ioctl()
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| D | radeon_atombios.c | 3303 u32 count = rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; in radeon_atom_get_voltage_evv()
3307 if (rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[entry_id].v == in radeon_atom_get_voltage_evv()
3319 cpu_to_le32(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[entry_id].clk); in radeon_atom_get_voltage_evv()
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| D | trinity_dpm.c | 1509 &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in trinity_get_vce_clock_voltage()
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| D | radeon.h | 1574 struct radeon_dpm_dynamic_state dyn_state; member
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