2163 		struct radeon_ppm_table *ppm = rdev->pm.dpm.dyn_state.ppm_table;  in si_populate_smc_tdp_limits()
2536 		&rdev->pm.dpm.dyn_state.cac_leakage_table;  in si_get_cac_std_voltage_max_min()
2962 		&rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table;  in si_get_vce_clock_voltage()
3039 		max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac;  in si_apply_state_adjust_rules()
3041 		max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc;  in si_apply_state_adjust_rules()
3061 	btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,  in si_apply_state_adjust_rules()
3063 	btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,  in si_apply_state_adjust_rules()
3065 	btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,  in si_apply_state_adjust_rules()
3167 		btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,  in si_apply_state_adjust_rules()
3170 		btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,  in si_apply_state_adjust_rules()
3173 		btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,  in si_apply_state_adjust_rules()
3176 		btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk,  in si_apply_state_adjust_rules()
3190 		if (ps->performance_levels[i].vddc > rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc)  in si_apply_state_adjust_rules()
3989 						&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,  in si_construct_voltage_tables()
4010 						&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,  in si_construct_voltage_tables()
4106 							      &rdev->pm.dpm.dyn_state.phase_shedding_limits_table)) {  in si_populate_smc_voltage_tables()
4168 	if (rdev->pm.dpm.dyn_state.cac_leakage_table.entries) {  in si_get_std_voltage_value()
4170 			if (rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries == NULL)  in si_get_std_voltage_value()
4173 …for (v_index = 0; (u32)v_index < rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) {  in si_get_std_voltage_value()
4175 				    (u16)rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) {  in si_get_std_voltage_value()
4177 					if ((u32)v_index < rdev->pm.dpm.dyn_state.cac_leakage_table.count)  in si_get_std_voltage_value()
4179 							rdev->pm.dpm.dyn_state.cac_leakage_table.entries[v_index].vddc;  in si_get_std_voltage_value()
4182 …rdev->pm.dpm.dyn_state.cac_leakage_table.entries[rdev->pm.dpm.dyn_state.cac_leakage_table.count-1]…  in si_get_std_voltage_value()
4188 …for (v_index = 0; (u32)v_index < rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) {  in si_get_std_voltage_value()
4190 					    (u16)rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) {  in si_get_std_voltage_value()
4192 						if ((u32)v_index < rdev->pm.dpm.dyn_state.cac_leakage_table.count)  in si_get_std_voltage_value()
4194 								rdev->pm.dpm.dyn_state.cac_leakage_table.entries[v_index].vddc;  in si_get_std_voltage_value()
4197 …rdev->pm.dpm.dyn_state.cac_leakage_table.entries[rdev->pm.dpm.dyn_state.cac_leakage_table.count-1]…  in si_get_std_voltage_value()
4203 			if ((u32)voltage->index < rdev->pm.dpm.dyn_state.cac_leakage_table.count)  in si_get_std_voltage_value()
4204 				*std_voltage = rdev->pm.dpm.dyn_state.cac_leakage_table.entries[voltage->index].vddc;  in si_get_std_voltage_value()
4456 						 &rdev->pm.dpm.dyn_state.phase_shedding_limits_table,  in si_populate_smc_initial_state()
4542 							 &rdev->pm.dpm.dyn_state.phase_shedding_limits_table,  in si_populate_smc_acpi_state()
4569 							 &rdev->pm.dpm.dyn_state.phase_shedding_limits_table,  in si_populate_smc_acpi_state()
5082 						       &rdev->pm.dpm.dyn_state.phase_shedding_limits_table,  in si_convert_power_level_to_smc()
5172 	for (i = 0; i < rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count; i++) {  in si_is_state_ulv_compatible()
5174 		    rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[i].clk) {  in si_is_state_ulv_compatible()
5176 			    rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[i].v)  in si_is_state_ulv_compatible()
5916 								&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk);  in si_patch_dependency_tables_based_on_leakage()
5918 								&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk);  in si_patch_dependency_tables_based_on_leakage()
5920 								&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk);  in si_patch_dependency_tables_based_on_leakage()
6811 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk = pl->sclk;  in si_parse_pplib_clock_info()
6812 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk = pl->mclk;  in si_parse_pplib_clock_info()
6813 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc = pl->vddc;  in si_parse_pplib_clock_info()
6814 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = pl->vddci;  in si_parse_pplib_clock_info()
6958 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries =  in si_dpm_init()
6960 	if (!rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries) {  in si_dpm_init()
6964 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count = 4;  in si_dpm_init()
6965 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0;  in si_dpm_init()
6966 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0;  in si_dpm_init()
6967 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000;  in si_dpm_init()
6968 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 720;  in si_dpm_init()
6969 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].clk = 54000;  in si_dpm_init()
6970 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].v = 810;  in si_dpm_init()
6971 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].clk = 72000;  in si_dpm_init()
6972 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].v = 900;  in si_dpm_init()
7054 	rdev->pm.dpm.dyn_state.mclk_sclk_ratio = 4;  in si_dpm_init()
7055 	rdev->pm.dpm.dyn_state.sclk_mclk_delta = 15000;  in si_dpm_init()
7056 	rdev->pm.dpm.dyn_state.vddc_vddci_delta = 200;  in si_dpm_init()
7057 	rdev->pm.dpm.dyn_state.valid_sclk_values.count = 0;  in si_dpm_init()
7058 	rdev->pm.dpm.dyn_state.valid_sclk_values.values = NULL;  in si_dpm_init()
7059 	rdev->pm.dpm.dyn_state.valid_mclk_values.count = 0;  in si_dpm_init()
7060 	rdev->pm.dpm.dyn_state.valid_mclk_values.values = NULL;  in si_dpm_init()
7065 	if ((rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk == 0) ||  in si_dpm_init()
7066 	    (rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk == 0))  in si_dpm_init()
7067 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc =  in si_dpm_init()
7068 			rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac;  in si_dpm_init()
7084 	kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries);  in si_dpm_fini()