Searched refs:devhandle (Results 1 - 8 of 8) sorted by relevance

/linux-4.4.14/arch/sparc/kernel/
H A Dpci_sun4v.h9 long pci_sun4v_iommu_map(unsigned long devhandle,
14 unsigned long pci_sun4v_iommu_demap(unsigned long devhandle,
17 unsigned long pci_sun4v_iommu_getmap(unsigned long devhandle,
21 unsigned long pci_sun4v_config_get(unsigned long devhandle,
25 int pci_sun4v_config_put(unsigned long devhandle,
31 unsigned long pci_sun4v_msiq_conf(unsigned long devhandle,
35 unsigned long pci_sun4v_msiq_info(unsigned long devhandle,
39 unsigned long pci_sun4v_msiq_getvalid(unsigned long devhandle,
42 unsigned long pci_sun4v_msiq_setvalid(unsigned long devhandle,
45 unsigned long pci_sun4v_msiq_getstate(unsigned long devhandle,
48 unsigned long pci_sun4v_msiq_setstate(unsigned long devhandle,
51 unsigned long pci_sun4v_msiq_gethead(unsigned long devhandle,
54 unsigned long pci_sun4v_msiq_sethead(unsigned long devhandle,
57 unsigned long pci_sun4v_msiq_gettail(unsigned long devhandle,
60 unsigned long pci_sun4v_msi_getvalid(unsigned long devhandle,
63 unsigned long pci_sun4v_msi_setvalid(unsigned long devhandle,
66 unsigned long pci_sun4v_msi_getmsiq(unsigned long devhandle,
69 unsigned long pci_sun4v_msi_setmsiq(unsigned long devhandle,
73 unsigned long pci_sun4v_msi_getstate(unsigned long devhandle,
76 unsigned long pci_sun4v_msi_setstate(unsigned long devhandle,
79 unsigned long pci_sun4v_msg_getmsiq(unsigned long devhandle,
82 unsigned long pci_sun4v_msg_setmsiq(unsigned long devhandle,
85 unsigned long pci_sun4v_msg_getvalid(unsigned long devhandle,
88 unsigned long pci_sun4v_msg_setvalid(unsigned long devhandle,
H A Dpci_sun4v.c64 unsigned long devhandle = pbm->devhandle; iommu_batch_flush() local
73 num = pci_sun4v_iommu_map(devhandle, HV_PCI_TSBID(0, entry), iommu_batch_flush()
80 devhandle, HV_PCI_TSBID(0, entry), iommu_batch_flush()
200 u32 devhandle = *(u32 *)demap_arg; dma_4v_iommu_demap() local
205 num = pci_sun4v_iommu_demap(devhandle, dma_4v_iommu_demap()
221 u32 devhandle; dma_4v_free_coherent() local
226 devhandle = pbm->devhandle; dma_4v_free_coherent()
228 dma_4v_iommu_demap(&devhandle, entry, npages); dma_4v_free_coherent()
303 u32 devhandle; dma_4v_unmap_page() local
313 devhandle = pbm->devhandle; dma_4v_unmap_page()
319 dma_4v_iommu_demap(&devhandle, entry, npages); dma_4v_unmap_page()
475 u32 devhandle; dma_4v_unmap_sg() local
481 devhandle = pbm->devhandle; dma_4v_unmap_sg()
497 dma_4v_iommu_demap(&devhandle, entry, npages); dma_4v_unmap_sg()
533 u32 devhandle; probe_existing_entries() local
535 devhandle = pbm->devhandle; probe_existing_entries()
541 ret = pci_sun4v_iommu_getmap(devhandle, probe_existing_entries()
546 pci_sun4v_iommu_demap(devhandle, probe_existing_entries()
658 err = pci_sun4v_msiq_gethead(pbm->devhandle, msiqid, head); pci_sun4v_get_head()
692 err = pci_sun4v_msi_setstate(pbm->devhandle, pci_sun4v_dequeue_msi()
714 err = pci_sun4v_msiq_sethead(pbm->devhandle, msiqid, head); pci_sun4v_set_head()
724 if (pci_sun4v_msi_setmsiq(pbm->devhandle, msi, msiqid, pci_sun4v_msi_setup()
728 if (pci_sun4v_msi_setstate(pbm->devhandle, msi, HV_MSISTATE_IDLE)) pci_sun4v_msi_setup()
730 if (pci_sun4v_msi_setvalid(pbm->devhandle, msi, HV_MSIVALID_VALID)) pci_sun4v_msi_setup()
739 err = pci_sun4v_msi_getmsiq(pbm->devhandle, msi, &msiqid); pci_sun4v_msi_teardown()
743 pci_sun4v_msi_setvalid(pbm->devhandle, msi, HV_MSIVALID_INVALID); pci_sun4v_msi_teardown()
769 err = pci_sun4v_msiq_conf(pbm->devhandle, pci_sun4v_msiq_alloc()
778 err = pci_sun4v_msiq_info(pbm->devhandle, pci_sun4v_msiq_alloc()
810 (void) pci_sun4v_msiq_conf(pbm->devhandle, msiqid, 0UL, 0); pci_sun4v_msiq_free()
828 unsigned int irq = sun4v_build_irq(pbm->devhandle, devino); pci_sun4v_msiq_build_irq()
833 if (pci_sun4v_msiq_setvalid(pbm->devhandle, msiqid, HV_MSIQ_VALID)) pci_sun4v_msiq_build_irq()
835 if (pci_sun4v_msiq_setstate(pbm->devhandle, msiqid, HV_MSIQSTATE_IDLE)) pci_sun4v_msiq_build_irq()
863 struct platform_device *op, u32 devhandle) pci_sun4v_pbm_init()
877 pbm->devhandle = devhandle; pci_sun4v_pbm_init()
909 u32 devhandle; pci_sun4v_probe() local
936 devhandle = (regs->phys_addr >> 32UL) & 0x0fffffff; pci_sun4v_probe()
965 err = pci_sun4v_pbm_init(pbm, op, devhandle);
862 pci_sun4v_pbm_init(struct pci_pbm_info *pbm, struct platform_device *op, u32 devhandle) pci_sun4v_pbm_init() argument
H A Dirq_64.c189 /* Athena's devhandle|devino is large.*/ size_nr_ivec()
254 static unsigned int cookie_exists(u32 devhandle, unsigned int devino) cookie_exists() argument
260 hv_err = sun4v_vintr_get_cookie(devhandle, devino, &cookie); cookie_exists()
275 static unsigned int sysino_exists(u32 devhandle, unsigned int devino) sysino_exists() argument
277 unsigned long sysino = sun4v_devino_to_sysino(devhandle, devino); sysino_exists()
649 static unsigned int sun4v_build_common(u32 devhandle, unsigned int devino, sun4v_build_common() argument
651 u32 devhandle, unsigned int devino), sun4v_build_common()
657 irq = irq_alloc(devhandle, devino); sun4v_build_common()
670 handler_data_init(data, devhandle, devino); sun4v_build_common()
678 static unsigned long cookie_assign(unsigned int irq, u32 devhandle, cookie_assign() argument
690 hv_error = sun4v_vintr_set_cookie(devhandle, devino, cookie); cookie_assign()
698 u32 devhandle, unsigned int devino) cookie_handler_data()
700 data->dev_handle = devhandle; cookie_handler_data()
704 static unsigned int cookie_build_irq(u32 devhandle, unsigned int devino, cookie_build_irq() argument
710 irq = sun4v_build_common(devhandle, devino, cookie_handler_data, chip); cookie_build_irq()
712 hv_error = cookie_assign(irq, devhandle, devino); cookie_build_irq()
721 static unsigned int sun4v_build_cookie(u32 devhandle, unsigned int devino) sun4v_build_cookie() argument
725 irq = cookie_exists(devhandle, devino); sun4v_build_cookie()
729 irq = cookie_build_irq(devhandle, devino, &sun4v_virq); sun4v_build_cookie()
748 u32 devhandle, unsigned int devino) sysino_handler_data()
752 sysino = sun4v_devino_to_sysino(devhandle, devino); sysino_handler_data()
756 static unsigned int sysino_build_irq(u32 devhandle, unsigned int devino, sysino_build_irq() argument
761 irq = sun4v_build_common(devhandle, devino, sysino_handler_data, chip); sysino_build_irq()
770 static int sun4v_build_sysino(u32 devhandle, unsigned int devino) sun4v_build_sysino() argument
774 irq = sysino_exists(devhandle, devino); sun4v_build_sysino()
778 irq = sysino_build_irq(devhandle, devino, &sun4v_irq); sun4v_build_sysino()
783 unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino) sun4v_build_irq() argument
788 irq = sun4v_build_cookie(devhandle, devino); sun4v_build_irq()
790 irq = sun4v_build_sysino(devhandle, devino); sun4v_build_irq()
795 unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino) sun4v_build_virq() argument
799 irq = cookie_build_irq(devhandle, devino, &sun4v_virq); sun4v_build_virq()
697 cookie_handler_data(struct irq_handler_data *data, u32 devhandle, unsigned int devino) cookie_handler_data() argument
747 sysino_handler_data(struct irq_handler_data *data, u32 devhandle, unsigned int devino) sysino_handler_data() argument
H A Dpci_common.c260 u32 devhandle = pbm->devhandle; sun4v_read_pci_cfg() local
269 ret = pci_sun4v_config_get(devhandle, sun4v_read_pci_cfg()
293 u32 devhandle = pbm->devhandle; sun4v_write_pci_cfg() local
305 pci_sun4v_config_put(devhandle, sun4v_write_pci_cfg()
H A Dpci_impl.h78 u32 devhandle; member in struct:pci_pbm_info
H A Dprom_irqtrans.c462 u32 devhandle = (u32) (unsigned long) _data; pci_sun4v_irq_build() local
464 return sun4v_build_irq(devhandle, devino); pci_sun4v_irq_build()
786 u32 devhandle = (u32) (unsigned long) _data; sun4v_vdev_irq_build() local
788 return sun4v_build_irq(devhandle, devino); sun4v_vdev_irq_build()
/linux-4.4.14/arch/sparc/include/asm/
H A Dirq_64.h47 unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino);
48 unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino);
49 unsigned int sun4v_build_msi(u32 devhandle, unsigned int *irq_p,
H A Dhypervisor.h1416 * devhandle Device handle. It uniquely identifies a device, and
1423 * combination of devhandle and devino are used to
1451 * ARG0: devhandle
1455 * ERRORS: EINVAL Invalid devhandle/devino
1458 * devhandle/devino into a system specific ino (sysino).
1463 unsigned long sun4v_devino_to_sysino(unsigned long devhandle,
1762 * ARG0: devhandle
1769 * ERRORS: EINVAL Invalid devhandle/tsbnum/tsbindex/io_attributes
1774 * devhandle. The mappings are created in the TSB defined by the
1804 * ARG0: devhandle
1809 * ERRORS: EINVAL Invalid devhandle/tsbnum/tsbindex
1812 * devhandle. Demaps up to #ttes entries in the TSB defined by the tsbnum
1832 * ARG0: devhandle
1837 * ERRORS: EINVAL Invalid devhandle/tsbnum/tsbindex
1840 * Read and return the mapping in the device described by the given devhandle
1852 * ARG0: devhandle
1857 * ERRORS: EINVAL Invalid devhandle/io_attributes
1861 * Create a "special" mapping in the device described by the given devhandle,
1870 * ARG0: devhandle
1877 * ERRORS: EINVAL Invalid devhandle/pci_device/offset/size
1882 * devhandle. Read size (1, 2, or 4) bytes of data from the given
1898 * ARG0: devhandle
1905 * ERRORS: EINVAL Invalid devhandle/pci_device/offset/size
1910 * devhandle. Write size (1, 2, or 4) bytes of data in a single operation,
1928 * ARG0: devhandle
1934 * ERRORS: EINVAL Invalid devhandle or size
1939 * Attempt to read the IO address given by the given devhandle, real address,
1951 * The caller must have permission to read from the given devhandle, real
1963 * ARG0: devhandle
1970 * ERRORS: EINVAL Invalid devhandle, size, or pci_device
1976 * Attempt to write data to the IO address given by the given devhandle,
1987 * the configuration space of the device described by devhandle and
1994 * The caller must have permission to write to the given devhandle, real
1997 * the given devhandle, pci_device cofiguration space offset 0.
2007 * ARG0: devhandle
2013 * ERRORS: EINVAL Invalid devhandle or io_sync_direction
2017 * for the device defined by the given devhandle using the direction(s)
2058 * ARG0: devhandle
2063 * ERRORS: EINVAL Invalid devhandle, msiqid or nentries
2067 * Configure the MSI queue given by the devhandle and msiqid arguments,
2083 * ARG0: devhandle
2088 * ERRORS: EINVAL Invalid devhandle or msiqid
2091 * by the given devhandle and msiqid. The base address of the queue
2101 * ARG0: devhandle
2105 * ERRORS: EINVAL Invalid devhandle or msiqid
2107 * Get the valid state of the MSI-EQ described by the given devhandle and
2115 * ARG0: devhandle
2119 * ERRORS: EINVAL Invalid devhandle or msiqid or msiqvalid
2122 * Set the valid state of the MSI-EQ described by the given devhandle and
2130 * ARG0: devhandle
2134 * ERRORS: EINVAL Invalid devhandle or msiqid
2136 * Get the state of the MSI-EQ described by the given devhandle and
2144 * ARG0: devhandle
2148 * ERRORS: EINVAL Invalid devhandle or msiqid or msiqstate
2151 * Set the state of the MSI-EQ described by the given devhandle and
2159 * ARG0: devhandle
2163 * ERRORS: EINVAL Invalid devhandle or msiqid
2166 * given devhandle and msiqid.
2173 * ARG0: devhandle
2177 * ERRORS: EINVAL Invalid devhandle or msiqid or msiqhead,
2181 * given devhandle and msiqid.
2188 * ARG0: devhandle
2192 * ERRORS: EINVAL Invalid devhandle or msiqid
2195 * given devhandle and msiqid.
2202 * ARG0: devhandle
2206 * ERRORS: EINVAL Invalid devhandle or msinum
2209 * given devhandle and msinum.
2216 * ARG0: devhandle
2220 * ERRORS: EINVAL Invalid devhandle or msinum or msivalidstate
2223 * given devhandle and msinum.
2230 * ARG0: devhandle
2234 * ERRORS: EINVAL Invalid devhandle or msinum or MSI is unbound
2236 * Get the MSI EQ that the MSI defined by the given devhandle and
2244 * ARG0: devhandle
2249 * ERRORS: EINVAL Invalid devhandle or msinum or msiqid
2251 * Set the MSI EQ that the MSI defined by the given devhandle and
2259 * ARG0: devhandle
2263 * ERRORS: EINVAL Invalid devhandle or msinum
2265 * Get the state of the MSI defined by the given devhandle and msinum.
2273 * ARG0: devhandle
2277 * ERRORS: EINVAL Invalid devhandle or msinum or msistate
2279 * Set the state of the MSI defined by the given devhandle and msinum.
2286 * ARG0: devhandle
2290 * ERRORS: EINVAL Invalid devhandle or msgtype
2292 * Get the MSI EQ of the MSG defined by the given devhandle and msgtype.
2299 * ARG0: devhandle
2303 * ERRORS: EINVAL Invalid devhandle, msgtype, or msiqid
2305 * Set the MSI EQ of the MSG defined by the given devhandle and msgtype.
2312 * ARG0: devhandle
2316 * ERRORS: EINVAL Invalid devhandle or msgtype
2319 * devhandle and msgtype.
2326 * ARG0: devhandle
2330 * ERRORS: EINVAL Invalid devhandle or msgtype or msgvalidstate
2333 * devhandle and msgtype.

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