Searched refs:bank_num (Results 1 - 10 of 10) sorted by relevance

/linux-4.4.14/drivers/gpio/
H A Dgpio-zynq.c143 * @bank_num: an output parameter used to return the bank number of the gpio
151 unsigned int *bank_num, zynq_gpio_get_bank_pin()
160 *bank_num = bank; zynq_gpio_get_bank_pin()
169 *bank_num = 0; zynq_gpio_get_bank_pin()
185 unsigned int bank_num, bank_pin_num; zynq_gpio_get_value() local
188 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio); zynq_gpio_get_value()
191 ZYNQ_GPIO_DATA_RO_OFFSET(bank_num)); zynq_gpio_get_value()
209 unsigned int reg_offset, bank_num, bank_pin_num; zynq_gpio_set_value() local
212 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio); zynq_gpio_set_value()
217 reg_offset = ZYNQ_GPIO_DATA_MSW_OFFSET(bank_num); zynq_gpio_set_value()
219 reg_offset = ZYNQ_GPIO_DATA_LSW_OFFSET(bank_num); zynq_gpio_set_value()
246 unsigned int bank_num, bank_pin_num; zynq_gpio_dir_in() local
249 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio); zynq_gpio_dir_in()
252 if (bank_num == 0 && (bank_pin_num == 7 || bank_pin_num == 8)) zynq_gpio_dir_in()
256 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); zynq_gpio_dir_in()
258 writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); zynq_gpio_dir_in()
279 unsigned int bank_num, bank_pin_num; zynq_gpio_dir_out() local
282 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio); zynq_gpio_dir_out()
285 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); zynq_gpio_dir_out()
287 writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); zynq_gpio_dir_out()
290 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_OUTEN_OFFSET(bank_num)); zynq_gpio_dir_out()
292 writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_OUTEN_OFFSET(bank_num)); zynq_gpio_dir_out()
309 unsigned int device_pin_num, bank_num, bank_pin_num; zynq_gpio_irq_mask() local
314 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio); zynq_gpio_irq_mask()
316 gpio->base_addr + ZYNQ_GPIO_INTDIS_OFFSET(bank_num)); zynq_gpio_irq_mask()
330 unsigned int device_pin_num, bank_num, bank_pin_num; zynq_gpio_irq_unmask() local
335 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio); zynq_gpio_irq_unmask()
337 gpio->base_addr + ZYNQ_GPIO_INTEN_OFFSET(bank_num)); zynq_gpio_irq_unmask()
350 unsigned int device_pin_num, bank_num, bank_pin_num; zynq_gpio_irq_ack() local
355 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio); zynq_gpio_irq_ack()
357 gpio->base_addr + ZYNQ_GPIO_INTSTS_OFFSET(bank_num)); zynq_gpio_irq_ack()
401 unsigned int device_pin_num, bank_num, bank_pin_num; zynq_gpio_set_irq_type() local
406 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio); zynq_gpio_set_irq_type()
409 ZYNQ_GPIO_INTTYPE_OFFSET(bank_num)); zynq_gpio_set_irq_type()
411 ZYNQ_GPIO_INTPOL_OFFSET(bank_num)); zynq_gpio_set_irq_type()
413 ZYNQ_GPIO_INTANY_OFFSET(bank_num)); zynq_gpio_set_irq_type()
447 gpio->base_addr + ZYNQ_GPIO_INTTYPE_OFFSET(bank_num)); zynq_gpio_set_irq_type()
449 gpio->base_addr + ZYNQ_GPIO_INTPOL_OFFSET(bank_num)); zynq_gpio_set_irq_type()
451 gpio->base_addr + ZYNQ_GPIO_INTANY_OFFSET(bank_num)); zynq_gpio_set_irq_type()
499 unsigned int bank_num, zynq_gpio_handle_bank_irq()
502 unsigned int bank_offset = gpio->p_data->bank_min[bank_num]; zynq_gpio_handle_bank_irq()
531 unsigned int bank_num; zynq_gpio_irqhandler() local
538 for (bank_num = 0; bank_num < gpio->p_data->max_bank; bank_num++) { zynq_gpio_irqhandler()
540 ZYNQ_GPIO_INTSTS_OFFSET(bank_num)); zynq_gpio_irqhandler()
542 ZYNQ_GPIO_INTMASK_OFFSET(bank_num)); zynq_gpio_irqhandler()
543 zynq_gpio_handle_bank_irq(gpio, bank_num, int_sts & ~int_enb); zynq_gpio_irqhandler()
668 int ret, bank_num; zynq_gpio_probe() local
731 for (bank_num = 0; bank_num < gpio->p_data->max_bank; bank_num++) zynq_gpio_probe()
733 ZYNQ_GPIO_INTDIS_OFFSET(bank_num)); zynq_gpio_probe()
150 zynq_gpio_get_bank_pin(unsigned int pin_num, unsigned int *bank_num, unsigned int *bank_pin_num, struct zynq_gpio *gpio) zynq_gpio_get_bank_pin() argument
498 zynq_gpio_handle_bank_irq(struct zynq_gpio *gpio, unsigned int bank_num, unsigned long pending) zynq_gpio_handle_bank_irq() argument
/linux-4.4.14/drivers/crypto/qat/qat_common/
H A Dadf_transport.c232 uint32_t bank_num, uint32_t num_msgs, adf_create_ring()
244 if (bank_num >= GET_MAX_BANKS(accel_dev)) { adf_create_ring()
272 bank = &transport_data->banks[bank_num]; adf_create_ring()
400 uint32_t bank_num, void __iomem *csr_addr) adf_init_bank()
408 bank->bank_number = bank_num; adf_init_bank()
417 ADF_ETRMGR_COALESCING_ENABLED_FORMAT, bank_num, adf_init_bank()
419 adf_get_coalesc_timer(bank, "Accelerator0", bank_num); adf_init_bank()
424 WRITE_CSR_RING_CONFIG(csr_addr, bank_num, i, 0); adf_init_bank()
425 WRITE_CSR_RING_BASE(csr_addr, bank_num, i, 0); adf_init_bank()
450 WRITE_CSR_INT_SRCSEL(csr_addr, bank_num); adf_init_bank()
231 adf_create_ring(struct adf_accel_dev *accel_dev, const char *section, uint32_t bank_num, uint32_t num_msgs, uint32_t msg_size, const char *ring_name, adf_callback_fn callback, int poll_mode, struct adf_etr_ring_data **ring_ptr) adf_create_ring() argument
398 adf_init_bank(struct adf_accel_dev *accel_dev, struct adf_etr_bank_data *bank, uint32_t bank_num, void __iomem *csr_addr) adf_init_bank() argument
H A Dadf_transport.h57 uint32_t bank_num, uint32_t num_mgs, uint32_t msg_size,
/linux-4.4.14/drivers/pinctrl/
H A Dpinctrl-rockchip.c97 * @bank_num: number of the bank, to account for holes
116 u8 bank_num; member in struct:rockchip_pin_bank
130 .bank_num = id, \
143 .bank_num = id, \
269 if (b->bank_num == num) bank_num_to_bank()
468 bank->bank_num, pin, mux); rockchip_set_mux()
508 *reg += bank->bank_num * RK2928_PULL_BANK_STRIDE; rk2928_calc_pull_reg_and_bit()
527 if (bank->bank_num == 0 && pin_num < 12) { rk3188_calc_pull_reg_and_bit()
541 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; rk3188_calc_pull_reg_and_bit()
562 if (bank->bank_num == 0) { rk3288_calc_pull_reg_and_bit()
575 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; rk3288_calc_pull_reg_and_bit()
596 if (bank->bank_num == 0) { rk3288_calc_drv_reg_and_bit()
609 *reg += bank->bank_num * RK3288_DRV_BANK_STRIDE; rk3288_calc_drv_reg_and_bit()
627 if (bank->bank_num == 0) { rk3368_calc_pull_reg_and_bit()
640 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; rk3368_calc_pull_reg_and_bit()
658 if (bank->bank_num == 0) { rk3368_calc_drv_reg_and_bit()
671 *reg += bank->bank_num * RK3288_DRV_BANK_STRIDE; rk3368_calc_drv_reg_and_bit()
804 bank->bank_num, pin_num, pull); rockchip_set_pull()
H A Dpinctrl-st.c1510 int bank_num = of_alias_get_id(np, "gpio"); st_gpiolib_register_bank() local
1522 bank->gpio_chip.base = bank_num * ST_GPIO_PINS_PER_BANK; st_gpiolib_register_bank()
1531 range->id = bank_num; st_gpiolib_register_bank()
1537 dev_err(dev, "Failed to add gpiochip(%d)!\n", bank_num); st_gpiolib_register_bank()
/linux-4.4.14/drivers/mfd/
H A Dasic3.c570 u8 alt, pin, dir, init, bank_num, bit_num; asic3_gpio_probe() local
578 bank_num = ASIC3_GPIO_TO_BANK(pin); asic3_gpio_probe()
581 alt_reg[bank_num] |= (alt << bit_num); asic3_gpio_probe()
582 out_reg[bank_num] |= (init << bit_num); asic3_gpio_probe()
583 dir_reg[bank_num] |= (dir << bit_num); asic3_gpio_probe()
/linux-4.4.14/sound/isa/msnd/
H A Dmsnd.c318 int bank_num = DAPQ_tail / PCTODSP_OFFSET(DAQDS__size); snd_msnd_DAPQ() local
326 DAQD = bank_num * DAQDS__size + chip->mappedbase + snd_msnd_DAPQ()
347 bank_num, xtime.tv_usec); snd_msnd_DAPQ()
350 DAPQ_tail = (++bank_num % 3) * PCTODSP_OFFSET(DAQDS__size); snd_msnd_DAPQ()
355 if (2 == bank_num) snd_msnd_DAPQ()
/linux-4.4.14/sound/oss/
H A Dmsnd_pinnacle.c858 register int bank_num = DAPQ_tail / PCTODSP_OFFSET(DAQDS__size); pack_DAPF_to_DAPQ() local
868 dev.base + bank_num * DAP_BUFF_SIZE, pack_DAPF_to_DAPQ()
874 dev.base + bank_num * DAP_BUFF_SIZE, pack_DAPF_to_DAPQ()
884 DAQD = bank_num * DAQDS__size + dev.base + DAPQ_DATA_BUFF; pack_DAPF_to_DAPQ()
891 DAPQ_tail = (++bank_num % 3) * PCTODSP_OFFSET(DAQDS__size); pack_DAPF_to_DAPQ()
/linux-4.4.14/arch/x86/kvm/
H A Dx86.c1902 unsigned bank_num = mcg_cap & 0xff; set_msr_mce() local
1917 msr < MSR_IA32_MCx_CTL(bank_num)) { set_msr_mce()
2253 unsigned bank_num = mcg_cap & 0xff; get_msr_mce() local
2273 msr < MSR_IA32_MCx_CTL(bank_num)) { get_msr_mce()
2840 unsigned bank_num = mcg_cap & 0xff, bank; kvm_vcpu_ioctl_x86_setup_mce() local
2843 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS) kvm_vcpu_ioctl_x86_setup_mce()
2853 for (bank = 0; bank < bank_num; bank++) kvm_vcpu_ioctl_x86_setup_mce()
2863 unsigned bank_num = mcg_cap & 0xff; kvm_vcpu_ioctl_x86_set_mce() local
2866 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL)) kvm_vcpu_ioctl_x86_set_mce()
/linux-4.4.14/drivers/net/ethernet/qlogic/qed/
H A Dqed_hsi.h5262 u32 bank_num; member in struct:hw_set_info

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