Searched refs:ath_dbg (Results 1 - 48 of 48) sorted by relevance

/linux-4.4.14/drivers/net/wireless/ath/ath9k/
H A Dar9002_calib.c61 ath_dbg(common, CALIBRATE, ar9002_hw_setup_calibration()
66 ath_dbg(common, CALIBRATE, "starting ADC Gain Calibration\n"); ar9002_hw_setup_calibration()
70 ath_dbg(common, CALIBRATE, "starting ADC DC Calibration\n"); ar9002_hw_setup_calibration()
127 ath_dbg(ath9k_hw_common(ah), CALIBRATE, ar9002_hw_iqcal_collect()
149 ath_dbg(ath9k_hw_common(ah), CALIBRATE, ar9002_hw_adc_gaincal_collect()
173 ath_dbg(ath9k_hw_common(ah), CALIBRATE, ar9002_hw_adc_dccal_collect()
196 ath_dbg(common, CALIBRATE, ar9002_hw_iqcalibrate()
200 ath_dbg(common, CALIBRATE, ar9002_hw_iqcalibrate()
211 ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_i = 0x%08x\n", ar9002_hw_iqcalibrate()
213 ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_q = 0x%08x\n", ar9002_hw_iqcalibrate()
215 ath_dbg(common, CALIBRATE, "iqCorrNeg is 0x%08x\n", iqCorrNeg); ar9002_hw_iqcalibrate()
224 ath_dbg(common, CALIBRATE, "Chn %d iCoff = 0x%08x\n", ar9002_hw_iqcalibrate()
226 ath_dbg(common, CALIBRATE, "Chn %d qCoff = 0x%08x\n", ar9002_hw_iqcalibrate()
230 ath_dbg(common, CALIBRATE, ar9002_hw_iqcalibrate()
240 ath_dbg(common, CALIBRATE, ar9002_hw_iqcalibrate()
250 ath_dbg(common, CALIBRATE, ar9002_hw_iqcalibrate()
272 ath_dbg(common, CALIBRATE, ar9002_hw_adc_gaincal_calibrate()
275 ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_odd_i = 0x%08x\n", ar9002_hw_adc_gaincal_calibrate()
277 ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_even_i = 0x%08x\n", ar9002_hw_adc_gaincal_calibrate()
279 ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_odd_q = 0x%08x\n", ar9002_hw_adc_gaincal_calibrate()
281 ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_even_q = 0x%08x\n", ar9002_hw_adc_gaincal_calibrate()
292 ath_dbg(common, CALIBRATE, ar9002_hw_adc_gaincal_calibrate()
295 ath_dbg(common, CALIBRATE, ar9002_hw_adc_gaincal_calibrate()
304 ath_dbg(common, CALIBRATE, ar9002_hw_adc_gaincal_calibrate()
330 ath_dbg(common, CALIBRATE, ar9002_hw_adc_dccal_calibrate()
333 ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_odd_i = %d\n", ar9002_hw_adc_dccal_calibrate()
335 ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_even_i = %d\n", ar9002_hw_adc_dccal_calibrate()
337 ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_odd_q = %d\n", ar9002_hw_adc_dccal_calibrate()
339 ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_even_q = %d\n", ar9002_hw_adc_dccal_calibrate()
347 ath_dbg(common, CALIBRATE, ar9002_hw_adc_dccal_calibrate()
350 ath_dbg(common, CALIBRATE, ar9002_hw_adc_dccal_calibrate()
359 ath_dbg(common, CALIBRATE, ar9002_hw_adc_dccal_calibrate()
548 ath_dbg(common, CALIBRATE, "Running PA Calibration\n"); ar9285_hw_pa_cal()
729 ath_dbg(common, CALIBRATE, ar9285_hw_cl_cal()
744 ath_dbg(common, CALIBRATE, ar9285_hw_cl_cal()
841 ath_dbg(common, CALIBRATE, ar9002_hw_init_cal()
879 ath_dbg(common, CALIBRATE, ar9002_hw_init_cal()
886 ath_dbg(common, CALIBRATE, ar9002_hw_init_cal()
893 ath_dbg(common, CALIBRATE, "enabling IQ Calibration\n"); ar9002_hw_init_cal()
H A Dar9003_calib.c55 ath_dbg(common, CALIBRATE, ar9003_hw_setup_calibration()
189 ath_dbg(ath9k_hw_common(ah), CALIBRATE, ar9003_hw_iqcal_collect()
216 ath_dbg(common, CALIBRATE, ar9003_hw_iqcalibrate()
219 ath_dbg(common, CALIBRATE, ar9003_hw_iqcalibrate()
230 ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_i = 0x%08x\n", ar9003_hw_iqcalibrate()
232 ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_q = 0x%08x\n", ar9003_hw_iqcalibrate()
234 ath_dbg(common, CALIBRATE, "iqCorrNeg is 0x%08x\n", iqCorrNeg); ar9003_hw_iqcalibrate()
242 ath_dbg(common, CALIBRATE, "Chn %d iCoff = 0x%08x\n", ar9003_hw_iqcalibrate()
244 ath_dbg(common, CALIBRATE, "Chn %d qCoff = 0x%08x\n", ar9003_hw_iqcalibrate()
266 ath_dbg(common, CALIBRATE, ar9003_hw_iqcalibrate()
269 ath_dbg(common, CALIBRATE, ar9003_hw_iqcalibrate()
285 ath_dbg(common, CALIBRATE, ar9003_hw_iqcalibrate()
290 ath_dbg(common, CALIBRATE, ar9003_hw_iqcalibrate()
296 ath_dbg(common, CALIBRATE, ar9003_hw_iqcalibrate()
303 ath_dbg(common, CALIBRATE, ar9003_hw_iqcalibrate()
361 ath_dbg(common, CALIBRATE, ar9003_hw_dynamic_osdac_selection()
398 ath_dbg(common, CALIBRATE, ar9003_hw_dynamic_osdac_selection()
573 ath_dbg(common, CALIBRATE, "Divide by 0\n"); ar9003_hw_solve_iq_cal()
691 ath_dbg(common, CALIBRATE, ar9003_hw_calc_iq_corr()
744 ath_dbg(common, CALIBRATE, "Divide by 0: mag1=%d, mag2=%d\n", ar9003_hw_calc_iq_corr()
762 ath_dbg(common, CALIBRATE, ar9003_hw_calc_iq_corr()
772 ath_dbg(common, CALIBRATE, ar9003_hw_calc_iq_corr()
777 ath_dbg(common, CALIBRATE, ar9003_hw_calc_iq_corr()
790 ath_dbg(common, CALIBRATE, "tx chain %d: mag corr=%d phase corr=%d\n", ar9003_hw_calc_iq_corr()
804 ath_dbg(common, CALIBRATE, "tx chain %d: iq corr coeff=%x\n", ar9003_hw_calc_iq_corr()
808 ath_dbg(common, CALIBRATE, ar9003_hw_calc_iq_corr()
821 ath_dbg(common, CALIBRATE, "rx chain %d: mag corr=%d phase corr=%d\n", ar9003_hw_calc_iq_corr()
835 ath_dbg(common, CALIBRATE, "rx chain %d: iq corr coeff=%x\n", ar9003_hw_calc_iq_corr()
998 ath_dbg(common, CALIBRATE, "Tx IQ Cal is not completed\n"); ar9003_hw_tx_iq_cal_run()
1033 ath_dbg(common, CALIBRATE, __ar955x_tx_iq_cal_sort()
1090 ath_dbg(common, CALIBRATE, ar9003_hw_tx_iq_cal_post_proc()
1095 ath_dbg(common, CALIBRATE, ar9003_hw_tx_iq_cal_post_proc()
1122 ath_dbg(common, CALIBRATE, ar9003_hw_tx_iq_cal_post_proc()
1130 ath_dbg(common, CALIBRATE, ar9003_hw_tx_iq_cal_post_proc()
1156 ath_dbg(common, CALIBRATE, "Tx IQ Cal failed\n"); ar9003_hw_tx_iq_cal_post_proc()
1405 ath_dbg(common, CALIBRATE, "RTT calibration to be done\n"); ar9003_hw_init_cal_pcoem()
1508 ath_dbg(common, CALIBRATE, ar9003_hw_init_cal_pcoem()
1547 ath_dbg(common, CALIBRATE, "enabling IQ Calibration\n"); ar9003_hw_init_cal_pcoem()
1574 ath_dbg(common, CALIBRATE, do_ar9003_agc_cal()
1693 ath_dbg(common, CALIBRATE, "enabling IQ Calibration\n"); ar9003_hw_init_cal_soc()
H A Dlink.c33 ath_dbg(ath9k_hw_common(sc->sc_ah), RESET, ath_tx_complete_poll_work()
55 ath_dbg(ath9k_hw_common(sc->sc_ah), RESET, ath_tx_complete_poll_work()
79 ath_dbg(common, RESET, ath_hw_check()
101 ath_dbg(common, RESET, "PLL WAR, resetting the chip\n"); ath_hw_pll_rx_hang_check()
152 ath_dbg(common, CALIBRATE, "Failed to activate PAPRD\n"); ath_paprd_activate()
164 ath_dbg(common, CALIBRATE, "Activating PAPRD\n"); ath_paprd_activate()
192 ath_dbg(common, CALIBRATE, "PAPRD TX failed\n"); ath_paprd_send_frame()
201 ath_dbg(common, CALIBRATE, ath_paprd_send_frame()
226 ath_dbg(common, CALIBRATE, "Skipping PAPRD calibration\n"); ath_paprd_calibrate()
256 ath_dbg(common, CALIBRATE, ath_paprd_calibrate()
262 ath_dbg(common, CALIBRATE, ath_paprd_calibrate()
269 ath_dbg(common, CALIBRATE, ath_paprd_calibrate()
274 ath_dbg(common, CALIBRATE, ath_paprd_calibrate()
385 ath_dbg(common, ANI, ath_ani_calibrate()
432 ath_dbg(common, ANI, "Starting ANI\n"); ath_start_ani()
441 ath_dbg(common, ANI, "Stopping ANI\n"); ath_stop_ani()
H A Ddfs.c115 ath_dbg(common, DFS, "HT40: datalen=%d, num_fft_packets=%d\n", ath9k_check_chirping()
118 ath_dbg(common, DFS, "not enough packets for chirp\n"); ath9k_check_chirping()
124 ath_dbg(common, DFS, "fixing datalen by 2\n"); ath9k_check_chirping()
139 ath_dbg(common, DFS, "HT20: datalen=%d, num_fft_packets=%d\n", ath9k_check_chirping()
142 ath_dbg(common, DFS, "not enough packets for chirp\n"); ath9k_check_chirping()
149 ath_dbg(common, DFS, "bin_max = [%d, %d, %d, %d]\n", ath9k_check_chirping()
163 ath_dbg(common, DFS, "CHIRP: invalid delta %d " ath9k_check_chirping()
171 ath_dbg(common, DFS, "CHIRP: ddelta %d too high\n", ath9k_check_chirping()
176 ath_dbg(common, DFS, "CHIRP - %d: delta=%d, ddelta=%d\n", ath9k_check_chirping()
304 ath_dbg(common, DFS, ath9k_dfs_process_phyerr()
348 ath_dbg(common, DFS, ath9k_dfs_process_phyerr()
H A Dhtc_drv_beacon.c168 ath_dbg(common, XMIT, "No free CAB slot\n"); ath9k_htc_send_buffered()
178 ath_dbg(common, XMIT, "Failed to send CAB frame\n"); ath9k_htc_send_buffered()
253 ath_dbg(common, BSTUCK, ath9k_htc_send_beacon()
280 ath_dbg(common, BEACON, ath9k_htc_choose_bslot()
296 ath_dbg(common, BSTUCK, "Beacon stuck, HW reset\n"); ath9k_htc_swba()
304 ath_dbg(common, BSTUCK, ath9k_htc_swba()
340 ath_dbg(common, CONFIG, "Added interface at beacon slot: %d\n", ath9k_htc_assign_bslot()
354 ath_dbg(common, CONFIG, "Removed interface at beacon slot: %d\n", ath9k_htc_remove_bslot()
381 ath_dbg(common, CONFIG, "tsfadjust is: %llu for bslot: %d\n", ath9k_htc_set_tsfadjust()
412 ath_dbg(common, CONFIG, ath9k_htc_check_beacon_config()
423 ath_dbg(common, CONFIG, ath9k_htc_check_beacon_config()
441 ath_dbg(common, CONFIG, ath9k_htc_check_beacon_config()
482 ath_dbg(common, CONFIG, "Unsupported beaconing mode\n"); ath9k_htc_beacon_config()
504 ath_dbg(common, CONFIG, "Unsupported beaconing mode\n"); ath9k_htc_beacon_reconfig()
H A Dchannel.c41 ath_dbg(common, CONFIG, "Set channel: %d MHz width: %d\n", ath_set_channel()
90 ath_dbg(common, DFS, "DFS enabled at freq %d\n", ath_set_channel()
139 ath_dbg(common, CHAN_CTX, ath_chanctx_set_channel()
365 ath_dbg(common, CHAN_CTX, ath_chanctx_setup_timer()
405 ath_dbg(common, CHAN_CTX, ath_chanctx_offchannel_noa()
445 ath_dbg(common, CHAN_CTX, ath_chanctx_set_periodic_noa()
466 ath_dbg(common, CHAN_CTX, ath_chanctx_set_oneshot_noa()
490 ath_dbg(common, CHAN_CTX, "cur_chan: %d MHz, event: %s, state: %s\n", ath_chanctx_event()
504 ath_dbg(common, CHAN_CTX, ath_chanctx_event()
509 ath_dbg(common, CHAN_CTX, ath_chanctx_event()
518 ath_dbg(common, CHAN_CTX, ath_chanctx_event()
526 ath_dbg(common, CHAN_CTX, ath_chanctx_event()
533 ath_dbg(common, CHAN_CTX, ath_chanctx_event()
551 ath_dbg(common, CHAN_CTX, ath_chanctx_event()
558 ath_dbg(common, CHAN_CTX, "Preparing beacon for vif: %pM\n", vif->addr); ath_chanctx_event()
615 ath_dbg(common, CHAN_CTX, ath_chanctx_event()
625 ath_dbg(common, CHAN_CTX, ath_chanctx_event()
633 ath_dbg(common, CHAN_CTX, ath_chanctx_event()
647 ath_dbg(common, CHAN_CTX, ath_chanctx_event()
684 ath_dbg(common, CHAN_CTX, ath_chanctx_event()
702 ath_dbg(common, CHAN_CTX, ath_chanctx_event()
799 ath_dbg(common, CHAN_CTX, ath_chanctx_switch()
807 ath_dbg(common, CHAN_CTX, ath_chanctx_switch()
817 ath_dbg(common, CHAN_CTX, ath_chanctx_switch()
834 ath_dbg(common, CHAN_CTX, ath_chanctx_offchan_switch()
866 ath_dbg(common, CHAN_CTX, ath_scan_next_channel()
878 ath_dbg(common, CHAN_CTX, ath_scan_next_channel()
927 ath_dbg(common, CHAN_CTX, "RoC aborted\n"); ath_roc_complete()
931 ath_dbg(common, CHAN_CTX, "RoC expired\n"); ath_roc_complete()
935 ath_dbg(common, CHAN_CTX, "RoC canceled\n"); ath_roc_complete()
948 ath_dbg(common, CHAN_CTX, "HW scan aborted\n"); ath_scan_complete()
950 ath_dbg(common, CHAN_CTX, "HW scan complete\n"); ath_scan_complete()
1016 ath_dbg(common, CHAN_CTX, ath_scan_channel_start()
1028 ath_dbg(common, CHAN_CTX, ath_chanctx_timer()
1040 ath_dbg(common, CHAN_CTX, "%s: offchannel state: %s\n", ath_offchannel_timer()
1051 ath_dbg(common, CHAN_CTX, ath_offchannel_timer()
1154 ath_dbg(common, CHAN_CTX, ath_chanctx_defer_switch()
1170 ath_dbg(common, CHAN_CTX, "%s: offchannel state: %s\n", ath_offchannel_channel_change()
1226 ath_dbg(common, CHAN_CTX, ath_chanctx_set_next()
1233 ath_dbg(common, CHAN_CTX, ath_chanctx_set_next()
1277 ath_dbg(common, CHAN_CTX, ath_chanctx_set_next()
H A Dwow.c193 ath_dbg(common, WOW, "WoW for multivif is not yet supported\n"); ath9k_suspend()
200 ath_dbg(common, WOW, ath9k_suspend()
208 ath_dbg(common, WOW, "None of the STA vifs are associated\n"); ath9k_suspend()
215 ath_dbg(common, WOW, "No valid WoW triggers\n"); ath9k_suspend()
272 ath_dbg(common, WOW, "Suspend with WoW triggers: 0x%x\n", triggers); ath9k_suspend()
301 ath_dbg(common, WOW, "Resume with WoW status: 0x%x\n", status); ath9k_resume()
323 ath_dbg(common, WOW, "WoW wakeup source is %s\n", ath9k_set_wakeup()
H A Dcalib.c119 ath_dbg(common, CALIBRATE, ath9k_hw_update_nfcal_hist_buffer()
201 ath_dbg(common, CALIBRATE, "Calibration state incorrect, %d\n", ath9k_hw_reset_calvalid()
209 ath_dbg(common, CALIBRATE, "Resetting Cal %d state for channel %u\n", ath9k_hw_reset_calvalid()
300 ath_dbg(common, ANY, ath9k_hw_loadnf()
342 ath_dbg(common, CALIBRATE, ath9k_hw_nf_sanitize()
347 ath_dbg(common, CALIBRATE, ath9k_hw_nf_sanitize()
352 ath_dbg(common, CALIBRATE, ath9k_hw_nf_sanitize()
370 ath_dbg(common, CALIBRATE, ath9k_hw_getnf()
380 ath_dbg(common, CALIBRATE, ath9k_hw_getnf()
H A Dhtc_drv_main.c272 ath_dbg(common, CONFIG, ath9k_htc_set_channel()
425 ath_dbg(common, CONFIG, ath9k_htc_add_monitor_interface()
437 ath_dbg(common, FATAL, "Unable to attach a monitor interface\n"); ath9k_htc_add_monitor_interface()
462 ath_dbg(common, CONFIG, ath9k_htc_remove_monitor_interface()
518 ath_dbg(common, CONFIG, ath9k_htc_add_station()
522 ath_dbg(common, CONFIG, ath9k_htc_add_station()
562 ath_dbg(common, CONFIG, ath9k_htc_remove_station()
566 ath_dbg(common, CONFIG, ath9k_htc_remove_station()
673 ath_dbg(common, CONFIG, ath9k_htc_init_rate()
700 ath_dbg(common, CONFIG, ath9k_htc_update_rate()
729 ath_dbg(common, CONFIG, ath9k_htc_tx_aggr_oper()
733 ath_dbg(common, CONFIG, ath9k_htc_tx_aggr_oper()
793 ath_dbg(common, ANI, "longcal @%lu\n", jiffies); ath9k_htc_ani_work()
805 ath_dbg(common, ANI, "shortcal @%lu\n", jiffies); ath9k_htc_ani_work()
881 ath_dbg(common, XMIT, "No room for padding\n"); ath9k_htc_tx()
890 ath_dbg(common, XMIT, "No free TX slot\n"); ath9k_htc_tx()
896 ath_dbg(common, XMIT, "Tx failed\n"); ath9k_htc_tx()
924 ath_dbg(common, CONFIG, ath9k_htc_start()
957 ath_dbg(common, CONFIG, ath9k_htc_start()
990 ath_dbg(common, ANY, "Device not present\n"); ath9k_htc_stop()
1033 ath_dbg(common, CONFIG, "Driver halt\n"); ath9k_htc_stop()
1110 ath_dbg(common, CONFIG, "Attach a VIF of type: %d at idx: %d\n", ath9k_htc_add_interface()
1172 ath_dbg(common, CONFIG, "Detach Interface at idx: %d\n", avp->index); ath9k_htc_remove_interface()
1215 ath_dbg(common, CONFIG, "Set channel: %d MHz\n", ath9k_htc_config()
1273 ath_dbg(ath9k_hw_common(priv->ah), ANY, ath9k_htc_configure_filter()
1284 ath_dbg(ath9k_hw_common(priv->ah), CONFIG, "Set HW RX filter: 0x%x\n", ath9k_htc_configure_filter()
1307 ath_dbg(common, CONFIG, ath9k_htc_sta_rc_update_work()
1311 ath_dbg(common, CONFIG, ath9k_htc_sta_rc_update_work()
1397 ath_dbg(common, CONFIG, ath9k_htc_conf_tx()
1447 ath_dbg(common, CONFIG, "Set HW Key\n"); ath9k_htc_set_key()
1483 ath_dbg(common, CONFIG, "BSSID: %pM aid: 0x%x\n", ath9k_htc_set_bssid()
1525 ath_dbg(common, CONFIG, "BSS Changed ASSOC %d\n", ath9k_htc_bss_info_changed()
1552 ath_dbg(common, CONFIG, "Beacon enabled for BSS: %pM\n", ath9k_htc_bss_info_changed()
1566 ath_dbg(common, CONFIG, ath9k_htc_bss_info_changed()
1587 ath_dbg(common, CONFIG, ath9k_htc_bss_info_changed()
1794 ath_dbg(common, CONFIG, "Set bitrate masks: 0x%x, 0x%x\n", ath9k_htc_set_bitrate_mask()
H A Dmac.c24 ath_dbg(ath9k_hw_common(ah), INTERRUPT, ath9k_hw_set_txq_interrupts()
60 ath_dbg(ath9k_hw_common(ah), QUEUE, "Enable TXE on queue: %u\n", q); ath9k_hw_txstart()
205 ath_dbg(common, QUEUE, ath9k_hw_set_txq_props()
210 ath_dbg(common, QUEUE, "Set queue properties for: %u\n", q); ath9k_hw_set_txq_props()
269 ath_dbg(common, QUEUE, ath9k_hw_get_txq_props()
321 ath_dbg(common, QUEUE, "Setup TX queue: %u\n", q); ath9k_hw_setuptxqueue()
353 ath_dbg(common, QUEUE, "Release TXQ, inactive queue: %u\n", q); ath9k_hw_releasetxqueue()
357 ath_dbg(common, QUEUE, "Release TX queue: %u\n", q); ath9k_hw_releasetxqueue()
375 ath_dbg(common, QUEUE, "Reset TXQ, inactive queue: %u\n", q); ath9k_hw_resettxqueue()
379 ath_dbg(common, QUEUE, "Reset TX queue: %u\n", q); ath9k_hw_resettxqueue()
784 ath_dbg(common, INTERRUPT, "disable IER\n"); ath9k_hw_kill_interrupts()
818 ath_dbg(common, INTERRUPT, "Do not enable IER ref count %d\n", ath9k_hw_enable_interrupts()
832 ath_dbg(common, INTERRUPT, "enable IER\n"); ath9k_hw_enable_interrupts()
841 ath_dbg(common, INTERRUPT, "AR_IMR 0x%x IER 0x%x\n", ath9k_hw_enable_interrupts()
856 ath_dbg(common, INTERRUPT, "New interrupt mask 0x%x\n", ints); ath9k_hw_set_interrupts()
926 ath_dbg(common, INTERRUPT, "new IMR 0x%x\n", mask); ath9k_hw_set_interrupts()
970 ath_dbg(ath9k_hw_common(ah), PS, ath9k_hw_set_tx_filter()
H A Dmain.c315 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n", ath_reset_internal()
391 ath_dbg(common, RESET, "FATAL: Skipping interrupts\n"); ath9k_tasklet()
411 ath_dbg(common, RESET, ath9k_tasklet()
424 ath_dbg(common, RESET, ath9k_tasklet()
436 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n"); ath9k_tasklet()
657 ath_dbg(common, CONFIG, ath9k_start()
763 ath_dbg(common, PS, ath9k_tx()
780 ath_dbg(common, PS, ath9k_tx()
784 ath_dbg(common, PS, "Wake up to complete TX\n"); ath9k_tx()
809 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb); ath9k_tx()
812 ath_dbg(common, XMIT, "TX failed\n"); ath9k_tx()
836 ath_dbg(common, ANY, "Device not present\n"); ath9k_stop()
899 ath_dbg(common, CONFIG, "Driver halt\n"); ath9k_stop()
1036 ath_dbg(common, CONFIG, ath9k_set_assoc_state()
1175 ath_dbg(common, CONFIG, ath9k_calculate_summary_state()
1251 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type); ath9k_add_interface()
1295 ath_dbg(common, CONFIG, "Change Interface\n"); ath9k_change_interface()
1322 ath_dbg(common, CONFIG, "Detach Interface\n"); ath9k_remove_interface()
1361 ath_dbg(common, PS, "PowerSave enabled\n"); ath9k_enable_ps()
1385 ath_dbg(common, PS, "PowerSave disabled\n"); ath9k_disable_ps()
1432 ath_dbg(common, CONFIG, "Monitor mode is enabled\n"); ath9k_config()
1435 ath_dbg(common, CONFIG, "Monitor mode is disabled\n"); ath9k_config()
1486 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n", ath9k_configure_filter()
1556 ath_dbg(common, CONFIG, ath9k_sta_state()
1561 ath_dbg(common, CONFIG, ath9k_sta_state()
1637 ath_dbg(common, CONFIG, ath9k_conf_tx()
1684 ath_dbg(common, CONFIG, "Set HW Key %d\n", cmd); ath9k_set_key()
1758 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n", ath9k_bss_info_changed()
1810 ath_dbg(common, CONFIG, "vif %pM power %d dbm power_type %d\n", ath9k_bss_info_changed()
2058 ath_dbg(common, ANY, "Device has been unplugged!\n"); __ath9k_flush()
2063 ath_dbg(common, ANY, "Device not present\n"); __ath9k_flush()
2074 ath_dbg(common, CHAN_CTX, __ath9k_flush()
2255 ath_dbg(common, CHAN_CTX, ath9k_cancel_pending_offchannel()
2264 ath_dbg(common, CHAN_CTX, ath9k_cancel_pending_offchannel()
2293 ath_dbg(common, CHAN_CTX, "HW scan request received on vif: %pM\n", ath9k_hw_scan()
2297 ath_dbg(common, CHAN_CTX, "Starting HW scan\n"); ath9k_hw_scan()
2313 ath_dbg(common, CHAN_CTX, "Cancel HW scan on vif: %pM\n", vif->addr); ath9k_cancel_hw_scan()
2342 ath_dbg(common, CHAN_CTX, ath9k_remain_on_channel()
2347 ath_dbg(common, CHAN_CTX, "Starting RoC period\n"); ath9k_remain_on_channel()
2364 ath_dbg(common, CHAN_CTX, "Cancel RoC\n"); ath9k_cancel_remain_on_channel()
2397 ath_dbg(common, CHAN_CTX, ath_for_each_chanctx()
2421 ath_dbg(common, CHAN_CTX, ath9k_remove_chanctx()
2441 ath_dbg(common, CHAN_CTX, ath9k_change_chanctx()
2462 ath_dbg(common, CHAN_CTX, ath9k_assign_vif_chanctx()
2493 ath_dbg(common, CHAN_CTX, ath9k_unassign_vif_chanctx()
2558 ath_dbg(common, CHAN_CTX, ath9k_mgd_prepare_tx()
2569 ath_dbg(common, CHAN_CTX, ath9k_mgd_prepare_tx()
H A Dmci.c152 ath_dbg(common, MCI, ath_mci_update_scheme()
162 ath_dbg(common, MCI, ath_mci_update_scheme()
168 ath_dbg(common, MCI, ath_mci_update_scheme()
176 ath_dbg(common, MCI, ath_mci_update_scheme()
181 ath_dbg(common, MCI, ath_mci_update_scheme()
223 ath_dbg(common, MCI, "MCI State : %d\n", mci_hw->bt_state); ath_mci_cal_msg()
231 ath_dbg(common, MCI, "Unknown GPM CAL message\n"); ath_mci_cal_msg()
378 ath_dbg(common, MCI, "(MCI) Need to flush BT profiles\n"); ath_mci_msg()
401 ath_dbg(common, MCI, ath_mci_msg()
419 ath_dbg(common, MCI, ath_mci_msg()
427 ath_dbg(common, MCI, "Unknown GPM COEX message = 0x%02x\n", opcode); ath_mci_msg()
446 ath_dbg(common, FATAL, "MCI buffer alloc failed\n"); ath_mci_setup()
468 ath_dbg(common, MCI, "MCI Initialized\n"); ath_mci_setup()
480 ath_dbg(common, MCI, "MCI De-Initialized\n"); ath_mci_cleanup()
608 ath_dbg(common, MCI, ath_mci_intr()
677 ath_dbg(ath9k_hw_common(ah), MCI, ath9k_mci_update_wlan_channels()
H A Dar9003_mci.c66 ath_dbg(common, MCI, ar9003_mci_wait_for_interrupt()
69 ath_dbg(common, MCI, ar9003_mci_wait_for_interrupt()
298 ath_dbg(common, MCI, ar9003_mci_prep_interface()
301 ath_dbg(common, MCI, ar9003_mci_prep_interface()
379 ath_dbg(common, MCI, ar9003_mci_get_isr()
535 ath_dbg(common, MCI, "MCI Recv GPM COEX Version Query\n"); ar9003_mci_process_gpm_extra()
539 ath_dbg(common, MCI, "MCI Recv GPM COEX Version Response\n"); ar9003_mci_process_gpm_extra()
545 ath_dbg(common, MCI, "MCI BT Coex version: %d.%d\n", ar9003_mci_process_gpm_extra()
549 ath_dbg(common, MCI, ar9003_mci_process_gpm_extra()
557 ath_dbg(common, MCI, "MCI Recv GPM COEX BT_Profile_Info\n"); ar9003_mci_process_gpm_extra()
561 ath_dbg(common, MCI, ar9003_mci_process_gpm_extra()
644 ath_dbg(common, MCI, "MCI GPM subtype not match 0x%x\n", ar9003_mci_wait_for_gpm()
707 ath_dbg(common, MCI, "MCI BT_CAL_DONE received\n"); ar9003_mci_start_reset()
709 ath_dbg(common, MCI, ar9003_mci_start_reset()
913 ath_dbg(common, MCI, "MCI Reset (full_sleep = %d, is_2g = %d)\n", ar9003_mci_reset()
1170 ath_dbg(common, MCI, ar9003_mci_send_message()
1176 ath_dbg(common, MCI, ar9003_mci_send_message()
1236 ath_dbg(common, MCI, "MCI BT_CAL_GRANT received\n"); ar9003_mci_init_cal_req()
1239 ath_dbg(common, MCI, "MCI BT_CAL_GRANT not received\n"); ar9003_mci_init_cal_req()
1350 ath_dbg(ath9k_hw_common(ah), MCI, ar9003_mci_state()
1354 ath_dbg(ath9k_hw_common(ah), MCI, "(MCI) RECOVER RX\n"); ar9003_mci_state()
1398 ath_dbg(common, MCI, "Give LNA and SPDT control to BT\n"); ar9003_mci_bt_gain_ctrl()
1458 ath_dbg(common, MCI, "GPM cached write pointer mismatch %d %d\n", ar9003_mci_check_gpm_offset()
1547 ath_dbg(ath9k_hw_common(ah), MCI, "MCI BT version set: %d.%d\n", ar9003_mci_set_bt_version()
H A Dbeacon.c180 ath_dbg(common, BEACON, ath9k_beacon_generate()
213 ath_dbg(common, CONFIG, "Added interface at beacon slot: %d\n", ath9k_beacon_assign_slot()
224 ath_dbg(common, CONFIG, "Removing interface at beacon slot: %d\n", ath9k_beacon_remove_slot()
259 ath_dbg(common, BEACON, "slot 0, tsf: %llu\n", ath9k_beacon_choose_slot()
270 ath_dbg(common, BEACON, "slot: %d tsf: %llu tsftu: %u\n", ath9k_beacon_choose_slot()
290 ath_dbg(common, CONFIG, "tsfadjust is: %llu for bslot: %d\n", ath9k_set_tsfadjust()
330 ath_dbg(common, RESET, ath9k_beacon_tasklet()
357 ath_dbg(common, BSTUCK, ath9k_beacon_tasklet()
364 ath_dbg(common, BSTUCK, "beacon is officially stuck\n"); ath9k_beacon_tasklet()
396 ath_dbg(common, BSTUCK, "resume beacon xmit after %u misses\n", ath9k_beacon_tasklet()
430 ath_dbg(common, BEACON, ath9k_beacon_tasklet()
528 ath_dbg(common, CONFIG, ath9k_allow_beacon_config()
538 ath_dbg(common, CONFIG, ath9k_allow_beacon_config()
554 ath_dbg(common, BEACON, ath9k_cache_beacon_config()
683 ath_dbg(common, CONFIG, "Unsupported beaconing mode\n"); ath9k_set_beacon()
H A Dcommon-spectral.c186 ath_dbg(common, SPECTRAL_SCAN, "FFT HT20 frame: max mag 0x%X," ath_cmn_process_ht20_fft()
192 ath_dbg(common, SPECTRAL_SCAN, "Magnitude mismatch !\n"); ath_cmn_process_ht20_fft()
218 ath_dbg(common, SPECTRAL_SCAN, ath_cmn_process_ht20_fft()
224 ath_dbg(common, SPECTRAL_SCAN, ath_cmn_process_ht20_fft()
229 ath_dbg(common, SPECTRAL_SCAN, ath_cmn_process_ht20_fft()
326 ath_dbg(common, SPECTRAL_SCAN, "FFT HT20/40 frame: lower mag 0x%X," ath_cmn_process_ht20_40_fft()
357 ath_dbg(common, SPECTRAL_SCAN, "Magnitude mismatch !\n"); ath_cmn_process_ht20_40_fft()
383 ath_dbg(common, SPECTRAL_SCAN, ath_cmn_process_ht20_40_fft()
389 ath_dbg(common, SPECTRAL_SCAN, ath_cmn_process_ht20_40_fft()
394 ath_dbg(common, SPECTRAL_SCAN, ath_cmn_process_ht20_40_fft()
412 ath_dbg(common, SPECTRAL_SCAN, ath_cmn_process_ht20_40_fft()
418 ath_dbg(common, SPECTRAL_SCAN, ath_cmn_process_ht20_40_fft()
423 ath_dbg(common, SPECTRAL_SCAN, ath_cmn_process_ht20_40_fft()
536 ath_dbg(common, SPECTRAL_SCAN, "FFT report ignored, no space " ath_cmn_process_fft()
557 ath_dbg(common, SPECTRAL_SCAN, "Got radar dump bw_info: 0x%X," ath_cmn_process_fft()
615 ath_dbg(common, SPECTRAL_SCAN, ath_cmn_process_fft()
636 ath_dbg(common, SPECTRAL_SCAN, "FFT frame len: %i\n", ath_cmn_process_fft()
692 ath_dbg(common, SPECTRAL_SCAN, "FFT report truncated" ath_cmn_process_fft()
822 ath_dbg(common, CONFIG, "spectral scan: background mode enabled\n"); write_file_spec_scan_ctl()
825 ath_dbg(common, CONFIG, "spectral scan: channel scan mode enabled\n"); write_file_spec_scan_ctl()
828 ath_dbg(common, CONFIG, "spectral scan: manual mode enabled\n"); write_file_spec_scan_ctl()
831 ath_dbg(common, CONFIG, "spectral scan: disabled\n"); write_file_spec_scan_ctl()
H A Ddynack.c99 ath_dbg(common, DYNACK, "ACK timeout %u slottime %u\n", ath_dynack_compute_ackto()
131 ath_dbg(ath9k_hw_common(ah), DYNACK, ath_dynack_compute_to()
146 ath_dbg(ath9k_hw_common(ah), DYNACK, ath_dynack_compute_to()
191 ath_dbg(common, DYNACK, "late ack\n"); ath_dynack_sample_tx_ts()
225 ath_dbg(common, DYNACK, "{%pM} tx sample %u [dur %u][h %u-t %u]\n", ath_dynack_sample_tx_ts()
260 ath_dbg(common, DYNACK, "rx sample %u [h %u-t %u]\n", ath_dynack_sample_ack_ts()
H A Dani.c162 ath_dbg(common, ANI, "**** ofdmlevel %d=>%d, rssi=%d[lo=%d hi=%d]\n", ath9k_hw_set_ofdm_nil()
246 ath_dbg(common, ANI, "**** ccklevel %d=>%d, rssi=%d[lo=%d hi=%d]\n", ath9k_hw_set_cck_nil()
356 ath_dbg(common, ANI, ath9k_ani_reset()
371 ath_dbg(common, ANI, ath9k_ani_reset()
435 ath_dbg(common, ANI, ath9k_hw_ani_monitor()
463 ath_dbg(common, ANI, "Enable MIB counters\n"); ath9k_enable_mib_counters()
485 ath_dbg(common, ANI, "Disable MIB counters\n"); ath9k_hw_disable_mib_counters()
500 ath_dbg(common, ANI, "Initialize ANI\n"); ath9k_hw_ani_init()
H A Dcommon-beacon.c65 ath_dbg(common, BEACON, ath9k_cmn_beacon_config_sta()
122 ath_dbg(common, BEACON, "bmiss: %u sleep: %u\n", ath9k_cmn_beacon_config_sta()
146 ath_dbg(common, BEACON, ath9k_cmn_beacon_config_adhoc()
175 ath_dbg(common, BEACON, ath9k_cmn_beacon_config_ap()
H A Dhtc_drv_gpio.c44 ath_dbg(ath9k_hw_common(ah), BTCOEX, ath_detect_bt_priority()
49 ath_dbg(ath9k_hw_common(ah), BTCOEX, ath_detect_bt_priority()
106 ath_dbg(common, BTCOEX, "time slice work for bt and wlan\n"); ath_btcoex_duty_cycle_work()
139 ath_dbg(ath9k_hw_common(ah), BTCOEX, "Starting btcoex work\n"); ath_htc_resume_btcoex_work()
H A Dtx99.c37 ath_dbg(common, XMIT, "TX99 stopped\n"); ath9k_tx99_stop()
149 ath_dbg(common, XMIT, "Failed to xmit TX99 skb\n"); ath9k_tx99_init()
153 ath_dbg(common, XMIT, "TX99 xmit started using %d ( %ddBm)\n", ath9k_tx99_init()
196 ath_dbg(common, XMIT, "Resetting TX99\n"); write_file_tx99()
H A Dar9002_mac.c130 ath_dbg(common, INTERRUPT, ar9002_hw_get_isr()
183 ath_dbg(common, ANY, ar9002_hw_get_isr()
187 ath_dbg(common, ANY, ar9002_hw_get_isr()
193 ath_dbg(common, INTERRUPT, ar9002_hw_get_isr()
200 ath_dbg(common, INTERRUPT, ar9002_hw_get_isr()
H A Dar9003_phy.c1173 ath_dbg(common, ANI, ar9003_hw_ani_control()
1191 ath_dbg(common, ANI, ar9003_hw_ani_control()
1228 ath_dbg(common, ANI, ar9003_hw_ani_control()
1236 ath_dbg(common, ANI, ar9003_hw_ani_control()
1256 ath_dbg(common, ANI, ar9003_hw_ani_control()
1292 ath_dbg(common, ANI, ar9003_hw_ani_control()
1300 ath_dbg(common, ANI, ar9003_hw_ani_control()
1331 ath_dbg(common, ANI, "** ch %d: MRC CCK: %s=>%s\n", ar9003_hw_ani_control()
1344 ath_dbg(common, ANI, "invalid cmd %u\n", cmd); ar9003_hw_ani_control()
1348 ath_dbg(common, ANI, ar9003_hw_ani_control()
1424 ath_dbg(common, ANI, "ver %d.%d opmode %u chan %d Mhz\n", ar9003_hw_ani_cache_ini_regs()
2136 ath_dbg(common, RESET, "Disabled BB Watchdog\n"); ar9003_hw_bb_watchdog_config()
2172 ath_dbg(common, RESET, "Enabled BB Watchdog timeout (%u ms)\n", ar9003_hw_bb_watchdog_config()
2201 ath_dbg(common, RESET, ar9003_hw_bb_watchdog_dbg_info()
2203 ath_dbg(common, RESET, ar9003_hw_bb_watchdog_dbg_info()
2215 ath_dbg(common, RESET, "** BB WD cntl: cntl1=0x%08x cntl2=0x%08x **\n", ar9003_hw_bb_watchdog_dbg_info()
2218 ath_dbg(common, RESET, "** BB mode: BB_gen_controls=0x%08x **\n", ar9003_hw_bb_watchdog_dbg_info()
2223 ath_dbg(common, RESET, ar9003_hw_bb_watchdog_dbg_info()
2227 ath_dbg(common, RESET, "==== BB update: done ====\n\n"); ar9003_hw_bb_watchdog_dbg_info()
H A Dar9003_rtt.c114 ath_dbg(ath9k_hw_common(ah), CALIBRATE, ar9003_hw_rtt_load_hist()
182 ath_dbg(ath9k_hw_common(ah), CALIBRATE, ar9003_hw_rtt_fill_hist()
H A Dwmi.c193 ath_dbg(common, FATAL, "FATAL Event received, resetting device\n"); ath9k_fatal_work()
337 ath_dbg(common, WMI, "Timeout waiting for WMI command: %s\n", ath9k_wmi_cmd()
348 ath_dbg(common, WMI, "WMI failure for: %s\n", wmi_cmd_to_name(cmd_id)); ath9k_wmi_cmd()
H A Dar9003_mac.c327 ath_dbg(common, ANY, ar9003_hw_get_isr()
331 ath_dbg(common, ANY, ar9003_hw_get_isr()
344 ath_dbg(common, INTERRUPT, ar9003_hw_get_isr()
370 ath_dbg(ath9k_hw_common(ah), XMIT, ar9003_hw_proc_txdesc()
595 ath_dbg(ath9k_hw_common(ah), XMIT, ath9k_hw_reset_txstatus_ring()
H A Dar9003_paprd.c130 ath_dbg(common, CALIBRATE, "Invalid tx-chainmask: %u\n", ar9003_get_training_power_5g()
160 ath_dbg(common, CALIBRATE, "Training power: %d, Target power: %d\n", ar9003_paprd_setup_single_table()
164 ath_dbg(common, CALIBRATE, ar9003_paprd_setup_single_table()
180 ath_dbg(common, CALIBRATE, "PAPRD HT20 mask: 0x%x, HT40 mask: 0x%x\n", ar9003_paprd_setup_single_table()
347 ath_dbg(ath9k_hw_common(ah), CALIBRATE, ar9003_get_desired_gain()
990 ath_dbg(ath9k_hw_common(ah), CALIBRATE, ar9003_paprd_is_done()
H A Dar5008_phy.c166 ath_dbg(common, CONFIG, "Force rf_pwd_icsyndiv to %1d on %4d\n", ar5008_hw_force_bias()
1015 ath_dbg(common, ANI, ar5008_hw_ani_control_new()
1039 ath_dbg(common, ANI, ar5008_hw_ani_control_new()
1047 ath_dbg(common, ANI, ar5008_hw_ani_control_new()
1074 ath_dbg(common, ANI, ar5008_hw_ani_control_new()
1082 ath_dbg(common, ANI, ar5008_hw_ani_control_new()
1106 ath_dbg(common, ANI, "invalid cmd %u\n", cmd); ar5008_hw_ani_control_new()
1110 ath_dbg(common, ANI, ar5008_hw_ani_control_new()
1164 ath_dbg(common, ANI, "ver %d.%d opmode %u chan %d Mhz\n", ar5008_hw_ani_cache_ini_regs()
H A Dgpio.c156 ath_dbg(ath9k_hw_common(sc->sc_ah), BTCOEX, ath_detect_bt_priority()
161 ath_dbg(ath9k_hw_common(sc->sc_ah), BTCOEX, ath_detect_bt_priority()
307 ath_dbg(ath9k_hw_common(ah), BTCOEX, "Starting btcoex timers\n"); ath9k_btcoex_timer_resume()
332 ath_dbg(ath9k_hw_common(ah), BTCOEX, "Stopping btcoex timers\n"); ath9k_btcoex_timer_pause()
H A Drecv.c145 ath_dbg(common, QUEUE, "No free rx buf available\n"); ath_rx_addbuffer_edma()
286 ath_dbg(common, CONFIG, "cachelsz %u rxbufsize %u\n", ath_rx_init()
494 ath_dbg(ath9k_hw_common(sc->sc_ah), RESET, ath_stoprecv()
545 ath_dbg(common, PS, ath_rx_ps_beacon()
570 ath_dbg(common, PS, ath_rx_ps_beacon()
583 ath_dbg(common, PS, "PS wait for CAB frames timed out\n"); ath_rx_ps_beacon()
608 ath_dbg(common, PS, ath_rx_ps()
614 ath_dbg(common, PS, ath_rx_ps()
902 ath_dbg(common, ANY, "unsupported hw bitrate detected 0x%02x using 1 Mbit\n", ath9k_rx_skb_preprocess()
H A Dhw.c90 ath_dbg(ath9k_hw_common(ah), ANY, ath9k_hw_wait()
433 ath_dbg(common, RESET, "serialize_regmode is %d\n", ath9k_hw_init_config()
523 ath_dbg(ath9k_hw_common(ah), CONFIG, "Eeprom VER: %d, REV: %d\n", ath9k_hw_post_init()
1006 ath_dbg(ath9k_hw_common(ah), XMIT, "bad global tx timeout %u\n", ath9k_hw_set_global_txtimeout()
1027 ath_dbg(ath9k_hw_common(ah), RESET, "ah->misc_mode 0x%x\n", ath9k_hw_init_global_settings()
1297 ath_dbg(ath9k_hw_common(ah), RESET, ath9k_hw_ar9330_reset_war()
1384 ath_dbg(ath9k_hw_common(ah), RESET, "RTC stuck in MAC reset\n"); ath9k_hw_set_reset()
1428 ath_dbg(ath9k_hw_common(ah), RESET, "RTC not waking up\n"); ath9k_hw_set_reset_power_on()
1514 ath_dbg(common, QUEUE, ath9k_hw_channel_change()
1587 ath_dbg(common, BSTUCK, "Abnormal NAV: 0x%x\n", val); ath9k_hw_check_nav()
1705 ath_dbg(common, RESET, "CFG Byte Swap Set 0x%x\n", ath9k_hw_init_desc()
1710 ath_dbg(common, RESET, "Setting CFG 0x%x\n", ath9k_hw_init_desc()
1778 ath_dbg(common, RESET, "FastChannelChange for %d -> %d\n", ath9k_hw_do_fastcc()
2193 ath_dbg(common, RESET, "%s -> %s\n", ath9k_hw_setpower()
2254 ath_dbg(ath9k_hw_common(ah), BEACON, ath9k_hw_beaconinit()
2302 ath_dbg(common, BEACON, "next DTIM %d\n", bs->bs_nextdtim); ath9k_hw_set_sta_beacon_timers()
2303 ath_dbg(common, BEACON, "next beacon %d\n", nextTbtt); ath9k_hw_set_sta_beacon_timers()
2304 ath_dbg(common, BEACON, "beacon period %d\n", beaconintval); ath9k_hw_set_sta_beacon_timers()
2305 ath_dbg(common, BEACON, "DTIM period %d\n", dtimperiod); ath9k_hw_set_sta_beacon_timers()
2397 ath_dbg(common, REGULATORY, "regdomain mapped to 0x%x\n", ath9k_hw_fill_cap_info()
2922 ath_dbg(ath9k_hw_common(ah), RESET, ath9k_hw_reset_tsf()
H A Dhtc_drv_init.c247 ath_dbg(common, WMI, "REGISTER READ FAILED: (0x%04x, %d)\n", ath9k_regread()
274 ath_dbg(common, WMI, ath9k_multi_regread()
295 ath_dbg(common, WMI, ath9k_regwrite_multi()
318 ath_dbg(common, WMI, "REGISTER WRITE FAILED:(0x%04x, %d)\n", ath9k_regwrite_single()
412 ath_dbg(common, WMI, ath9k_reg_rmw_buffer()
444 ath_dbg(common, WMI, ath9k_reg_rmw_flush()
485 ath_dbg(common, WMI, "REGISTER RMW FAILED:(0x%04x, %d)\n", ath9k_reg_rmw_single()
895 ath_dbg(common, CONFIG, ath9k_init_device()
H A Dar9003_eeprom.c3050 ath_dbg(common, EEPROM, "eeprom address not in range\n"); ar9300_read_eeprom()
3081 ath_dbg(common, EEPROM, "unable to read eeprom region at offset %d\n", ar9300_read_eeprom()
3166 ath_dbg(common, EEPROM, ar9300_uncompress_block()
3172 ath_dbg(common, EEPROM, ar9300_uncompress_block()
3194 ath_dbg(common, EEPROM, ar9300_compress_decision()
3200 ath_dbg(common, EEPROM, ar9300_compress_decision()
3209 ath_dbg(common, EEPROM, ar9300_compress_decision()
3216 ath_dbg(common, EEPROM, ar9300_compress_decision()
3223 ath_dbg(common, EEPROM, "unknown compression code %d\n", code); ar9300_compress_decision()
3308 ath_dbg(common, EEPROM, "Trying EEPROM access at Address 0x%04x\n", ar9300_eeprom_restore_internal()
3314 ath_dbg(common, EEPROM, "Trying EEPROM access at Address 0x%04x\n", ar9300_eeprom_restore_internal()
3321 ath_dbg(common, EEPROM, "Trying OTP access at Address 0x%04x\n", cptr); ar9300_eeprom_restore_internal()
3326 ath_dbg(common, EEPROM, "Trying OTP access at Address 0x%04x\n", cptr); ar9300_eeprom_restore_internal()
3333 ath_dbg(common, EEPROM, "Found valid EEPROM data\n"); ar9300_eeprom_restore_internal()
3344 ath_dbg(common, EEPROM, ar9300_eeprom_restore_internal()
3349 ath_dbg(common, EEPROM, "Skipping bad header\n"); ar9300_eeprom_restore_internal()
3358 ath_dbg(common, EEPROM, "checksum %x %x\n", ar9300_eeprom_restore_internal()
3364 ath_dbg(common, EEPROM, ar9300_eeprom_restore_internal()
4674 ath_dbg(common, REGULATORY, "TPC[%02d] 0x%08x\n", ar9003_hw_get_target_power_eeprom()
4694 ath_dbg(common, EEPROM, ar9003_hw_cal_pier_get()
4702 ath_dbg(common, EEPROM, ar9003_hw_cal_pier_get()
4712 ath_dbg(common, EEPROM, ar9003_hw_cal_pier_get()
4962 ath_dbg(common, EEPROM, "ch=%d f=%d low=%d %d h=%d %d\n", ar9003_hw_calibration_apply()
5017 ath_dbg(common, EEPROM, ar9003_hw_calibration_apply()
5182 ath_dbg(common, REGULATORY, ar9003_hw_set_power_per_rate_table()
5198 ath_dbg(common, REGULATORY, ar9003_hw_set_power_per_rate_table()
5239 ath_dbg(common, REGULATORY, ar9003_hw_set_power_per_rate_table()
5401 ath_dbg(common, EEPROM, ath9k_hw_ar9300_set_txpower()
5419 ath_dbg(common, REGULATORY, "TPC[%02d] 0x%08x\n", ath9k_hw_ar9300_set_txpower()
H A Deeprom.c135 ath_dbg(common, EEPROM, ath9k_hw_nvram_read()
348 ath_dbg(common, EEPROM, "Invalid chainmask configuration\n"); ath9k_hw_update_regulatory_maxpower()
H A Deeprom_4k.c61 ath_dbg(common, EEPROM, "Reading from EEPROM, not flash\n"); ath9k_hw_4k_fill_eeprom()
201 ath_dbg(common, EEPROM, "Read Magic = 0x%04X\n", magic); ath9k_hw_4k_check_eeprom()
223 ath_dbg(common, EEPROM, "need_swap = %s\n", ath9k_hw_4k_check_eeprom()
245 ath_dbg(common, EEPROM, ath9k_hw_4k_check_eeprom()
433 ath_dbg(common, EEPROM, ath9k_hw_set_4k_power_cal_table()
437 ath_dbg(common, EEPROM, ath9k_hw_set_4k_power_cal_table()
H A Deeprom_def.c120 ath_dbg(common, EEPROM, "Reading from EEPROM, not flash\n"); ath9k_hw_def_fill_eeprom()
288 ath_dbg(common, EEPROM, "need_swap = %s\n", ath9k_hw_def_check_eeprom()
310 ath_dbg(common, EEPROM, ath9k_hw_def_check_eeprom()
944 ath_dbg(common, EEPROM, ath9k_hw_set_def_power_cal_table()
948 ath_dbg(common, EEPROM, ath9k_hw_set_def_power_cal_table()
H A Dhtc_drv_txrx.c358 ath_dbg(ath9k_hw_common(priv->ah), XMIT, ath9k_htc_tx_start()
636 ath_dbg(common, XMIT, "No matching packet for cookie: %d, epid: %d\n",
720 ath_dbg(common, XMIT, "Dropping a packet due to TX timeout\n"); check_packet()
767 ath_dbg(common, XMIT, ath9k_htc_tx_cleanup_timer()
1120 ath_dbg(common, ANY, "No free RX buffer\n"); ath9k_htc_rxep()
H A Deeprom_9287.c64 ath_dbg(common, EEPROM, "Reading from EEPROM, not flash\n"); ath9k_hw_ar9287_fill_eeprom()
194 ath_dbg(common, EEPROM, "Read Magic = 0x%04X\n", magic); ath9k_hw_ar9287_check_eeprom()
216 ath_dbg(common, EEPROM, "need_swap = %s\n", ath9k_hw_ar9287_check_eeprom()
H A Dxmit.c1867 ath_dbg(common, RESET, ath_drain_all_txq()
2000 ath_dbg(common, QUEUE, "qnum: %d, txq depth: %d\n", ath_tx_txqaddbuf()
2012 ath_dbg(common, XMIT, "link[%u] (%p)=%llx (%p)\n", ath_tx_txqaddbuf()
2024 ath_dbg(common, XMIT, "TXDP[%u] = %llx (%p)\n", ath_tx_txqaddbuf()
2161 ath_dbg(common, XMIT, "TX buffers are full\n"); ath_tx_setup_buffer()
2462 ath_dbg(common, XMIT, "TX complete: skb: %p\n", skb); ath_tx_complete()
2488 ath_dbg(common, PS, ath_tx_complete()
2611 ath_dbg(common, QUEUE, "tx queue %d (%x), link %p\n", ath_tx_processq()
2707 ath_dbg(common, XMIT, "Error processing tx status\n"); ath_tx_edma_tasklet()
2895 ath_dbg(common, XMIT, ath9k_tx99_send()
2910 ath_dbg(common, XMIT, "tx99 buffer setup failed\n"); ath9k_tx99_send()
H A Dcommon-init.c214 ath_dbg(common, CONFIG, "TX streams %d, RX streams: %d\n", ath9k_cmn_setup_ht_cap()
H A Dbtcoex.c411 ath_dbg(ath9k_hw_common(ah), BTCOEX, "Invalid Stomptype\n"); ath9k_hw_btcoex_bt_stomp()
H A Dinit.c233 ath_dbg(common, CONFIG, "%s DMA: %u buffers %u desc/buf\n", ath_descdma_setup()
277 ath_dbg(common, CONFIG, "%s DMA map: %p (%u) -> %llx (%u)\n", ath_descdma_setup()
820 ath_dbg(common, CHAN_CTX, "Use channel contexts\n"); ath9k_set_mcc_capab()
H A Dar9003_aic.c481 ath_dbg(common, MCI, "AIC cal is not done after 40ms"); ar9003_aic_cal_continue()
H A Dar9003_hw.c1116 ath_dbg(ath9k_hw_common(ah), RESET, ath9k_hw_verify_hang()
H A Ddebug.c268 ath_dbg(common, CONFIG, "Enable WLAN/BT RX Antenna diversity: %d\n", write_file_bt_ant_diversity()
/linux-4.4.14/drivers/net/wireless/ath/
H A Ddfs_pattern_detector.c222 ath_dbg(dpd->common, DFS, channel_detector_create()
297 ath_dbg(dpd->common, DFS, dpd_add_pulse()
369 ath_dbg(common, DFS,"Could not set DFS domain to %d", region); dfs_pattern_detector_init()
H A Dath.h293 #define ath_dbg(common, dbg_mask, fmt, ...) \ macro
309 #define ath_dbg(common, dbg_mask, fmt, ...) \ macro
H A Dkey.c149 ath_dbg(common, ANY, ath_hw_set_keycache_entry()
158 ath_dbg(common, ANY, ath_hw_set_keycache_entry()
165 ath_dbg(common, ANY, "WEP key length %u too small\n", ath_hw_set_keycache_entry()
H A Ddfs_pattern_detector.h106 /* needed for ath_dbg() */

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