Searched refs:alt_parent (Results 1 - 3 of 3) sorted by relevance

/linux-4.4.14/drivers/clk/samsung/
H A Dclk-cpu.h37 * @alt_parent: alternate parent clock to use when switching the speed
52 struct clk *alt_parent; member in struct:exynos_cpuclk
68 const char *parent, const char *alt_parent,
H A Dclk-cpu.c148 unsigned long alt_prate = clk_get_rate(cpuclk->alt_parent); exynos_cpuclk_pre_rate_change()
281 const char *alt_parent, unsigned long offset, exynos_register_cpu_clock()
306 cpuclk->alt_parent = __clk_lookup(alt_parent); exynos_register_cpu_clock()
307 if (!cpuclk->alt_parent) { exynos_register_cpu_clock()
309 __func__, alt_parent); exynos_register_cpu_clock()
279 exynos_register_cpu_clock(struct samsung_clk_provider *ctx, unsigned int lookup_id, const char *name, const char *parent, const char *alt_parent, unsigned long offset, const struct exynos_cpuclk_cfg_data *cfg, unsigned long num_cfgs, unsigned long flags) exynos_register_cpu_clock() argument
/linux-4.4.14/drivers/clk/rockchip/
H A Dclk-cpu.c45 * @alt_parent: alternate parent clock to use when switching the speed
61 struct clk *alt_parent; member in struct:rockchip_cpuclk
130 alt_prate = clk_get_rate(cpuclk->alt_parent); rockchip_cpuclk_pre_rate_change()
273 cpuclk->alt_parent = __clk_lookup(parent_names[1]); rockchip_clk_register_cpuclk()
274 if (!cpuclk->alt_parent) { rockchip_clk_register_cpuclk()
281 ret = clk_prepare_enable(cpuclk->alt_parent); rockchip_clk_register_cpuclk()

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