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/linux-4.4.14/drivers/block/
DDAC960.h2610 } Bits; member
2626 } Bits; member
2761 InterruptMaskRegister.Bits.HardwareMailboxInterrupt = true; in DAC960_GEM_EnableInterrupts()
2762 InterruptMaskRegister.Bits.MemoryMailboxInterrupt = true; in DAC960_GEM_EnableInterrupts()
2772 InterruptMaskRegister.Bits.HardwareMailboxInterrupt = true; in DAC960_GEM_DisableInterrupts()
2773 InterruptMaskRegister.Bits.MemoryMailboxInterrupt = true; in DAC960_GEM_DisableInterrupts()
2785 return !(InterruptMaskRegister.Bits.HardwareMailboxInterrupt || in DAC960_GEM_InterruptsEnabledP()
2786 InterruptMaskRegister.Bits.MemoryMailboxInterrupt); in DAC960_GEM_InterruptsEnabledP()
2832 if (!ErrorStatusRegister.Bits.ErrorStatusPending) return false; in DAC960_GEM_ReadErrorStatus()
2833 ErrorStatusRegister.Bits.ErrorStatusPending = false; in DAC960_GEM_ReadErrorStatus()
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/linux-4.4.14/arch/metag/include/asm/
Dtbx.h894 #define TBI_INTSOR( Bits ) do {\ argument
896 __TT |= (Bits); TBI_INTSX(__TT); } while (0)
898 #define TBI_INTSAND( Bits ) do {\ argument
900 __TT &= (Bits); TBI_INTSX(__TT); } while (0)
903 #define TBI_DEFRICTRLSOR( Bits ) do {\ argument
905 __TT |= (Bits); TBI_SETREG( CT.20, __TT); } while (0)
907 #define TBI_DEFRICTRLSAND( Bits ) do {\ argument
909 __TT &= (Bits); TBI_SETREG( CT.20, __TT); } while (0)
912 #define TBI_TRIGSOR( Bits ) do {\ argument
914 __TT |= (Bits); TBI_SETREG( TXMASK, __TT); } while (0)
[all …]
/linux-4.4.14/Documentation/video4linux/cx2341x/
DREADME.vbi23 'itv0': After this magic number two unsigned longs follow. Bits 0-17 of the first
24 unsigned long denote which lines of the first field are captured. Bits 18-31 of
Dfw-decoder-api.txt188 Bits 0:15 build
189 Bits 16:23 minor
190 Bits 24:31 major
Dfw-encoder-api.txt221 Bits 0:4 line number
223 Bits 0:31 all set specifies "all lines"
369 Bits 0:15 build
370 Bits 16:23 minor
371 Bits 24:31 major
410 u32 mask1; // Bits 0-2 are the type mask:
Dfw-osd-api.txt51 Bits 1:2 alpha control
52 Bits 3:5 pixel format
/linux-4.4.14/Documentation/ABI/testing/
Dsysfs-driver-tegra-fuse8 as decoded from the fuse registers. Bits order/assignment
Dsysfs-class-net-cdc_ncm77 Bits 2 – 15: reserved (reset to zero; must be ignored by host)
/linux-4.4.14/Documentation/devicetree/bindings/pci/
Dpci-msi.txt11 * Bits [15:8] are the Bus number.
12 * Bits [7:3] are the Device number.
13 * Bits [2:0] are the Function number.
/linux-4.4.14/arch/cris/arch-v32/mm/
Dmmu.S78 ; Bits 0-12 : Offset within a page
79 ; Bits 13-23 : PTE offset within a PMD
80 ; Bits 24-31 : PMD offset within the PGD
/linux-4.4.14/Documentation/hwmon/
Dtmp10321 Resolution: 8 Bits
Dsysfs-interface681 Bits are defined in kernel/include/sensors.h.
/linux-4.4.14/Documentation/vm/
Dpagemap.txt15 * Bits 0-54 page frame number (PFN) if present
16 * Bits 0-4 swap type if swapped
17 * Bits 5-54 swap offset if swapped
20 * Bits 57-60 zero
/linux-4.4.14/Documentation/devicetree/bindings/display/
Dcirrus,clps711x-fb.txt11 - bits-per-pixel: Bits per pixel.
/linux-4.4.14/Documentation/w1/slaves/
Dw1_ds240622 respectively. Bits 2-7 are ignored, so it's safe to write ASCII data.
Dw1_ds28e0435 represent the state of PIO_0/PIO_1. Bits 2..7 do not care. The PIO's are
/linux-4.4.14/Documentation/devicetree/bindings/display/imx/
Dfsl,imx-fb.txt14 - bits-per-pixel: Bits per pixel
/linux-4.4.14/Documentation/input/
Diforce-protocol.txt49 01 Bit 8 is set if the effect is playing. Bits 0 to 7 are the effect id.
72 Bits 4-7: Val 2 = effect along one axis. Byte 05 indicates direction
76 Bits 0-3: Val 0 = No trigger
Damijoy.txt100 Bits 1 and 0 of each counter (Y1-Y0,X1-X0) may be
/linux-4.4.14/Documentation/xtensa/
Datomctl.txt33 See Section 4.3.12.4 of ISA; Bits:
/linux-4.4.14/Documentation/devicetree/bindings/display/tilcdc/
Dpanel.txt9 - bpp: Bits per pixel
/linux-4.4.14/drivers/media/tuners/
Dmt2063.c1346 enum MT2063_Mask_Bits Bits) in MT2063_ClearPowerMaskBits() argument
1351 Bits = (enum MT2063_Mask_Bits)(Bits & MT2063_ALL_SD); /* Only valid bits for this tuner */ in MT2063_ClearPowerMaskBits()
1352 if ((Bits & 0xFF00) != 0) { in MT2063_ClearPowerMaskBits()
1353 state->reg[MT2063_REG_PWR_2] &= ~(u8) (Bits >> 8); in MT2063_ClearPowerMaskBits()
1359 if ((Bits & 0xFF) != 0) { in MT2063_ClearPowerMaskBits()
1360 state->reg[MT2063_REG_PWR_1] &= ~(u8) (Bits & 0xFF); in MT2063_ClearPowerMaskBits()
/linux-4.4.14/Documentation/video4linux/
Dhauppauge-wintv-cx88-ir.txt32 Bits are then right shifted into the GP_SAMPLE register at the specified
Dvivid.txt523 The Button, Boolean, Integer 32 Bits, Integer 64 Bits, Menu, String, Bitmask and
/linux-4.4.14/Documentation/video4linux/cx88/
Dhauppauge-wintv-cx88-ir.txt32 Bits are then right shifted into the GP_SAMPLE register at the specified
/linux-4.4.14/Documentation/
Dsmsc_ece1099.txt25 then AND the two values together. Bits that are 1 in the result of the AND
Dkernel-parameters.txt208 debug output. Bits in debug_layer correspond to a
211 Bits in debug_level correspond to a level in
/linux-4.4.14/Documentation/devicetree/bindings/mtd/
Dmtd-physmap.txt31 Bits) locking.
/linux-4.4.14/Documentation/devicetree/bindings/pinctrl/
Dfsl,imx-pinctrl.txt32 Bits used for CONFIG:
Datmel,at91-pinctrl.txt88 Bits used for CONFIG:
/linux-4.4.14/Documentation/devicetree/bindings/arm/
Dcpus.txt85 Bits [11:0] in the reg cell must be set to
94 Bits [23:0] in the reg cell must be set to
/linux-4.4.14/tools/perf/
Ddesign.txt160 * Bits that can be set in hw_event.read_format to request that
180 * Bits that can be set in hw_event.record_type to request information
293 * Bits needed to read the hw counters in user-space.
/linux-4.4.14/Documentation/virtual/kvm/devices/
Darm-vgic.txt89 Bits for undefined preemption levels are RAZ/WI.
/linux-4.4.14/Documentation/isdn/
DREADME.audio15 S18: Bits 0 and 2 are set.
DINTERFACE459 arg = The lower 8 Bits define the addressed protocol as defined
713 arg = The lower 8 Bits define the addressed protocol as defined
/linux-4.4.14/Documentation/virtual/kvm/
Dmsr.txt167 data: Bits 63-6 hold 64-byte aligned physical address of a
169 zeroed. Bits 5-2 are reserved and should be zero. Bit 0 is 1
/linux-4.4.14/arch/arc/mm/
Dtlbex.S207 lsr r0, r2, PGDIR_SHIFT ; Bits for indexing into PGD
/linux-4.4.14/Documentation/devicetree/bindings/media/
Dsamsung-fimc.txt82 the output rotator. Bits 4 and 0 correspond to input and output rotator
/linux-4.4.14/Documentation/networking/
Dfib_trie.txt16 Bits (tnode)
Darcnet-hardware.txt381 Manufacturer Model # Bits
Dbonding.txt249 Bits Use
/linux-4.4.14/Documentation/blockdev/
Dramdisk.txt73 is not required. Bits 11 to 13 are not currently used and may as well be zero.
/linux-4.4.14/Documentation/filesystems/
Dqnx6.txt145 Bits at the end of the last bitmap block are set to 1, if the device is
Dromfs.txt108 bits are used for the mode information. Bits 0..2 specify the type of
/linux-4.4.14/Documentation/sound/alsa/
Dhdspm.txt192 Don't use to lower 5 Audio-bits on AES as additional Bits.
/linux-4.4.14/Documentation/m68k/
DREADME.buddha126 only the upper three bits are used (Bits 7 to 5). Bit 4
/linux-4.4.14/arch/cris/arch-v10/
DKconfig358 This is often totally different depending on the product used. Bits
/linux-4.4.14/Documentation/arm64/
Dbooting.txt112 Bits 3-63: Reserved.
/linux-4.4.14/Documentation/filesystems/caching/
Dfscache.txt131 and pages are kept. Bits of this tree may actually reside in one or more
/linux-4.4.14/Documentation/fb/
Dmatroxfb.txt264 depth:X - Bits per pixel: 0=text, 4,8,15,16,24 or 32. Default depends on
/linux-4.4.14/Documentation/netlabel/
Ddraft-ietf-cipso-ipsecurity-01.txt276 Figure 4. Ordering of Bits in Tag 1 Bit Map
/linux-4.4.14/drivers/scsi/aic7xxx/
Daic7xxx.reg767 field HADDLDSEL1 0x02 /* Host Address Load Select Bits */
/linux-4.4.14/scripts/dtc/
Ddtc-parser.tab.c_shipped1758 * Bits above mask must either be all zero
/linux-4.4.14/Documentation/scsi/
Dncr53c8xx.txt790 (Bits 0x10 and 0x20 can be combined with hardware irq mode option)
/linux-4.4.14/Documentation/s390/
DDebugging390.txt779 Bits Instruction Length