1Freescale imx21 Framebuffer
2
3This framebuffer driver supports devices imx1, imx21, imx25, and imx27.
4
5Required properties:
6- compatible : "fsl,<chip>-fb", chip should be imx1 or imx21
7- reg : Should contain 1 register ranges(address and length)
8- interrupts : One interrupt of the fb dev
9
10Required nodes:
11- display: Phandle to a display node as described in
12	Documentation/devicetree/bindings/display/display-timing.txt
13	Additional, the display node has to define properties:
14	- bits-per-pixel: Bits per pixel
15	- fsl,pcr: LCDC PCR value
16
17Optional properties:
18- lcd-supply: Regulator for LCD supply voltage.
19- fsl,dmacr: DMA Control Register value. This is optional. By default, the
20	register is not modified as recommended by the datasheet.
21- fsl,lpccr: Contrast Control Register value. This property provides the
22	default value for the contrast control register.
23	If that property is omitted, the register is zeroed.
24- fsl,lscr1: LCDC Sharp Configuration Register value.
25
26Example:
27
28	imxfb: fb@10021000 {
29		compatible = "fsl,imx21-fb";
30		interrupts = <61>;
31		reg = <0x10021000 0x1000>;
32		display = <&display0>;
33	};
34
35	...
36
37	display0: display0 {
38		model = "Primeview-PD050VL1";
39		native-mode = <&timing_disp0>;
40		bits-per-pixel = <16>;
41		fsl,pcr = <0xf0c88080>;	/* non-standard but required */
42		display-timings {
43			timing_disp0: 640x480 {
44				hactive = <640>;
45				vactive = <480>;
46				hback-porch = <112>;
47				hfront-porch = <36>;
48				hsync-len = <32>;
49				vback-porch = <33>;
50				vfront-porch = <33>;
51				vsync-len = <2>;
52				clock-frequency = <25000000>;
53			};
54		};
55	};
56