Lines Matching refs:Bits

2610   } Bits;  member
2626 } Bits; member
2761 InterruptMaskRegister.Bits.HardwareMailboxInterrupt = true; in DAC960_GEM_EnableInterrupts()
2762 InterruptMaskRegister.Bits.MemoryMailboxInterrupt = true; in DAC960_GEM_EnableInterrupts()
2772 InterruptMaskRegister.Bits.HardwareMailboxInterrupt = true; in DAC960_GEM_DisableInterrupts()
2773 InterruptMaskRegister.Bits.MemoryMailboxInterrupt = true; in DAC960_GEM_DisableInterrupts()
2785 return !(InterruptMaskRegister.Bits.HardwareMailboxInterrupt || in DAC960_GEM_InterruptsEnabledP()
2786 InterruptMaskRegister.Bits.MemoryMailboxInterrupt); in DAC960_GEM_InterruptsEnabledP()
2832 if (!ErrorStatusRegister.Bits.ErrorStatusPending) return false; in DAC960_GEM_ReadErrorStatus()
2833 ErrorStatusRegister.Bits.ErrorStatusPending = false; in DAC960_GEM_ReadErrorStatus()
2920 } Bits; member
2936 } Bits; member
3068 InterruptMaskRegister.Bits.DisableInterrupts = false; in DAC960_BA_EnableInterrupts()
3069 InterruptMaskRegister.Bits.DisableInterruptsI2O = true; in DAC960_BA_EnableInterrupts()
3079 InterruptMaskRegister.Bits.DisableInterrupts = true; in DAC960_BA_DisableInterrupts()
3080 InterruptMaskRegister.Bits.DisableInterruptsI2O = true; in DAC960_BA_DisableInterrupts()
3091 return !InterruptMaskRegister.Bits.DisableInterrupts; in DAC960_BA_InterruptsEnabledP()
3138 if (!ErrorStatusRegister.Bits.ErrorStatusPending) return false; in DAC960_BA_ReadErrorStatus()
3139 ErrorStatusRegister.Bits.ErrorStatusPending = false; in DAC960_BA_ReadErrorStatus()
3225 } Bits; member
3241 } Bits; member
3373 InterruptMaskRegister.Bits.DisableInterrupts = false; in DAC960_LP_EnableInterrupts()
3383 InterruptMaskRegister.Bits.DisableInterrupts = true; in DAC960_LP_DisableInterrupts()
3394 return !InterruptMaskRegister.Bits.DisableInterrupts; in DAC960_LP_InterruptsEnabledP()
3440 if (!ErrorStatusRegister.Bits.ErrorStatusPending) return false; in DAC960_LP_ReadErrorStatus()
3441 ErrorStatusRegister.Bits.ErrorStatusPending = false; in DAC960_LP_ReadErrorStatus()
3539 } Bits; member
3555 } Bits; member
3687 InterruptMaskRegister.Bits.DisableInterrupts = false; in DAC960_LA_EnableInterrupts()
3697 InterruptMaskRegister.Bits.DisableInterrupts = true; in DAC960_LA_DisableInterrupts()
3708 return !InterruptMaskRegister.Bits.DisableInterrupts; in DAC960_LA_InterruptsEnabledP()
3761 if (!ErrorStatusRegister.Bits.ErrorStatusPending) return false; in DAC960_LA_ReadErrorStatus()
3762 ErrorStatusRegister.Bits.ErrorStatusPending = false; in DAC960_LA_ReadErrorStatus()
3860 } Bits; member
3876 } Bits; member
4008 InterruptMaskRegister.Bits.MessageUnitInterruptMask1 = 0x3; in DAC960_PG_EnableInterrupts()
4009 InterruptMaskRegister.Bits.DisableInterrupts = false; in DAC960_PG_EnableInterrupts()
4010 InterruptMaskRegister.Bits.MessageUnitInterruptMask2 = 0x1F; in DAC960_PG_EnableInterrupts()
4020 InterruptMaskRegister.Bits.MessageUnitInterruptMask1 = 0x3; in DAC960_PG_DisableInterrupts()
4021 InterruptMaskRegister.Bits.DisableInterrupts = true; in DAC960_PG_DisableInterrupts()
4022 InterruptMaskRegister.Bits.MessageUnitInterruptMask2 = 0x1F; in DAC960_PG_DisableInterrupts()
4033 return !InterruptMaskRegister.Bits.DisableInterrupts; in DAC960_PG_InterruptsEnabledP()
4086 if (!ErrorStatusRegister.Bits.ErrorStatusPending) return false; in DAC960_PG_ReadErrorStatus()
4087 ErrorStatusRegister.Bits.ErrorStatusPending = false; in DAC960_PG_ReadErrorStatus()
4180 } Bits; member
4196 } Bits; member
4288 InterruptEnableRegister.Bits.EnableInterrupts = true; in DAC960_PD_EnableInterrupts()
4298 InterruptEnableRegister.Bits.EnableInterrupts = false; in DAC960_PD_DisableInterrupts()
4309 return InterruptEnableRegister.Bits.EnableInterrupts; in DAC960_PD_InterruptsEnabledP()
4348 if (!ErrorStatusRegister.Bits.ErrorStatusPending) return false; in DAC960_PD_ReadErrorStatus()
4349 ErrorStatusRegister.Bits.ErrorStatusPending = false; in DAC960_PD_ReadErrorStatus()