Searched refs:temp_ctl (Results 1 – 2 of 2) sorted by relevance
560 unsigned int temp_ctl = 0; in tsi148_slave_set() local623 temp_ctl = ioread32be(bridge->base + TSI148_LCSR_IT[i] + in tsi148_slave_set()625 temp_ctl &= ~TSI148_LCSR_ITAT_EN; in tsi148_slave_set()626 iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_IT[i] + in tsi148_slave_set()644 temp_ctl &= ~TSI148_LCSR_ITAT_2eSSTM_M; in tsi148_slave_set()647 temp_ctl |= TSI148_LCSR_ITAT_2eSSTM_160; in tsi148_slave_set()650 temp_ctl |= TSI148_LCSR_ITAT_2eSSTM_267; in tsi148_slave_set()653 temp_ctl |= TSI148_LCSR_ITAT_2eSSTM_320; in tsi148_slave_set()658 temp_ctl &= ~(0x1F << 7); in tsi148_slave_set()660 temp_ctl |= TSI148_LCSR_ITAT_BLT; in tsi148_slave_set()[all …]
346 unsigned int temp_ctl = 0; in ca91cx42_slave_set() local412 temp_ctl = ioread32(bridge->base + CA91CX42_VSI_CTL[i]); in ca91cx42_slave_set()413 temp_ctl &= ~CA91CX42_VSI_CTL_EN; in ca91cx42_slave_set()414 iowrite32(temp_ctl, bridge->base + CA91CX42_VSI_CTL[i]); in ca91cx42_slave_set()422 temp_ctl &= ~CA91CX42_VSI_CTL_VAS_M; in ca91cx42_slave_set()423 temp_ctl |= addr; in ca91cx42_slave_set()426 temp_ctl &= ~(CA91CX42_VSI_CTL_PGM_M | CA91CX42_VSI_CTL_SUPER_M); in ca91cx42_slave_set()428 temp_ctl |= CA91CX42_VSI_CTL_SUPER_SUPR; in ca91cx42_slave_set()430 temp_ctl |= CA91CX42_VSI_CTL_SUPER_NPRIV; in ca91cx42_slave_set()432 temp_ctl |= CA91CX42_VSI_CTL_PGM_PGM; in ca91cx42_slave_set()[all …]