| /linux-4.1.27/drivers/staging/xgifb/ |
| H A D | vb_util.c | 19 u8 temp; xgifb_reg_and_or() local
21 temp = xgifb_reg_get(port, index); /* XGINew_Part1Port index 02 */ xgifb_reg_and_or()
22 temp = (temp & data_and) | data_or; xgifb_reg_and_or()
23 xgifb_reg_set(port, index, temp); xgifb_reg_and_or()
28 u8 temp; xgifb_reg_and() local
30 temp = xgifb_reg_get(port, index); /* XGINew_Part1Port index 02 */ xgifb_reg_and()
31 temp &= data_and; xgifb_reg_and()
32 xgifb_reg_set(port, index, temp); xgifb_reg_and()
37 u8 temp; xgifb_reg_or() local
39 temp = xgifb_reg_get(port, index); /* XGINew_Part1Port index 02 */ xgifb_reg_or()
40 temp |= data_or; xgifb_reg_or()
41 xgifb_reg_set(port, index, temp); xgifb_reg_or()
|
| H A D | vb_setmode.c | 51 unsigned char temp; InitTo330Pointer() local
59 temp = xgifb_reg_get(pVBInfo->P3c4, 0x3B); InitTo330Pointer()
61 if (((temp & 0x88) == 0x80) || ((temp & 0x88) == 0x08)) InitTo330Pointer()
251 unsigned short sync, temp; XGI_SetSync() local
256 temp = 0x2F; XGI_SetSync()
257 temp |= sync; XGI_SetSync()
258 outb(temp, pVBInfo->P3c2); /* Set Misc(3c2) */ XGI_SetSync()
586 unsigned char temp; XGI_SetXG27FPBits() local
589 temp = xgifb_reg_get(pVBInfo->P3d4, 0x37); XGI_SetXG27FPBits()
590 temp = (temp & 3) << 6; XGI_SetXG27FPBits()
592 xgifb_reg_and_or(pVBInfo->P3c4, 0x06, ~0xc0, temp & 0x80); XGI_SetXG27FPBits()
594 xgifb_reg_and_or(pVBInfo->P3c4, 0x09, ~0xc0, temp | 0x80); XGI_SetXG27FPBits()
602 unsigned short temp; xgifb_set_lcd() local
610 temp = xgifb_reg_get(pVBInfo->P3d4, 0x37); xgifb_set_lcd()
611 if ((temp & 0x03) == 0) { /* dual 12 */ xgifb_set_lcd()
620 temp = xgifb_reg_get(pVBInfo->P3d4, 0x37); xgifb_set_lcd()
621 if (temp & 0x01) { xgifb_set_lcd()
633 temp = XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag; xgifb_set_lcd()
634 if (temp & 0x4000) xgifb_set_lcd()
637 if (temp & 0x8000) xgifb_set_lcd()
685 unsigned short resindex, tempax, tempbx, tempcx, temp, modeflag; XGI_SetCRT1DE() local
701 temp = XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag; XGI_SetCRT1DE()
703 if (temp & InterlaceMode) XGI_SetCRT1DE()
715 temp = xgifb_reg_get(pVBInfo->P3d4, 0x11); XGI_SetCRT1DE()
740 xgifb_reg_set(pVBInfo->P3d4, 0x11, temp); XGI_SetCRT1DE()
749 unsigned short temp, ah, al, temp2, i, DisplayUnit; XGI_SetCRT1Offset() local
752 temp = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeInfo; XGI_SetCRT1Offset()
753 temp >>= 8; XGI_SetCRT1Offset()
754 temp = XGI330_ScreenOffset[temp]; XGI_SetCRT1Offset()
760 temp <<= 1; XGI_SetCRT1Offset()
788 temp = temp * temp2 + temp2 / 2; XGI_SetCRT1Offset()
790 temp *= temp2; XGI_SetCRT1Offset()
793 DisplayUnit = temp; XGI_SetCRT1Offset()
794 temp2 = temp; XGI_SetCRT1Offset()
795 temp >>= 8; /* ah */ XGI_SetCRT1Offset()
796 temp &= 0x0F; XGI_SetCRT1Offset()
799 i |= temp; XGI_SetCRT1Offset()
802 temp = (unsigned char) temp2; XGI_SetCRT1Offset()
803 temp &= 0xFF; /* al */ XGI_SetCRT1Offset()
804 xgifb_reg_set(pVBInfo->P3d4, 0x13, temp); XGI_SetCRT1Offset()
925 unsigned char temp; XGI_SetXG21FPBits() local
927 temp = xgifb_reg_get(pVBInfo->P3d4, 0x37); /* D[0] 1: 18bit */ XGI_SetXG21FPBits()
928 temp = (temp & 1) << 6; XGI_SetXG21FPBits()
930 xgifb_reg_and_or(pVBInfo->P3c4, 0x06, ~0x40, temp); XGI_SetXG21FPBits()
932 xgifb_reg_and_or(pVBInfo->P3c4, 0x09, ~0xc0, temp | 0x80); XGI_SetXG21FPBits()
1084 unsigned short temp, bh, bl; XGI_WriteDAC() local
1090 temp = bh; XGI_WriteDAC()
1092 dh = temp; XGI_WriteDAC()
1094 temp = bl; XGI_WriteDAC()
1096 dh = temp; XGI_WriteDAC()
1098 temp = bl; XGI_WriteDAC()
1100 bh = temp; XGI_WriteDAC()
1406 unsigned long temp, temp1, temp2, temp3, push3; XGI_SetLVDSRegs() local
1540 temp = tempax; /* 0430 ylshieh */ XGI_SetLVDSRegs()
1541 temp1 = (temp << 18) / tempbx; XGI_SetLVDSRegs()
1543 tempdx = (unsigned short) ((temp << 18) % tempbx); XGI_SetLVDSRegs()
1770 unsigned short tempcl, tempch, temp, tempbl, tempax; XGI_UpdateModeInfo() local
1776 temp = xgifb_reg_get(pVBInfo->P3c4, 0x01); XGI_UpdateModeInfo()
1778 if (!(temp & 0x20)) { XGI_UpdateModeInfo()
1779 temp = xgifb_reg_get(pVBInfo->P3d4, 0x17); XGI_UpdateModeInfo()
1780 if (temp & 0x80) { XGI_UpdateModeInfo()
1781 temp = xgifb_reg_get(pVBInfo->P3d4, 0x53); XGI_UpdateModeInfo()
1782 if (!(temp & 0x40)) XGI_UpdateModeInfo()
1787 temp = xgifb_reg_get(pVBInfo->Part1Port, 0x2e); XGI_UpdateModeInfo()
1788 temp &= 0x0f; XGI_UpdateModeInfo()
1790 if (!(temp == 0x08)) { XGI_UpdateModeInfo()
1796 temp &= 0x05; XGI_UpdateModeInfo()
1799 if (temp == 0x01) XGI_UpdateModeInfo()
1802 if (temp == 0x04) XGI_UpdateModeInfo()
1805 if (temp == 0x05) { XGI_UpdateModeInfo()
1806 temp = xgifb_reg_get(pVBInfo->Part2Port, 0x00); XGI_UpdateModeInfo()
1808 if (!(temp & 0x08)) XGI_UpdateModeInfo()
1811 if (!(temp & 0x04)) XGI_UpdateModeInfo()
1814 if (temp & 0x02) XGI_UpdateModeInfo()
1818 if (temp & 0x01) XGI_UpdateModeInfo()
1823 temp = xgifb_reg_get( XGI_UpdateModeInfo()
1827 if (temp & 0x10) XGI_UpdateModeInfo()
1836 temp = xgifb_reg_get(pVBInfo->P3d4, 0x3d); XGI_UpdateModeInfo()
1839 if (temp & ActiveTV) XGI_UpdateModeInfo()
1843 temp = tempcl; XGI_UpdateModeInfo()
1845 xgifb_reg_and_or(pVBInfo->P3d4, 0x3d, tempbl, temp); XGI_UpdateModeInfo()
1897 unsigned short tempax, push, tempbx, temp, modeflag; XGI_GetVBInfo() local
1908 temp = xgifb_reg_get(pVBInfo->P3d4, 0x30); XGI_GetVBInfo()
1909 tempbx = tempbx | temp; XGI_GetVBInfo()
1910 temp = xgifb_reg_get(pVBInfo->P3d4, 0x31); XGI_GetVBInfo()
1911 push = temp; XGI_GetVBInfo()
1913 tempax = temp << 8; XGI_GetVBInfo()
1915 temp = (SetCRT2ToDualEdge | SetCRT2ToYPbPr525750 | XGI_SetCRT2ToLCDA XGI_GetVBInfo()
1917 temp = 0xFFFF ^ temp; XGI_GetVBInfo()
1918 tempbx &= temp; XGI_GetVBInfo()
1920 temp = xgifb_reg_get(pVBInfo->P3d4, 0x38); XGI_GetVBInfo()
1924 if (temp & EnableDualEdge) { XGI_GetVBInfo()
1926 if (temp & SetToLCDA) XGI_GetVBInfo()
1932 if (temp & SetYPbPr) { XGI_GetVBInfo()
1934 temp = xgifb_reg_get(pVBInfo->P3d4, 0x35); XGI_GetVBInfo()
1935 temp &= YPbPrMode; XGI_GetVBInfo()
1938 if (temp != YPbPrMode1080i) { XGI_GetVBInfo()
1947 temp = 0x09FC; XGI_GetVBInfo()
1949 if (!(tempbx & temp)) { XGI_GetVBInfo()
2089 unsigned short temp, tempax, tempbx, resinfo = 0, LCDIdIndex; XGI_GetLCDInfo() local
2097 temp = xgifb_reg_get(pVBInfo->P3d4, 0x36); /* Get LCD Res.Info */ XGI_GetLCDInfo()
2098 tempbx = temp & 0x0F; XGI_GetLCDInfo()
2131 temp = xgifb_reg_get(pVBInfo->P3d4, 0x37); XGI_GetLCDInfo()
2133 temp &= (ScalingLCD | LCDNonExpanding | LCDSyncBit | SetPWDEnable); XGI_GetLCDInfo()
2135 tempbx |= temp; XGI_GetLCDInfo()
2200 unsigned char CR4A, temp; XGI_XG21GetPSCValue() local
2205 temp = xgifb_reg_get(pVBInfo->P3d4, 0x48); XGI_XG21GetPSCValue()
2207 temp = XG21GPIODataTransfer(temp); XGI_XG21GetPSCValue()
2208 temp &= 0x23; XGI_XG21GetPSCValue()
2210 return temp; XGI_XG21GetPSCValue()
2221 unsigned char CR4A, CRB4, temp; XGI_XG27GetPSCValue() local
2226 temp = xgifb_reg_get(pVBInfo->P3d4, 0x48); XGI_XG27GetPSCValue()
2228 temp &= 0x0C; XGI_XG27GetPSCValue()
2229 temp >>= 2; XGI_XG27GetPSCValue()
2232 temp |= ((CRB4 & 0x04) << 3); XGI_XG27GetPSCValue()
2233 return temp; XGI_XG27GetPSCValue()
2248 unsigned char CR4A, temp; XGI_XG21BLSignalVDD() local
2256 temp = (tempbl >> 4) & 0x02; XGI_XG21BLSignalVDD()
2259 xgifb_reg_and_or(pVBInfo->P3d4, 0xB4, ~0x02, temp); XGI_XG21BLSignalVDD()
2263 temp = xgifb_reg_get(pVBInfo->P3d4, 0x48); XGI_XG21BLSignalVDD()
2265 temp = XG21GPIODataTransfer(temp); XGI_XG21BLSignalVDD()
2266 temp &= ~tempbh; XGI_XG21BLSignalVDD()
2267 temp |= tempbl; XGI_XG21BLSignalVDD()
2268 xgifb_reg_set(pVBInfo->P3d4, 0x48, temp); XGI_XG21BLSignalVDD()
2274 unsigned char CR4A, temp; XGI_XG27BLSignalVDD() local
2285 temp = (tempbl >> 4) & 0x02; XGI_XG27BLSignalVDD()
2288 xgifb_reg_and_or(pVBInfo->P3d4, 0xB4, ~0x02, temp); XGI_XG27BLSignalVDD()
2737 unsigned short temp, colordepth, modeinfo, index, infoflag, XGI_GetOffset() local
2745 temp = XGI330_ScreenOffset[index]; XGI_GetOffset()
2748 temp <<= 1; XGI_GetOffset()
2753 temp = ModeNo - 0x7C; XGI_GetOffset()
2754 colordepth = ColorDepth[temp]; XGI_GetOffset()
2755 temp = 0x6B; XGI_GetOffset()
2757 temp <<= 1; XGI_GetOffset()
2759 return temp * colordepth; XGI_GetOffset()
2768 unsigned char temp; XGI_SetCRT2Offset() local
2774 temp = (unsigned char) (offset & 0xFF); XGI_SetCRT2Offset()
2775 xgifb_reg_set(pVBInfo->Part1Port, 0x07, temp); XGI_SetCRT2Offset()
2776 temp = (unsigned char) ((offset & 0xFF00) >> 8); XGI_SetCRT2Offset()
2777 xgifb_reg_set(pVBInfo->Part1Port, 0x09, temp); XGI_SetCRT2Offset()
2778 temp = (unsigned char) (((offset >> 3) & 0xFF) + 1); XGI_SetCRT2Offset()
2779 xgifb_reg_set(pVBInfo->Part1Port, 0x03, temp); XGI_SetCRT2Offset()
2803 xgifb_reg_set(pVBInfo->Part1Port, 0x02, 0x44); /* temp 0206 */ XGI_PreSetGroup1()
2810 unsigned short temp = 0, tempax = 0, tempbx = 0, tempcx = 0, XGI_SetGroup1() local
2820 temp = (pVBInfo->VGAHT / 2 - 1) & 0x0FF; XGI_SetGroup1()
2821 xgifb_reg_set(pVBInfo->Part1Port, 0x08, temp); XGI_SetGroup1()
2822 temp = (((pVBInfo->VGAHT / 2 - 1) & 0xFF00) >> 8) << 4; XGI_SetGroup1()
2823 xgifb_reg_and_or(pVBInfo->Part1Port, 0x09, ~0x0F0, temp); XGI_SetGroup1()
2825 temp = (pVBInfo->VGAHDE / 2 + 16) & 0x0FF; XGI_SetGroup1()
2826 xgifb_reg_set(pVBInfo->Part1Port, 0x0A, temp); XGI_SetGroup1()
2840 temp = XGI_CRT1Table[CRT1Index].CR[15]; XGI_SetGroup1()
2841 temp = (temp & 0x04) << (5 - 2); /* VGAHRE D[5] */ XGI_SetGroup1()
2842 tempcx = ((tempcx | temp) - 3) << 3; /* (VGAHRE-3)*8 */ XGI_SetGroup1()
2851 temp = tempbx & 0x00FF; XGI_SetGroup1()
2853 xgifb_reg_set(pVBInfo->Part1Port, 0x0B, temp); XGI_SetGroup1()
2855 temp = (pVBInfo->VGAHT - 1) & 0x0FF; /* BTVGA2HT 0x08,0x09 */ XGI_SetGroup1()
2856 xgifb_reg_set(pVBInfo->Part1Port, 0x08, temp); XGI_SetGroup1()
2857 temp = (((pVBInfo->VGAHT - 1) & 0xFF00) >> 8) << 4; XGI_SetGroup1()
2858 xgifb_reg_and_or(pVBInfo->Part1Port, 0x09, ~0x0F0, temp); XGI_SetGroup1()
2860 temp = (pVBInfo->VGAHDE + 16) & 0x0FF; XGI_SetGroup1()
2861 xgifb_reg_set(pVBInfo->Part1Port, 0x0A, temp); XGI_SetGroup1()
2875 temp = XGI_CRT1Table[CRT1Index].CR[6]; XGI_SetGroup1()
2876 temp = (temp & 0x04) << (5 - 2); /* VGAHRE D[5] */ XGI_SetGroup1()
2877 tempcx = ((tempcx | temp) - 3) << 3; /* (VGAHRE-3)*8 */ XGI_SetGroup1()
2885 temp = tempbx & 0x00FF; XGI_SetGroup1()
2886 xgifb_reg_set(pVBInfo->Part1Port, 0x0B, temp); XGI_SetGroup1()
2893 temp = (tempax & 0xFF00) >> 8; XGI_SetGroup1()
2894 xgifb_reg_set(pVBInfo->Part1Port, 0x0C, temp); XGI_SetGroup1()
2895 temp = tempcx & 0x00FF; XGI_SetGroup1()
2896 xgifb_reg_set(pVBInfo->Part1Port, 0x0D, temp); XGI_SetGroup1()
2898 temp = tempcx & 0x00FF; XGI_SetGroup1()
2900 xgifb_reg_set(pVBInfo->Part1Port, 0x0E, temp); XGI_SetGroup1()
2902 temp = tempbx & 0x00FF; XGI_SetGroup1()
2903 xgifb_reg_set(pVBInfo->Part1Port, 0x0F, temp); XGI_SetGroup1()
2904 temp = ((tempbx & 0xFF00) << 3) >> 8; XGI_SetGroup1()
2905 temp |= ((tempcx & 0xFF00) >> 8); XGI_SetGroup1()
2906 xgifb_reg_set(pVBInfo->Part1Port, 0x12, temp); XGI_SetGroup1()
2915 temp = XGI_CRT1Table[CRT1Index].CR[9]; XGI_SetGroup1()
2917 if (temp & 0x04) XGI_SetGroup1()
2920 if (temp & 0x080) XGI_SetGroup1()
2923 temp = XGI_CRT1Table[CRT1Index].CR[14]; XGI_SetGroup1()
2925 if (temp & 0x08) XGI_SetGroup1()
2928 temp = XGI_CRT1Table[CRT1Index].CR[11]; XGI_SetGroup1()
2929 tempcx = (tempcx & 0xFF00) | (temp & 0x00FF); XGI_SetGroup1()
2932 temp = tempbx & 0x00FF; XGI_SetGroup1()
2933 xgifb_reg_set(pVBInfo->Part1Port, 0x10, temp); XGI_SetGroup1()
2934 temp = ((tempbx & 0xFF00) >> 8) << 4; XGI_SetGroup1()
2935 temp = ((tempcx & 0x000F) | (temp)); XGI_SetGroup1()
2936 xgifb_reg_set(pVBInfo->Part1Port, 0x11, temp); XGI_SetGroup1()
2963 unsigned short push1, push2, tempax, tempbx = 0, tempcx, temp, resinfo, XGI_SetLockRegs() local
2973 temp = 0xFF; /* set MAX HT */ XGI_SetLockRegs()
2974 xgifb_reg_set(pVBInfo->Part1Port, 0x03, temp); XGI_SetLockRegs()
2987 temp = tempax & 0x00FF; XGI_SetLockRegs()
2988 xgifb_reg_set(pVBInfo->Part1Port, 0x04, temp); XGI_SetLockRegs()
2990 temp = (tempbx & 0xFF00) >> 8; XGI_SetLockRegs()
2995 temp += 2; XGI_SetLockRegs()
2999 temp -= 2; XGI_SetLockRegs()
3003 xgifb_reg_set(pVBInfo->Part1Port, 0x05, temp); XGI_SetLockRegs()
3023 temp = (tempbx & 0x00FF) - 1; XGI_SetLockRegs()
3025 temp -= 6; XGI_SetLockRegs()
3027 temp -= 4; XGI_SetLockRegs()
3028 temp -= 10; XGI_SetLockRegs()
3034 temp = (tempcx & 0x00FF) + 2; XGI_SetLockRegs()
3037 temp -= 1; XGI_SetLockRegs()
3040 temp += 4; XGI_SetLockRegs()
3042 temp -= 6; XGI_SetLockRegs()
3046 temp -= 4; XGI_SetLockRegs()
3049 temp -= 7; XGI_SetLockRegs()
3053 temp += 28; XGI_SetLockRegs()
3059 xgifb_reg_set(pVBInfo->Part1Port, 0x07, temp); XGI_SetLockRegs()
3115 temp = tempbx & 0x00FF; XGI_SetLockRegs()
3117 xgifb_reg_set(pVBInfo->Part1Port, 0x10, temp); XGI_SetLockRegs()
3120 temp = tempbx & 0x00FF; XGI_SetLockRegs()
3121 xgifb_reg_set(pVBInfo->Part1Port, 0x0E, temp); XGI_SetLockRegs()
3134 temp = (tempax & 0xFF00) >> 8; XGI_SetLockRegs()
3135 xgifb_reg_set(pVBInfo->Part1Port, 0x0B, temp); XGI_SetLockRegs()
3194 temp = tempbx & 0x00FF; XGI_SetLockRegs()
3195 xgifb_reg_set(pVBInfo->Part1Port, 0x0C, temp); XGI_SetLockRegs()
3197 temp = tempbx & 0x00FF; XGI_SetLockRegs()
3198 xgifb_reg_set(pVBInfo->Part1Port, 0x10, temp); XGI_SetLockRegs()
3218 temp = tempbx & 0x00FF; XGI_SetLockRegs()
3219 temp &= 0x0F; XGI_SetLockRegs()
3221 xgifb_reg_set(pVBInfo->Part1Port, 0x0D, temp); XGI_SetLockRegs()
3226 temp = tempcx & 0x00FF; XGI_SetLockRegs()
3227 xgifb_reg_set(pVBInfo->Part1Port, 0x0A, temp); /* 0x0A CR07 */ XGI_SetLockRegs()
3228 temp = (tempcx & 0x0FF00) >> 8; XGI_SetLockRegs()
3229 xgifb_reg_set(pVBInfo->Part1Port, 0x17, temp); /* 0x17 SR0A */ XGI_SetLockRegs()
3231 temp = (tempax & 0xFF00) >> 8; XGI_SetLockRegs()
3233 temp = (temp >> 1) & 0x09; XGI_SetLockRegs()
3236 temp |= 0x01; XGI_SetLockRegs()
3238 xgifb_reg_set(pVBInfo->Part1Port, 0x16, temp); /* 0x16 SR01 */ XGI_SetLockRegs()
3243 temp = 0x80; XGI_SetLockRegs()
3245 temp = 0x00; XGI_SetLockRegs()
3247 xgifb_reg_set(pVBInfo->Part1Port, 0x1A, temp); /* 0x1A SR0E */ XGI_SetLockRegs()
3253 unsigned short i, j, tempax, tempbx, tempcx, temp, push1, push2, XGI_SetGroup2() local
3324 temp = pVBInfo->NewFlickerMode; XGI_SetGroup2()
3325 temp &= 0x80; XGI_SetGroup2()
3326 xgifb_reg_and_or(pVBInfo->Part2Port, 0x0A, 0xFF, temp); XGI_SetGroup2()
3338 temp = (tempax & 0xFF00) >> 8; XGI_SetGroup2()
3339 temp += (unsigned short) TimingPoint[0]; XGI_SetGroup2()
3348 temp = 0x17; /* NTSC */ XGI_SetGroup2()
3350 temp = 0x19; /* PAL */ XGI_SetGroup2()
3355 xgifb_reg_set(pVBInfo->Part2Port, 0x01, temp); XGI_SetGroup2()
3357 temp = (tempax & 0xFF00) >> 8; XGI_SetGroup2()
3358 temp += TimingPoint[1]; XGI_SetGroup2()
3367 temp = 0x1D; /* NTSC */ XGI_SetGroup2()
3369 temp = 0x52; /* PAL */ XGI_SetGroup2()
3373 xgifb_reg_set(pVBInfo->Part2Port, 0x02, temp); XGI_SetGroup2()
3383 temp = tempcx & 0x00FF; XGI_SetGroup2()
3384 xgifb_reg_set(pVBInfo->Part2Port, 0x1B, temp); XGI_SetGroup2()
3386 temp = (tempcx & 0xFF00) >> 8; XGI_SetGroup2()
3387 xgifb_reg_and_or(pVBInfo->Part2Port, 0x1D, ~0x0F, temp); XGI_SetGroup2()
3396 temp = tempcx & 0x00FF; XGI_SetGroup2()
3397 temp <<= 4; XGI_SetGroup2()
3398 xgifb_reg_and_or(pVBInfo->Part2Port, 0x22, 0x0F, temp); XGI_SetGroup2()
3403 temp = tempbx & 0x00FF; XGI_SetGroup2()
3404 xgifb_reg_set(pVBInfo->Part2Port, 0x24, temp); XGI_SetGroup2()
3405 temp = (tempbx & 0xFF00) >> 8; XGI_SetGroup2()
3406 temp <<= 4; XGI_SetGroup2()
3407 xgifb_reg_and_or(pVBInfo->Part2Port, 0x25, 0x0F, temp); XGI_SetGroup2()
3416 temp = (tempbx & 0x00FF) << 4; XGI_SetGroup2()
3417 xgifb_reg_and_or(pVBInfo->Part2Port, 0x29, 0x0F, temp); XGI_SetGroup2()
3421 temp = tempcx & 0x00FF; XGI_SetGroup2()
3422 xgifb_reg_set(pVBInfo->Part2Port, 0x27, temp); XGI_SetGroup2()
3423 temp = ((tempcx & 0xFF00) >> 8) << 4; XGI_SetGroup2()
3424 xgifb_reg_and_or(pVBInfo->Part2Port, 0x28, 0x0F, temp); XGI_SetGroup2()
3430 temp = tempcx & 0xFF; XGI_SetGroup2()
3431 temp <<= 4; XGI_SetGroup2()
3432 xgifb_reg_and_or(pVBInfo->Part2Port, 0x2A, 0x0F, temp); XGI_SetGroup2()
3436 temp = TimingPoint[j] | ((TimingPoint[j + 1]) << 8); XGI_SetGroup2()
3437 tempcx -= temp; XGI_SetGroup2()
3438 temp = tempcx & 0x00FF; XGI_SetGroup2()
3439 temp <<= 4; XGI_SetGroup2()
3440 xgifb_reg_and_or(pVBInfo->Part2Port, 0x2D, 0x0F, temp); XGI_SetGroup2()
3448 temp = tempcx & 0x00FF; XGI_SetGroup2()
3449 xgifb_reg_set(pVBInfo->Part2Port, 0x2E, temp); XGI_SetGroup2()
3471 temp = tempbx & 0x00FF; XGI_SetGroup2()
3478 temp += 1; XGI_SetGroup2()
3483 temp += 1; XGI_SetGroup2()
3487 xgifb_reg_set(pVBInfo->Part2Port, 0x2F, temp); XGI_SetGroup2()
3489 temp = (tempcx & 0xFF00) >> 8; XGI_SetGroup2()
3490 temp |= ((tempbx & 0xFF00) >> 8) << 6; XGI_SetGroup2()
3495 temp |= 0x10; XGI_SetGroup2()
3498 temp |= 0x20; XGI_SetGroup2()
3501 temp |= 0x10; XGI_SetGroup2()
3503 temp |= 0x20; XGI_SetGroup2()
3507 xgifb_reg_set(pVBInfo->Part2Port, 0x30, temp); XGI_SetGroup2()
3521 temp = 0; XGI_SetGroup2()
3523 temp |= 0x20; XGI_SetGroup2()
3526 temp |= 0x40; XGI_SetGroup2()
3528 xgifb_reg_set(pVBInfo->Part4Port, 0x10, temp); XGI_SetGroup2()
3531 temp = (((tempbx - 3) & 0x0300) >> 8) << 5; XGI_SetGroup2()
3532 xgifb_reg_set(pVBInfo->Part2Port, 0x46, temp); XGI_SetGroup2()
3533 temp = (tempbx - 3) & 0x00FF; XGI_SetGroup2()
3534 xgifb_reg_set(pVBInfo->Part2Port, 0x47, temp); XGI_SetGroup2()
3599 temp = (tempax & 0xFF00) >> 8; XGI_SetGroup2()
3601 temp = (tempax & 0x00FF) >> 8; XGI_SetGroup2()
3604 xgifb_reg_set(pVBInfo->Part2Port, 0x44, temp); XGI_SetGroup2()
3605 temp = (tempbx & 0xFF00) >> 8; XGI_SetGroup2()
3606 xgifb_reg_and_or(pVBInfo->Part2Port, 0x45, ~0x03F, temp); XGI_SetGroup2()
3607 temp = tempcx & 0x00FF; XGI_SetGroup2()
3610 temp = 0; XGI_SetGroup2()
3613 temp |= 0x18; XGI_SetGroup2()
3615 xgifb_reg_and_or(pVBInfo->Part2Port, 0x46, ~0x1F, temp); XGI_SetGroup2()
3624 temp = tempbx & 0x00FF; XGI_SetGroup2()
3625 xgifb_reg_set(pVBInfo->Part2Port, 0x4b, temp); XGI_SetGroup2()
3626 temp = tempcx & 0x00FF; XGI_SetGroup2()
3627 xgifb_reg_set(pVBInfo->Part2Port, 0x4c, temp); XGI_SetGroup2()
3629 temp = ((tempcx & 0xFF00) >> 8) & 0x03; XGI_SetGroup2()
3630 temp <<= 2; XGI_SetGroup2()
3631 temp |= ((tempbx & 0xFF00) >> 8) & 0x03; XGI_SetGroup2()
3634 temp |= 0x10; XGI_SetGroup2()
3637 temp |= 0x20; XGI_SetGroup2()
3640 temp |= 0x60; XGI_SetGroup2()
3643 xgifb_reg_set(pVBInfo->Part2Port, 0x4d, temp); XGI_SetGroup2()
3644 temp = xgifb_reg_get(pVBInfo->Part2Port, 0x43); /* 301b change */ XGI_SetGroup2()
3645 xgifb_reg_set(pVBInfo->Part2Port, 0x43, (unsigned short) (temp - 3)); XGI_SetGroup2()
3682 unsigned short pushbx, tempax, tempbx, tempcx, temp, tempah, XGI_SetLCDRegs() local
3697 temp = tempbx & 0x00FF; XGI_SetLCDRegs()
3698 xgifb_reg_set(pVBInfo->Part2Port, 0x2C, temp); XGI_SetLCDRegs()
3699 temp = (tempbx & 0xFF00) >> 8; XGI_SetLCDRegs()
3700 temp <<= 4; XGI_SetLCDRegs()
3701 xgifb_reg_and_or(pVBInfo->Part2Port, 0x2B, 0x0F, temp); XGI_SetLCDRegs()
3702 temp = 0x01; XGI_SetLCDRegs()
3704 xgifb_reg_set(pVBInfo->Part2Port, 0x0B, temp); XGI_SetLCDRegs()
3707 temp = tempbx & 0x00FF; XGI_SetLCDRegs()
3708 xgifb_reg_set(pVBInfo->Part2Port, 0x03, temp); XGI_SetLCDRegs()
3709 temp = ((tempbx & 0xFF00) >> 8) & 0x07; XGI_SetLCDRegs()
3710 xgifb_reg_and_or(pVBInfo->Part2Port, 0x0C, ~0x07, temp); XGI_SetLCDRegs()
3713 temp = tempcx & 0x00FF; /* RVTVT=VT-1 */ XGI_SetLCDRegs()
3714 xgifb_reg_set(pVBInfo->Part2Port, 0x19, temp); XGI_SetLCDRegs()
3715 temp = (tempcx & 0xFF00) >> 8; XGI_SetLCDRegs()
3716 temp <<= 5; XGI_SetLCDRegs()
3717 xgifb_reg_set(pVBInfo->Part2Port, 0x1A, temp); XGI_SetLCDRegs()
3766 temp = tempbx & 0x00FF; /* RVEQ1EQ=lcdvdes */ XGI_SetLCDRegs()
3767 xgifb_reg_set(pVBInfo->Part2Port, 0x05, temp); XGI_SetLCDRegs()
3768 temp = tempcx & 0x00FF; XGI_SetLCDRegs()
3769 xgifb_reg_set(pVBInfo->Part2Port, 0x06, temp); XGI_SetLCDRegs()
3787 temp = tempbx & 0x00FF; /* RTVACTEE=lcdvrs */ XGI_SetLCDRegs()
3788 xgifb_reg_set(pVBInfo->Part2Port, 0x04, temp); XGI_SetLCDRegs()
3789 temp = (tempbx & 0xFF00) >> 8; XGI_SetLCDRegs()
3790 temp <<= 4; XGI_SetLCDRegs()
3791 temp |= (tempcx & 0x000F); XGI_SetLCDRegs()
3792 xgifb_reg_set(pVBInfo->Part2Port, 0x01, temp); XGI_SetLCDRegs()
3815 temp = tempbx & 0x00FF; XGI_SetLCDRegs()
3816 xgifb_reg_set(pVBInfo->Part2Port, 0x1F, temp); /* RHBLKE=lcdhdes */ XGI_SetLCDRegs()
3817 temp = ((tempbx & 0xFF00) >> 8) << 4; XGI_SetLCDRegs()
3818 xgifb_reg_set(pVBInfo->Part2Port, 0x20, temp); XGI_SetLCDRegs()
3819 temp = tempcx & 0x00FF; XGI_SetLCDRegs()
3820 xgifb_reg_set(pVBInfo->Part2Port, 0x23, temp); /* RHEQPLE=lcdhdee */ XGI_SetLCDRegs()
3821 temp = (tempcx & 0xFF00) >> 8; XGI_SetLCDRegs()
3822 xgifb_reg_set(pVBInfo->Part2Port, 0x25, temp); XGI_SetLCDRegs()
3842 temp = tempbx & 0x00FF; /* RHBURSTS=lcdhrs */ XGI_SetLCDRegs()
3843 xgifb_reg_set(pVBInfo->Part2Port, 0x1C, temp); XGI_SetLCDRegs()
3845 temp = (tempbx & 0xFF00) >> 8; XGI_SetLCDRegs()
3846 temp <<= 4; XGI_SetLCDRegs()
3847 xgifb_reg_and_or(pVBInfo->Part2Port, 0x1D, ~0x0F0, temp); XGI_SetLCDRegs()
3848 temp = tempcx & 0x00FF; /* RHSYEXP2S=lcdhre */ XGI_SetLCDRegs()
3849 xgifb_reg_set(pVBInfo->Part2Port, 0x21, temp); XGI_SetLCDRegs()
3856 temp = 0xC6; XGI_SetLCDRegs()
3858 temp = 0xC4; XGI_SetLCDRegs()
3860 xgifb_reg_set(pVBInfo->Part2Port, 0x2f, temp); XGI_SetLCDRegs()
3868 temp = 0x4F; XGI_SetLCDRegs()
3870 temp = 0x4E; XGI_SetLCDRegs()
3871 xgifb_reg_set(pVBInfo->Part2Port, 0x2f, temp); XGI_SetLCDRegs()
4014 unsigned short tempax, tempcx, tempbx, modeflag, temp, temp2; XGI_SetGroup4() local
4020 temp = pVBInfo->RVBHCFACT; XGI_SetGroup4()
4021 xgifb_reg_set(pVBInfo->Part4Port, 0x13, temp); XGI_SetGroup4()
4024 temp = tempbx & 0x00FF; XGI_SetGroup4()
4025 xgifb_reg_set(pVBInfo->Part4Port, 0x14, temp); XGI_SetGroup4()
4028 temp = tempcx & 0x00FF; XGI_SetGroup4()
4029 xgifb_reg_set(pVBInfo->Part4Port, 0x16, temp); XGI_SetGroup4()
4031 temp = ((tempcx & 0xFF00) >> 8) << 3; XGI_SetGroup4()
4032 temp2 |= temp; XGI_SetGroup4()
4038 temp = tempcx & 0x00FF; XGI_SetGroup4()
4039 xgifb_reg_set(pVBInfo->Part4Port, 0x17, temp); XGI_SetGroup4()
4040 temp = temp2 | ((tempcx & 0xFF00) >> 8); XGI_SetGroup4()
4041 xgifb_reg_set(pVBInfo->Part4Port, 0x15, temp); XGI_SetGroup4()
4053 temp = 0; XGI_SetGroup4()
4055 temp = 0xA0; XGI_SetGroup4()
4057 temp = 0xC0; XGI_SetGroup4()
4059 temp = 0xA0; XGI_SetGroup4()
4061 temp = 0x80; XGI_SetGroup4()
4063 temp = 0x80; XGI_SetGroup4()
4065 temp = 0; XGI_SetGroup4()
4067 temp = 0x60; XGI_SetGroup4()
4072 temp = 0x00; XGI_SetGroup4()
4074 temp = 0x40; XGI_SetGroup4()
4076 temp = 0x20; XGI_SetGroup4()
4078 xgifb_reg_and_or(pVBInfo->Part4Port, 0x0E, ~0xEF, temp); XGI_SetGroup4()
4083 temp = tempcx & 0x00FF; XGI_SetGroup4()
4084 xgifb_reg_set(pVBInfo->Part4Port, 0x18, temp); XGI_SetGroup4()
4103 temp = (unsigned short) (tempebx & 0x000000FF); XGI_SetGroup4()
4104 xgifb_reg_set(pVBInfo->Part4Port, 0x1B, temp); XGI_SetGroup4()
4106 temp = (unsigned short) ((tempebx & 0x0000FF00) >> 8); XGI_SetGroup4()
4107 xgifb_reg_set(pVBInfo->Part4Port, 0x1A, temp); XGI_SetGroup4()
4109 temp = tempbx & 0x00FF; XGI_SetGroup4()
4110 temp <<= 4; XGI_SetGroup4()
4111 temp |= ((tempcx & 0xFF00) >> 8); XGI_SetGroup4()
4112 xgifb_reg_set(pVBInfo->Part4Port, 0x19, temp); XGI_SetGroup4()
4117 temp = 0x0028; XGI_SetGroup4()
4118 xgifb_reg_set(pVBInfo->Part4Port, 0x1C, temp); XGI_SetGroup4()
4137 temp = (tempax & 0xFF00) >> 8; XGI_SetGroup4()
4138 temp = (temp & 0x0003) << 4; XGI_SetGroup4()
4139 xgifb_reg_set(pVBInfo->Part4Port, 0x1E, temp); XGI_SetGroup4()
4140 temp = (tempax & 0x00FF); XGI_SetGroup4()
4141 xgifb_reg_set(pVBInfo->Part4Port, 0x1D, temp); XGI_SetGroup4()
4148 temp = 0x0036; XGI_SetGroup4()
4154 temp |= 0x0001; XGI_SetGroup4()
4158 temp &= (~0x0001); XGI_SetGroup4()
4162 xgifb_reg_and_or(pVBInfo->Part4Port, 0x1F, 0x00C0, temp); XGI_SetGroup4()
4167 temp = ((tempbx & 0x0700) >> 8) << 3; XGI_SetGroup4()
4168 xgifb_reg_and_or(pVBInfo->Part4Port, 0x21, 0x00C0, temp); XGI_SetGroup4()
4169 temp = tempbx & 0x00FF; XGI_SetGroup4()
4170 xgifb_reg_set(pVBInfo->Part4Port, 0x22, temp); XGI_SetGroup4()
4239 unsigned char temp, Miscdata; xgifb_set_lvds() local
4245 temp = (unsigned char) ((xgifb_info->lvds_data.LVDS_Capability & xgifb_set_lvds()
4247 temp &= LCDPolarity; xgifb_set_lvds()
4250 outb((Miscdata & 0x3F) | temp, pVBInfo->P3c2); xgifb_set_lvds()
4252 temp = xgifb_info->lvds_data.LVDS_Capability & LCDPolarity; xgifb_set_lvds()
4254 xgifb_reg_and_or(pVBInfo->P3c4, 0x35, ~0x80, temp & 0x80); xgifb_set_lvds()
4256 xgifb_reg_and_or(pVBInfo->P3c4, 0x30, ~0x20, (temp & 0x40) >> 1); xgifb_set_lvds()
4308 temp = xgifb_reg_get(pVBInfo->P3d4, 0x11); xgifb_set_lvds()
4309 xgifb_reg_set(pVBInfo->P3d4, 0x11, temp & 0x7f); /* Unlock CRTC */ xgifb_set_lvds()
4402 for (temp = 0, value = 0; temp < 3; temp++) { xgifb_set_lvds()
4657 unsigned short temp; XGI_SetLCDCap_A() local
4659 temp = xgifb_reg_get(pVBInfo->P3d4, 0x37); XGI_SetLCDCap_A()
4661 if (temp & LCDRGB18Bit) { XGI_SetLCDCap_A()
5101 unsigned short RefreshRateTableIndex, i, index, temp; XGI_GetRatePtrCRT2() local
5115 temp = LCDARefreshIndex[pVBInfo->LCDResInfo & 0x07]; XGI_GetRatePtrCRT2()
5117 if (index > temp) XGI_GetRatePtrCRT2()
5118 index = temp; XGI_GetRatePtrCRT2()
5145 temp = XGI330_RefIndex[RefreshRateTableIndex + i].Ext_InfoFlag; XGI_GetRatePtrCRT2()
5146 temp &= ModeTypeMask; XGI_GetRatePtrCRT2()
5147 if (temp < pVBInfo->ModeType) XGI_GetRatePtrCRT2()
5155 temp = XGI330_RefIndex[RefreshRateTableIndex + i - 1]. XGI_GetRatePtrCRT2()
5157 if (temp & InterlaceMode) XGI_GetRatePtrCRT2()
5163 temp = XGI_AjustCRT2Rate(ModeIdIndex, RefreshRateTableIndex, XGI_GetRatePtrCRT2()
5222 unsigned short temp; XGI_SenseCRT1() local
5283 temp = inb(pVBInfo->P3c2); XGI_SenseCRT1()
5285 if (temp & 0x10) XGI_SenseCRT1()
5389 unsigned short RefreshRateTableIndex, temp; XGI_SetCRT1Group() local
5403 temp = ~ProgrammingCRT2; XGI_SetCRT1Group()
5404 pVBInfo->SetFlag &= temp; XGI_SetCRT1Group()
5429 temp = xgifb_reg_get(pVBInfo->P3d4, 0x38); XGI_SetCRT1Group()
5430 if (temp & 0xA0) { XGI_SetCRT1Group()
|
| H A D | vb_init.c | 35 unsigned char data, temp; XGINew_GetXG20DRAMType() local
44 temp = xgifb_reg_get(pVBInfo->P3c4, 0x3B); XGINew_GetXG20DRAMType()
46 if (((temp & 0x88) == 0x80) || ((temp & 0x88) == 0x08)) XGINew_GetXG20DRAMType()
406 unsigned char temp, temp1, temp2, temp3, j, k; XGINew_SetDRAMDefaultRegister340() local
416 temp = 0xaa; XGINew_SetDRAMDefaultRegister340()
417 XGI_SetDRAM_Helper(P3d4, temp, 0, 0x6B, 2, 0xF0, 0x10); XGINew_SetDRAMDefaultRegister340()
441 temp = 0; XGINew_SetDRAMDefaultRegister340()
442 temp1 = temp & 0x03; XGINew_SetDRAMDefaultRegister340()
446 temp = pVBInfo->CR40[3][pVBInfo->ram_type]; XGINew_SetDRAMDefaultRegister340()
447 temp1 = temp & 0x0F; XGINew_SetDRAMDefaultRegister340()
448 temp2 = (temp >> 4) & 0x07; XGINew_SetDRAMDefaultRegister340()
449 temp3 = temp & 0x80; XGINew_SetDRAMDefaultRegister340()
492 temp = XGINew_GetXG20DRAMType(HwDeviceExtension, pVBInfo); XGINew_SetDRAMDefaultRegister340()
493 if (temp == 0) { XGINew_SetDRAMDefaultRegister340()
944 unsigned short tempbx = 0, temp, tempcx, CR3CData; XGINew_ChkSenseStatus() local
946 temp = xgifb_reg_get(pVBInfo->P3d4, 0x32); XGINew_ChkSenseStatus()
948 if (temp & Monitor1Sense) XGINew_ChkSenseStatus()
950 if (temp & LCDSense) XGINew_ChkSenseStatus()
952 if (temp & Monitor2Sense) XGINew_ChkSenseStatus()
954 if (temp & TVSense) { XGINew_ChkSenseStatus()
956 if (temp & AVIDEOSense) XGINew_ChkSenseStatus()
958 if (temp & SVIDEOSense) XGINew_ChkSenseStatus()
960 if (temp & SCARTSense) XGINew_ChkSenseStatus()
962 if (temp & HiTVSense) XGINew_ChkSenseStatus()
964 if (temp & YPbPrSense) XGINew_ChkSenseStatus()
986 unsigned short temp, tempcl = 0, tempch = 0, CR31Data, CR38Data; XGINew_SetModeScratch() local
988 temp = xgifb_reg_get(pVBInfo->P3d4, 0x3d); XGINew_SetModeScratch()
989 temp |= xgifb_reg_get(pVBInfo->P3d4, 0x3e) << 8; XGINew_SetModeScratch()
990 temp |= (xgifb_reg_get(pVBInfo->P3d4, 0x31) & (DriverMode >> 8)) << 8; XGINew_SetModeScratch()
993 if (temp & ActiveCRT2) XGINew_SetModeScratch()
997 if (temp & ActiveLCD) { XGINew_SetModeScratch()
999 if (temp & DriverMode) { XGINew_SetModeScratch()
1000 if (temp & ActiveTV) { XGINew_SetModeScratch()
1002 temp ^= SetCRT2ToLCD; XGINew_SetModeScratch()
1004 if ((temp >> 8) & ActiveAVideo) XGINew_SetModeScratch()
1006 if ((temp >> 8) & ActiveSVideo) XGINew_SetModeScratch()
1008 if ((temp >> 8) & ActiveSCART) XGINew_SetModeScratch()
1012 if ((temp >> 8) & ActiveHiTV) XGINew_SetModeScratch()
1017 if ((temp >> 8) & ActiveYPbPr) XGINew_SetModeScratch()
1023 if ((temp >> 8) & ActiveAVideo) XGINew_SetModeScratch()
1025 if ((temp >> 8) & ActiveSVideo) XGINew_SetModeScratch()
1027 if ((temp >> 8) & ActiveSCART) XGINew_SetModeScratch()
1031 if ((temp >> 8) & ActiveHiTV) XGINew_SetModeScratch()
1036 if ((temp >> 8) & ActiveYPbPr) XGINew_SetModeScratch()
1042 if ((!(temp & ActiveCRT1)) && ((temp & ActiveLCD) || (temp & ActiveTV) XGINew_SetModeScratch()
1043 || (temp & ActiveCRT2))) XGINew_SetModeScratch()
1045 if ((temp & ActiveLCD) && (temp & ActiveTV)) XGINew_SetModeScratch()
1051 if (!(temp & ActiveCRT1)) XGINew_SetModeScratch()
1054 if (!((temp & ActiveLCD) || (temp & ActiveTV) || (temp & ActiveCRT2))) XGINew_SetModeScratch()
1069 unsigned short temp = HwDeviceExtension->ulCRT2LCDType; XGINew_SenseLCD() local
1079 temp = 0; /* overwrite used ulCRT2LCDType */ XGINew_SenseLCD()
1084 xgifb_reg_and_or(pVBInfo->P3d4, 0x36, 0xF0, temp); XGINew_SenseLCD()
1142 unsigned char CR38, CR4A, temp; GetXG21FPBits() local
1148 temp = 0; GetXG21FPBits()
1150 temp = xgifb_reg_get(pVBInfo->P3d4, 0x48); GetXG21FPBits()
1151 temp &= 0x08; GetXG21FPBits()
1152 temp >>= 3; GetXG21FPBits()
1157 return temp; GetXG21FPBits()
1162 unsigned char CR4A, temp; GetXG27FPBits() local
1167 temp = xgifb_reg_get(pVBInfo->P3d4, 0x48); GetXG27FPBits()
1168 if (temp > 2) GetXG27FPBits()
1169 temp = ((temp & 0x04) >> 1) | ((~temp) & 0x01); GetXG27FPBits()
1173 return temp; GetXG27FPBits()
1190 unsigned char i, temp = 0, temp1; XGIInitNew() local
1337 temp = GetXG21FPBits(pVBInfo); XGIInitNew()
1338 xgifb_reg_and_or(pVBInfo->P3d4, 0x37, ~0x01, temp); XGIInitNew()
1346 temp = GetXG27FPBits(pVBInfo); XGIInitNew()
1347 xgifb_reg_and_or(pVBInfo->P3d4, 0x37, ~0x03, temp); XGIInitNew()
|
| /linux-4.1.27/drivers/usb/gadget/udc/bdc/ |
| H A D | bdc_dbg.c | 20 u32 temp; bdc_dbg_regs() local
23 temp = bdc_readl(bdc->regs, BDC_BDCCFG0); bdc_dbg_regs()
24 dev_vdbg(bdc->dev, "bdccfg0:0x%08x\n", temp); bdc_dbg_regs()
25 temp = bdc_readl(bdc->regs, BDC_BDCCFG1); bdc_dbg_regs()
26 dev_vdbg(bdc->dev, "bdccfg1:0x%08x\n", temp); bdc_dbg_regs()
27 temp = bdc_readl(bdc->regs, BDC_BDCCAP0); bdc_dbg_regs()
28 dev_vdbg(bdc->dev, "bdccap0:0x%08x\n", temp); bdc_dbg_regs()
29 temp = bdc_readl(bdc->regs, BDC_BDCCAP1); bdc_dbg_regs()
30 dev_vdbg(bdc->dev, "bdccap1:0x%08x\n", temp); bdc_dbg_regs()
31 temp = bdc_readl(bdc->regs, BDC_USPC); bdc_dbg_regs()
32 dev_vdbg(bdc->dev, "uspc:0x%08x\n", temp); bdc_dbg_regs()
33 temp = bdc_readl(bdc->regs, BDC_DVCSA); bdc_dbg_regs()
34 dev_vdbg(bdc->dev, "dvcsa:0x%08x\n", temp); bdc_dbg_regs()
35 temp = bdc_readl(bdc->regs, BDC_DVCSB); bdc_dbg_regs()
36 dev_vdbg(bdc->dev, "dvcsb:0x%x08\n", temp); bdc_dbg_regs()
41 u32 temp; bdc_dump_epsts() local
43 temp = bdc_readl(bdc->regs, BDC_EPSTS0(0)); bdc_dump_epsts()
44 dev_vdbg(bdc->dev, "BDC_EPSTS0:0x%08x\n", temp); bdc_dump_epsts()
46 temp = bdc_readl(bdc->regs, BDC_EPSTS1(0)); bdc_dump_epsts()
47 dev_vdbg(bdc->dev, "BDC_EPSTS1:0x%x\n", temp); bdc_dump_epsts()
49 temp = bdc_readl(bdc->regs, BDC_EPSTS2(0)); bdc_dump_epsts()
50 dev_vdbg(bdc->dev, "BDC_EPSTS2:0x%08x\n", temp); bdc_dump_epsts()
52 temp = bdc_readl(bdc->regs, BDC_EPSTS3(0)); bdc_dump_epsts()
53 dev_vdbg(bdc->dev, "BDC_EPSTS3:0x%08x\n", temp); bdc_dump_epsts()
55 temp = bdc_readl(bdc->regs, BDC_EPSTS4(0)); bdc_dump_epsts()
56 dev_vdbg(bdc->dev, "BDC_EPSTS4:0x%08x\n", temp); bdc_dump_epsts()
58 temp = bdc_readl(bdc->regs, BDC_EPSTS5(0)); bdc_dump_epsts()
59 dev_vdbg(bdc->dev, "BDC_EPSTS5:0x%08x\n", temp); bdc_dump_epsts()
61 temp = bdc_readl(bdc->regs, BDC_EPSTS6(0)); bdc_dump_epsts()
62 dev_vdbg(bdc->dev, "BDC_EPSTS6:0x%08x\n", temp); bdc_dump_epsts()
64 temp = bdc_readl(bdc->regs, BDC_EPSTS7(0)); bdc_dump_epsts()
65 dev_vdbg(bdc->dev, "BDC_EPSTS7:0x%08x\n", temp); bdc_dump_epsts()
|
| H A D | bdc_core.c | 59 u32 temp; bdc_stop() local
62 temp = bdc_readl(bdc->regs, BDC_BDCSC); bdc_stop()
64 if (BDC_CSTS(temp) == BDC_HLT) { bdc_stop()
68 temp &= ~BDC_COP_MASK; bdc_stop()
69 temp |= BDC_COS|BDC_COP_STP; bdc_stop()
70 bdc_writel(bdc->regs, BDC_BDCSC, temp); bdc_stop()
82 u32 temp; bdc_reset() local
91 temp = bdc_readl(bdc->regs, BDC_BDCSC); bdc_reset()
92 temp &= ~BDC_COP_MASK; bdc_reset()
93 temp |= BDC_COS|BDC_COP_RST; bdc_reset()
94 bdc_writel(bdc->regs, BDC_BDCSC, temp); bdc_reset()
105 u32 temp; bdc_run() local
109 temp = bdc_readl(bdc->regs, BDC_BDCSC); bdc_run()
111 if (BDC_CSTS(temp) == BDC_NOR) { bdc_run()
115 temp &= ~BDC_COP_MASK; bdc_run()
116 temp |= BDC_COP_RUN; bdc_run()
117 temp |= BDC_COS; bdc_run()
118 bdc_writel(bdc->regs, BDC_BDCSC, temp); bdc_run()
124 temp = bdc_readl(bdc->regs, BDC_BDCSC); bdc_run()
125 if (BDC_CSTS(temp) != BDC_NOR) { bdc_run()
127 BDC_CSTS(temp)); bdc_run()
226 u32 temp; bdc_mem_init() local
238 temp = BDC_SRR_RWS | BDC_SRR_RST; bdc_mem_init()
240 bdc_writel(bdc->regs, BDC_SRRINT(0), temp); bdc_mem_init()
242 temp = lower_32_bits(bdc->srr.dma_addr); bdc_mem_init()
244 temp |= size; bdc_mem_init()
246 temp, NUM_SR_ENTRIES, size); bdc_mem_init()
248 low32 = lower_32_bits(temp); bdc_mem_init()
257 temp = bdc_readl(bdc->regs, BDC_SRRINT(0)); bdc_mem_init()
258 temp |= BDC_SRR_IE; bdc_mem_init()
259 temp &= ~(BDC_SRR_RST | BDC_SRR_RWS); bdc_mem_init()
260 bdc_writel(bdc->regs, BDC_SRRINT(0), temp); bdc_mem_init()
263 temp = bdc_readl(bdc->regs, BDC_INTCTLS(0)); bdc_mem_init()
264 temp &= ~0xffff; bdc_mem_init()
265 temp |= INT_CLS; bdc_mem_init()
266 bdc_writel(bdc->regs, BDC_INTCTLS(0), temp); bdc_mem_init()
279 temp = bdc_readl(bdc->regs, BDC_BDCSC); bdc_mem_init()
281 temp |= BDC_MASK_MCW; bdc_mem_init()
282 bdc_writel(bdc->regs, BDC_BDCSC, temp); bdc_mem_init()
290 temp = bdc_readl(bdc->regs, BDC_BDCSC); bdc_mem_init()
291 temp |= BDC_GIE; bdc_mem_init()
292 bdc_writel(bdc->regs, BDC_BDCSC, temp); bdc_mem_init()
454 u32 temp; bdc_probe() local
479 temp = bdc_readl(bdc->regs, BDC_BDCSC); bdc_probe()
480 if ((temp & BDC_P64) && bdc_probe()
|
| /linux-4.1.27/drivers/staging/comedi/ |
| H A D | comedi_compat32.c | 108 } temp; compat_chaninfo() local
119 err |= __get_user(temp.uint, &chaninfo32->subdev); compat_chaninfo()
120 err |= __put_user(temp.uint, &chaninfo->subdev); compat_chaninfo()
121 err |= __get_user(temp.uptr, &chaninfo32->maxdata_list); compat_chaninfo()
122 err |= __put_user(compat_ptr(temp.uptr), &chaninfo->maxdata_list); compat_chaninfo()
123 err |= __get_user(temp.uptr, &chaninfo32->flaglist); compat_chaninfo()
124 err |= __put_user(compat_ptr(temp.uptr), &chaninfo->flaglist); compat_chaninfo()
125 err |= __get_user(temp.uptr, &chaninfo32->rangelist); compat_chaninfo()
126 err |= __put_user(compat_ptr(temp.uptr), &chaninfo->rangelist); compat_chaninfo()
142 } temp; compat_rangeinfo() local
153 err |= __get_user(temp.uint, &rangeinfo32->range_type); compat_rangeinfo()
154 err |= __put_user(temp.uint, &rangeinfo->range_type); compat_rangeinfo()
155 err |= __get_user(temp.uptr, &rangeinfo32->range_ptr); compat_rangeinfo()
156 err |= __put_user(compat_ptr(temp.uptr), &rangeinfo->range_ptr); compat_rangeinfo()
172 } temp; get_compat_cmd() local
180 err |= __get_user(temp.uint, &cmd32->subdev); get_compat_cmd()
181 err |= __put_user(temp.uint, &cmd->subdev); get_compat_cmd()
182 err |= __get_user(temp.uint, &cmd32->flags); get_compat_cmd()
183 err |= __put_user(temp.uint, &cmd->flags); get_compat_cmd()
184 err |= __get_user(temp.uint, &cmd32->start_src); get_compat_cmd()
185 err |= __put_user(temp.uint, &cmd->start_src); get_compat_cmd()
186 err |= __get_user(temp.uint, &cmd32->start_arg); get_compat_cmd()
187 err |= __put_user(temp.uint, &cmd->start_arg); get_compat_cmd()
188 err |= __get_user(temp.uint, &cmd32->scan_begin_src); get_compat_cmd()
189 err |= __put_user(temp.uint, &cmd->scan_begin_src); get_compat_cmd()
190 err |= __get_user(temp.uint, &cmd32->scan_begin_arg); get_compat_cmd()
191 err |= __put_user(temp.uint, &cmd->scan_begin_arg); get_compat_cmd()
192 err |= __get_user(temp.uint, &cmd32->convert_src); get_compat_cmd()
193 err |= __put_user(temp.uint, &cmd->convert_src); get_compat_cmd()
194 err |= __get_user(temp.uint, &cmd32->convert_arg); get_compat_cmd()
195 err |= __put_user(temp.uint, &cmd->convert_arg); get_compat_cmd()
196 err |= __get_user(temp.uint, &cmd32->scan_end_src); get_compat_cmd()
197 err |= __put_user(temp.uint, &cmd->scan_end_src); get_compat_cmd()
198 err |= __get_user(temp.uint, &cmd32->scan_end_arg); get_compat_cmd()
199 err |= __put_user(temp.uint, &cmd->scan_end_arg); get_compat_cmd()
200 err |= __get_user(temp.uint, &cmd32->stop_src); get_compat_cmd()
201 err |= __put_user(temp.uint, &cmd->stop_src); get_compat_cmd()
202 err |= __get_user(temp.uint, &cmd32->stop_arg); get_compat_cmd()
203 err |= __put_user(temp.uint, &cmd->stop_arg); get_compat_cmd()
204 err |= __get_user(temp.uptr, &cmd32->chanlist); get_compat_cmd()
205 err |= __put_user(compat_ptr(temp.uptr), &cmd->chanlist); get_compat_cmd()
206 err |= __get_user(temp.uint, &cmd32->chanlist_len); get_compat_cmd()
207 err |= __put_user(temp.uint, &cmd->chanlist_len); get_compat_cmd()
208 err |= __get_user(temp.uptr, &cmd32->data); get_compat_cmd()
209 err |= __put_user(compat_ptr(temp.uptr), &cmd->data); get_compat_cmd()
210 err |= __get_user(temp.uint, &cmd32->data_len); get_compat_cmd()
211 err |= __put_user(temp.uint, &cmd->data_len); get_compat_cmd()
220 unsigned int temp; put_compat_cmd() local
233 err |= __get_user(temp, &cmd->subdev); put_compat_cmd()
234 err |= __put_user(temp, &cmd32->subdev); put_compat_cmd()
235 err |= __get_user(temp, &cmd->flags); put_compat_cmd()
236 err |= __put_user(temp, &cmd32->flags); put_compat_cmd()
237 err |= __get_user(temp, &cmd->start_src); put_compat_cmd()
238 err |= __put_user(temp, &cmd32->start_src); put_compat_cmd()
239 err |= __get_user(temp, &cmd->start_arg); put_compat_cmd()
240 err |= __put_user(temp, &cmd32->start_arg); put_compat_cmd()
241 err |= __get_user(temp, &cmd->scan_begin_src); put_compat_cmd()
242 err |= __put_user(temp, &cmd32->scan_begin_src); put_compat_cmd()
243 err |= __get_user(temp, &cmd->scan_begin_arg); put_compat_cmd()
244 err |= __put_user(temp, &cmd32->scan_begin_arg); put_compat_cmd()
245 err |= __get_user(temp, &cmd->convert_src); put_compat_cmd()
246 err |= __put_user(temp, &cmd32->convert_src); put_compat_cmd()
247 err |= __get_user(temp, &cmd->convert_arg); put_compat_cmd()
248 err |= __put_user(temp, &cmd32->convert_arg); put_compat_cmd()
249 err |= __get_user(temp, &cmd->scan_end_src); put_compat_cmd()
250 err |= __put_user(temp, &cmd32->scan_end_src); put_compat_cmd()
251 err |= __get_user(temp, &cmd->scan_end_arg); put_compat_cmd()
252 err |= __put_user(temp, &cmd32->scan_end_arg); put_compat_cmd()
253 err |= __get_user(temp, &cmd->stop_src); put_compat_cmd()
254 err |= __put_user(temp, &cmd32->stop_src); put_compat_cmd()
255 err |= __get_user(temp, &cmd->stop_arg); put_compat_cmd()
256 err |= __put_user(temp, &cmd32->stop_arg); put_compat_cmd()
258 err |= __get_user(temp, &cmd->chanlist_len); put_compat_cmd()
259 err |= __put_user(temp, &cmd32->chanlist_len); put_compat_cmd()
261 err |= __get_user(temp, &cmd->data_len); put_compat_cmd()
262 err |= __put_user(temp, &cmd32->data_len); put_compat_cmd()
324 } temp; get_compat_insn() local
332 err |= __get_user(temp.uint, &insn32->insn); get_compat_insn()
333 err |= __put_user(temp.uint, &insn->insn); get_compat_insn()
334 err |= __get_user(temp.uint, &insn32->n); get_compat_insn()
335 err |= __put_user(temp.uint, &insn->n); get_compat_insn()
336 err |= __get_user(temp.uptr, &insn32->data); get_compat_insn()
337 err |= __put_user(compat_ptr(temp.uptr), &insn->data); get_compat_insn()
338 err |= __get_user(temp.uint, &insn32->subdev); get_compat_insn()
339 err |= __put_user(temp.uint, &insn->subdev); get_compat_insn()
340 err |= __get_user(temp.uint, &insn32->chanspec); get_compat_insn()
341 err |= __put_user(temp.uint, &insn->chanspec); get_compat_insn()
|
| /linux-4.1.27/drivers/usb/host/ |
| H A D | ohci-dbg.c | 12 #define edstring(ed_type) ({ char *temp; \
14 case PIPE_CONTROL: temp = "ctrl"; break; \
15 case PIPE_BULK: temp = "bulk"; break; \
16 case PIPE_INTERRUPT: temp = "intr"; break; \
17 default: temp = "isoc"; break; \
18 } temp;})
103 u32 temp; ohci_dump_status() local
105 temp = ohci_readl (controller, ®s->revision) & 0xff; ohci_dump_status()
108 0x03 & (temp >> 4), (temp & 0x0f), ohci_dump_status()
109 (temp & 0x0100) ? "with" : "NO", ohci_dump_status()
112 temp = ohci_readl (controller, ®s->control); ohci_dump_status()
115 temp, ohci_dump_status()
116 (temp & OHCI_CTRL_RWE) ? " RWE" : "", ohci_dump_status()
117 (temp & OHCI_CTRL_RWC) ? " RWC" : "", ohci_dump_status()
118 (temp & OHCI_CTRL_IR) ? " IR" : "", ohci_dump_status()
119 hcfs2string (temp & OHCI_CTRL_HCFS), ohci_dump_status()
120 (temp & OHCI_CTRL_BLE) ? " BLE" : "", ohci_dump_status()
121 (temp & OHCI_CTRL_CLE) ? " CLE" : "", ohci_dump_status()
122 (temp & OHCI_CTRL_IE) ? " IE" : "", ohci_dump_status()
123 (temp & OHCI_CTRL_PLE) ? " PLE" : "", ohci_dump_status()
124 temp & OHCI_CTRL_CBSR ohci_dump_status()
127 temp = ohci_readl (controller, ®s->cmdstatus); ohci_dump_status()
129 "cmdstatus 0x%05x SOC=%d%s%s%s%s\n", temp, ohci_dump_status()
130 (temp & OHCI_SOC) >> 16, ohci_dump_status()
131 (temp & OHCI_OCR) ? " OCR" : "", ohci_dump_status()
132 (temp & OHCI_BLF) ? " BLF" : "", ohci_dump_status()
133 (temp & OHCI_CLF) ? " CLF" : "", ohci_dump_status()
134 (temp & OHCI_HCR) ? " HCR" : "" ohci_dump_status()
171 num, temp, \
172 (temp & RH_PS_PRSC) ? " PRSC" : "", \
173 (temp & RH_PS_OCIC) ? " OCIC" : "", \
174 (temp & RH_PS_PSSC) ? " PSSC" : "", \
175 (temp & RH_PS_PESC) ? " PESC" : "", \
176 (temp & RH_PS_CSC) ? " CSC" : "", \
178 (temp & RH_PS_LSDA) ? " LSDA" : "", \
179 (temp & RH_PS_PPS) ? " PPS" : "", \
180 (temp & RH_PS_PRS) ? " PRS" : "", \
181 (temp & RH_PS_POCI) ? " POCI" : "", \
182 (temp & RH_PS_PSS) ? " PSS" : "", \
184 (temp & RH_PS_PES) ? " PES" : "", \
185 (temp & RH_PS_CCS) ? " CCS" : "" \
196 u32 temp, i; ohci_dump_roothub() local
198 temp = roothub_a (controller); ohci_dump_roothub()
199 if (temp == ~(u32)0) ohci_dump_roothub()
204 "roothub.a %08x POTPGT=%d%s%s%s%s%s NDP=%d(%d)\n", temp, ohci_dump_roothub()
205 ((temp & RH_A_POTPGT) >> 24) & 0xff, ohci_dump_roothub()
206 (temp & RH_A_NOCP) ? " NOCP" : "", ohci_dump_roothub()
207 (temp & RH_A_OCPM) ? " OCPM" : "", ohci_dump_roothub()
208 (temp & RH_A_DT) ? " DT" : "", ohci_dump_roothub()
209 (temp & RH_A_NPS) ? " NPS" : "", ohci_dump_roothub()
210 (temp & RH_A_PSM) ? " PSM" : "", ohci_dump_roothub()
211 (temp & RH_A_NDP), controller->num_ports ohci_dump_roothub()
213 temp = roothub_b (controller); ohci_dump_roothub()
216 temp, ohci_dump_roothub()
217 (temp & RH_B_PPCM) >> 16, ohci_dump_roothub()
218 (temp & RH_B_DR) ohci_dump_roothub()
220 temp = roothub_status (controller); ohci_dump_roothub()
223 temp, ohci_dump_roothub()
224 (temp & RH_HS_CRWE) ? " CRWE" : "", ohci_dump_roothub()
225 (temp & RH_HS_OCIC) ? " OCIC" : "", ohci_dump_roothub()
226 (temp & RH_HS_LPSC) ? " LPSC" : "", ohci_dump_roothub()
227 (temp & RH_HS_DRWE) ? " DRWE" : "", ohci_dump_roothub()
228 (temp & RH_HS_OCI) ? " OCI" : "", ohci_dump_roothub()
229 (temp & RH_HS_LPS) ? " LPS" : "" ohci_dump_roothub()
234 temp = roothub_portstatus (controller, i); ohci_dump_roothub()
235 dbg_port_sw (controller, i, temp, next, size); ohci_dump_roothub()
401 unsigned temp, size = count; show_list() local
417 temp = scnprintf (buf, size, show_list()
429 size -= temp; show_list()
430 buf += temp; show_list()
439 temp = scnprintf (buf, size, show_list()
451 size -= temp; show_list()
452 buf += temp; show_list()
455 temp = scnprintf (buf, size, "\n"); show_list()
456 size -= temp; show_list()
457 buf += temp; show_list()
467 size_t temp, size; fill_async_buffer() local
475 temp = show_list(ohci, buf->page, size, ohci->ed_controltail); fill_async_buffer()
476 temp += show_list(ohci, buf->page + temp, size - temp, fill_async_buffer()
480 return temp; fill_async_buffer()
490 unsigned temp, size, seen_count; fill_periodic_buffer() local
502 temp = scnprintf (next, size, "size = %d\n", NUM_INTS); fill_periodic_buffer()
503 size -= temp; fill_periodic_buffer()
504 next += temp; fill_periodic_buffer()
512 temp = scnprintf (next, size, "%2d [%3d]:", i, ohci->load [i]); fill_periodic_buffer()
513 size -= temp; fill_periodic_buffer()
514 next += temp; fill_periodic_buffer()
517 temp = scnprintf (next, size, " ed%d/%p", fill_periodic_buffer()
519 size -= temp; fill_periodic_buffer()
520 next += temp; fill_periodic_buffer()
521 for (temp = 0; temp < seen_count; temp++) { fill_periodic_buffer()
522 if (seen [temp] == ed) fill_periodic_buffer()
527 if (temp == seen_count) { fill_periodic_buffer()
536 temp = scnprintf (next, size, fill_periodic_buffer()
551 size -= temp; fill_periodic_buffer()
552 next += temp; fill_periodic_buffer()
561 temp = 0; fill_periodic_buffer()
567 temp = scnprintf (next, size, "\n"); fill_periodic_buffer()
568 size -= temp; fill_periodic_buffer()
569 next += temp; fill_periodic_buffer()
584 unsigned temp, size; fill_registers_buffer() local
622 temp = scnprintf (next, size, fill_registers_buffer()
626 size -= temp; fill_registers_buffer()
627 next += temp; fill_registers_buffer()
630 temp = scnprintf (next, size, "fmremaining 0x%08x %sFR=0x%04x\n", fill_registers_buffer()
633 size -= temp; fill_registers_buffer()
634 next += temp; fill_registers_buffer()
637 temp = scnprintf (next, size, "periodicstart 0x%04x\n", fill_registers_buffer()
639 size -= temp; fill_registers_buffer()
640 next += temp; fill_registers_buffer()
643 temp = scnprintf (next, size, "lsthresh 0x%04x\n", fill_registers_buffer()
645 size -= temp; fill_registers_buffer()
646 next += temp; fill_registers_buffer()
648 temp = scnprintf (next, size, "hub poll timer %s\n", fill_registers_buffer()
650 size -= temp; fill_registers_buffer()
651 next += temp; fill_registers_buffer()
|
| H A D | xhci-rcar.c | 61 u32 temp; xhci_rcar_start() local
65 temp = readl(hcd->regs + RCAR_USB3_INT_ENA); xhci_rcar_start()
66 temp |= RCAR_USB3_INT_ENA_VAL; xhci_rcar_start()
67 writel(temp, hcd->regs + RCAR_USB3_INT_ENA); xhci_rcar_start()
85 u32 data, val, temp; xhci_rcar_download_firmware() local
93 temp = readl(regs + RCAR_USB3_DL_CTRL); xhci_rcar_download_firmware()
94 temp |= RCAR_USB3_DL_CTRL_ENABLE; xhci_rcar_download_firmware()
95 writel(temp, regs + RCAR_USB3_DL_CTRL); xhci_rcar_download_firmware()
104 temp = readl(regs + RCAR_USB3_DL_CTRL); xhci_rcar_download_firmware()
105 temp |= RCAR_USB3_DL_CTRL_FW_SET_DATA0; xhci_rcar_download_firmware()
106 writel(temp, regs + RCAR_USB3_DL_CTRL); xhci_rcar_download_firmware()
120 temp = readl(regs + RCAR_USB3_DL_CTRL); xhci_rcar_download_firmware()
121 temp &= ~RCAR_USB3_DL_CTRL_ENABLE; xhci_rcar_download_firmware()
122 writel(temp, regs + RCAR_USB3_DL_CTRL); xhci_rcar_download_firmware()
|
| H A D | ehci-dbg.c | 417 unsigned temp; qh_lines() local
438 temp = scnprintf (next, size, qh_lines()
448 size -= temp; qh_lines()
449 next += temp; qh_lines()
466 temp = snprintf (next, size, qh_lines()
478 if (size < temp) qh_lines()
479 temp = size; qh_lines()
480 size -= temp; qh_lines()
481 next += temp; qh_lines()
482 if (temp == size) qh_lines()
486 temp = snprintf (next, size, "\n"); qh_lines()
487 if (size < temp) qh_lines()
488 temp = size; qh_lines()
489 size -= temp; qh_lines()
490 next += temp; qh_lines()
502 unsigned temp, size; fill_async_buffer() local
521 temp = scnprintf(next, size, "\nunlink =\n"); fill_async_buffer()
522 size -= temp; fill_async_buffer()
523 next += temp; fill_async_buffer()
541 unsigned temp, size; fill_bandwidth_buffer() local
557 temp = scnprintf(next, size, fill_bandwidth_buffer()
559 size -= temp; fill_bandwidth_buffer()
560 next += temp; fill_bandwidth_buffer()
563 temp = scnprintf(next, size, fill_bandwidth_buffer()
567 size -= temp; fill_bandwidth_buffer()
568 next += temp; fill_bandwidth_buffer()
573 temp = scnprintf(next, size, fill_bandwidth_buffer()
577 size -= temp; fill_bandwidth_buffer()
578 next += temp; fill_bandwidth_buffer()
581 temp = scnprintf(next, size, fill_bandwidth_buffer()
585 size -= temp; fill_bandwidth_buffer()
586 next += temp; fill_bandwidth_buffer()
588 temp = scnprintf(next, size, fill_bandwidth_buffer()
590 size -= temp; fill_bandwidth_buffer()
591 next += temp; fill_bandwidth_buffer()
595 temp = scnprintf(next, size, fill_bandwidth_buffer()
599 size -= temp; fill_bandwidth_buffer()
600 next += temp; fill_bandwidth_buffer()
603 temp = scnprintf(next, size, fill_bandwidth_buffer()
610 size -= temp; fill_bandwidth_buffer()
611 next += temp; fill_bandwidth_buffer()
626 unsigned temp, size, seen_count; fill_periodic_buffer() local
640 temp = scnprintf (next, size, "size = %d\n", ehci->periodic_size); fill_periodic_buffer()
641 size -= temp; fill_periodic_buffer()
642 next += temp; fill_periodic_buffer()
654 temp = scnprintf (next, size, "%4d: ", i); fill_periodic_buffer()
655 size -= temp; fill_periodic_buffer()
656 next += temp; fill_periodic_buffer()
664 temp = scnprintf (next, size, " qh%d-%04x/%p", fill_periodic_buffer()
671 size -= temp; fill_periodic_buffer()
672 next += temp; fill_periodic_buffer()
674 for (temp = 0; temp < seen_count; temp++) { fill_periodic_buffer()
675 if (seen [temp].ptr != p.ptr) fill_periodic_buffer()
678 temp = scnprintf (next, size, fill_periodic_buffer()
680 size -= temp; fill_periodic_buffer()
681 next += temp; fill_periodic_buffer()
686 if (temp == seen_count) { fill_periodic_buffer()
693 temp = 0; fill_periodic_buffer()
697 temp++; fill_periodic_buffer()
706 temp = scnprintf (next, size, fill_periodic_buffer()
714 temp, fill_periodic_buffer()
720 temp = 0; fill_periodic_buffer()
725 temp = scnprintf (next, size, fill_periodic_buffer()
732 temp = scnprintf (next, size, fill_periodic_buffer()
738 temp = scnprintf (next, size, fill_periodic_buffer()
748 size -= temp; fill_periodic_buffer()
749 next += temp; fill_periodic_buffer()
752 temp = scnprintf (next, size, "\n"); fill_periodic_buffer()
753 size -= temp; fill_periodic_buffer()
754 next += temp; fill_periodic_buffer()
783 unsigned temp, size, i; fill_registers_buffer() local
808 temp = scnprintf (next, size, fill_registers_buffer()
816 size -= temp; fill_registers_buffer()
817 next += temp; fill_registers_buffer()
833 temp = scnprintf (next, size, fill_registers_buffer()
837 size -= temp; fill_registers_buffer()
838 next += temp; fill_registers_buffer()
842 temp = scnprintf (next, size, fill_registers_buffer()
844 size -= temp; fill_registers_buffer()
845 next += temp; fill_registers_buffer()
853 temp = (cap >> 8) & 0xff; fill_registers_buffer()
860 temp = scnprintf (next, size, "structural params 0x%08x\n", i); fill_registers_buffer()
861 size -= temp; fill_registers_buffer()
862 next += temp; fill_registers_buffer()
865 temp = scnprintf (next, size, "capability params 0x%08x\n", i); fill_registers_buffer()
866 size -= temp; fill_registers_buffer()
867 next += temp; fill_registers_buffer()
870 temp = dbg_status_buf (scratch, sizeof scratch, label, fill_registers_buffer()
872 temp = scnprintf (next, size, fmt, temp, scratch); fill_registers_buffer()
873 size -= temp; fill_registers_buffer()
874 next += temp; fill_registers_buffer()
876 temp = dbg_command_buf (scratch, sizeof scratch, label, fill_registers_buffer()
878 temp = scnprintf (next, size, fmt, temp, scratch); fill_registers_buffer()
879 size -= temp; fill_registers_buffer()
880 next += temp; fill_registers_buffer()
882 temp = dbg_intr_buf (scratch, sizeof scratch, label, fill_registers_buffer()
884 temp = scnprintf (next, size, fmt, temp, scratch); fill_registers_buffer()
885 size -= temp; fill_registers_buffer()
886 next += temp; fill_registers_buffer()
888 temp = scnprintf (next, size, "uframe %04x\n", fill_registers_buffer()
890 size -= temp; fill_registers_buffer()
891 next += temp; fill_registers_buffer()
894 temp = dbg_port_buf (scratch, sizeof scratch, label, i, fill_registers_buffer()
897 temp = scnprintf (next, size, fmt, temp, scratch); fill_registers_buffer()
898 size -= temp; fill_registers_buffer()
899 next += temp; fill_registers_buffer()
901 temp = scnprintf (next, size, fill_registers_buffer()
905 size -= temp; fill_registers_buffer()
906 next += temp; fill_registers_buffer()
911 temp = scnprintf(next, size, "async unlink qh %p\n", fill_registers_buffer()
914 size -= temp; fill_registers_buffer()
915 next += temp; fill_registers_buffer()
919 temp = scnprintf (next, size, fill_registers_buffer()
923 size -= temp; fill_registers_buffer()
924 next += temp; fill_registers_buffer()
926 temp = scnprintf (next, size, "complete %ld unlink %ld\n", fill_registers_buffer()
928 size -= temp; fill_registers_buffer()
929 next += temp; fill_registers_buffer()
|
| H A D | xhci-hub.c | 56 u16 temp; xhci_common_hub_descriptor() local
62 temp = 0; xhci_common_hub_descriptor()
65 temp |= HUB_CHAR_INDV_PORT_LPSM; xhci_common_hub_descriptor()
67 temp |= HUB_CHAR_NO_LPSM; xhci_common_hub_descriptor()
70 temp |= HUB_CHAR_INDV_PORT_OCPM; xhci_common_hub_descriptor()
73 desc->wHubCharacteristics = cpu_to_le16(temp); xhci_common_hub_descriptor()
81 u16 temp; xhci_usb2_hub_descriptor() local
90 temp = 1 + (ports / 8); xhci_usb2_hub_descriptor()
91 desc->bDescLength = USB_DT_HUB_NONVAR_SIZE + 2 * temp; xhci_usb2_hub_descriptor()
424 u32 temp; xhci_set_link_state() local
426 temp = readl(port_array[port_id]); xhci_set_link_state()
427 temp = xhci_port_state_to_neutral(temp); xhci_set_link_state()
428 temp &= ~PORT_PLS_MASK; xhci_set_link_state()
429 temp |= PORT_LINK_STROBE | link_state; xhci_set_link_state()
430 writel(temp, port_array[port_id]); xhci_set_link_state()
436 u32 temp; xhci_set_remote_wake_mask() local
438 temp = readl(port_array[port_id]); xhci_set_remote_wake_mask()
439 temp = xhci_port_state_to_neutral(temp); xhci_set_remote_wake_mask()
442 temp |= PORT_WKCONN_E; xhci_set_remote_wake_mask()
444 temp &= ~PORT_WKCONN_E; xhci_set_remote_wake_mask()
447 temp |= PORT_WKDISC_E; xhci_set_remote_wake_mask()
449 temp &= ~PORT_WKDISC_E; xhci_set_remote_wake_mask()
452 temp |= PORT_WKOC_E; xhci_set_remote_wake_mask()
454 temp &= ~PORT_WKOC_E; xhci_set_remote_wake_mask()
456 writel(temp, port_array[port_id]); xhci_set_remote_wake_mask()
463 u32 temp; xhci_test_and_clear_bit() local
465 temp = readl(port_array[port_id]); xhci_test_and_clear_bit()
466 if (temp & port_bit) { xhci_test_and_clear_bit()
467 temp = xhci_port_state_to_neutral(temp); xhci_test_and_clear_bit()
468 temp |= port_bit; xhci_test_and_clear_bit()
469 writel(temp, port_array[port_id]); xhci_test_and_clear_bit()
714 u32 temp, status; xhci_hub_control() local
758 temp = readl(&xhci->cap_regs->hcs_params3); xhci_hub_control()
759 buf[12] = HCS_U1_LATENCY(temp); xhci_hub_control()
760 put_unaligned_le16(HCS_U2_LATENCY(temp), &buf[13]); xhci_hub_control()
764 temp = readl(&xhci->cap_regs->hcc_params); xhci_hub_control()
765 if (HCC_LTC(temp)) xhci_hub_control()
774 temp = readl(port_array[wIndex]); xhci_hub_control()
775 if (temp == 0xffffffff) { xhci_hub_control()
780 wIndex, temp, flags); xhci_hub_control()
785 wIndex, temp); xhci_hub_control()
801 temp = readl(port_array[wIndex]); xhci_hub_control()
802 if (temp == 0xffffffff) { xhci_hub_control()
806 temp = xhci_port_state_to_neutral(temp); xhci_hub_control()
810 temp = readl(port_array[wIndex]); xhci_hub_control()
811 if ((temp & PORT_PLS_MASK) != XDEV_U0) { xhci_hub_control()
823 temp = readl(port_array[wIndex]); xhci_hub_control()
824 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) xhci_hub_control()
825 || (temp & PORT_PLS_MASK) >= XDEV_U3) { xhci_hub_control()
848 temp = readl(port_array[wIndex]); xhci_hub_control()
852 temp = readl(port_array[wIndex]); xhci_hub_control()
857 temp = xhci_port_state_to_neutral(temp); xhci_hub_control()
862 temp |= PORT_CSC | PORT_PEC | PORT_WRC | xhci_hub_control()
865 writel(temp | PORT_PE, port_array[wIndex]); xhci_hub_control()
866 temp = readl(port_array[wIndex]); xhci_hub_control()
875 temp = readl(port_array[wIndex]); xhci_hub_control()
883 if ((temp & PORT_PE) == 0 || xhci_hub_control()
909 temp = readl(port_array[wIndex]); xhci_hub_control()
920 writel(temp | PORT_POWER, port_array[wIndex]); xhci_hub_control()
922 temp = readl(port_array[wIndex]); xhci_hub_control()
923 xhci_dbg(xhci, "set port power, actual port %d status = 0x%x\n", wIndex, temp); xhci_hub_control()
926 temp = usb_acpi_power_manageable(hcd->self.root_hub, xhci_hub_control()
928 if (temp) xhci_hub_control()
934 temp = (temp | PORT_RESET); xhci_hub_control()
935 writel(temp, port_array[wIndex]); xhci_hub_control()
937 temp = readl(port_array[wIndex]); xhci_hub_control()
938 xhci_dbg(xhci, "set port reset, actual port %d status = 0x%x\n", wIndex, temp); xhci_hub_control()
943 temp = readl(port_array[wIndex]); xhci_hub_control()
946 wIndex, temp); xhci_hub_control()
949 temp |= PORT_WR; xhci_hub_control()
950 writel(temp, port_array[wIndex]); xhci_hub_control()
952 temp = readl(port_array[wIndex]); xhci_hub_control()
957 temp = readl(port_array[wIndex] + PORTPMSC); xhci_hub_control()
958 temp &= ~PORT_U1_TIMEOUT_MASK; xhci_hub_control()
959 temp |= PORT_U1_TIMEOUT(timeout); xhci_hub_control()
960 writel(temp, port_array[wIndex] + PORTPMSC); xhci_hub_control()
965 temp = readl(port_array[wIndex] + PORTPMSC); xhci_hub_control()
966 temp &= ~PORT_U2_TIMEOUT_MASK; xhci_hub_control()
967 temp |= PORT_U2_TIMEOUT(timeout); xhci_hub_control()
968 writel(temp, port_array[wIndex] + PORTPMSC); xhci_hub_control()
974 temp = readl(port_array[wIndex]); xhci_hub_control()
980 temp = readl(port_array[wIndex]); xhci_hub_control()
981 if (temp == 0xffffffff) { xhci_hub_control()
986 temp = xhci_port_state_to_neutral(temp); xhci_hub_control()
989 temp = readl(port_array[wIndex]); xhci_hub_control()
991 xhci_dbg(xhci, "PORTSC %04x\n", temp); xhci_hub_control()
992 if (temp & PORT_RESET) xhci_hub_control()
994 if ((temp & PORT_PLS_MASK) == XDEV_U3) { xhci_hub_control()
995 if ((temp & PORT_PE) == 0) xhci_hub_control()
1026 port_array[wIndex], temp); xhci_hub_control()
1030 port_array[wIndex], temp); xhci_hub_control()
1033 writel(temp & ~PORT_POWER, port_array[wIndex]); xhci_hub_control()
1036 temp = usb_acpi_power_manageable(hcd->self.root_hub, xhci_hub_control()
1038 if (temp) xhci_hub_control()
1067 u32 temp, status; xhci_hub_status_data() local
1094 temp = readl(port_array[i]); xhci_hub_status_data()
1095 if (temp == 0xffffffff) { xhci_hub_status_data()
1099 if ((temp & mask) != 0 || xhci_hub_status_data()
1106 if ((temp & PORT_RC)) xhci_hub_status_data()
1195 u32 temp; xhci_bus_resume() local
1211 temp = readl(&xhci->op_regs->command); xhci_bus_resume()
1212 temp &= ~CMD_EIE; xhci_bus_resume()
1213 writel(temp, &xhci->op_regs->command); xhci_bus_resume()
1219 u32 temp; xhci_bus_resume() local
1222 temp = readl(port_array[port_index]); xhci_bus_resume()
1223 if (DEV_SUPERSPEED(temp)) xhci_bus_resume()
1224 temp &= ~(PORT_RWC_BITS | PORT_CEC | PORT_WAKE_BITS); xhci_bus_resume()
1226 temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS); xhci_bus_resume()
1228 (temp & PORT_PLS_MASK)) { xhci_bus_resume()
1229 if (DEV_SUPERSPEED(temp)) { xhci_bus_resume()
1259 writel(temp, port_array[port_index]); xhci_bus_resume()
1266 temp = readl(&xhci->op_regs->command); xhci_bus_resume()
1267 temp |= CMD_EIE; xhci_bus_resume()
1268 writel(temp, &xhci->op_regs->command); xhci_bus_resume()
1269 temp = readl(&xhci->op_regs->command); xhci_bus_resume()
|
| H A D | xhci-dbg.c | 31 u32 temp; xhci_dbg_regs() local
35 temp = readl(&xhci->cap_regs->hc_capbase); xhci_dbg_regs()
37 &xhci->cap_regs->hc_capbase, temp); xhci_dbg_regs()
39 (unsigned int) HC_LENGTH(temp)); xhci_dbg_regs()
42 (unsigned int) HC_VERSION(temp)); xhci_dbg_regs()
47 temp = readl(&xhci->cap_regs->run_regs_off); xhci_dbg_regs()
50 (unsigned int) temp & RTSOFF_MASK); xhci_dbg_regs()
53 temp = readl(&xhci->cap_regs->db_off); xhci_dbg_regs()
54 xhci_dbg(xhci, "// @%p = 0x%x DBOFF\n", &xhci->cap_regs->db_off, temp); xhci_dbg_regs()
60 u32 temp; xhci_print_cap_regs() local
64 temp = readl(&xhci->cap_regs->hc_capbase); xhci_print_cap_regs()
66 (unsigned int) temp); xhci_print_cap_regs()
68 (unsigned int) HC_LENGTH(temp)); xhci_print_cap_regs()
70 (unsigned int) HC_VERSION(temp)); xhci_print_cap_regs()
72 temp = readl(&xhci->cap_regs->hcs_params1); xhci_print_cap_regs()
74 (unsigned int) temp); xhci_print_cap_regs()
76 (unsigned int) HCS_MAX_SLOTS(temp)); xhci_print_cap_regs()
78 (unsigned int) HCS_MAX_INTRS(temp)); xhci_print_cap_regs()
80 (unsigned int) HCS_MAX_PORTS(temp)); xhci_print_cap_regs()
82 temp = readl(&xhci->cap_regs->hcs_params2); xhci_print_cap_regs()
84 (unsigned int) temp); xhci_print_cap_regs()
86 (unsigned int) HCS_IST(temp)); xhci_print_cap_regs()
88 (unsigned int) HCS_ERST_MAX(temp)); xhci_print_cap_regs()
90 temp = readl(&xhci->cap_regs->hcs_params3); xhci_print_cap_regs()
92 (unsigned int) temp); xhci_print_cap_regs()
94 (unsigned int) HCS_U1_LATENCY(temp)); xhci_print_cap_regs()
96 (unsigned int) HCS_U2_LATENCY(temp)); xhci_print_cap_regs()
98 temp = readl(&xhci->cap_regs->hcc_params); xhci_print_cap_regs()
99 xhci_dbg(xhci, "HCC PARAMS 0x%x:\n", (unsigned int) temp); xhci_print_cap_regs()
101 HCC_64BIT_ADDR(temp) ? "64" : "32"); xhci_print_cap_regs()
105 temp = readl(&xhci->cap_regs->run_regs_off); xhci_print_cap_regs()
106 xhci_dbg(xhci, "RTSOFF 0x%x:\n", temp & RTSOFF_MASK); xhci_print_cap_regs()
111 u32 temp; xhci_print_command_reg() local
113 temp = readl(&xhci->op_regs->command); xhci_print_command_reg()
114 xhci_dbg(xhci, "USBCMD 0x%x:\n", temp); xhci_print_command_reg()
116 (temp & CMD_RUN) ? "running" : "being stopped"); xhci_print_command_reg()
118 (temp & CMD_RESET) ? "not " : ""); xhci_print_command_reg()
120 (temp & CMD_EIE) ? "enabled " : "disabled"); xhci_print_command_reg()
122 (temp & CMD_HSEIE) ? "enabled " : "disabled"); xhci_print_command_reg()
124 (temp & CMD_LRESET) ? "not " : ""); xhci_print_command_reg()
129 u32 temp; xhci_print_status() local
131 temp = readl(&xhci->op_regs->status); xhci_print_status()
132 xhci_dbg(xhci, "USBSTS 0x%x:\n", temp); xhci_print_status()
134 (temp & STS_EINT) ? "not " : ""); xhci_print_status()
136 (temp & STS_FATAL) ? "WARNING: " : "No "); xhci_print_status()
138 (temp & STS_HALT) ? "halted" : "running"); xhci_print_status()
176 u32 temp; xhci_print_ir_set() local
180 temp = readl(addr); xhci_print_ir_set()
181 if (temp == XHCI_INIT_VALUE) xhci_print_ir_set()
187 (unsigned int)temp); xhci_print_ir_set()
190 temp = readl(addr); xhci_print_ir_set()
192 (unsigned int)temp); xhci_print_ir_set()
195 temp = readl(addr); xhci_print_ir_set()
197 (unsigned int)temp); xhci_print_ir_set()
200 temp = readl(addr); xhci_print_ir_set()
201 if (temp != XHCI_INIT_VALUE) xhci_print_ir_set()
203 addr, (unsigned int)temp); xhci_print_ir_set()
218 u32 temp; xhci_print_run_regs() local
222 temp = readl(&xhci->run_regs->microframe_index); xhci_print_run_regs()
225 (unsigned int) temp); xhci_print_run_regs()
227 temp = readl(&xhci->run_regs->rsvd[i]); xhci_print_run_regs()
228 if (temp != XHCI_INIT_VALUE) xhci_print_run_regs()
231 i, (unsigned int) temp); xhci_print_run_regs()
|
| H A D | ehci-hub.c | 162 u32 temp; ehci_adjust_port_wakeup_flags() local
180 temp = ehci_readl(ehci, hostpc_reg); ehci_adjust_port_wakeup_flags()
181 ehci_writel(ehci, temp & ~HOSTPC_PHCD, hostpc_reg); ehci_adjust_port_wakeup_flags()
212 temp = ehci_readl(ehci, hostpc_reg); ehci_adjust_port_wakeup_flags()
213 ehci_writel(ehci, temp | HOSTPC_PHCD, hostpc_reg); ehci_adjust_port_wakeup_flags()
377 u32 temp; ehci_bus_resume() local
427 temp = ehci_readl(ehci, &ehci->regs->port_status[i]); ehci_bus_resume()
428 if ((temp & PORT_PE) && ehci_bus_resume()
429 !(temp & (PORT_SUSPEND | PORT_RESUME))) { ehci_bus_resume()
430 ehci_dbg(ehci, "Port status(0x%x) is wrong\n", temp); ehci_bus_resume()
449 temp = ehci_readl(ehci, hostpc_reg); ehci_bus_resume()
450 ehci_writel(ehci, temp & ~HOSTPC_PHCD, ehci_bus_resume()
464 temp = ehci_readl(ehci, &ehci->regs->port_status [i]); ehci_bus_resume()
465 temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS); ehci_bus_resume()
467 (temp & PORT_SUSPEND)) { ehci_bus_resume()
468 temp |= PORT_RESUME; ehci_bus_resume()
471 ehci_writel(ehci, temp, &ehci->regs->port_status [i]); ehci_bus_resume()
488 temp = ehci_readl(ehci, &ehci->regs->port_status [i]); ehci_bus_resume()
490 temp &= ~(PORT_RWC_BITS | PORT_SUSPEND | PORT_RESUME); ehci_bus_resume()
491 ehci_writel(ehci, temp, &ehci->regs->port_status [i]); ehci_bus_resume()
611 u32 temp, status; ehci_hub_status_data() local
654 temp = ehci_readl(ehci, &ehci->regs->port_status[i]); ehci_hub_status_data()
656 temp = 0; ehci_hub_status_data()
665 if ((temp & mask) != 0 || test_bit(i, &ehci->port_c_suspend) ehci_hub_status_data()
692 u16 temp; ehci_hub_descriptor() local
699 temp = 1 + (ports / 8); ehci_hub_descriptor()
700 desc->bDescLength = 7 + 2 * temp; ehci_hub_descriptor()
703 memset(&desc->u.hs.DeviceRemovable[0], 0, temp); ehci_hub_descriptor()
704 memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp); ehci_hub_descriptor()
706 temp = HUB_CHAR_INDV_PORT_OCPM; /* per-port overcurrent reporting */ ehci_hub_descriptor()
708 temp |= HUB_CHAR_INDV_PORT_LPSM; /* per-port power control */ ehci_hub_descriptor()
710 temp |= HUB_CHAR_NO_LPSM; /* no power switching */ ehci_hub_descriptor()
714 temp |= HUB_CHAR_PORTIND; /* per-port indicators (LEDs) */ ehci_hub_descriptor()
716 desc->wHubCharacteristics = cpu_to_le16(temp); ehci_hub_descriptor()
873 u32 temp, temp1, status; ehci_hub_control() local
901 temp = ehci_readl(ehci, status_reg); ehci_hub_control()
902 temp &= ~PORT_RWC_BITS; ehci_hub_control()
913 ehci_writel(ehci, temp & ~PORT_PE, status_reg); ehci_hub_control()
916 ehci_writel(ehci, temp | PORT_PEC, status_reg); ehci_hub_control()
919 if (temp & PORT_RESET) ehci_hub_control()
930 if (!(temp & PORT_SUSPEND)) ehci_hub_control()
932 if ((temp & PORT_PE) == 0) ehci_hub_control()
945 temp &= ~PORT_WAKE_BITS; ehci_hub_control()
946 ehci_writel(ehci, temp | PORT_RESUME, status_reg); ehci_hub_control()
963 ehci_writel(ehci, temp | PORT_CSC, status_reg); ehci_hub_control()
966 ehci_writel(ehci, temp | PORT_OCC, status_reg); ehci_hub_control()
990 temp = ehci_readl(ehci, status_reg); ehci_hub_control()
993 if (temp & PORT_CSC) ehci_hub_control()
995 if (temp & PORT_PEC) ehci_hub_control()
998 if ((temp & PORT_OCC) && !ignore_oc){ ehci_hub_control()
1008 if (((temp & PORT_OC) || (ehci->need_oc_pp_cycle)) ehci_hub_control()
1013 temp = ehci_readl(ehci, status_reg); ehci_hub_control()
1021 if (temp & PORT_RESUME) { ehci_hub_control()
1044 temp &= ~(PORT_RWC_BITS | PORT_SUSPEND | PORT_RESUME); ehci_hub_control()
1045 ehci_writel(ehci, temp, status_reg); ehci_hub_control()
1054 temp = ehci_readl(ehci, status_reg); ehci_hub_control()
1062 ehci_writel(ehci, temp & ~(PORT_RWC_BITS | PORT_RESET), ehci_hub_control()
1076 temp = check_reset_complete (ehci, wIndex, status_reg, ehci_hub_control()
1081 if ((temp & PORT_CONNECT) && ehci_hub_control()
1083 temp &= ~PORT_RWC_BITS; ehci_hub_control()
1084 temp |= PORT_OWNER; ehci_hub_control()
1085 ehci_writel(ehci, temp, status_reg); ehci_hub_control()
1087 temp = ehci_readl(ehci, status_reg); ehci_hub_control()
1096 if (temp & PORT_CONNECT) { ehci_hub_control()
1103 status |= ehci_port_speed(ehci, temp); ehci_hub_control()
1105 if (temp & PORT_PE) ehci_hub_control()
1109 if (temp & (PORT_SUSPEND|PORT_RESUME)) { ehci_hub_control()
1115 if (temp & PORT_PE) ehci_hub_control()
1120 if (temp & PORT_OC) ehci_hub_control()
1122 if (temp & PORT_RESET) ehci_hub_control()
1124 if (temp & PORT_POWER) ehci_hub_control()
1130 dbg_port(ehci, "GetStatus", wIndex + 1, temp); ehci_hub_control()
1158 temp = ehci_readl(ehci, status_reg); ehci_hub_control()
1159 if (temp & PORT_OWNER) ehci_hub_control()
1162 temp &= ~PORT_RWC_BITS; ehci_hub_control()
1167 if ((temp & PORT_PE) == 0 ehci_hub_control()
1168 || (temp & PORT_RESET) != 0) ehci_hub_control()
1175 temp &= ~PORT_WKCONN_E; ehci_hub_control()
1176 temp |= PORT_WKDISC_E | PORT_WKOC_E; ehci_hub_control()
1177 ehci_writel(ehci, temp | PORT_SUSPEND, status_reg); ehci_hub_control()
1200 if (temp & (PORT_SUSPEND|PORT_RESUME)) ehci_hub_control()
1206 if ((temp & (PORT_PE|PORT_CONNECT)) == PORT_CONNECT ehci_hub_control()
1208 && PORT_USB11 (temp)) { ehci_hub_control()
1212 temp |= PORT_OWNER; ehci_hub_control()
1214 temp |= PORT_RESET; ehci_hub_control()
1215 temp &= ~PORT_PE; ehci_hub_control()
1224 ehci_writel(ehci, temp, status_reg); ehci_hub_control()
1254 temp = ehci_readl(ehci, sreg) & ~PORT_RWC_BITS; ehci_hub_control()
1255 if (temp & PORT_PE) ehci_hub_control()
1256 ehci_writel(ehci, temp | PORT_SUSPEND, ehci_hub_control()
1264 temp = ehci_readl(ehci, status_reg); ehci_hub_control()
1265 temp |= selector << 16; ehci_hub_control()
1266 ehci_writel(ehci, temp, status_reg); ehci_hub_control()
1310 u32 temp = ehci_readl(ehci, status_reg) & ~PORT_RWC_BITS; ehci_port_power() local
1313 ehci_writel(ehci, temp | PORT_POWER, status_reg); ehci_port_power()
1315 ehci_writel(ehci, temp & ~PORT_POWER, status_reg); ehci_port_power()
|
| H A D | ohci-hub.c | 20 label, num, temp, \
21 (temp & RH_PS_PRSC) ? " PRSC" : "", \
22 (temp & RH_PS_OCIC) ? " OCIC" : "", \
23 (temp & RH_PS_PSSC) ? " PSSC" : "", \
24 (temp & RH_PS_PESC) ? " PESC" : "", \
25 (temp & RH_PS_CSC) ? " CSC" : "", \
27 (temp & RH_PS_LSDA) ? " LSDA" : "", \
28 (temp & RH_PS_PPS) ? " PPS" : "", \
29 (temp & RH_PS_PRS) ? " PRS" : "", \
30 (temp & RH_PS_POCI) ? " POCI" : "", \
31 (temp & RH_PS_PSS) ? " PSS" : "", \
33 (temp & RH_PS_PES) ? " PES" : "", \
34 (temp & RH_PS_CCS) ? " CCS" : "" \
101 unsigned temp; variable
104 temp = ohci_readl(ohci, portstat);
105 if ((temp & (RH_PS_PES | RH_PS_PSS)) ==
153 u32 temp, enables; variable
214 temp = ohci_readl (ohci, &ohci->regs->control);
215 temp &= OHCI_CTRL_HCFS;
216 if (temp != OHCI_USB_RESUME) {
250 temp = ohci->hc_control;
251 temp &= OHCI_CTRL_RWC;
252 temp |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
253 ohci->hc_control = temp;
254 ohci_writel (ohci, temp, &ohci->regs->control);
269 temp = 0;
276 temp |= OHCI_CLF;
282 temp |= OHCI_BLF;
291 if (temp)
292 ohci_writel (ohci, temp, &ohci->regs->cmdstatus);
537 u16 temp; ohci_hub_descriptor() local
544 temp = 1 + (ohci->num_ports / 8); ohci_hub_descriptor()
545 desc->bDescLength = 7 + 2 * temp; ohci_hub_descriptor()
547 temp = HUB_CHAR_COMMON_LPSM | HUB_CHAR_COMMON_OCPM; ohci_hub_descriptor()
549 temp |= HUB_CHAR_NO_LPSM; ohci_hub_descriptor()
551 temp |= HUB_CHAR_INDV_PORT_LPSM; ohci_hub_descriptor()
553 temp |= HUB_CHAR_NO_OCPM; ohci_hub_descriptor()
555 temp |= HUB_CHAR_INDV_PORT_OCPM; ohci_hub_descriptor()
556 desc->wHubCharacteristics = cpu_to_le16(temp); ohci_hub_descriptor()
617 u32 temp = 0; root_port_reset() local
632 temp = ohci_readl (ohci, portstat); root_port_reset()
634 if (temp == ~(u32)0) root_port_reset()
636 if (!(temp & RH_PS_PRS)) root_port_reset()
648 port, temp); root_port_reset()
652 if (!(temp & RH_PS_CCS)) root_port_reset()
654 if (temp & RH_PS_PRSC) root_port_reset()
680 u32 temp; ohci_hub_control() local
705 temp = RH_PS_CCS; ohci_hub_control()
708 temp = RH_PS_PESC; ohci_hub_control()
711 temp = RH_PS_POCI; ohci_hub_control()
714 temp = RH_PS_PSSC; ohci_hub_control()
717 temp = RH_PS_LSDA; ohci_hub_control()
720 temp = RH_PS_CSC; ohci_hub_control()
723 temp = RH_PS_OCIC; ohci_hub_control()
726 temp = RH_PS_PRSC; ohci_hub_control()
731 ohci_writel (ohci, temp, ohci_hub_control()
739 temp = roothub_status (ohci) & ~(RH_HS_CRWE | RH_HS_DRWE); ohci_hub_control()
740 put_unaligned_le32(temp, buf); ohci_hub_control()
746 temp = roothub_portstatus (ohci, wIndex); ohci_hub_control()
747 put_unaligned_le32(temp, buf); ohci_hub_control()
750 dbg_port(ohci, "GetStatus", wIndex, temp); ohci_hub_control()
|
| H A D | ehci-tegra.c | 124 u32 temp; tegra_ehci_internal_port_reset() local
141 temp = ehci_readl(ehci, portsc_reg); tegra_ehci_internal_port_reset()
142 temp |= PORT_RESET; tegra_ehci_internal_port_reset()
143 ehci_writel(ehci, temp, portsc_reg); tegra_ehci_internal_port_reset()
145 temp &= ~PORT_RESET; tegra_ehci_internal_port_reset()
146 ehci_writel(ehci, temp, portsc_reg); tegra_ehci_internal_port_reset()
157 temp = ehci_readl(ehci, portsc_reg); tegra_ehci_internal_port_reset()
158 } while (!(temp & PORT_PE) && tries--); tegra_ehci_internal_port_reset()
159 if (temp & PORT_PE) tegra_ehci_internal_port_reset()
169 if (temp & PORT_CSC) tegra_ehci_internal_port_reset()
176 temp = ehci_readl(ehci, &ehci->regs->status); tegra_ehci_internal_port_reset()
177 ehci_writel(ehci, temp, &ehci->regs->status); tegra_ehci_internal_port_reset()
196 u32 temp; tegra_ehci_hub_control() local
205 temp = ehci_readl(ehci, status_reg); tegra_ehci_hub_control()
206 if (tegra->port_resuming && !(temp & PORT_SUSPEND)) { tegra_ehci_hub_control()
214 temp = ehci_readl(ehci, status_reg); tegra_ehci_hub_control()
215 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) { tegra_ehci_hub_control()
220 temp &= ~(PORT_RWC_BITS | PORT_WKCONN_E); tegra_ehci_hub_control()
221 temp |= PORT_WKDISC_E | PORT_WKOC_E; tegra_ehci_hub_control()
222 ehci_writel(ehci, temp | PORT_SUSPEND, status_reg); tegra_ehci_hub_control()
252 temp = ehci_readl(ehci, status_reg); tegra_ehci_hub_control()
253 if ((temp & PORT_RESET) || !(temp & PORT_PE)) { tegra_ehci_hub_control()
258 if (!(temp & PORT_SUSPEND)) tegra_ehci_hub_control()
266 temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS); tegra_ehci_hub_control()
268 ehci_writel(ehci, temp | PORT_RESUME, status_reg); tegra_ehci_hub_control()
306 struct dma_aligned_buffer *temp; free_dma_aligned_buffer() local
311 temp = container_of(urb->transfer_buffer, free_dma_aligned_buffer()
315 memcpy(temp->old_xfer_buffer, temp->data, free_dma_aligned_buffer()
317 urb->transfer_buffer = temp->old_xfer_buffer; free_dma_aligned_buffer()
318 kfree(temp->kmalloc_ptr); free_dma_aligned_buffer()
325 struct dma_aligned_buffer *temp, *kmalloc_ptr; alloc_dma_aligned_buffer() local
342 temp = PTR_ALIGN(kmalloc_ptr + 1, TEGRA_USB_DMA_ALIGN) - 1; alloc_dma_aligned_buffer()
343 temp->kmalloc_ptr = kmalloc_ptr; alloc_dma_aligned_buffer()
344 temp->old_xfer_buffer = urb->transfer_buffer; alloc_dma_aligned_buffer()
346 memcpy(temp->data, urb->transfer_buffer, alloc_dma_aligned_buffer()
348 urb->transfer_buffer = temp->data; alloc_dma_aligned_buffer()
|
| H A D | ehci-pci.c | 104 u32 temp; ehci_pci_setup() local
235 temp = pci_find_capability(pdev, PCI_CAP_ID_DBG); ehci_pci_setup()
236 if (temp) { ehci_pci_setup()
237 pci_read_config_dword(pdev, temp, &temp); ehci_pci_setup()
238 temp >>= 16; ehci_pci_setup()
239 if (((temp >> 13) & 7) == 1) { ehci_pci_setup()
243 temp &= 0x1fff; ehci_pci_setup()
244 ehci->debug = hcd->regs + temp; ehci_pci_setup()
245 temp = ehci_readl(ehci, &ehci->debug->control); ehci_pci_setup()
248 (temp & DBGP_ENABLED) ? " IN USE" : ""); ehci_pci_setup()
249 if (!(temp & DBGP_ENABLED)) ehci_pci_setup()
283 temp = HCS_N_CC(ehci->hcs_params) * HCS_N_PCC(ehci->hcs_params); ehci_pci_setup()
284 temp &= 0x0f; ehci_pci_setup()
285 if (temp && HCS_N_PORTS(ehci->hcs_params) > temp) { ehci_pci_setup()
295 temp |= (ehci->hcs_params & ~0xf); ehci_pci_setup()
296 ehci->hcs_params = temp; ehci_pci_setup()
|
| H A D | ohci-da8xx.c | 175 int temp; ohci_da8xx_hub_control() local
185 temp = roothub_portstatus(hcd_to_ohci(hcd), wIndex - 1); ohci_da8xx_hub_control()
189 temp &= ~RH_PS_PPS; ohci_da8xx_hub_control()
193 temp |= RH_PS_POCI; ohci_da8xx_hub_control()
197 temp |= RH_PS_OCIC; ohci_da8xx_hub_control()
199 put_unaligned(cpu_to_le32(temp), (__le32 *)buf); ohci_da8xx_hub_control()
202 temp = 1; ohci_da8xx_hub_control()
205 temp = 0; ohci_da8xx_hub_control()
215 temp ? "Set" : "Clear", wIndex, "POWER"); ohci_da8xx_hub_control()
220 return hub->set_power(wIndex, temp) ? -EPIPE : 0; ohci_da8xx_hub_control()
223 temp ? "Set" : "Clear", wIndex, ohci_da8xx_hub_control()
226 if (temp) ohci_da8xx_hub_control()
|
| /linux-4.1.27/drivers/media/usb/cx231xx/ |
| H A D | cx231xx-417.c | 371 u32 temp; mc417_register_write() local
374 temp = 0x82 | MCI_REGISTER_DATA_BYTE0 | ((value & 0x000000FF) << 8); mc417_register_write()
375 temp = temp << 10; mc417_register_write()
376 status = set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_register_write()
379 temp = temp | (0x05 << 10); mc417_register_write()
380 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_register_write()
383 temp = 0x82 | MCI_REGISTER_DATA_BYTE1 | (value & 0x0000FF00); mc417_register_write()
384 temp = temp << 10; mc417_register_write()
385 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_register_write()
386 temp = temp | (0x05 << 10); mc417_register_write()
387 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_register_write()
390 temp = 0x82 | MCI_REGISTER_DATA_BYTE2 | ((value & 0x00FF0000) >> 8); mc417_register_write()
391 temp = temp << 10; mc417_register_write()
392 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_register_write()
393 temp = temp | (0x05 << 10); mc417_register_write()
394 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_register_write()
397 temp = 0x82 | MCI_REGISTER_DATA_BYTE3 | ((value & 0xFF000000) >> 16); mc417_register_write()
398 temp = temp << 10; mc417_register_write()
399 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_register_write()
400 temp = temp | (0x05 << 10); mc417_register_write()
401 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_register_write()
404 temp = 0x82 | MCI_REGISTER_ADDRESS_BYTE0 | ((address & 0x000000FF) << 8); mc417_register_write()
405 temp = temp << 10; mc417_register_write()
406 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_register_write()
407 temp = temp | (0x05 << 10); mc417_register_write()
408 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_register_write()
411 temp = 0x82 | MCI_REGISTER_ADDRESS_BYTE1 | (address & 0x0000FF00); mc417_register_write()
412 temp = temp << 10; mc417_register_write()
413 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_register_write()
414 temp = temp | (0x05 << 10); mc417_register_write()
415 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_register_write()
418 temp = 0x82 | MCI_REGISTER_MODE | MCI_MODE_REGISTER_WRITE; mc417_register_write()
419 temp = temp << 10; mc417_register_write()
420 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_register_write()
421 temp = temp | (0x05 << 10); mc417_register_write()
422 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_register_write()
430 u32 temp; mc417_register_read() local
434 temp = 0x82 | MCI_REGISTER_ADDRESS_BYTE0 | ((address & 0x00FF) << 8); mc417_register_read()
435 temp = temp << 10; mc417_register_read()
436 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_register_read()
437 temp = temp | ((0x05) << 10); mc417_register_read()
438 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_register_read()
441 temp = 0x82 | MCI_REGISTER_ADDRESS_BYTE1 | (address & 0xFF00); mc417_register_read()
442 temp = temp << 10; mc417_register_read()
443 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_register_read()
444 temp = temp | ((0x05) << 10); mc417_register_read()
445 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_register_read()
448 temp = 0x82 | MCI_REGISTER_MODE | MCI_MODE_REGISTER_READ; mc417_register_read()
449 temp = temp << 10; mc417_register_read()
450 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_register_read()
451 temp = temp | ((0x05) << 10); mc417_register_read()
452 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_register_read()
461 temp = (0x82 | MCI_REGISTER_DATA_BYTE0) << 10; mc417_register_read()
462 set_itvc_reg(dev, ITVC_READ_DIR, temp); mc417_register_read()
463 temp = ((0x81 | MCI_REGISTER_DATA_BYTE0) << 10); mc417_register_read()
464 set_itvc_reg(dev, ITVC_READ_DIR, temp); mc417_register_read()
465 get_itvc_reg(dev, ITVC_READ_DIR, &temp); mc417_register_read()
466 return_value |= ((temp & 0x03FC0000) >> 18); mc417_register_read()
470 temp = (0x82 | MCI_REGISTER_DATA_BYTE1) << 10; mc417_register_read()
471 set_itvc_reg(dev, ITVC_READ_DIR, temp); mc417_register_read()
472 temp = ((0x81 | MCI_REGISTER_DATA_BYTE1) << 10); mc417_register_read()
473 set_itvc_reg(dev, ITVC_READ_DIR, temp); mc417_register_read()
474 get_itvc_reg(dev, ITVC_READ_DIR, &temp); mc417_register_read()
476 return_value |= ((temp & 0x03FC0000) >> 10); mc417_register_read()
480 temp = (0x82 | MCI_REGISTER_DATA_BYTE2) << 10; mc417_register_read()
481 set_itvc_reg(dev, ITVC_READ_DIR, temp); mc417_register_read()
482 temp = ((0x81 | MCI_REGISTER_DATA_BYTE2) << 10); mc417_register_read()
483 set_itvc_reg(dev, ITVC_READ_DIR, temp); mc417_register_read()
484 get_itvc_reg(dev, ITVC_READ_DIR, &temp); mc417_register_read()
485 return_value |= ((temp & 0x03FC0000) >> 2); mc417_register_read()
489 temp = (0x82 | MCI_REGISTER_DATA_BYTE3) << 10; mc417_register_read()
490 set_itvc_reg(dev, ITVC_READ_DIR, temp); mc417_register_read()
491 temp = ((0x81 | MCI_REGISTER_DATA_BYTE3) << 10); mc417_register_read()
492 set_itvc_reg(dev, ITVC_READ_DIR, temp); mc417_register_read()
493 get_itvc_reg(dev, ITVC_READ_DIR, &temp); mc417_register_read()
494 return_value |= ((temp & 0x03FC0000) << 6); mc417_register_read()
505 u32 temp; mc417_memory_write() local
508 temp = 0x82 | MCI_MEMORY_DATA_BYTE0 | ((value & 0x000000FF) << 8); mc417_memory_write()
509 temp = temp << 10; mc417_memory_write()
510 ret = set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_memory_write()
513 temp = temp | (0x05 << 10); mc417_memory_write()
514 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_memory_write()
517 temp = 0x82 | MCI_MEMORY_DATA_BYTE1 | (value & 0x0000FF00); mc417_memory_write()
518 temp = temp << 10; mc417_memory_write()
519 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_memory_write()
520 temp = temp | (0x05 << 10); mc417_memory_write()
521 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_memory_write()
524 temp = 0x82 | MCI_MEMORY_DATA_BYTE2 | ((value & 0x00FF0000) >> 8); mc417_memory_write()
525 temp = temp << 10; mc417_memory_write()
526 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_memory_write()
527 temp = temp | (0x05 << 10); mc417_memory_write()
528 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_memory_write()
531 temp = 0x82 | MCI_MEMORY_DATA_BYTE3 | ((value & 0xFF000000) >> 16); mc417_memory_write()
532 temp = temp << 10; mc417_memory_write()
533 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_memory_write()
534 temp = temp | (0x05 << 10); mc417_memory_write()
535 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_memory_write()
538 temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE2 | MCI_MODE_MEMORY_WRITE | mc417_memory_write()
540 temp = temp << 10; mc417_memory_write()
541 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_memory_write()
542 temp = temp | (0x05 << 10); mc417_memory_write()
543 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_memory_write()
546 temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE1 | (address & 0xFF00); mc417_memory_write()
547 temp = temp << 10; mc417_memory_write()
548 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_memory_write()
549 temp = temp | (0x05 << 10); mc417_memory_write()
550 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_memory_write()
553 temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE0 | ((address & 0x00FF) << 8); mc417_memory_write()
554 temp = temp << 10; mc417_memory_write()
555 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_memory_write()
556 temp = temp | (0x05 << 10); mc417_memory_write()
557 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_memory_write()
567 u32 temp = 0; mc417_memory_read() local
572 temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE2 | MCI_MODE_MEMORY_READ | mc417_memory_read()
574 temp = temp << 10; mc417_memory_read()
575 ret = set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_memory_read()
578 temp = temp | (0x05 << 10); mc417_memory_read()
579 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_memory_read()
582 temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE1 | (address & 0xFF00); mc417_memory_read()
583 temp = temp << 10; mc417_memory_read()
584 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_memory_read()
585 temp = temp | (0x05 << 10); mc417_memory_read()
586 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_memory_read()
589 temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE0 | ((address & 0x00FF) << 8); mc417_memory_read()
590 temp = temp << 10; mc417_memory_read()
591 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_memory_read()
592 temp = temp | (0x05 << 10); mc417_memory_read()
593 set_itvc_reg(dev, ITVC_WRITE_DIR, temp); mc417_memory_read()
600 temp = (0x82 | MCI_MEMORY_DATA_BYTE3) << 10; mc417_memory_read()
601 set_itvc_reg(dev, ITVC_READ_DIR, temp); mc417_memory_read()
602 temp = ((0x81 | MCI_MEMORY_DATA_BYTE3) << 10); mc417_memory_read()
603 set_itvc_reg(dev, ITVC_READ_DIR, temp); mc417_memory_read()
604 get_itvc_reg(dev, ITVC_READ_DIR, &temp); mc417_memory_read()
605 return_value |= ((temp & 0x03FC0000) << 6); mc417_memory_read()
609 temp = (0x82 | MCI_MEMORY_DATA_BYTE2) << 10; mc417_memory_read()
610 set_itvc_reg(dev, ITVC_READ_DIR, temp); mc417_memory_read()
611 temp = ((0x81 | MCI_MEMORY_DATA_BYTE2) << 10); mc417_memory_read()
612 set_itvc_reg(dev, ITVC_READ_DIR, temp); mc417_memory_read()
613 get_itvc_reg(dev, ITVC_READ_DIR, &temp); mc417_memory_read()
614 return_value |= ((temp & 0x03FC0000) >> 2); mc417_memory_read()
618 temp = (0x82 | MCI_MEMORY_DATA_BYTE1) << 10; mc417_memory_read()
619 set_itvc_reg(dev, ITVC_READ_DIR, temp); mc417_memory_read()
620 temp = ((0x81 | MCI_MEMORY_DATA_BYTE1) << 10); mc417_memory_read()
621 set_itvc_reg(dev, ITVC_READ_DIR, temp); mc417_memory_read()
622 get_itvc_reg(dev, ITVC_READ_DIR, &temp); mc417_memory_read()
623 return_value |= ((temp & 0x03FC0000) >> 10); mc417_memory_read()
627 temp = (0x82 | MCI_MEMORY_DATA_BYTE0) << 10; mc417_memory_read()
628 set_itvc_reg(dev, ITVC_READ_DIR, temp); mc417_memory_read()
629 temp = ((0x81 | MCI_MEMORY_DATA_BYTE0) << 10); mc417_memory_read()
630 set_itvc_reg(dev, ITVC_READ_DIR, temp); mc417_memory_read()
631 get_itvc_reg(dev, ITVC_READ_DIR, &temp); mc417_memory_read()
632 return_value |= ((temp & 0x03FC0000) >> 18); mc417_memory_read()
865 u32 temp = 0; mci_write_memory_to_gpio() local
868 temp = 0x82 | MCI_MEMORY_DATA_BYTE0 | ((value & 0x000000FF) << 8); mci_write_memory_to_gpio()
869 temp = temp << 10; mci_write_memory_to_gpio()
870 *p_fw_image = temp; mci_write_memory_to_gpio()
872 temp = temp | (0x05 << 10); mci_write_memory_to_gpio()
873 *p_fw_image = temp; mci_write_memory_to_gpio()
877 temp = 0x82 | MCI_MEMORY_DATA_BYTE1 | (value & 0x0000FF00); mci_write_memory_to_gpio()
878 temp = temp << 10; mci_write_memory_to_gpio()
879 *p_fw_image = temp; mci_write_memory_to_gpio()
881 temp = temp | (0x05 << 10); mci_write_memory_to_gpio()
882 *p_fw_image = temp; mci_write_memory_to_gpio()
886 temp = 0x82 | MCI_MEMORY_DATA_BYTE2 | ((value & 0x00FF0000) >> 8); mci_write_memory_to_gpio()
887 temp = temp << 10; mci_write_memory_to_gpio()
888 *p_fw_image = temp; mci_write_memory_to_gpio()
890 temp = temp | (0x05 << 10); mci_write_memory_to_gpio()
891 *p_fw_image = temp; mci_write_memory_to_gpio()
895 temp = 0x82 | MCI_MEMORY_DATA_BYTE3 | ((value & 0xFF000000) >> 16); mci_write_memory_to_gpio()
896 temp = temp << 10; mci_write_memory_to_gpio()
897 *p_fw_image = temp; mci_write_memory_to_gpio()
899 temp = temp | (0x05 << 10); mci_write_memory_to_gpio()
900 *p_fw_image = temp; mci_write_memory_to_gpio()
904 temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE2 | MCI_MODE_MEMORY_WRITE | mci_write_memory_to_gpio()
906 temp = temp << 10; mci_write_memory_to_gpio()
907 *p_fw_image = temp; mci_write_memory_to_gpio()
909 temp = temp | (0x05 << 10); mci_write_memory_to_gpio()
910 *p_fw_image = temp; mci_write_memory_to_gpio()
914 temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE1 | (address & 0xFF00); mci_write_memory_to_gpio()
915 temp = temp << 10; mci_write_memory_to_gpio()
916 *p_fw_image = temp; mci_write_memory_to_gpio()
918 temp = temp | (0x05 << 10); mci_write_memory_to_gpio()
919 *p_fw_image = temp; mci_write_memory_to_gpio()
923 temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE0 | ((address & 0x00FF) << 8); mci_write_memory_to_gpio()
924 temp = temp << 10; mci_write_memory_to_gpio()
925 *p_fw_image = temp; mci_write_memory_to_gpio()
927 temp = temp | (0x05 << 10); mci_write_memory_to_gpio()
928 *p_fw_image = temp; mci_write_memory_to_gpio()
|
| /linux-4.1.27/fs/jffs2/ |
| H A D | summary.c | 118 struct jffs2_sum_inode_mem *temp = kmalloc(sizeof(struct jffs2_sum_inode_mem), GFP_KERNEL); jffs2_sum_add_inode_mem() local
120 if (!temp) jffs2_sum_add_inode_mem()
123 temp->nodetype = ri->nodetype; jffs2_sum_add_inode_mem()
124 temp->inode = ri->ino; jffs2_sum_add_inode_mem()
125 temp->version = ri->version; jffs2_sum_add_inode_mem()
126 temp->offset = cpu_to_je32(ofs); /* relative offset from the beginning of the jeb */ jffs2_sum_add_inode_mem()
127 temp->totlen = ri->totlen; jffs2_sum_add_inode_mem()
128 temp->next = NULL; jffs2_sum_add_inode_mem()
130 return jffs2_sum_add_mem(s, (union jffs2_sum_mem *)temp); jffs2_sum_add_inode_mem()
136 struct jffs2_sum_dirent_mem *temp = jffs2_sum_add_dirent_mem() local
139 if (!temp) jffs2_sum_add_dirent_mem()
142 temp->nodetype = rd->nodetype; jffs2_sum_add_dirent_mem()
143 temp->totlen = rd->totlen; jffs2_sum_add_dirent_mem()
144 temp->offset = cpu_to_je32(ofs); /* relative from the beginning of the jeb */ jffs2_sum_add_dirent_mem()
145 temp->pino = rd->pino; jffs2_sum_add_dirent_mem()
146 temp->version = rd->version; jffs2_sum_add_dirent_mem()
147 temp->ino = rd->ino; jffs2_sum_add_dirent_mem()
148 temp->nsize = rd->nsize; jffs2_sum_add_dirent_mem()
149 temp->type = rd->type; jffs2_sum_add_dirent_mem()
150 temp->next = NULL; jffs2_sum_add_dirent_mem()
152 memcpy(temp->name, rd->name, rd->nsize); jffs2_sum_add_dirent_mem()
154 return jffs2_sum_add_mem(s, (union jffs2_sum_mem *)temp); jffs2_sum_add_dirent_mem()
160 struct jffs2_sum_xattr_mem *temp; jffs2_sum_add_xattr_mem() local
162 temp = kmalloc(sizeof(struct jffs2_sum_xattr_mem), GFP_KERNEL); jffs2_sum_add_xattr_mem()
163 if (!temp) jffs2_sum_add_xattr_mem()
166 temp->nodetype = rx->nodetype; jffs2_sum_add_xattr_mem()
167 temp->xid = rx->xid; jffs2_sum_add_xattr_mem()
168 temp->version = rx->version; jffs2_sum_add_xattr_mem()
169 temp->offset = cpu_to_je32(ofs); jffs2_sum_add_xattr_mem()
170 temp->totlen = rx->totlen; jffs2_sum_add_xattr_mem()
171 temp->next = NULL; jffs2_sum_add_xattr_mem()
173 return jffs2_sum_add_mem(s, (union jffs2_sum_mem *)temp); jffs2_sum_add_xattr_mem()
178 struct jffs2_sum_xref_mem *temp; jffs2_sum_add_xref_mem() local
180 temp = kmalloc(sizeof(struct jffs2_sum_xref_mem), GFP_KERNEL); jffs2_sum_add_xref_mem()
181 if (!temp) jffs2_sum_add_xref_mem()
184 temp->nodetype = rr->nodetype; jffs2_sum_add_xref_mem()
185 temp->offset = cpu_to_je32(ofs); jffs2_sum_add_xref_mem()
186 temp->next = NULL; jffs2_sum_add_xref_mem()
188 return jffs2_sum_add_mem(s, (union jffs2_sum_mem *)temp); jffs2_sum_add_xref_mem()
195 union jffs2_sum_mem *temp; jffs2_sum_clean_collected() local
201 temp = s->sum_list_head; jffs2_sum_clean_collected()
203 kfree(temp); jffs2_sum_clean_collected()
265 struct jffs2_sum_inode_mem *temp = jffs2_sum_add_kvec() local
268 if (!temp) jffs2_sum_add_kvec()
271 temp->nodetype = node->i.nodetype; jffs2_sum_add_kvec()
272 temp->inode = node->i.ino; jffs2_sum_add_kvec()
273 temp->version = node->i.version; jffs2_sum_add_kvec()
274 temp->offset = cpu_to_je32(ofs); jffs2_sum_add_kvec()
275 temp->totlen = node->i.totlen; jffs2_sum_add_kvec()
276 temp->next = NULL; jffs2_sum_add_kvec()
278 return jffs2_sum_add_mem(c->summary, (union jffs2_sum_mem *)temp); jffs2_sum_add_kvec()
282 struct jffs2_sum_dirent_mem *temp = jffs2_sum_add_kvec() local
285 if (!temp) jffs2_sum_add_kvec()
288 temp->nodetype = node->d.nodetype; jffs2_sum_add_kvec()
289 temp->totlen = node->d.totlen; jffs2_sum_add_kvec()
290 temp->offset = cpu_to_je32(ofs); jffs2_sum_add_kvec()
291 temp->pino = node->d.pino; jffs2_sum_add_kvec()
292 temp->version = node->d.version; jffs2_sum_add_kvec()
293 temp->ino = node->d.ino; jffs2_sum_add_kvec()
294 temp->nsize = node->d.nsize; jffs2_sum_add_kvec()
295 temp->type = node->d.type; jffs2_sum_add_kvec()
296 temp->next = NULL; jffs2_sum_add_kvec()
300 memcpy(temp->name,node->d.name,node->d.nsize); jffs2_sum_add_kvec()
304 memcpy(temp->name,invecs[1].iov_base,node->d.nsize); jffs2_sum_add_kvec()
312 return jffs2_sum_add_mem(c->summary, (union jffs2_sum_mem *)temp); jffs2_sum_add_kvec()
316 struct jffs2_sum_xattr_mem *temp; jffs2_sum_add_kvec() local
317 temp = kmalloc(sizeof(struct jffs2_sum_xattr_mem), GFP_KERNEL); jffs2_sum_add_kvec()
318 if (!temp) jffs2_sum_add_kvec()
321 temp->nodetype = node->x.nodetype; jffs2_sum_add_kvec()
322 temp->xid = node->x.xid; jffs2_sum_add_kvec()
323 temp->version = node->x.version; jffs2_sum_add_kvec()
324 temp->totlen = node->x.totlen; jffs2_sum_add_kvec()
325 temp->offset = cpu_to_je32(ofs); jffs2_sum_add_kvec()
326 temp->next = NULL; jffs2_sum_add_kvec()
328 return jffs2_sum_add_mem(c->summary, (union jffs2_sum_mem *)temp); jffs2_sum_add_kvec()
331 struct jffs2_sum_xref_mem *temp; jffs2_sum_add_kvec() local
332 temp = kmalloc(sizeof(struct jffs2_sum_xref_mem), GFP_KERNEL); jffs2_sum_add_kvec()
333 if (!temp) jffs2_sum_add_kvec()
335 temp->nodetype = node->r.nodetype; jffs2_sum_add_kvec()
336 temp->offset = cpu_to_je32(ofs); jffs2_sum_add_kvec()
337 temp->next = NULL; jffs2_sum_add_kvec()
339 return jffs2_sum_add_mem(c->summary, (union jffs2_sum_mem *)temp); jffs2_sum_add_kvec()
678 union jffs2_sum_mem *temp; jffs2_sum_write_data() local
719 temp = c->summary->sum_list_head; jffs2_sum_write_data()
721 switch (je16_to_cpu(temp->u.nodetype)) { jffs2_sum_write_data()
725 sino_ptr->nodetype = temp->i.nodetype; jffs2_sum_write_data()
726 sino_ptr->inode = temp->i.inode; jffs2_sum_write_data()
727 sino_ptr->version = temp->i.version; jffs2_sum_write_data()
728 sino_ptr->offset = temp->i.offset; jffs2_sum_write_data()
729 sino_ptr->totlen = temp->i.totlen; jffs2_sum_write_data()
739 sdrnt_ptr->nodetype = temp->d.nodetype; jffs2_sum_write_data()
740 sdrnt_ptr->totlen = temp->d.totlen; jffs2_sum_write_data()
741 sdrnt_ptr->offset = temp->d.offset; jffs2_sum_write_data()
742 sdrnt_ptr->pino = temp->d.pino; jffs2_sum_write_data()
743 sdrnt_ptr->version = temp->d.version; jffs2_sum_write_data()
744 sdrnt_ptr->ino = temp->d.ino; jffs2_sum_write_data()
745 sdrnt_ptr->nsize = temp->d.nsize; jffs2_sum_write_data()
746 sdrnt_ptr->type = temp->d.type; jffs2_sum_write_data()
748 memcpy(sdrnt_ptr->name, temp->d.name, jffs2_sum_write_data()
749 temp->d.nsize); jffs2_sum_write_data()
751 wpage += JFFS2_SUMMARY_DIRENT_SIZE(temp->d.nsize); jffs2_sum_write_data()
759 temp = c->summary->sum_list_head; jffs2_sum_write_data()
760 sxattr_ptr->nodetype = temp->x.nodetype; jffs2_sum_write_data()
761 sxattr_ptr->xid = temp->x.xid; jffs2_sum_write_data()
762 sxattr_ptr->version = temp->x.version; jffs2_sum_write_data()
763 sxattr_ptr->offset = temp->x.offset; jffs2_sum_write_data()
764 sxattr_ptr->totlen = temp->x.totlen; jffs2_sum_write_data()
772 temp = c->summary->sum_list_head; jffs2_sum_write_data()
773 sxref_ptr->nodetype = temp->r.nodetype; jffs2_sum_write_data()
774 sxref_ptr->offset = temp->r.offset; jffs2_sum_write_data()
781 if ((je16_to_cpu(temp->u.nodetype) & JFFS2_COMPAT_MASK) jffs2_sum_write_data()
784 je16_to_cpu(temp->u.nodetype)); jffs2_sum_write_data()
792 c->summary->sum_list_head = temp->u.next; jffs2_sum_write_data()
793 kfree(temp); jffs2_sum_write_data()
|
| /linux-4.1.27/arch/m68k/lib/ |
| H A D | memset.c | 13 size_t temp; memset() local
32 temp = count >> 2; memset()
33 if (temp) { memset()
36 for (; temp; temp--) memset()
58 : "=a" (ls), "=d" (temp), "=&d" (temp1) memset()
59 : "d" (c), "0" (ls), "1" (temp)); memset()
|
| H A D | memmove.c | 13 size_t temp; memmove() local
35 temp = n >> 2; memmove()
36 if (temp) { memmove()
39 temp--; memmove()
42 while (temp--); memmove()
77 temp = n >> 2; memmove()
78 if (temp) { memmove()
81 temp--; memmove()
84 while (temp--); memmove()
|
| H A D | memcpy.c | 13 size_t temp; memcpy() local
42 temp = n >> 2; memcpy()
43 if (temp) { memcpy()
47 for (; temp; temp--) memcpy()
69 : "=a" (lfrom), "=a" (lto), "=d" (temp), "=&d" (temp1) memcpy()
70 : "0" (lfrom), "1" (lto), "2" (temp)); memcpy()
|
| /linux-4.1.27/drivers/thermal/ |
| H A D | thermal_hwmon.c | 76 struct thermal_hwmon_temp *temp temp_input_show() local
79 struct thermal_zone_device *tz = temp->tz; temp_input_show()
94 struct thermal_hwmon_temp *temp temp_crit_show() local
97 struct thermal_zone_device *tz = temp->tz; temp_crit_show()
130 struct thermal_hwmon_temp *temp; thermal_hwmon_lookup_temp() local
133 list_for_each_entry(temp, &hwmon->tz_list, hwmon_node) thermal_hwmon_lookup_temp()
134 if (temp->tz == tz) { thermal_hwmon_lookup_temp()
136 return temp; thermal_hwmon_lookup_temp()
145 unsigned long temp; thermal_zone_crit_temp_valid() local
146 return tz->ops->get_crit_temp && !tz->ops->get_crit_temp(tz, &temp); thermal_zone_crit_temp_valid()
152 struct thermal_hwmon_temp *temp; thermal_add_hwmon_sysfs() local
179 temp = kzalloc(sizeof(*temp), GFP_KERNEL); thermal_add_hwmon_sysfs()
180 if (!temp) { thermal_add_hwmon_sysfs()
185 temp->tz = tz; thermal_add_hwmon_sysfs()
188 snprintf(temp->temp_input.name, sizeof(temp->temp_input.name), thermal_add_hwmon_sysfs()
189 "temp%d_input", hwmon->count); thermal_add_hwmon_sysfs()
190 temp->temp_input.attr.attr.name = temp->temp_input.name; thermal_add_hwmon_sysfs()
191 temp->temp_input.attr.attr.mode = 0444; thermal_add_hwmon_sysfs()
192 temp->temp_input.attr.show = temp_input_show; thermal_add_hwmon_sysfs()
193 sysfs_attr_init(&temp->temp_input.attr.attr); thermal_add_hwmon_sysfs()
194 result = device_create_file(hwmon->device, &temp->temp_input.attr); thermal_add_hwmon_sysfs()
199 snprintf(temp->temp_crit.name, thermal_add_hwmon_sysfs()
200 sizeof(temp->temp_crit.name), thermal_add_hwmon_sysfs()
201 "temp%d_crit", hwmon->count); thermal_add_hwmon_sysfs()
202 temp->temp_crit.attr.attr.name = temp->temp_crit.name; thermal_add_hwmon_sysfs()
203 temp->temp_crit.attr.attr.mode = 0444; thermal_add_hwmon_sysfs()
204 temp->temp_crit.attr.show = temp_crit_show; thermal_add_hwmon_sysfs()
205 sysfs_attr_init(&temp->temp_crit.attr.attr); thermal_add_hwmon_sysfs()
207 &temp->temp_crit.attr); thermal_add_hwmon_sysfs()
215 list_add_tail(&temp->hwmon_node, &hwmon->tz_list); thermal_add_hwmon_sysfs()
221 device_remove_file(hwmon->device, &temp->temp_input.attr); thermal_add_hwmon_sysfs()
223 kfree(temp); thermal_add_hwmon_sysfs()
239 struct thermal_hwmon_temp *temp; thermal_remove_hwmon_sysfs() local
248 temp = thermal_hwmon_lookup_temp(hwmon, tz); thermal_remove_hwmon_sysfs()
249 if (unlikely(!temp)) { thermal_remove_hwmon_sysfs()
255 device_remove_file(hwmon->device, &temp->temp_input.attr); thermal_remove_hwmon_sysfs()
257 device_remove_file(hwmon->device, &temp->temp_crit.attr); thermal_remove_hwmon_sysfs()
260 list_del(&temp->hwmon_node); thermal_remove_hwmon_sysfs()
261 kfree(temp); thermal_remove_hwmon_sysfs()
|
| H A D | rockchip_thermal.c | 67 int (*get_temp)(int chn, void __iomem *reg, long *temp);
68 void (*set_tshut_temp)(int chn, void __iomem *reg, long temp);
128 long temp; member in struct:tsadc_table
170 static u32 rk_tsadcv2_temp_to_code(long temp) rk_tsadcv2_temp_to_code() argument
178 if (temp < v2_code_table[low].temp || temp > v2_code_table[high].temp) rk_tsadcv2_temp_to_code()
182 if (temp == v2_code_table[mid].temp) rk_tsadcv2_temp_to_code()
184 else if (temp < v2_code_table[mid].temp) rk_tsadcv2_temp_to_code()
223 num = v2_code_table[mid].temp - v2_code_table[mid - 1].temp; rk_tsadcv2_code_to_temp()
226 return v2_code_table[mid - 1].temp + (num / denom); rk_tsadcv2_code_to_temp()
280 static int rk_tsadcv2_get_temp(int chn, void __iomem *regs, long *temp) rk_tsadcv2_get_temp() argument
289 *temp = rk_tsadcv2_code_to_temp(val); rk_tsadcv2_get_temp()
294 static void rk_tsadcv2_tshut_temp(int chn, void __iomem *regs, long temp) rk_tsadcv2_tshut_temp() argument
298 tshut_value = rk_tsadcv2_temp_to_code(temp); rk_tsadcv2_tshut_temp()
377 dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %ld, retval: %d\n", rockchip_thermal_get_temp()
393 if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) { rockchip_configure_from_dt()
395 "Missing tshut temp property, using default %ld\n", rockchip_configure_from_dt()
|
| H A D | db8500_thermal.c | 111 unsigned long *temp) db8500_sys_get_temp()
120 *temp = pzone->cur_temp_pseudo; db8500_sys_get_temp()
183 int trip, unsigned long *temp) db8500_sys_get_trip_temp()
191 *temp = ptrips->trip_points[trip].temp; db8500_sys_get_trip_temp()
198 unsigned long *temp) db8500_sys_get_crit_temp()
206 *temp = ptrips->trip_points[i].temp; db8500_sys_get_crit_temp()
252 next_high = ptrips->trip_points[0].temp; prcmu_low_irq_handler()
255 next_high = ptrips->trip_points[idx-1].temp; prcmu_low_irq_handler()
256 next_low = ptrips->trip_points[idx-2].temp; prcmu_low_irq_handler()
279 next_high = ptrips->trip_points[idx+1].temp; prcmu_high_irq_handler()
280 next_low = ptrips->trip_points[idx].temp; prcmu_high_irq_handler()
289 pzone->cur_temp_pseudo = ptrips->trip_points[idx].temp + 1; prcmu_high_irq_handler()
338 sprintf(prop_name, "trip%d-temp", i); db8500_thermal_parse_dt()
342 ptrips->trip_points[i].temp = tmp_data; db8500_thermal_parse_dt()
430 dev_err(&pdev->dev, "Failed to allocate temp low irq.\n"); db8500_thermal_probe()
445 dev_err(&pdev->dev, "Failed to allocate temp high irq.\n"); db8500_thermal_probe()
460 dft_high = ptrips->trip_points[0].temp; db8500_thermal_probe()
503 dft_high = ptrips->trip_points[0].temp; db8500_thermal_resume()
110 db8500_sys_get_temp(struct thermal_zone_device *thermal, unsigned long *temp) db8500_sys_get_temp() argument
182 db8500_sys_get_trip_temp(struct thermal_zone_device *thermal, int trip, unsigned long *temp) db8500_sys_get_trip_temp() argument
197 db8500_sys_get_crit_temp(struct thermal_zone_device *thermal, unsigned long *temp) db8500_sys_get_crit_temp() argument
|
| H A D | imx_thermal.c | 136 static int imx_get_temp(struct thermal_zone_device *tz, unsigned long *temp) imx_get_temp() argument
161 * According to the temp sensor designers, it may require up to ~17us imx_get_temp()
175 dev_dbg(&tz->device, "temp measurement never finished\n"); imx_get_temp()
182 *temp = data->c2 - n_meas * data->c1; imx_get_temp()
187 *temp >= data->temp_passive) imx_get_temp()
190 *temp < data->temp_passive) { imx_get_temp()
197 if (*temp != data->last_temp) { imx_get_temp()
198 dev_dbg(&tz->device, "millicelsius: %ld\n", *temp); imx_get_temp()
199 data->last_temp = *temp; imx_get_temp()
203 if (!data->irq_enabled && *temp < data->alarm_temp) { imx_get_temp()
266 unsigned long *temp) imx_get_crit_temp()
270 *temp = data->temp_critical; imx_get_crit_temp()
275 unsigned long *temp) imx_get_trip_temp()
279 *temp = (trip == IMX_TRIP_PASSIVE) ? data->temp_passive : imx_get_trip_temp()
285 unsigned long temp) imx_set_trip_temp()
292 if (temp > IMX_TEMP_PASSIVE) imx_set_trip_temp()
295 data->temp_passive = temp; imx_set_trip_temp()
297 imx_set_alarm_temp(data, temp); imx_set_trip_temp()
265 imx_get_crit_temp(struct thermal_zone_device *tz, unsigned long *temp) imx_get_crit_temp() argument
274 imx_get_trip_temp(struct thermal_zone_device *tz, int trip, unsigned long *temp) imx_get_trip_temp() argument
284 imx_set_trip_temp(struct thermal_zone_device *tz, int trip, unsigned long temp) imx_set_trip_temp() argument
|
| H A D | intel_soc_dts_thermal.c | 109 int trip, unsigned long *temp) sys_get_trip_temp()
118 /* Just return the critical temp */ sys_get_trip_temp()
119 *temp = aux_entry->tj_max - crit_offset; sys_get_trip_temp()
133 *temp = 0; sys_get_trip_temp()
135 *temp = aux_entry->tj_max - out * 1000; sys_get_trip_temp()
141 int thres_index, unsigned long temp) update_trip_temp()
154 temp_out = (aux_entry->tj_max - temp) / 1000; update_trip_temp()
186 if (temp) { update_trip_temp()
227 unsigned long temp) sys_set_trip_temp()
232 if (temp > (aux_entry->tj_max - crit_offset)) sys_set_trip_temp()
236 status = update_trip_temp(tzd->devdata, trip, temp); sys_set_trip_temp()
254 unsigned long *temp) sys_get_curr_temp()
269 *temp = aux_entry->tj_max - out * 1000; sys_get_curr_temp()
108 sys_get_trip_temp(struct thermal_zone_device *tzd, int trip, unsigned long *temp) sys_get_trip_temp() argument
140 update_trip_temp(struct soc_sensor_entry *aux_entry, int thres_index, unsigned long temp) update_trip_temp() argument
226 sys_set_trip_temp(struct thermal_zone_device *tzd, int trip, unsigned long temp) sys_set_trip_temp() argument
253 sys_get_curr_temp(struct thermal_zone_device *tzd, unsigned long *temp) sys_get_curr_temp() argument
|
| /linux-4.1.27/arch/microblaze/kernel/cpu/ |
| H A D | cpuinfo-pvr-full.c | 36 u32 temp; /* for saving temp value */ set_cpuinfo_pvr_full() local
45 temp = PVR_USE_BARREL(pvr) | PVR_USE_MSR_INSTR(pvr) | set_cpuinfo_pvr_full()
47 if (ci->use_instr != temp) set_cpuinfo_pvr_full()
49 ci->use_instr = temp; set_cpuinfo_pvr_full()
51 temp = PVR_USE_HW_MUL(pvr) | PVR_USE_MUL64(pvr); set_cpuinfo_pvr_full()
52 if (ci->use_mult != temp) set_cpuinfo_pvr_full()
54 ci->use_mult = temp; set_cpuinfo_pvr_full()
56 temp = PVR_USE_FPU(pvr) | PVR_USE_FPU2(pvr); set_cpuinfo_pvr_full()
57 if (ci->use_fpu != temp) set_cpuinfo_pvr_full()
59 ci->use_fpu = temp; set_cpuinfo_pvr_full()
93 temp = PVR_DCACHE_USE_WRITEBACK(pvr); set_cpuinfo_pvr_full()
94 if (ci->dcache_wb != temp) set_cpuinfo_pvr_full()
96 ci->dcache_wb = temp; set_cpuinfo_pvr_full()
|
| /linux-4.1.27/arch/powerpc/platforms/embedded6xx/ |
| H A D | c2k.c | 71 u32 temp; c2k_reset_board() local
75 temp = in_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_0); c2k_reset_board()
76 temp &= 0xFFFF0FFF; c2k_reset_board()
77 out_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_0, temp); c2k_reset_board()
79 temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL); c2k_reset_board()
80 temp |= 0x00000004; c2k_reset_board()
81 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL, temp); c2k_reset_board()
83 temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL); c2k_reset_board()
84 temp |= 0x00000004; c2k_reset_board()
85 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL, temp); c2k_reset_board()
87 temp = in_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_2); c2k_reset_board()
88 temp &= 0xFFFF0FFF; c2k_reset_board()
89 out_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_2, temp); c2k_reset_board()
91 temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL); c2k_reset_board()
92 temp |= 0x00080000; c2k_reset_board()
93 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL, temp); c2k_reset_board()
95 temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL); c2k_reset_board()
96 temp |= 0x00080000; c2k_reset_board()
97 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL, temp); c2k_reset_board()
|
| /linux-4.1.27/arch/powerpc/boot/ |
| H A D | cuboot-c2k.c | 138 u32 temp; c2k_reset() local
143 temp = in_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_0)); c2k_reset()
144 temp &= 0xFFFF0FFF; c2k_reset()
145 out_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_0), temp); c2k_reset()
147 temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL)); c2k_reset()
148 temp |= 0x00000004; c2k_reset()
149 out_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL), temp); c2k_reset()
151 temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL)); c2k_reset()
152 temp |= 0x00000004; c2k_reset()
153 out_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL), temp); c2k_reset()
155 temp = in_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_2)); c2k_reset()
156 temp &= 0xFFFF0FFF; c2k_reset()
157 out_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_2), temp); c2k_reset()
159 temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL)); c2k_reset()
160 temp |= 0x00080000; c2k_reset()
161 out_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL), temp); c2k_reset()
163 temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL)); c2k_reset()
164 temp |= 0x00080000; c2k_reset()
165 out_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL), temp); c2k_reset()
|
| H A D | prpmc2800.c | 474 u32 temp; prpmc2800_reset() local
479 temp = in_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_0)); prpmc2800_reset()
480 temp &= 0xFFFF0FFF; prpmc2800_reset()
481 out_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_0), temp); prpmc2800_reset()
483 temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL)); prpmc2800_reset()
484 temp |= 0x00000004; prpmc2800_reset()
485 out_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL), temp); prpmc2800_reset()
487 temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL)); prpmc2800_reset()
488 temp |= 0x00000004; prpmc2800_reset()
489 out_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL), temp); prpmc2800_reset()
491 temp = in_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_2)); prpmc2800_reset()
492 temp &= 0xFFFF0FFF; prpmc2800_reset()
493 out_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_2), temp); prpmc2800_reset()
495 temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL)); prpmc2800_reset()
496 temp |= 0x00080000; prpmc2800_reset()
497 out_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL), temp); prpmc2800_reset()
499 temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL)); prpmc2800_reset()
500 temp |= 0x00080000; prpmc2800_reset()
501 out_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL), temp); prpmc2800_reset()
|
| /linux-4.1.27/arch/metag/include/asm/ |
| H A D | atomic_lnkget.h | 20 int temp; atomic_read() local
24 : "=da" (temp) atomic_read()
27 return temp; atomic_read()
33 int temp; \
43 : "=&d" (temp) \
51 int result, temp; \
63 : "=&d" (temp), "=&da" (result) \
83 int temp; atomic_clear_mask() local
93 : "=&d" (temp) atomic_clear_mask()
100 int temp; atomic_set_mask() local
110 : "=&d" (temp) atomic_set_mask()
117 int result, temp; atomic_cmpxchg() local
131 : "=&d" (temp), "=&d" (result) atomic_cmpxchg()
142 int temp, old; atomic_xchg() local
151 : "=&d" (temp), "=&d" (old) atomic_xchg()
160 int result, temp; __atomic_add_unless() local
175 : "=&d" (temp), "=&d" (result) __atomic_add_unless()
186 int result, temp; atomic_sub_if_positive() local
198 : "=&d" (temp), "=&da" (result) atomic_sub_if_positive()
|
| H A D | cmpxchg_lnkget.h | 6 int temp, old; xchg_u32() local
20 : "=&d" (temp), "=&d" (old) xchg_u32()
32 int temp, old; xchg_u8() local
46 : "=&d" (temp), "=&d" (old) xchg_u8()
59 __u32 retval, temp; __cmpxchg_u32() local
76 : "=&d" (temp), "=&da" (retval) __cmpxchg_u32()
|
| /linux-4.1.27/arch/tile/gxio/ |
| H A D | iorpc_mpipe.c | 28 struct alloc_buffer_stacks_param temp; gxio_mpipe_alloc_buffer_stacks() local
29 struct alloc_buffer_stacks_param *params = &temp; gxio_mpipe_alloc_buffer_stacks()
56 struct init_buffer_stack_aux_param temp; gxio_mpipe_init_buffer_stack_aux() local
57 struct init_buffer_stack_aux_param *params = &temp; gxio_mpipe_init_buffer_stack_aux()
87 struct alloc_notif_rings_param temp; gxio_mpipe_alloc_notif_rings() local
88 struct alloc_notif_rings_param *params = &temp; gxio_mpipe_alloc_notif_rings()
112 struct init_notif_ring_aux_param temp; gxio_mpipe_init_notif_ring_aux() local
113 struct init_notif_ring_aux_param *params = &temp; gxio_mpipe_init_notif_ring_aux()
141 struct request_notif_ring_interrupt_param temp; gxio_mpipe_request_notif_ring_interrupt() local
142 struct request_notif_ring_interrupt_param *params = &temp; gxio_mpipe_request_notif_ring_interrupt()
164 struct enable_notif_ring_interrupt_param temp; gxio_mpipe_enable_notif_ring_interrupt() local
165 struct enable_notif_ring_interrupt_param *params = &temp; gxio_mpipe_enable_notif_ring_interrupt()
186 struct alloc_notif_groups_param temp; gxio_mpipe_alloc_notif_groups() local
187 struct alloc_notif_groups_param *params = &temp; gxio_mpipe_alloc_notif_groups()
208 struct init_notif_group_param temp; gxio_mpipe_init_notif_group() local
209 struct init_notif_group_param *params = &temp; gxio_mpipe_init_notif_group()
229 struct alloc_buckets_param temp; gxio_mpipe_alloc_buckets() local
230 struct alloc_buckets_param *params = &temp; gxio_mpipe_alloc_buckets()
250 struct init_bucket_param temp; gxio_mpipe_init_bucket() local
251 struct init_bucket_param *params = &temp; gxio_mpipe_init_bucket()
272 struct alloc_edma_rings_param temp; gxio_mpipe_alloc_edma_rings() local
273 struct alloc_edma_rings_param *params = &temp; gxio_mpipe_alloc_edma_rings()
298 struct init_edma_ring_aux_param temp; gxio_mpipe_init_edma_ring_aux() local
299 struct init_edma_ring_aux_param *params = &temp; gxio_mpipe_init_edma_ring_aux()
339 struct register_client_memory_param temp; gxio_mpipe_register_client_memory() local
340 struct register_client_memory_param *params = &temp; gxio_mpipe_register_client_memory()
361 struct link_open_aux_param temp; gxio_mpipe_link_open_aux() local
362 struct link_open_aux_param *params = &temp; gxio_mpipe_link_open_aux()
379 struct link_close_aux_param temp; gxio_mpipe_link_close_aux() local
380 struct link_close_aux_param *params = &temp; gxio_mpipe_link_close_aux()
399 struct link_set_attr_aux_param temp; gxio_mpipe_link_set_attr_aux() local
400 struct link_set_attr_aux_param *params = &temp; gxio_mpipe_link_set_attr_aux()
422 struct get_timestamp_aux_param temp; gxio_mpipe_get_timestamp_aux() local
423 struct get_timestamp_aux_param *params = &temp; gxio_mpipe_get_timestamp_aux()
446 struct set_timestamp_aux_param temp; gxio_mpipe_set_timestamp_aux() local
447 struct set_timestamp_aux_param *params = &temp; gxio_mpipe_set_timestamp_aux()
465 struct adjust_timestamp_aux_param temp; gxio_mpipe_adjust_timestamp_aux() local
466 struct adjust_timestamp_aux_param *params = &temp; gxio_mpipe_adjust_timestamp_aux()
488 struct config_edma_ring_blks_param temp; gxio_mpipe_config_edma_ring_blks() local
489 struct config_edma_ring_blks_param *params = &temp; gxio_mpipe_config_edma_ring_blks()
509 struct adjust_timestamp_freq_param temp; gxio_mpipe_adjust_timestamp_freq() local
510 struct adjust_timestamp_freq_param *params = &temp; gxio_mpipe_adjust_timestamp_freq()
527 struct arm_pollfd_param temp; gxio_mpipe_arm_pollfd() local
528 struct arm_pollfd_param *params = &temp; gxio_mpipe_arm_pollfd()
544 struct close_pollfd_param temp; gxio_mpipe_close_pollfd() local
545 struct close_pollfd_param *params = &temp; gxio_mpipe_close_pollfd()
562 struct get_mmio_base_param temp; gxio_mpipe_get_mmio_base() local
563 struct get_mmio_base_param *params = &temp; gxio_mpipe_get_mmio_base()
583 struct check_mmio_offset_param temp; gxio_mpipe_check_mmio_offset() local
584 struct check_mmio_offset_param *params = &temp; gxio_mpipe_check_mmio_offset()
|
| H A D | iorpc_globals.c | 24 struct arm_pollfd_param temp; __iorpc_arm_pollfd() local
25 struct arm_pollfd_param *params = &temp; __iorpc_arm_pollfd()
41 struct close_pollfd_param temp; __iorpc_close_pollfd() local
42 struct close_pollfd_param *params = &temp; __iorpc_close_pollfd()
59 struct get_mmio_base_param temp; __iorpc_get_mmio_base() local
60 struct get_mmio_base_param *params = &temp; __iorpc_get_mmio_base()
79 struct check_mmio_offset_param temp; __iorpc_check_mmio_offset() local
80 struct check_mmio_offset_param *params = &temp; __iorpc_check_mmio_offset()
|
| H A D | iorpc_mpipe_info.c | 25 struct instance_aux_param temp; gxio_mpipe_info_instance_aux() local
26 struct instance_aux_param *params = &temp; gxio_mpipe_info_instance_aux()
47 struct enumerate_aux_param temp; gxio_mpipe_info_enumerate_aux() local
48 struct enumerate_aux_param *params = &temp; gxio_mpipe_info_enumerate_aux()
70 struct get_mmio_base_param temp; gxio_mpipe_info_get_mmio_base() local
71 struct get_mmio_base_param *params = &temp; gxio_mpipe_info_get_mmio_base()
91 struct check_mmio_offset_param temp; gxio_mpipe_info_check_mmio_offset() local
92 struct check_mmio_offset_param *params = &temp; gxio_mpipe_info_check_mmio_offset()
|
| H A D | iorpc_trio.c | 27 struct alloc_asids_param temp; gxio_trio_alloc_asids() local
28 struct alloc_asids_param *params = &temp; gxio_trio_alloc_asids()
51 struct alloc_memory_maps_param temp; gxio_trio_alloc_memory_maps() local
52 struct alloc_memory_maps_param *params = &temp; gxio_trio_alloc_memory_maps()
74 struct alloc_scatter_queues_param temp; gxio_trio_alloc_scatter_queues() local
75 struct alloc_scatter_queues_param *params = &temp; gxio_trio_alloc_scatter_queues()
98 struct alloc_pio_regions_param temp; gxio_trio_alloc_pio_regions() local
99 struct alloc_pio_regions_param *params = &temp; gxio_trio_alloc_pio_regions()
122 struct init_pio_region_aux_param temp; gxio_trio_init_pio_region_aux() local
123 struct init_pio_region_aux_param *params = &temp; gxio_trio_init_pio_region_aux()
155 struct init_memory_map_mmu_aux_param temp; gxio_trio_init_memory_map_mmu_aux() local
156 struct init_memory_map_mmu_aux_param *params = &temp; gxio_trio_init_memory_map_mmu_aux()
182 struct get_port_property_param temp; gxio_trio_get_port_property() local
183 struct get_port_property_param *params = &temp; gxio_trio_get_port_property()
205 struct config_legacy_intr_param temp; gxio_trio_config_legacy_intr() local
206 struct config_legacy_intr_param *params = &temp; gxio_trio_config_legacy_intr()
236 struct config_msi_intr_param temp; gxio_trio_config_msi_intr() local
237 struct config_msi_intr_param *params = &temp; gxio_trio_config_msi_intr()
265 struct set_mps_mrs_param temp; gxio_trio_set_mps_mrs() local
266 struct set_mps_mrs_param *params = &temp; gxio_trio_set_mps_mrs()
284 struct force_rc_link_up_param temp; gxio_trio_force_rc_link_up() local
285 struct force_rc_link_up_param *params = &temp; gxio_trio_force_rc_link_up()
301 struct force_ep_link_up_param temp; gxio_trio_force_ep_link_up() local
302 struct force_ep_link_up_param *params = &temp; gxio_trio_force_ep_link_up()
319 struct get_mmio_base_param temp; gxio_trio_get_mmio_base() local
320 struct get_mmio_base_param *params = &temp; gxio_trio_get_mmio_base()
340 struct check_mmio_offset_param temp; gxio_trio_check_mmio_offset() local
341 struct check_mmio_offset_param *params = &temp; gxio_trio_check_mmio_offset()
|
| H A D | iorpc_usb_host.c | 25 struct cfg_interrupt_param temp; gxio_usb_host_cfg_interrupt() local
26 struct cfg_interrupt_param *params = &temp; gxio_usb_host_cfg_interrupt()
47 struct register_client_memory_param temp; gxio_usb_host_register_client_memory() local
48 struct register_client_memory_param *params = &temp; gxio_usb_host_register_client_memory()
67 struct get_mmio_base_param temp; gxio_usb_host_get_mmio_base() local
68 struct get_mmio_base_param *params = &temp; gxio_usb_host_get_mmio_base()
88 struct check_mmio_offset_param temp; gxio_usb_host_check_mmio_offset() local
89 struct check_mmio_offset_param *params = &temp; gxio_usb_host_check_mmio_offset()
|
| H A D | iorpc_uart.c | 25 struct cfg_interrupt_param temp; gxio_uart_cfg_interrupt() local
26 struct cfg_interrupt_param *params = &temp; gxio_uart_cfg_interrupt()
46 struct get_mmio_base_param temp; gxio_uart_get_mmio_base() local
47 struct get_mmio_base_param *params = &temp; gxio_uart_get_mmio_base()
67 struct check_mmio_offset_param temp; gxio_uart_check_mmio_offset() local
68 struct check_mmio_offset_param *params = &temp; gxio_uart_check_mmio_offset()
|
| /linux-4.1.27/drivers/net/phy/ |
| H A D | marvell.c | 401 int temp; m88e1116r_config_init() local
404 temp = phy_read(phydev, MII_BMCR); m88e1116r_config_init()
405 temp |= BMCR_RESET; m88e1116r_config_init()
406 err = phy_write(phydev, MII_BMCR, temp); m88e1116r_config_init()
416 temp = phy_read(phydev, MII_M1011_PHY_SCR); m88e1116r_config_init()
417 temp |= (7 << 12); /* max number of gigabit attempts */ m88e1116r_config_init()
418 temp |= (1 << 11); /* enable downshift */ m88e1116r_config_init()
419 temp |= MII_M1011_PHY_SCR_AUTO_CROSS; m88e1116r_config_init()
420 err = phy_write(phydev, MII_M1011_PHY_SCR, temp); m88e1116r_config_init()
427 temp = phy_read(phydev, MII_M1116R_CONTROL_REG_MAC); m88e1116r_config_init()
428 temp |= (1 << 5); m88e1116r_config_init()
429 temp |= (1 << 4); m88e1116r_config_init()
430 err = phy_write(phydev, MII_M1116R_CONTROL_REG_MAC, temp); m88e1116r_config_init()
437 temp = phy_read(phydev, MII_BMCR); m88e1116r_config_init()
438 temp |= BMCR_RESET; m88e1116r_config_init()
439 err = phy_write(phydev, MII_BMCR, temp); m88e1116r_config_init()
470 int temp; m88e1111_config_init() local
477 temp = phy_read(phydev, MII_M1111_PHY_EXT_CR); m88e1111_config_init()
478 if (temp < 0) m88e1111_config_init()
479 return temp; m88e1111_config_init()
482 temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY); m88e1111_config_init()
484 temp &= ~MII_M1111_TX_DELAY; m88e1111_config_init()
485 temp |= MII_M1111_RX_DELAY; m88e1111_config_init()
487 temp &= ~MII_M1111_RX_DELAY; m88e1111_config_init()
488 temp |= MII_M1111_TX_DELAY; m88e1111_config_init()
491 err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp); m88e1111_config_init()
495 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); m88e1111_config_init()
496 if (temp < 0) m88e1111_config_init()
497 return temp; m88e1111_config_init()
499 temp &= ~(MII_M1111_HWCFG_MODE_MASK); m88e1111_config_init()
501 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES) m88e1111_config_init()
502 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII; m88e1111_config_init()
504 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII; m88e1111_config_init()
506 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); m88e1111_config_init()
512 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); m88e1111_config_init()
513 if (temp < 0) m88e1111_config_init()
514 return temp; m88e1111_config_init()
516 temp &= ~(MII_M1111_HWCFG_MODE_MASK); m88e1111_config_init()
517 temp |= MII_M1111_HWCFG_MODE_SGMII_NO_CLK; m88e1111_config_init()
518 temp |= MII_M1111_HWCFG_FIBER_COPPER_AUTO; m88e1111_config_init()
520 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); m88e1111_config_init()
526 temp = phy_read(phydev, MII_M1111_PHY_EXT_CR); m88e1111_config_init()
527 if (temp < 0) m88e1111_config_init()
528 return temp; m88e1111_config_init()
529 temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY); m88e1111_config_init()
530 err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp); m88e1111_config_init()
534 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); m88e1111_config_init()
535 if (temp < 0) m88e1111_config_init()
536 return temp; m88e1111_config_init()
537 temp &= ~(MII_M1111_HWCFG_MODE_MASK | MII_M1111_HWCFG_FIBER_COPPER_RES); m88e1111_config_init()
538 temp |= 0x7 | MII_M1111_HWCFG_FIBER_COPPER_AUTO; m88e1111_config_init()
539 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); m88e1111_config_init()
548 temp = phy_read(phydev, MII_BMCR); m88e1111_config_init()
549 while (temp & BMCR_RESET); m88e1111_config_init()
551 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); m88e1111_config_init()
552 if (temp < 0) m88e1111_config_init()
553 return temp; m88e1111_config_init()
554 temp &= ~(MII_M1111_HWCFG_MODE_MASK | MII_M1111_HWCFG_FIBER_COPPER_RES); m88e1111_config_init()
555 temp |= MII_M1111_HWCFG_MODE_COPPER_RTBI | MII_M1111_HWCFG_FIBER_COPPER_AUTO; m88e1111_config_init()
556 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); m88e1111_config_init()
653 int temp; m88e1145_config_init() local
673 int temp = phy_read(phydev, MII_M1145_PHY_EXT_CR); m88e1145_config_init() local
674 if (temp < 0) m88e1145_config_init()
675 return temp; m88e1145_config_init()
677 temp |= (MII_M1145_RGMII_RX_DELAY | MII_M1145_RGMII_TX_DELAY); m88e1145_config_init()
679 err = phy_write(phydev, MII_M1145_PHY_EXT_CR, temp); m88e1145_config_init()
688 temp = phy_read(phydev, 0x1e); m88e1145_config_init()
689 if (temp < 0) m88e1145_config_init()
690 return temp; m88e1145_config_init()
692 temp &= 0xf03f; m88e1145_config_init()
693 temp |= 2 << 9; /* 36 ohm */ m88e1145_config_init()
694 temp |= 2 << 6; /* 39 ohm */ m88e1145_config_init()
696 err = phy_write(phydev, 0x1e, temp); m88e1145_config_init()
711 temp = phy_read(phydev, MII_M1145_PHY_EXT_SR); m88e1145_config_init()
712 if (temp < 0) m88e1145_config_init()
713 return temp; m88e1145_config_init()
715 temp &= ~MII_M1145_HWCFG_MODE_MASK; m88e1145_config_init()
716 temp |= MII_M1145_HWCFG_MODE_SGMII_NO_CLK; m88e1145_config_init()
717 temp |= MII_M1145_HWCFG_FIBER_COPPER_AUTO; m88e1145_config_init()
719 err = phy_write(phydev, MII_M1145_PHY_EXT_SR, temp); m88e1145_config_init()
855 int err, oldpage, temp; m88e1318_set_wol() local
866 temp = phy_read(phydev, MII_88E1318S_PHY_CSIER); m88e1318_set_wol()
867 temp |= MII_88E1318S_PHY_CSIER_WOL_EIE; m88e1318_set_wol()
868 err = phy_write(phydev, MII_88E1318S_PHY_CSIER, temp); m88e1318_set_wol()
878 temp = phy_read(phydev, MII_88E1318S_PHY_LED_TCR); m88e1318_set_wol()
879 temp &= ~MII_88E1318S_PHY_LED_TCR_FORCE_INT; m88e1318_set_wol()
880 temp |= MII_88E1318S_PHY_LED_TCR_INTn_ENABLE; m88e1318_set_wol()
881 temp |= MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW; m88e1318_set_wol()
882 err = phy_write(phydev, MII_88E1318S_PHY_LED_TCR, temp); m88e1318_set_wol()
909 temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL); m88e1318_set_wol()
910 temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS; m88e1318_set_wol()
911 temp |= MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE; m88e1318_set_wol()
912 err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp); m88e1318_set_wol()
922 temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL); m88e1318_set_wol()
923 temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS; m88e1318_set_wol()
924 temp &= ~MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE; m88e1318_set_wol()
925 err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp); m88e1318_set_wol()
|
| H A D | davicom.c | 68 int temp; dm9161_config_intr() local
70 temp = phy_read(phydev, MII_DM9161_INTR); dm9161_config_intr()
72 if (temp < 0) dm9161_config_intr()
73 return temp; dm9161_config_intr()
76 temp &= ~(MII_DM9161_INTR_STOP); dm9161_config_intr()
78 temp |= MII_DM9161_INTR_STOP; dm9161_config_intr()
80 temp = phy_write(phydev, MII_DM9161_INTR, temp); dm9161_config_intr()
82 return temp; dm9161_config_intr()
106 int err, temp; dm9161_config_init() local
116 temp = MII_DM9161_SCR_INIT; dm9161_config_init()
119 temp = MII_DM9161_SCR_INIT | MII_DM9161_SCR_RMII; dm9161_config_init()
126 err = phy_write(phydev, MII_DM9161_SCR, temp); dm9161_config_init()
|
| /linux-4.1.27/drivers/media/pci/cx23885/ |
| H A D | cx23885-f300.c | 87 u8 i, temp, ret = 0; f300_xfer() local
89 temp = buf[0]; f300_xfer()
91 temp += buf[i + 1]; f300_xfer()
92 temp = (~temp + 1);/* get check sum */ f300_xfer()
93 buf[1 + buf[0]] = temp; f300_xfer()
108 temp = buf[0]; f300_xfer()
109 temp += 2; f300_xfer()
110 for (i = 0; i < temp; i++) f300_xfer()
117 temp = 0; f300_xfer()
118 for (i = 0; ((i < 8) & (temp == 0)); i++) { f300_xfer()
121 temp = 1; f300_xfer()
133 temp = f300_get_byte(dev);/*get the data length */ f300_xfer()
134 if (temp > 14) f300_xfer()
135 temp = 14; f300_xfer()
137 for (i = 0; i < (temp + 1); i++) f300_xfer()
|
| /linux-4.1.27/arch/parisc/lib/ |
| H A D | bitops.c | 22 unsigned long temp, flags; __xchg64() local
25 temp = *ptr; __xchg64()
28 return temp; __xchg64()
35 long temp; __xchg32() local
38 temp = (long) *ptr; /* XXX - sign extension wanted? */ __xchg32()
41 return (unsigned long)temp; __xchg32()
48 long temp; __xchg8() local
51 temp = (long) *ptr; /* XXX - sign extension wanted? */ __xchg8()
54 return (unsigned long)temp; __xchg8()
|
| /linux-4.1.27/drivers/gpu/drm/msm/dsi/ |
| H A D | dsi_phy.c | 65 s32 temp; dsi_dphy_timing_calc_clk_zero() local
68 temp = 300 * coeff - ((timing->clk_prepare >> 1) + 1) * 2 * ui; dsi_dphy_timing_calc_clk_zero()
69 tmin = S_DIV_ROUND_UP(temp, ui) - 2; dsi_dphy_timing_calc_clk_zero()
79 temp = (timing->hs_rqst + timing->clk_prepare + clk_z) & 0x7; dsi_dphy_timing_calc_clk_zero()
80 timing->clk_zero = clk_z + 8 - temp; dsi_dphy_timing_calc_clk_zero()
93 s32 temp; dsi_dphy_timing_calc() local
105 temp = lpx / ui; dsi_dphy_timing_calc()
106 if (temp & 0x1) dsi_dphy_timing_calc()
107 timing->hs_rqst = temp; dsi_dphy_timing_calc()
109 timing->hs_rqst = max_t(s32, 0, temp - 2); dsi_dphy_timing_calc()
114 temp = 105 * coeff + 12 * ui - 20 * coeff; dsi_dphy_timing_calc()
115 tmax = S_DIV_ROUND_UP(temp, ui) - 2; dsi_dphy_timing_calc()
119 temp = 85 * coeff + 6 * ui; dsi_dphy_timing_calc()
120 tmax = S_DIV_ROUND_UP(temp, ui) - 2; dsi_dphy_timing_calc()
121 temp = 40 * coeff + 4 * ui; dsi_dphy_timing_calc()
122 tmin = S_DIV_ROUND_UP(temp, ui) - 2; dsi_dphy_timing_calc()
126 temp = ((timing->hs_prepare >> 1) + 1) * 2 * ui + 2 * ui; dsi_dphy_timing_calc()
127 temp = 145 * coeff + 10 * ui - temp; dsi_dphy_timing_calc()
128 tmin = S_DIV_ROUND_UP(temp, ui) - 2; dsi_dphy_timing_calc()
131 temp = 105 * coeff + 12 * ui - 20 * coeff; dsi_dphy_timing_calc()
132 tmax = S_DIV_ROUND_UP(temp, ui) - 2; dsi_dphy_timing_calc()
133 temp = 60 * coeff + 4 * ui; dsi_dphy_timing_calc()
134 tmin = DIV_ROUND_UP(temp, ui) - 2; dsi_dphy_timing_calc()
142 temp = ((timing->hs_exit >> 1) + 1) * 2 * ui; dsi_dphy_timing_calc()
143 temp = 60 * coeff + 52 * ui - 24 * ui - temp; dsi_dphy_timing_calc()
144 tmin = S_DIV_ROUND_UP(temp, 8 * ui) - 1; dsi_dphy_timing_calc()
148 temp = ((timing->clk_prepare >> 1) + 1) * 2 * ui; dsi_dphy_timing_calc()
149 temp += ((timing->clk_zero >> 1) + 1) * 2 * ui; dsi_dphy_timing_calc()
150 temp += 8 * ui + lpx; dsi_dphy_timing_calc()
151 tmin = S_DIV_ROUND_UP(temp, 8 * ui) - 1; dsi_dphy_timing_calc()
153 temp = linear_inter(2 * tmax, tmin, pcnt2, 0, false) >> 1; dsi_dphy_timing_calc()
154 timing->clk_pre = temp >> 1; dsi_dphy_timing_calc()
155 temp = (2 * tmax - tmin) * pcnt2; dsi_dphy_timing_calc()
|
| /linux-4.1.27/drivers/thermal/int340x_thermal/ |
| H A D | int340x_thermal_zone.c | 23 unsigned long *temp) int340x_thermal_get_zone_temp()
30 return d->override_ops->get_temp(zone, temp); int340x_thermal_get_zone_temp()
43 *temp = (unsigned long)conv_temp * 10; int340x_thermal_get_zone_temp()
46 *temp = DECI_KELVIN_TO_MILLICELSIUS(tmp); int340x_thermal_get_zone_temp()
52 int trip, unsigned long *temp) int340x_thermal_get_trip_temp()
58 return d->override_ops->get_trip_temp(zone, trip, temp); int340x_thermal_get_trip_temp()
61 *temp = d->aux_trips[trip]; int340x_thermal_get_trip_temp()
63 *temp = d->crt_temp; int340x_thermal_get_trip_temp()
65 *temp = d->psv_temp; int340x_thermal_get_trip_temp()
67 *temp = d->hot_temp; int340x_thermal_get_trip_temp()
72 *temp = d->act_trips[i].temp; int340x_thermal_get_trip_temp()
117 int trip, unsigned long temp) int340x_thermal_set_trip_temp()
124 return d->override_ops->set_trip_temp(zone, trip, temp); int340x_thermal_set_trip_temp()
128 MILLICELSIUS_TO_DECI_KELVIN(temp)); int340x_thermal_set_trip_temp()
132 d->aux_trips[trip] = temp; int340x_thermal_set_trip_temp()
139 int trip, unsigned long *temp) int340x_thermal_get_trip_hyst()
146 return d->override_ops->get_trip_hyst(zone, trip, temp); int340x_thermal_get_trip_hyst()
152 *temp = hyst * 100; int340x_thermal_get_trip_hyst()
166 unsigned long *temp) int340x_thermal_get_trip_config()
175 *temp = DECI_KELVIN_TO_MILLICELSIUS(r); int340x_thermal_get_trip_config()
233 &int34x_thermal_zone->act_trips[i].temp)) int340x_thermal_zone_add()
22 int340x_thermal_get_zone_temp(struct thermal_zone_device *zone, unsigned long *temp) int340x_thermal_get_zone_temp() argument
51 int340x_thermal_get_trip_temp(struct thermal_zone_device *zone, int trip, unsigned long *temp) int340x_thermal_get_trip_temp() argument
116 int340x_thermal_set_trip_temp(struct thermal_zone_device *zone, int trip, unsigned long temp) int340x_thermal_set_trip_temp() argument
138 int340x_thermal_get_trip_hyst(struct thermal_zone_device *zone, int trip, unsigned long *temp) int340x_thermal_get_trip_hyst() argument
165 int340x_thermal_get_trip_config(acpi_handle handle, char *name, unsigned long *temp) int340x_thermal_get_trip_config() argument
|
| /linux-4.1.27/arch/microblaze/kernel/ |
| H A D | kgdb.c | 41 int temp; pt_regs_to_gdb_regs() local
48 __asm__ __volatile__ ("mfs %0, rbtr;" : "=r"(temp) : ); pt_regs_to_gdb_regs()
49 gdb_regs[GDB_BTR] = temp; pt_regs_to_gdb_regs()
56 __asm__ __volatile__ ("mfs %0, redr;" : "=r"(temp) : ); pt_regs_to_gdb_regs()
57 gdb_regs[GDB_REDR] = temp; pt_regs_to_gdb_regs()
58 __asm__ __volatile__ ("mfs %0, rpid;" : "=r"(temp) : ); pt_regs_to_gdb_regs()
59 gdb_regs[GDB_RPID] = temp; pt_regs_to_gdb_regs()
60 __asm__ __volatile__ ("mfs %0, rzpr;" : "=r"(temp) : ); pt_regs_to_gdb_regs()
61 gdb_regs[GDB_RZPR] = temp; pt_regs_to_gdb_regs()
62 __asm__ __volatile__ ("mfs %0, rtlbx;" : "=r"(temp) : ); pt_regs_to_gdb_regs()
63 gdb_regs[GDB_RTLBX] = temp; pt_regs_to_gdb_regs()
64 __asm__ __volatile__ ("mfs %0, rtlblo;" : "=r"(temp) : ); pt_regs_to_gdb_regs()
65 gdb_regs[GDB_RTLBLO] = temp; pt_regs_to_gdb_regs()
66 __asm__ __volatile__ ("mfs %0, rtlbhi;" : "=r"(temp) : ); pt_regs_to_gdb_regs()
67 gdb_regs[GDB_RTLBHI] = temp; pt_regs_to_gdb_regs()
|
| /linux-4.1.27/drivers/char/agp/ |
| H A D | ali-agp.c | 24 u32 temp; ali_fetch_size() local
27 pci_read_config_dword(agp_bridge->dev, ALI_ATTBASE, &temp); ali_fetch_size()
28 temp &= ~(0xfffffff0); ali_fetch_size()
32 if (temp == values[i].size_value) { ali_fetch_size()
45 u32 temp; ali_tlbflush() local
47 pci_read_config_dword(agp_bridge->dev, ALI_TLBCTRL, &temp); ali_tlbflush()
48 temp &= 0xfffffff0; ali_tlbflush()
49 temp |= (1<<0 | 1<<1); ali_tlbflush()
50 pci_write_config_dword(agp_bridge->dev, ALI_TAGCTRL, temp); ali_tlbflush()
56 u32 temp; ali_cleanup() local
60 pci_read_config_dword(agp_bridge->dev, ALI_TLBCTRL, &temp); ali_cleanup()
63 ((temp & 0xffffff00) | 0x00000001|0x00000002)); ali_cleanup()
65 pci_read_config_dword(agp_bridge->dev, ALI_ATTBASE, &temp); ali_cleanup()
67 ((temp & 0x00000ff0) | previous_size->size_value)); ali_cleanup()
72 u32 temp; ali_configure() local
78 pci_read_config_dword(agp_bridge->dev, ALI_ATTBASE, &temp); ali_configure()
79 temp = (((temp & 0x00000ff0) | (agp_bridge->gatt_bus_addr & 0xfffff000)) ali_configure()
81 pci_write_config_dword(agp_bridge->dev, ALI_ATTBASE, temp); ali_configure()
84 pci_read_config_dword(agp_bridge->dev, ALI_TLBCTRL, &temp); ali_configure()
85 pci_write_config_dword(agp_bridge->dev, ALI_TLBCTRL, ((temp & 0xffffff00) | 0x00000010)); ali_configure()
118 pci_read_config_dword(agp_bridge->dev, ALI_TLBCTRL, &temp); ali_configure()
119 temp &= 0xffffff7f; //enable TLB ali_configure()
120 pci_write_config_dword(agp_bridge->dev, ALI_TLBCTRL, temp); ali_configure()
129 u32 temp; m1541_cache_flush() local
136 &temp); m1541_cache_flush()
138 (((temp & ALI_CACHE_FLUSH_ADDR_MASK) | m1541_cache_flush()
147 u32 temp; m1541_alloc_page() local
152 pci_read_config_dword(agp_bridge->dev, ALI_CACHE_FLUSH_CTRL, &temp); m1541_alloc_page()
154 (((temp & ALI_CACHE_FLUSH_ADDR_MASK) | m1541_alloc_page()
172 u32 temp; m1541_destroy_page() local
180 pci_read_config_dword(agp_bridge->dev, ALI_CACHE_FLUSH_CTRL, &temp); m1541_destroy_page()
182 (((temp & ALI_CACHE_FLUSH_ADDR_MASK) | m1541_destroy_page()
|
| H A D | ati-agp.c | 147 u32 temp; ati_fetch_size() local
151 pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp); ati_fetch_size()
153 pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp); ati_fetch_size()
155 temp = (temp & 0x0000000e); ati_fetch_size()
158 if (temp == values[i].size_value) { ati_fetch_size()
179 u32 temp; ati_cleanup() local
185 pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp); ati_cleanup()
186 temp = ((temp & ~(0x0000000f)) | previous_size->size_value); ati_cleanup()
187 pci_write_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, temp); ati_cleanup()
189 pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp); ati_cleanup()
190 temp = ((temp & ~(0x0000000f)) | previous_size->size_value); ati_cleanup()
191 pci_write_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, temp); ati_cleanup()
200 u32 temp; ati_configure() local
224 pci_read_config_dword(agp_bridge->dev, PCI_COMMAND, &temp); ati_configure()
225 pci_write_config_dword(agp_bridge->dev, PCI_COMMAND, temp | (1<<14)); ati_configure()
347 u32 temp; ati_create_gatt_table() local
370 pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp); ati_create_gatt_table()
371 temp = (((temp & ~(0x0000000e)) | current_size->size_value) ati_create_gatt_table()
373 pci_write_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, temp); ati_create_gatt_table()
374 pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp); ati_create_gatt_table()
376 pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp); ati_create_gatt_table()
377 temp = (((temp & ~(0x0000000e)) | current_size->size_value) ati_create_gatt_table()
379 pci_write_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, temp); ati_create_gatt_table()
380 pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp); ati_create_gatt_table()
|
| H A D | via-agp.c | 26 u8 temp; via_fetch_size() local
30 pci_read_config_byte(agp_bridge->dev, VIA_APSIZE, &temp); via_fetch_size()
32 if (temp == values[i].size_value) { via_fetch_size()
39 printk(KERN_ERR PFX "Unknown aperture size from AGP bridge (0x%x)\n", temp); via_fetch_size()
81 u32 temp; via_tlbflush() local
83 pci_read_config_dword(agp_bridge->dev, VIA_GARTCTRL, &temp); via_tlbflush()
84 temp |= (1<<7); via_tlbflush()
85 pci_write_config_dword(agp_bridge->dev, VIA_GARTCTRL, temp); via_tlbflush()
86 temp &= ~(1<<7); via_tlbflush()
87 pci_write_config_dword(agp_bridge->dev, VIA_GARTCTRL, temp); via_tlbflush()
108 u16 temp; via_fetch_size_agp3() local
112 pci_read_config_word(agp_bridge->dev, VIA_AGP3_APSIZE, &temp); via_fetch_size_agp3()
113 temp &= 0xfff; via_fetch_size_agp3()
116 if (temp == values[i].size_value) { via_fetch_size_agp3()
129 u32 temp; via_configure_agp3() local
147 pci_read_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, &temp); via_configure_agp3()
148 pci_write_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, temp | (3<<7)); via_configure_agp3()
164 u32 temp; via_tlbflush_agp3() local
166 pci_read_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, &temp); via_tlbflush_agp3()
167 pci_write_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, temp & ~(1<<7)); via_tlbflush_agp3()
168 pci_write_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, temp); via_tlbflush_agp3()
|
| H A D | sworks-agp.c | 142 u32 temp; serverworks_create_gatt_table() local
177 pci_read_config_dword(agp_bridge->dev,serverworks_private.gart_addr_ofs,&temp); serverworks_create_gatt_table()
178 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK); serverworks_create_gatt_table()
203 u32 temp; serverworks_fetch_size() local
208 pci_read_config_dword(agp_bridge->dev,serverworks_private.gart_addr_ofs,&temp); serverworks_fetch_size()
212 pci_write_config_dword(agp_bridge->dev,serverworks_private.gart_addr_ofs,temp); serverworks_fetch_size()
235 static void serverworks_tlbflush(struct agp_memory *temp) serverworks_tlbflush() argument
265 u32 temp; serverworks_configure() local
272 pci_read_config_dword(agp_bridge->dev, serverworks_private.mm_addr_ofs, &temp); serverworks_configure()
273 temp = (temp & PCI_BASE_ADDRESS_MEM_MASK); serverworks_configure()
274 serverworks_private.registers = (volatile u8 __iomem *) ioremap(temp, 4096); serverworks_configure()
276 dev_err(&agp_bridge->dev->dev, "can't ioremap(%#x)\n", temp); serverworks_configure()
453 u32 temp, temp2; agp_serverworks_probe() local
486 pci_read_config_dword(pdev, SVWRKS_APSIZE, &temp); agp_serverworks_probe()
487 if (temp & PCI_BASE_ADDRESS_MEM_TYPE_64) { agp_serverworks_probe()
498 pci_read_config_dword(pdev, serverworks_private.mm_addr_ofs, &temp); agp_serverworks_probe()
499 if (temp & PCI_BASE_ADDRESS_MEM_TYPE_64) { agp_serverworks_probe()
|
| H A D | i460-agp.c | 107 u8 temp; i460_fetch_size() local
111 pci_read_config_byte(agp_bridge->dev, INTEL_I460_GXBCTL, &temp); i460_fetch_size()
112 i460.io_page_shift = (temp & I460_4M_PS) ? 22 : 12; i460_fetch_size()
126 pci_read_config_byte(agp_bridge->dev, INTEL_I460_AGPSIZ, &temp); i460_fetch_size()
129 if (temp & I460_SRAM_IO_DISABLE) { i460_fetch_size()
136 if ((i460.io_page_shift == 0) && ((temp & I460_AGPSIZ_MASK) == 4)) { i460_fetch_size()
142 if (temp & I460_BAPBASE_ENABLE) i460_fetch_size()
159 if ((temp & I460_AGPSIZ_MASK) == values[i].size_value) { i460_fetch_size()
181 u8 temp; i460_write_agpsiz() local
183 pci_read_config_byte(agp_bridge->dev, INTEL_I460_AGPSIZ, &temp); i460_write_agpsiz()
185 ((temp & ~I460_AGPSIZ_MASK) | size_value)); i460_write_agpsiz()
204 } temp; i460_configure() local
209 temp.large = 0; i460_configure()
219 pci_read_config_dword(agp_bridge->dev, i460.dynamic_apbase, &(temp.small[0])); i460_configure()
220 pci_read_config_dword(agp_bridge->dev, i460.dynamic_apbase + 4, &(temp.small[1])); i460_configure()
223 agp_bridge->gart_bus_addr = temp.large & ~((1UL << 3) - 1); i460_configure()
245 void *temp; i460_create_gatt_table() local
250 temp = agp_bridge->current_size; i460_create_gatt_table()
251 page_order = A_SIZE_8(temp)->page_order; i460_create_gatt_table()
252 num_entries = A_SIZE_8(temp)->num_entries; i460_create_gatt_table()
274 void *temp; i460_free_gatt_table() local
276 temp = agp_bridge->current_size; i460_free_gatt_table()
278 num_entries = A_SIZE_8(temp)->num_entries; i460_free_gatt_table()
298 void *temp; i460_insert_memory_small_io_page() local
308 temp = agp_bridge->current_size; i460_insert_memory_small_io_page()
309 num_entries = A_SIZE_8(temp)->num_entries; i460_insert_memory_small_io_page()
405 void *temp; i460_insert_memory_large_io_page() local
410 temp = agp_bridge->current_size; i460_insert_memory_large_io_page()
411 num_entries = A_SIZE_8(temp)->num_entries; i460_insert_memory_large_io_page()
466 void *temp; i460_remove_memory_large_io_page() local
468 temp = agp_bridge->current_size; i460_remove_memory_large_io_page()
469 num_entries = A_SIZE_8(temp)->num_entries; i460_remove_memory_large_io_page()
|
| H A D | generic.c | 291 void *temp; agp_return_size() local
293 temp = agp_bridge->current_size; agp_return_size()
297 current_size = A_SIZE_8(temp)->size; agp_return_size()
300 current_size = A_SIZE_16(temp)->size; agp_return_size()
303 current_size = A_SIZE_32(temp)->size; agp_return_size()
306 current_size = A_SIZE_LVL2(temp)->size; agp_return_size()
309 current_size = A_SIZE_FIX(temp)->size; agp_return_size()
326 void *temp; agp_num_entries() local
328 temp = agp_bridge->current_size; agp_num_entries()
332 num_entries = A_SIZE_8(temp)->num_entries; agp_num_entries()
335 num_entries = A_SIZE_16(temp)->num_entries; agp_num_entries()
338 num_entries = A_SIZE_32(temp)->num_entries; agp_num_entries()
341 num_entries = A_SIZE_LVL2(temp)->num_entries; agp_num_entries()
344 num_entries = A_SIZE_FIX(temp)->num_entries; agp_num_entries()
809 u32 bridge_agpstat, temp; agp_generic_enable() local
838 bridge->capndx+AGPCTRL, &temp); agp_generic_enable()
839 temp |= (1<<9); agp_generic_enable()
841 bridge->capndx+AGPCTRL, temp); agp_generic_enable()
861 void *temp; agp_generic_create_gatt_table() local
870 temp = bridge->current_size; agp_generic_create_gatt_table()
877 size = A_SIZE_8(temp)->size; agp_generic_create_gatt_table()
879 A_SIZE_8(temp)->page_order; agp_generic_create_gatt_table()
881 A_SIZE_8(temp)->num_entries; agp_generic_create_gatt_table()
884 size = A_SIZE_16(temp)->size; agp_generic_create_gatt_table()
885 page_order = A_SIZE_16(temp)->page_order; agp_generic_create_gatt_table()
886 num_entries = A_SIZE_16(temp)->num_entries; agp_generic_create_gatt_table()
889 size = A_SIZE_32(temp)->size; agp_generic_create_gatt_table()
890 page_order = A_SIZE_32(temp)->page_order; agp_generic_create_gatt_table()
891 num_entries = A_SIZE_32(temp)->num_entries; agp_generic_create_gatt_table()
921 temp = bridge->current_size; agp_generic_create_gatt_table()
927 size = ((struct aper_size_info_fixed *) temp)->size; agp_generic_create_gatt_table()
928 page_order = ((struct aper_size_info_fixed *) temp)->page_order; agp_generic_create_gatt_table()
929 num_entries = ((struct aper_size_info_fixed *) temp)->num_entries; agp_generic_create_gatt_table()
980 void *temp; agp_generic_free_gatt_table() local
983 temp = bridge->current_size; agp_generic_free_gatt_table()
987 page_order = A_SIZE_8(temp)->page_order; agp_generic_free_gatt_table()
990 page_order = A_SIZE_16(temp)->page_order; agp_generic_free_gatt_table()
993 page_order = A_SIZE_32(temp)->page_order; agp_generic_free_gatt_table()
996 page_order = A_SIZE_FIX(temp)->page_order; agp_generic_free_gatt_table()
1038 void *temp; agp_generic_insert_memory() local
1049 temp = bridge->current_size; agp_generic_insert_memory()
1053 num_entries = A_SIZE_8(temp)->num_entries; agp_generic_insert_memory()
1056 num_entries = A_SIZE_16(temp)->num_entries; agp_generic_insert_memory()
1059 num_entries = A_SIZE_32(temp)->num_entries; agp_generic_insert_memory()
1062 num_entries = A_SIZE_FIX(temp)->num_entries; agp_generic_insert_memory()
1382 u32 temp; agp3_generic_configure() local
1395 pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &temp); agp3_generic_configure()
1396 pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, temp | AGPCTRL_APERENB | AGPCTRL_GTLBEN); agp3_generic_configure()
|
| H A D | intel-agp.c | 20 u16 temp; intel_fetch_size() local
23 pci_read_config_word(agp_bridge->dev, INTEL_APSIZE, &temp); intel_fetch_size()
27 if (temp == values[i].size_value) { intel_fetch_size()
37 static int __intel_8xx_fetch_size(u8 temp) __intel_8xx_fetch_size() argument
45 if (temp == values[i].size_value) { __intel_8xx_fetch_size()
57 u8 temp; intel_8xx_fetch_size() local
59 pci_read_config_byte(agp_bridge->dev, INTEL_APSIZE, &temp); intel_8xx_fetch_size()
60 return __intel_8xx_fetch_size(temp); intel_8xx_fetch_size()
65 u8 temp; intel_815_fetch_size() local
69 pci_read_config_byte(agp_bridge->dev, INTEL_APSIZE, &temp); intel_815_fetch_size()
70 temp &= (1 << 3); intel_815_fetch_size()
72 return __intel_8xx_fetch_size(temp); intel_815_fetch_size()
84 u32 temp; intel_8xx_tlbflush() local
85 pci_read_config_dword(agp_bridge->dev, INTEL_AGPCTRL, &temp); intel_8xx_tlbflush()
86 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, temp & ~(1 << 7)); intel_8xx_tlbflush()
87 pci_read_config_dword(agp_bridge->dev, INTEL_AGPCTRL, &temp); intel_8xx_tlbflush()
88 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, temp | (1 << 7)); intel_8xx_tlbflush()
94 u16 temp; intel_cleanup() local
98 pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp); intel_cleanup()
99 pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp & ~(1 << 9)); intel_cleanup()
106 u16 temp; intel_8xx_cleanup() local
110 pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp); intel_8xx_cleanup()
111 pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp & ~(1 << 9)); intel_8xx_cleanup()
193 u8 temp; intel_820_cleanup() local
197 pci_read_config_byte(agp_bridge->dev, INTEL_I820_RDCR, &temp); intel_820_cleanup()
199 temp & ~(1 << 1)); intel_820_cleanup()
|
| H A D | nvidia-agp.c | 111 u32 temp; nvidia_configure() local
148 pci_read_config_dword(nvidia_private.dev_2, NVIDIA_2_GARTCTRL, &temp); nvidia_configure()
149 pci_write_config_dword(nvidia_private.dev_2, NVIDIA_2_GARTCTRL, temp | 0x11); nvidia_configure()
152 pci_read_config_dword(agp_bridge->dev, NVIDIA_0_APSIZE, &temp); nvidia_configure()
153 pci_write_config_dword(agp_bridge->dev, NVIDIA_0_APSIZE, temp | 0x100); nvidia_configure()
169 u32 temp; nvidia_cleanup() local
172 pci_read_config_dword(agp_bridge->dev, NVIDIA_0_APSIZE, &temp); nvidia_cleanup()
173 pci_write_config_dword(agp_bridge->dev, NVIDIA_0_APSIZE, temp & ~(0x100)); nvidia_cleanup()
176 pci_read_config_dword(nvidia_private.dev_2, NVIDIA_2_GARTCTRL, &temp); nvidia_cleanup()
177 pci_write_config_dword(nvidia_private.dev_2, NVIDIA_2_GARTCTRL, temp & ~(0x11)); nvidia_cleanup()
264 u32 wbc_reg, temp; nvidia_tlbflush() local
286 temp = readl(nvidia_private.aperture+(i * PAGE_SIZE / sizeof(u32))); nvidia_tlbflush()
288 temp = readl(nvidia_private.aperture+(i * PAGE_SIZE / sizeof(u32))); nvidia_tlbflush()
|
| /linux-4.1.27/drivers/gpio/ |
| H A D | gpio-loongson.c | 39 u32 temp; loongson_gpio_direction_input() local
44 temp = LOONGSON_GPIOIE; loongson_gpio_direction_input()
45 temp |= mask; loongson_gpio_direction_input()
46 LOONGSON_GPIOIE = temp; loongson_gpio_direction_input()
55 u32 temp; loongson_gpio_direction_output() local
61 temp = LOONGSON_GPIOIE; loongson_gpio_direction_output()
62 temp &= (~mask); loongson_gpio_direction_output()
63 LOONGSON_GPIOIE = temp; loongson_gpio_direction_output()
|
| H A D | gpio-amd8111.c | 104 u8 temp; amd_gpio_set() local
108 temp = ioread8(agp->pm + AMD_REG_GPIO(offset)); amd_gpio_set()
109 temp = (temp & AMD_GPIO_DEBOUNCE) | AMD_GPIO_MODE_OUT | (value ? AMD_GPIO_X_OUT_HI : AMD_GPIO_X_OUT_LOW); amd_gpio_set()
110 iowrite8(temp, agp->pm + AMD_REG_GPIO(offset)); amd_gpio_set()
113 dev_dbg(&agp->pdev->dev, "Setting gpio %d, value %d, reg=%02x\n", offset, !!value, temp); amd_gpio_set()
119 u8 temp; amd_gpio_get() local
121 temp = ioread8(agp->pm + AMD_REG_GPIO(offset)); amd_gpio_get()
123 dev_dbg(&agp->pdev->dev, "Getting gpio %d, reg=%02x\n", offset, temp); amd_gpio_get()
125 return (temp & AMD_GPIO_RTIN) ? 1 : 0; amd_gpio_get()
131 u8 temp; amd_gpio_dirout() local
135 temp = ioread8(agp->pm + AMD_REG_GPIO(offset)); amd_gpio_dirout()
136 temp = (temp & AMD_GPIO_DEBOUNCE) | AMD_GPIO_MODE_OUT | (value ? AMD_GPIO_X_OUT_HI : AMD_GPIO_X_OUT_LOW); amd_gpio_dirout()
137 iowrite8(temp, agp->pm + AMD_REG_GPIO(offset)); amd_gpio_dirout()
140 dev_dbg(&agp->pdev->dev, "Dirout gpio %d, value %d, reg=%02x\n", offset, !!value, temp); amd_gpio_dirout()
148 u8 temp; amd_gpio_dirin() local
152 temp = ioread8(agp->pm + AMD_REG_GPIO(offset)); amd_gpio_dirin()
153 temp = (temp & AMD_GPIO_DEBOUNCE) | AMD_GPIO_MODE_IN; amd_gpio_dirin()
154 iowrite8(temp, agp->pm + AMD_REG_GPIO(offset)); amd_gpio_dirin()
157 dev_dbg(&agp->pdev->dev, "Dirin gpio %d, reg=%02x\n", offset, temp); amd_gpio_dirin()
|
| /linux-4.1.27/arch/unicore32/include/asm/ |
| H A D | assembler.h | 43 .macro disable_irq, temp
44 mov \temp, asr variable
45 andn \temp, \temp, #0xFF variable
46 or \temp, \temp, #PSR_I_BIT | PRIV_MODE variable
47 mov.a asr, \temp
50 .macro enable_irq, temp
51 mov \temp, asr variable
52 andn \temp, \temp, #0xFF variable
53 or \temp, \temp, #PRIV_MODE variable
54 mov.a asr, \temp
|
| H A D | irqflags.h | 27 unsigned long temp; arch_local_save_flags() local
29 asm volatile("mov %0, asr" : "=r" (temp) : : "memory", "cc"); arch_local_save_flags()
31 return temp & PSR_c; arch_local_save_flags()
39 unsigned long temp; arch_local_irq_restore() local
45 : "=&r" (temp) arch_local_irq_restore()
|
| /linux-4.1.27/arch/alpha/include/asm/ |
| H A D | rwsem.h | 31 long temp; __down_read() local
41 :"=&r" (oldcount), "=m" (sem->count), "=&r" (temp) __down_read()
73 long temp; __down_write() local
83 :"=&r" (oldcount), "=m" (sem->count), "=&r" (temp) __down_write()
109 long temp; __up_read() local
119 :"=&r" (oldcount), "=m" (sem->count), "=&r" (temp) __up_read()
134 long temp; __up_write() local
145 :"=&r" (count), "=m" (sem->count), "=&r" (temp) __up_write()
163 long temp; __downgrade_write() local
173 :"=&r" (oldcount), "=m" (sem->count), "=&r" (temp) __downgrade_write()
185 long temp; rwsem_atomic_add()
194 :"=&r" (temp), "=m" (sem->count) rwsem_atomic_add()
205 long ret, temp; rwsem_atomic_update()
215 :"=&r" (ret), "=m" (sem->count), "=&r" (temp) rwsem_atomic_update()
|
| H A D | local.h | 22 long temp, result; local_add_return() local
32 :"=&r" (temp), "=m" (l->a.counter), "=&r" (result) local_add_return()
39 long temp, result; local_sub_return() local
49 :"=&r" (temp), "=m" (l->a.counter), "=&r" (result) local_sub_return()
|
| H A D | bitops.h | 30 unsigned long temp; set_bit() local
41 :"=&r" (temp), "=m" (*m) set_bit()
59 unsigned long temp; clear_bit() local
70 :"=&r" (temp), "=m" (*m) clear_bit()
102 unsigned long temp; change_bit() local
113 :"=&r" (temp), "=m" (*m) change_bit()
132 unsigned long temp; test_and_set_bit() local
152 :"=&r" (temp), "=m" (*m), "=&r" (oldbit) test_and_set_bit()
162 unsigned long temp; test_and_set_bit_lock() local
179 :"=&r" (temp), "=m" (*m), "=&r" (oldbit) test_and_set_bit_lock()
203 unsigned long temp; test_and_clear_bit() local
223 :"=&r" (temp), "=m" (*m), "=&r" (oldbit) test_and_clear_bit()
247 unsigned long temp; test_and_change_bit() local
265 :"=&r" (temp), "=m" (*m), "=&r" (oldbit) test_and_change_bit()
|
| H A D | atomic.h | 35 unsigned long temp; \
44 :"=&r" (temp), "=m" (v->counter) \
51 long temp, result; \
62 :"=&r" (temp), "=m" (v->counter), "=&r" (result) \
71 unsigned long temp; \
80 :"=&r" (temp), "=m" (v->counter) \
87 long temp, result; \
98 :"=&r" (temp), "=m" (v->counter), "=&r" (result) \
|
| H A D | mmzone.h | 43 unsigned long temp; PLAT_NODE_DATA_LOCALNR() local
44 temp = p >> PAGE_SHIFT; PLAT_NODE_DATA_LOCALNR()
45 return temp - PLAT_NODE_DATA(n)->gendata.node_start_pfn; PLAT_NODE_DATA_LOCALNR()
|
| /linux-4.1.27/sound/pci/au88x0/ |
| H A D | au88x0_mpu401.c | 47 int temp, mode; snd_vortex_midi() local
55 temp = snd_vortex_midi()
58 hwwrite(vortex->mmio, VORTEX_CTRL, temp); snd_vortex_midi()
61 temp = snd_vortex_midi()
64 hwwrite(vortex->mmio, VORTEX_CTRL, temp); snd_vortex_midi()
68 temp = hwread(vortex->mmio, VORTEX_CTRL2) & 0xffff00cf; snd_vortex_midi()
69 temp |= (MIDI_CLOCK_DIV << 8) | ((mode >> 24) & 0xff) << 4; snd_vortex_midi()
70 hwwrite(vortex->mmio, VORTEX_CTRL2, temp); snd_vortex_midi()
74 temp = hwread(vortex->mmio, VORTEX_MIDI_DATA); snd_vortex_midi()
75 if (temp != MPU401_ACK /*0xfe */ ) { snd_vortex_midi()
85 if ((temp = snd_vortex_midi()
91 return temp; snd_vortex_midi()
95 if ((temp = snd_vortex_midi()
102 return temp; snd_vortex_midi()
|
| H A D | au88x0_core.c | 169 int addr, temp;
175 temp = hwread(vortex->mmio, VORTEX_MIX_ENIN + addr);
176 return ((temp >> (mixin & 3)) & 1);
183 int temp; vortex_mix_setvolumebyte() local
186 temp = hwread(vortex->mmio, VORTEX_MIX_VOL_B + (mix << 2)); vortex_mix_setvolumebyte()
187 if ((temp != 0x80) || (vol == 0x80)) vortex_mix_setvolumebyte()
197 int temp; vortex_mix_setinputvolumebyte() local
202 temp = vortex_mix_setinputvolumebyte()
205 if ((temp != 0x80) || (vol == 0x80)) vortex_mix_setinputvolumebyte()
215 int temp, addr; vortex_mix_setenablebit() local
222 temp = hwread(vortex->mmio, VORTEX_MIX_ENIN + addr); vortex_mix_setenablebit()
224 temp |= (1 << (mixin & 3)); vortex_mix_setenablebit()
226 temp &= ~(1 << (mixin & 3)); vortex_mix_setenablebit()
234 hwwrite(vortex->mmio, VORTEX_MIX_ENIN + addr, temp); vortex_mix_setenablebit()
273 int temp, lifeboat = 0, prev; vortex_mixer_addWTD() local
275 temp = hwread(vortex->mmio, VORTEX_MIXER_SR); vortex_mixer_addWTD()
276 if ((temp & (1 << ch)) == 0) { vortex_mixer_addWTD()
282 temp = hwread(vortex->mmio, prev); vortex_mixer_addWTD()
283 while (temp & 0x10) { vortex_mixer_addWTD()
284 prev = VORTEX_MIXER_RTBASE + ((temp & 0xf) << 2); vortex_mixer_addWTD()
285 temp = hwread(vortex->mmio, prev); vortex_mixer_addWTD()
286 //printk(KERN_INFO "vortex: mixAddWTD: while addr=%x, val=%x\n", prev, temp); vortex_mixer_addWTD()
293 hwwrite(vortex->mmio, VORTEX_MIXER_RTBASE + ((temp & 0xf) << 2), mix); vortex_mixer_addWTD()
294 hwwrite(vortex->mmio, prev, (temp & 0xf) | 0x10); vortex_mixer_addWTD()
476 int temp; vortex_src_set_throttlesource() local
478 temp = hwread(vortex->mmio, VORTEX_SRC_SOURCE); vortex_src_set_throttlesource()
480 temp |= 1 << src; vortex_src_set_throttlesource()
482 temp &= ~(1 << src); vortex_src_set_throttlesource()
483 hwwrite(vortex->mmio, VORTEX_SRC_SOURCE, temp); vortex_src_set_throttlesource()
489 int temp, lifeboat = 0; vortex_src_persist_convratio() local
493 temp = hwread(vortex->mmio, VORTEX_SRC_CONVRATIO + (src << 2)); vortex_src_persist_convratio()
499 while (temp != ratio); vortex_src_persist_convratio()
500 return temp; vortex_src_persist_convratio()
506 int temp;
510 temp = hwread(vortex->mmio, VORTEX_SRC_U0 + (src << 2));
511 if (temp & 0x200)
513 temp & ~0x200L);
519 int temp, a;
528 temp = hwread(vortex->mmio, VORTEX_SRC_U0 + (src << 2));
529 if (((temp >> 4) & 0xf) != a)
531 (temp & 0xf) | ((a & 0xf) << 4));
669 int temp, lifeboat = 0, prev; vortex_src_addWTD() local
672 temp = hwread(vortex->mmio, VORTEX_SRCBLOCK_SR); vortex_src_addWTD()
673 if ((temp & (1 << ch)) == 0) { vortex_src_addWTD()
679 temp = hwread(vortex->mmio, prev); vortex_src_addWTD()
680 //while (temp & NR_SRC) { vortex_src_addWTD()
681 while (temp & 0x10) { vortex_src_addWTD()
682 prev = VORTEX_SRC_RTBASE + ((temp & 0xf) << 2); /*esp12 */ vortex_src_addWTD()
683 //prev = VORTEX_SRC_RTBASE + ((temp & (NR_SRC-1)) << 2); /*esp12*/ vortex_src_addWTD()
684 temp = hwread(vortex->mmio, prev); vortex_src_addWTD()
685 //printk(KERN_INFO "vortex: srcAddWTD: while addr=%x, val=%x\n", prev, temp); vortex_src_addWTD()
692 hwwrite(vortex->mmio, VORTEX_SRC_RTBASE + ((temp & 0xf) << 2), src); vortex_src_addWTD()
693 //hwwrite(vortex->mmio, prev, (temp & (NR_SRC-1)) | NR_SRC); vortex_src_addWTD()
694 hwwrite(vortex->mmio, prev, (temp & 0xf) | 0x10); vortex_src_addWTD()
811 int temp, lifeboat = 0; vortex_fifo_setadbctrl() local
820 temp = hwread(vortex->mmio, VORTEX_FIFO_ADBCTRL + (fifo << 2)); vortex_fifo_setadbctrl()
827 while (temp & FIFO_RDONLY); vortex_fifo_setadbctrl()
832 if ((temp & FIFO_VALID) == 0) { vortex_fifo_setadbctrl()
836 temp = (this_4 & 0x1f) << 0xb; vortex_fifo_setadbctrl()
838 temp = (this_4 & 0x3f) << 0xc; vortex_fifo_setadbctrl()
840 temp = (temp & 0xfffffffd) | ((stereo & 1) << 1); vortex_fifo_setadbctrl()
841 temp = (temp & 0xfffffff3) | ((priority & 3) << 2); vortex_fifo_setadbctrl()
842 temp = (temp & 0xffffffef) | ((valid & 1) << 4); vortex_fifo_setadbctrl()
843 temp |= FIFO_U1; vortex_fifo_setadbctrl()
844 temp = (temp & 0xffffffdf) | ((empty & 1) << 5); vortex_fifo_setadbctrl()
846 temp = (temp & 0xfffbffff) | ((f & 1) << 0x12); vortex_fifo_setadbctrl()
849 temp = (temp & 0xf7ffffff) | ((f & 1) << 0x1b); vortex_fifo_setadbctrl()
850 temp = (temp & 0xefffffff) | ((f & 1) << 0x1c); vortex_fifo_setadbctrl()
853 temp = (temp & 0xfeffffff) | ((f & 1) << 0x18); vortex_fifo_setadbctrl()
854 temp = (temp & 0xfdffffff) | ((f & 1) << 0x19); vortex_fifo_setadbctrl()
858 if (temp & FIFO_VALID) { vortex_fifo_setadbctrl()
860 temp = ((f & 1) << 0x12) | (temp & 0xfffbffef); vortex_fifo_setadbctrl()
863 temp = vortex_fifo_setadbctrl()
864 ((f & 1) << 0x1b) | (temp & 0xe7ffffef) | FIFO_BITS; vortex_fifo_setadbctrl()
867 temp = vortex_fifo_setadbctrl()
868 ((f & 1) << 0x18) | (temp & 0xfcffffef) | FIFO_BITS; vortex_fifo_setadbctrl()
874 hwwrite(vortex->mmio, VORTEX_FIFO_ADBCTRL + (fifo << 2), temp); vortex_fifo_setadbctrl()
912 int temp = 0, lifeboat = 0; vortex_fifo_setwtctrl() local
916 temp = hwread(vortex->mmio, VORTEX_FIFO_WTCTRL + (fifo << 2)); vortex_fifo_setwtctrl()
923 while (temp & FIFO_RDONLY); vortex_fifo_setwtctrl()
926 if ((temp & FIFO_VALID) == 0) { vortex_fifo_setwtctrl()
929 temp = (this_4 & 0x1f) << 0xb; vortex_fifo_setwtctrl()
931 temp = (this_4 & 0x3f) << 0xc; vortex_fifo_setwtctrl()
933 temp = (temp & 0xfffffffd) | ((ctrl & 1) << 1); vortex_fifo_setwtctrl()
934 temp = (temp & 0xfffffff3) | ((priority & 3) << 2); vortex_fifo_setwtctrl()
935 temp = (temp & 0xffffffef) | ((valid & 1) << 4); vortex_fifo_setwtctrl()
936 temp |= FIFO_U1; vortex_fifo_setwtctrl()
937 temp = (temp & 0xffffffdf) | ((empty & 1) << 5); vortex_fifo_setwtctrl()
939 temp = (temp & 0xfffbffff) | ((f & 1) << 0x12); vortex_fifo_setwtctrl()
942 temp = (temp & 0xf7ffffff) | ((f & 1) << 0x1b); vortex_fifo_setwtctrl()
943 temp = (temp & 0xefffffff) | ((f & 1) << 0x1c); vortex_fifo_setwtctrl()
946 temp = (temp & 0xfeffffff) | ((f & 1) << 0x18); vortex_fifo_setwtctrl()
947 temp = (temp & 0xfdffffff) | ((f & 1) << 0x19); vortex_fifo_setwtctrl()
951 if (temp & FIFO_VALID) { vortex_fifo_setwtctrl()
953 temp = ((f & 1) << 0x12) | (temp & 0xfffbffef); vortex_fifo_setwtctrl()
956 temp = vortex_fifo_setwtctrl()
957 ((f & 1) << 0x1b) | (temp & 0xe7ffffef) | FIFO_BITS; vortex_fifo_setwtctrl()
960 temp = vortex_fifo_setwtctrl()
961 ((f & 1) << 0x18) | (temp & 0xfcffffef) | FIFO_BITS; vortex_fifo_setwtctrl()
967 hwwrite(vortex->mmio, VORTEX_FIFO_WTCTRL + (fifo << 2), temp); vortex_fifo_setwtctrl()
972 temp = hwread(vortex->mmio, VORTEX_FIFO_WTCTRL + (fifo << 2)); vortex_fifo_setwtctrl()
977 } while ((temp & FIFO_RDONLY)&&(temp & FIFO_VALID)&&(temp != 0xFFFFFFFF)); vortex_fifo_setwtctrl()
981 if (temp & FIFO_VALID) { vortex_fifo_setwtctrl()
982 temp = 0x40000; vortex_fifo_setwtctrl()
983 //temp |= 0x08000000; vortex_fifo_setwtctrl()
984 //temp |= 0x10000000; vortex_fifo_setwtctrl()
985 //temp |= 0x04000000; vortex_fifo_setwtctrl()
986 //temp |= 0x00400000; vortex_fifo_setwtctrl()
987 temp |= 0x1c400000; vortex_fifo_setwtctrl()
988 temp &= 0xFFFFFFF3; vortex_fifo_setwtctrl()
989 temp &= 0xFFFFFFEF; vortex_fifo_setwtctrl()
990 temp |= (valid & 1) << 4; vortex_fifo_setwtctrl()
991 hwwrite(vortex->mmio, VORTEX_FIFO_WTCTRL + (fifo << 2), temp); vortex_fifo_setwtctrl()
998 temp &= 0xffffffef; vortex_fifo_setwtctrl()
999 temp |= 0x08000000; vortex_fifo_setwtctrl()
1000 temp |= 0x10000000; vortex_fifo_setwtctrl()
1001 temp |= 0x04000000; vortex_fifo_setwtctrl()
1002 temp |= 0x00400000; vortex_fifo_setwtctrl()
1003 hwwrite(vortex->mmio, VORTEX_FIFO_WTCTRL + (fifo << 2), temp); vortex_fifo_setwtctrl()
1004 temp = hwread(vortex->mmio, VORTEX_FIFO_WTCTRL + (fifo << 2)); vortex_fifo_setwtctrl()
1005 //((temp >> 6) & 0x3f) vortex_fifo_setwtctrl()
1008 if (((temp & 0x0fc0) ^ ((temp >> 6) & 0x0fc0)) & 0FFFFFFC0) vortex_fifo_setwtctrl()
1011 temp = (temp & 0xfffffffd) | ((ctrl & 1) << 1); vortex_fifo_setwtctrl()
1012 temp = (temp & 0xfffdffff) | ((f & 1) << 0x11); vortex_fifo_setwtctrl()
1013 temp = (temp & 0xfffffff3) | ((priority & 3) << 2); vortex_fifo_setwtctrl()
1014 temp = (temp & 0xffffffef) | ((valid & 1) << 4); vortex_fifo_setwtctrl()
1015 temp = (temp & 0xffffffdf) | ((empty & 1) << 5); vortex_fifo_setwtctrl()
1016 hwwrite(vortex->mmio, VORTEX_FIFO_WTCTRL + (fifo << 2), temp); vortex_fifo_setwtctrl()
1022 temp = (temp & 0xfffffffd) | ((ctrl & 1) << 1); vortex_fifo_setwtctrl()
1023 temp = (temp & 0xfffdffff) | ((f & 1) << 0x11); vortex_fifo_setwtctrl()
1024 temp = (temp & 0xfffffff3) | ((priority & 3) << 2); vortex_fifo_setwtctrl()
1025 temp = (temp & 0xffffffef) | ((valid & 1) << 4); vortex_fifo_setwtctrl()
1026 temp = (temp & 0xffffffdf) | ((empty & 1) << 5); vortex_fifo_setwtctrl()
1028 temp = temp | FIFO_BITS | 40000; vortex_fifo_setwtctrl()
1031 hwwrite(vortex->mmio, VORTEX_FIFO_WTCTRL + (fifo << 2), temp); vortex_fifo_setwtctrl()
1257 int temp, page, delta; vortex_adbdma_getlinearpos() local
1259 temp = hwread(vortex->mmio, VORTEX_ADBDMA_STAT + (adbdma << 2)); vortex_adbdma_getlinearpos()
1260 page = (temp & ADB_SUBBUF_MASK) >> ADB_SUBBUF_SHIFT; vortex_adbdma_getlinearpos()
1269 + (temp & (dma->period_bytes - 1)); vortex_adbdma_getlinearpos()
1497 int temp;
1498 temp = hwread(vortex->mmio, VORTEX_WTDMA_STAT + (wtdma << 2));
1499 *subbuf = (temp >> WT_SUBBUF_SHIFT) & WT_SUBBUF_MASK;
1500 *pos = temp & POS_MASK;
1512 int temp; vortex_wtdma_getlinearpos() local
1514 temp = hwread(vortex->mmio, VORTEX_WTDMA_STAT + (wtdma << 2)); vortex_wtdma_getlinearpos()
1515 temp = (dma->period_virt * dma->period_bytes) + (temp & (dma->period_bytes - 1)); vortex_wtdma_getlinearpos()
1516 return temp; vortex_wtdma_getlinearpos()
1639 int temp, prev, lifeboat = 0; vortex_adb_addroutes() local
1655 temp = vortex_adb_addroutes()
1658 if (temp == ADB_MASK) { vortex_adb_addroutes()
1667 prev = temp; vortex_adb_addroutes()
1668 temp = vortex_adb_addroutes()
1670 VORTEX_ADB_RTBASE + (temp << 2)) & ADB_MASK; vortex_adb_addroutes()
1678 while (temp != ADB_MASK); vortex_adb_addroutes()
1686 int temp, lifeboat = 0, prev; vortex_adb_delroutes() local
1689 temp = vortex_adb_delroutes()
1692 if (temp == (route0 & ADB_MASK)) { vortex_adb_delroutes()
1693 temp = vortex_adb_delroutes()
1696 if ((temp & ADB_MASK) == ADB_MASK) vortex_adb_delroutes()
1699 temp); vortex_adb_delroutes()
1703 prev = temp; vortex_adb_delroutes()
1704 temp = vortex_adb_delroutes()
1707 if (((lifeboat++) > ADB_MASK) || (temp == ADB_MASK)) { vortex_adb_delroutes()
1714 while (temp != (route0 & ADB_MASK)); vortex_adb_delroutes()
1715 temp = hwread(vortex->mmio, VORTEX_ADB_RTBASE + (temp << 2)); vortex_adb_delroutes()
1716 if ((temp & ADB_MASK) == route1) vortex_adb_delroutes()
1717 temp = hwread(vortex->mmio, VORTEX_ADB_RTBASE + (temp << 2)); vortex_adb_delroutes()
1719 hwwrite(vortex->mmio, VORTEX_ADB_RTBASE + (prev << 2), temp); vortex_adb_delroutes()
|
| H A D | au88x0_synth.c | 42 int temp; vortex_wt_setstereo() local
44 //temp = hwread(vortex->mmio, 0x80 + ((wt >> 0x5)<< 0xf) + (((wt & 0x1f) >> 1) << 2)); vortex_wt_setstereo()
45 temp = hwread(vortex->mmio, WT_STEREO(wt)); vortex_wt_setstereo()
46 temp = (temp & 0xfe) | (stereo & 1); vortex_wt_setstereo()
47 //hwwrite(vortex->mmio, 0x80 + ((wt >> 0x5)<< 0xf) + (((wt & 0x1f) >> 1) << 2), temp); vortex_wt_setstereo()
48 hwwrite(vortex->mmio, WT_STEREO(wt), temp); vortex_wt_setstereo()
54 int temp; vortex_wt_setdsout() local
57 temp = hwread(vortex->mmio, WT_DSREG((wt >= 0x20) ? 1 : 0)); vortex_wt_setdsout()
59 temp |= (1 << (wt & 0x1f)); vortex_wt_setdsout()
61 temp &= ~(1 << (wt & 0x1f)); vortex_wt_setdsout()
62 hwwrite(vortex->mmio, WT_DSREG((wt >= 0x20) ? 1 : 0), temp); vortex_wt_setdsout()
69 int temp; vortex_wt_allocroute() local
92 temp = hwread(vortex->mmio, WT_PARM(wt, 3)); vortex_wt_allocroute()
93 dev_dbg(vortex->card->dev, "WT PARM3: %x\n", temp); vortex_wt_allocroute()
94 //hwwrite(vortex->mmio, WT_PARM(wt, 3), temp); vortex_wt_allocroute()
|
| /linux-4.1.27/arch/sh/include/asm/ |
| H A D | atomic-irq.h | 25 unsigned long temp, flags; \
28 temp = v->counter; \
29 temp c_op i; \
30 v->counter = temp; \
33 return temp; \
|
| H A D | atomic-llsc.h | 36 unsigned long temp; \
44 : "=&z" (temp) \
48 return temp; \
|
| /linux-4.1.27/arch/arm/include/asm/ |
| H A D | irqflags.h | 61 unsigned long flags, temp; arch_local_irq_save() local
67 : "=r" (flags), "=r" (temp) arch_local_irq_save()
78 unsigned long temp; arch_local_irq_enable() local
83 : "=r" (temp) arch_local_irq_enable()
93 unsigned long temp; arch_local_irq_disable() local
98 : "=r" (temp) arch_local_irq_disable()
108 unsigned long temp; \
113 : "=r" (temp) \
123 unsigned long temp; \
128 : "=r" (temp) \
|
| /linux-4.1.27/arch/score/kernel/ |
| H A D | module.c | 76 unsigned long temp, temp_hi; apply_relocate() local
78 temp = *(unsigned long *)loc; apply_relocate()
82 offset = ((temp >> 16 & 0x03) << 15) | apply_relocate()
83 ((temp & 0x7fff) >> 1); apply_relocate()
94 temp = (temp & (~(0x37fff))) | (offset & 0x7fff) | apply_relocate()
96 *(unsigned long *)loc = temp; apply_relocate()
102 unsigned long temp; apply_relocate() local
104 temp = *(unsigned long *)loc; apply_relocate()
105 offset = (temp & 0x03FF7FFE); apply_relocate()
112 temp = (temp & 0xfc008001) | apply_relocate()
115 *(unsigned long *)loc = temp; apply_relocate()
|
| /linux-4.1.27/net/ipv6/netfilter/ |
| H A D | ip6t_ipv6header.c | 33 unsigned int temp; ipv6header_mt6() local
46 temp = 0; ipv6header_mt6()
55 temp |= MASK_NONE; ipv6header_mt6()
63 temp |= MASK_ESP; ipv6header_mt6()
81 temp |= MASK_HOPOPTS; ipv6header_mt6()
84 temp |= MASK_ROUTING; ipv6header_mt6()
87 temp |= MASK_FRAGMENT; ipv6header_mt6()
90 temp |= MASK_AH; ipv6header_mt6()
93 temp |= MASK_DSTOPTS; ipv6header_mt6()
107 temp |= MASK_PROTO; ipv6header_mt6()
110 return !((temp ^ info->matchflags ^ info->invflags) ipv6header_mt6()
114 return temp != info->matchflags; ipv6header_mt6()
116 return temp == info->matchflags; ipv6header_mt6()
|
| H A D | ip6t_rt.c | 44 unsigned int temp; rt_mt6() local
130 for (temp = 0; rt_mt6()
131 temp < (unsigned int)((hdrlen - 8) / 16); rt_mt6()
132 temp++) { rt_mt6()
136 + temp * sizeof(_addr), rt_mt6()
143 pr_debug("i=%d temp=%d;\n", i, temp); rt_mt6()
162 for (temp = 0; temp < rtinfo->addrnr; temp++) { rt_mt6()
166 + temp * sizeof(_addr), rt_mt6()
171 if (!ipv6_addr_equal(ap, &rtinfo->addrs[temp])) rt_mt6()
174 pr_debug("temp=%d #%d\n", temp, rtinfo->addrnr); rt_mt6()
175 if (temp == rtinfo->addrnr && rt_mt6()
176 temp == (unsigned int)((hdrlen - 8) / 16)) rt_mt6()
|
| H A D | ip6t_hbh.c | 52 unsigned int temp; hbh_mt6() local
104 for (temp = 0; temp < optinfo->optsnr; temp++) { hbh_mt6()
114 if (*tp != (optinfo->opts[temp] & 0xFF00) >> 8) { hbh_mt6()
116 (optinfo->opts[temp] & 0xFF00) >> 8); hbh_mt6()
133 spec_len = optinfo->opts[temp] & 0x00FF; hbh_mt6()
151 temp < optinfo->optsnr - 1) { hbh_mt6()
158 if (temp == optinfo->optsnr) hbh_mt6()
|
| /linux-4.1.27/security/integrity/evm/ |
| H A D | evm_secfs.c | 37 char temp[80]; evm_read_key() local
43 sprintf(temp, "%d", evm_initialized); evm_read_key()
44 rc = simple_read_from_buffer(buf, count, ppos, temp, strlen(temp)); evm_read_key()
64 char temp[80]; evm_write_key() local
70 if (count >= sizeof(temp) || count == 0) evm_write_key()
73 if (copy_from_user(temp, buf, count) != 0) evm_write_key()
76 temp[count] = '\0'; evm_write_key()
78 if ((sscanf(temp, "%d", &i) != 1) || (i != 1)) evm_write_key()
|
| /linux-4.1.27/lib/xz/ |
| H A D | xz_dec_stream.c | 129 } temp; member in struct:xz_dec
152 * Fill s->temp by copying data starting from b->in[b->in_pos]. Caller
153 * must have set s->temp.pos to indicate how much data we are supposed
154 * to copy into s->temp.buf. Return true once s->temp.pos has reached
155 * s->temp.size.
160 b->in_size - b->in_pos, s->temp.size - s->temp.pos); fill_temp()
162 memcpy(s->temp.buf + s->temp.pos, b->in + b->in_pos, copy_size); fill_temp()
164 s->temp.pos += copy_size; fill_temp()
166 if (s->temp.pos == s->temp.size) { fill_temp()
167 s->temp.pos = 0; fill_temp()
389 if (!memeq(s->temp.buf, HEADER_MAGIC, HEADER_MAGIC_SIZE)) dec_stream_header()
392 if (xz_crc32(s->temp.buf + HEADER_MAGIC_SIZE, 2, 0) dec_stream_header()
393 != get_le32(s->temp.buf + HEADER_MAGIC_SIZE + 2)) dec_stream_header()
396 if (s->temp.buf[HEADER_MAGIC_SIZE] != 0) dec_stream_header()
405 s->check_type = s->temp.buf[HEADER_MAGIC_SIZE + 1]; dec_stream_header()
424 if (!memeq(s->temp.buf + 10, FOOTER_MAGIC, FOOTER_MAGIC_SIZE)) dec_stream_footer()
427 if (xz_crc32(s->temp.buf + 4, 6, 0) != get_le32(s->temp.buf)) dec_stream_footer()
435 if ((s->index.size >> 2) != get_le32(s->temp.buf + 4)) dec_stream_footer()
438 if (s->temp.buf[8] != 0 || s->temp.buf[9] != s->check_type) dec_stream_footer()
454 * Validate the CRC32. We know that the temp buffer is at least dec_block_header()
457 s->temp.size -= 4; dec_block_header()
458 if (xz_crc32(s->temp.buf, s->temp.size, 0) dec_block_header()
459 != get_le32(s->temp.buf + s->temp.size)) dec_block_header()
462 s->temp.pos = 2; dec_block_header()
469 if (s->temp.buf[1] & 0x3E) dec_block_header()
471 if (s->temp.buf[1] & 0x3F) dec_block_header()
476 if (s->temp.buf[1] & 0x40) { dec_block_header()
477 if (dec_vli(s, s->temp.buf, &s->temp.pos, s->temp.size) dec_block_header()
487 if (s->temp.buf[1] & 0x80) { dec_block_header()
488 if (dec_vli(s, s->temp.buf, &s->temp.pos, s->temp.size) dec_block_header()
499 s->bcj_active = s->temp.buf[1] & 0x01; dec_block_header()
501 if (s->temp.size - s->temp.pos < 2) dec_block_header()
504 ret = xz_dec_bcj_reset(s->bcj, s->temp.buf[s->temp.pos++]); dec_block_header()
512 if (s->temp.buf[s->temp.pos++] != 0x00) dec_block_header()
518 if (s->temp.size - s->temp.pos < 2) dec_block_header()
522 if (s->temp.buf[s->temp.pos++] != 0x21) dec_block_header()
526 if (s->temp.buf[s->temp.pos++] != 0x01) dec_block_header()
530 if (s->temp.size - s->temp.pos < 1) dec_block_header()
533 ret = xz_dec_lzma2_reset(s->lzma2, s->temp.buf[s->temp.pos++]); dec_block_header()
538 while (s->temp.pos < s->temp.size) dec_block_header()
539 if (s->temp.buf[s->temp.pos++] != 0x00) dec_block_header()
542 s->temp.pos = 0; dec_block_header()
563 * Stream Header is copied to s->temp, and then dec_main()
605 s->temp.size = s->block_header.size; dec_main()
606 s->temp.pos = 0; dec_main()
695 s->temp.size = STREAM_HEADER_SIZE; dec_main()
808 s->temp.pos = 0; xz_dec_reset()
809 s->temp.size = STREAM_HEADER_SIZE; xz_dec_reset()
|
| H A D | xz_dec_bcj.c | 75 } temp; member in struct:xz_dec_bcj
395 * Flush pending filtered data from temp to the output buffer.
397 * data to the beginning of temp.
403 copy_size = min_t(size_t, s->temp.filtered, b->out_size - b->out_pos); bcj_flush()
404 memcpy(b->out + b->out_pos, s->temp.buf, copy_size); bcj_flush()
407 s->temp.filtered -= copy_size; bcj_flush()
408 s->temp.size -= copy_size; bcj_flush()
409 memmove(s->temp.buf, s->temp.buf + copy_size, s->temp.size); bcj_flush()
428 if (s->temp.filtered > 0) { xz_dec_bcj_run()
430 if (s->temp.filtered > 0) xz_dec_bcj_run()
439 * temp, copy the unfiltered data from temp to the output buffer xz_dec_bcj_run()
443 * to temp and rewind the output buffer position accordingly. xz_dec_bcj_run()
445 * This needs to be always run when temp.size == 0 to handle a special xz_dec_bcj_run()
449 if (s->temp.size < b->out_size - b->out_pos || s->temp.size == 0) { xz_dec_bcj_run()
451 memcpy(b->out + b->out_pos, s->temp.buf, s->temp.size); xz_dec_bcj_run()
452 b->out_pos += s->temp.size; xz_dec_bcj_run()
469 s->temp.size = b->out_pos - out_start; xz_dec_bcj_run()
470 b->out_pos -= s->temp.size; xz_dec_bcj_run()
471 memcpy(s->temp.buf, b->out + b->out_pos, s->temp.size); xz_dec_bcj_run()
476 * to try decoding more data to temp. xz_dec_bcj_run()
478 if (b->out_pos + s->temp.size < b->out_size) xz_dec_bcj_run()
483 * We have unfiltered data in temp. If the output buffer isn't full xz_dec_bcj_run()
484 * yet, try to fill the temp buffer by decoding more data from the xz_dec_bcj_run()
485 * next filter. Apply the BCJ filter on temp. Then we hopefully can xz_dec_bcj_run()
486 * fill the actual output buffer by copying filtered data from temp. xz_dec_bcj_run()
487 * A mix of filtered and unfiltered data may be left in temp; it will xz_dec_bcj_run()
491 /* Make b->out{,_pos,_size} temporarily point to s->temp. */ xz_dec_bcj_run()
495 b->out = s->temp.buf; xz_dec_bcj_run()
496 b->out_pos = s->temp.size; xz_dec_bcj_run()
497 b->out_size = sizeof(s->temp.buf); xz_dec_bcj_run()
501 s->temp.size = b->out_pos; xz_dec_bcj_run()
509 bcj_apply(s, s->temp.buf, &s->temp.filtered, s->temp.size); xz_dec_bcj_run()
517 s->temp.filtered = s->temp.size; xz_dec_bcj_run()
520 if (s->temp.filtered > 0) xz_dec_bcj_run()
568 s->temp.filtered = 0; xz_dec_bcj_reset()
569 s->temp.size = 0; xz_dec_bcj_reset()
|
| /linux-4.1.27/drivers/scsi/aic7xxx/ |
| H A D | aic7xxx_93cx6.c | 113 uint8_t temp; send_seeprom_cmd() local
117 temp = sd->sd_MS ^ sd->sd_CS; send_seeprom_cmd()
118 SEEPROM_OUTB(sd, temp ^ sd->sd_CK); send_seeprom_cmd()
123 temp ^= sd->sd_DO; send_seeprom_cmd()
124 SEEPROM_OUTB(sd, temp); send_seeprom_cmd()
126 SEEPROM_OUTB(sd, temp ^ sd->sd_CK); send_seeprom_cmd()
129 temp ^= sd->sd_DO; send_seeprom_cmd()
139 uint8_t temp; reset_seeprom() local
141 temp = sd->sd_MS; reset_seeprom()
142 SEEPROM_OUTB(sd, temp); reset_seeprom()
144 SEEPROM_OUTB(sd, temp ^ sd->sd_CK); reset_seeprom()
146 SEEPROM_OUTB(sd, temp); reset_seeprom()
161 uint8_t temp; ahc_read_seeprom() local
175 temp = sd->sd_MS ^ sd->sd_CS; ahc_read_seeprom()
178 temp ^= sd->sd_DO; ahc_read_seeprom()
179 SEEPROM_OUTB(sd, temp); ahc_read_seeprom()
181 SEEPROM_OUTB(sd, temp ^ sd->sd_CK); ahc_read_seeprom()
184 temp ^= sd->sd_DO; ahc_read_seeprom()
195 SEEPROM_OUTB(sd, temp); ahc_read_seeprom()
200 SEEPROM_OUTB(sd, temp ^ sd->sd_CK); ahc_read_seeprom()
232 uint8_t temp; ahc_write_seeprom() local
252 temp = sd->sd_MS ^ sd->sd_CS; ahc_write_seeprom()
260 temp ^= sd->sd_DO; ahc_write_seeprom()
261 SEEPROM_OUTB(sd, temp); ahc_write_seeprom()
263 SEEPROM_OUTB(sd, temp ^ sd->sd_CK); ahc_write_seeprom()
266 temp ^= sd->sd_DO; ahc_write_seeprom()
273 temp ^= sd->sd_DO; ahc_write_seeprom()
274 SEEPROM_OUTB(sd, temp); ahc_write_seeprom()
276 SEEPROM_OUTB(sd, temp ^ sd->sd_CK); ahc_write_seeprom()
279 temp ^= sd->sd_DO; ahc_write_seeprom()
283 temp = sd->sd_MS; ahc_write_seeprom()
284 SEEPROM_OUTB(sd, temp); ahc_write_seeprom()
286 temp = sd->sd_MS ^ sd->sd_CS; ahc_write_seeprom()
288 SEEPROM_OUTB(sd, temp); ahc_write_seeprom()
290 SEEPROM_OUTB(sd, temp ^ sd->sd_CK); ahc_write_seeprom()
|
| /linux-4.1.27/arch/powerpc/sysdev/qe_lib/ |
| H A D | qe_ic.c | 203 u32 temp; qe_ic_unmask_irq() local
207 temp = qe_ic_read(qe_ic->regs, qe_ic_info[src].mask_reg); qe_ic_unmask_irq()
209 temp | qe_ic_info[src].mask); qe_ic_unmask_irq()
219 u32 temp; qe_ic_mask_irq() local
223 temp = qe_ic_read(qe_ic->regs, qe_ic_info[src].mask_reg); qe_ic_mask_irq()
225 temp & ~qe_ic_info[src].mask); qe_ic_mask_irq()
318 u32 temp = 0, ret, high_active = 0; qe_ic_init() local
351 temp |= CICR_GWCC; qe_ic_init()
353 temp |= CICR_GXCC; qe_ic_init()
355 temp |= CICR_GYCC; qe_ic_init()
357 temp |= CICR_GZCC; qe_ic_init()
359 temp |= CICR_GRTA; qe_ic_init()
361 temp |= CICR_GRTB; qe_ic_init()
365 temp |= (SIGNAL_HIGH << CICR_HPIT_SHIFT); qe_ic_init()
369 qe_ic_write(qe_ic->regs, QEIC_CICR, temp); qe_ic_init()
385 u32 temp = 0; qe_ic_set_highest_priority() local
387 temp = qe_ic_read(qe_ic->regs, QEIC_CICR); qe_ic_set_highest_priority()
389 temp &= ~CICR_HP_MASK; qe_ic_set_highest_priority()
390 temp |= src << CICR_HP_SHIFT; qe_ic_set_highest_priority()
392 temp &= ~CICR_HPIT_MASK; qe_ic_set_highest_priority()
393 temp |= (high ? SIGNAL_HIGH : SIGNAL_LOW) << CICR_HPIT_SHIFT; qe_ic_set_highest_priority()
395 qe_ic_write(qe_ic->regs, QEIC_CICR, temp); qe_ic_set_highest_priority()
403 u32 temp; qe_ic_set_priority() local
412 temp = qe_ic_read(qe_ic->regs, qe_ic_info[src].pri_reg); qe_ic_set_priority()
415 temp &= ~(0x7 << (32 - priority * 3)); qe_ic_set_priority()
416 temp |= qe_ic_info[src].pri_code << (32 - priority * 3); qe_ic_set_priority()
418 temp &= ~(0x7 << (24 - priority * 3)); qe_ic_set_priority()
419 temp |= qe_ic_info[src].pri_code << (24 - priority * 3); qe_ic_set_priority()
422 qe_ic_write(qe_ic->regs, qe_ic_info[src].pri_reg, temp); qe_ic_set_priority()
432 u32 temp, control_reg = QEIC_CICNR, shift = 0; qe_ic_set_high_priority() local
463 temp = qe_ic_read(qe_ic->regs, control_reg); qe_ic_set_high_priority()
464 temp &= ~(SIGNAL_MASK << shift); qe_ic_set_high_priority()
465 temp |= (high ? SIGNAL_HIGH : SIGNAL_LOW) << shift; qe_ic_set_high_priority()
466 qe_ic_write(qe_ic->regs, control_reg, temp); qe_ic_set_high_priority()
|
| /linux-4.1.27/drivers/i2c/busses/ |
| H A D | i2c-isch.c | 68 int temp; sch_transaction() local
78 temp = inb(SMBHSTSTS) & 0x0f; sch_transaction()
79 if (temp) { sch_transaction()
81 if (temp & 0x01) { sch_transaction()
83 "Clear...\n", temp); sch_transaction()
85 if (temp & 0x06) { sch_transaction()
87 "Resetting...\n", temp); sch_transaction()
89 outb(temp, SMBHSTSTS); sch_transaction()
90 temp = inb(SMBHSTSTS) & 0x0f; sch_transaction()
91 if (temp) { sch_transaction()
93 "SMBus is not ready: (%02x)\n", temp); sch_transaction()
103 temp = inb(SMBHSTSTS) & 0x0f; sch_transaction()
104 } while ((temp & 0x08) && (retries++ < MAX_RETRIES)); sch_transaction()
111 if (temp & 0x04) { sch_transaction()
116 } else if (temp & 0x02) { sch_transaction()
119 } else if (temp & 0x01) { sch_transaction()
121 outb(temp, SMBHSTSTS); sch_transaction()
122 temp = inb(SMBHSTSTS) & 0x07; sch_transaction()
123 if (temp & 0x06) { sch_transaction()
126 "transaction (%02x), Bus error!\n", temp); sch_transaction()
150 int i, len, temp, rc; sch_access() local
153 temp = inb(SMBHSTSTS) & 0x0f; sch_access()
154 if (temp & 0x08) { sch_access()
155 dev_dbg(&sch_adapter.dev, "SMBus busy (%02x)\n", temp); sch_access()
158 temp = inw(SMBHSTCLK); sch_access()
159 if (!temp) { sch_access()
|
| H A D | i2c-imx.c | 418 unsigned int temp; i2c_imx_bus_busy() local
423 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR); i2c_imx_bus_busy()
426 if (temp & I2SR_IAL) { i2c_imx_bus_busy()
427 temp &= ~I2SR_IAL; i2c_imx_bus_busy()
428 imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2SR); i2c_imx_bus_busy()
432 if (for_busy && (temp & I2SR_IBB)) i2c_imx_bus_busy()
434 if (!for_busy && !(temp & I2SR_IBB)) i2c_imx_bus_busy()
516 unsigned int temp = 0; i2c_imx_start() local
535 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); i2c_imx_start()
536 temp |= I2CR_MSTA; i2c_imx_start()
537 imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); i2c_imx_start()
543 temp |= I2CR_IIEN | I2CR_MTX | I2CR_TXAK; i2c_imx_start()
544 temp &= ~I2CR_DMAEN; i2c_imx_start()
545 imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); i2c_imx_start()
551 unsigned int temp = 0; i2c_imx_stop() local
556 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); i2c_imx_stop()
557 temp &= ~(I2CR_MSTA | I2CR_MTX); i2c_imx_stop()
559 temp &= ~I2CR_DMAEN; i2c_imx_stop()
560 imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); i2c_imx_stop()
576 temp = i2c_imx->hwdata->i2cr_ien_opcode ^ I2CR_IEN, i2c_imx_stop()
577 imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); i2c_imx_stop()
584 unsigned int temp; i2c_imx_isr() local
586 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR); i2c_imx_isr()
587 if (temp & I2SR_IIF) { i2c_imx_isr()
589 i2c_imx->i2csr = temp; i2c_imx_isr()
590 temp &= ~I2SR_IIF; i2c_imx_isr()
591 temp |= (i2c_imx->hwdata->i2sr_clr_opcode & I2SR_IIF); i2c_imx_isr()
592 imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2SR); i2c_imx_isr()
605 unsigned int temp = 0; i2c_imx_dma_write() local
618 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); i2c_imx_dma_write()
619 temp |= I2CR_DMAEN; i2c_imx_dma_write()
620 imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); i2c_imx_dma_write()
638 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR); i2c_imx_dma_write()
639 if (temp & I2SR_ICF) i2c_imx_dma_write()
649 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); i2c_imx_dma_write()
650 temp &= ~I2CR_DMAEN; i2c_imx_dma_write()
651 imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); i2c_imx_dma_write()
668 unsigned int temp; i2c_imx_dma_read() local
673 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); i2c_imx_dma_read()
674 temp |= I2CR_DMAEN; i2c_imx_dma_read()
675 imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); i2c_imx_dma_read()
697 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR); i2c_imx_dma_read()
698 if (temp & I2SR_ICF) i2c_imx_dma_read()
708 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); i2c_imx_dma_read()
709 temp &= ~I2CR_DMAEN; i2c_imx_dma_read()
710 imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); i2c_imx_dma_read()
713 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); i2c_imx_dma_read()
714 temp |= I2CR_TXAK; i2c_imx_dma_read()
715 imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); i2c_imx_dma_read()
729 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); i2c_imx_dma_read()
730 temp &= ~(I2CR_MSTA | I2CR_MTX); i2c_imx_dma_read()
731 imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); i2c_imx_dma_read()
742 temp = readb(i2c_imx->base + IMX_I2C_I2CR); i2c_imx_dma_read()
743 temp |= I2CR_MTX; i2c_imx_dma_read()
744 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); i2c_imx_dma_read()
787 unsigned int temp; i2c_imx_read() local
806 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); i2c_imx_read()
807 temp &= ~I2CR_MTX; i2c_imx_read()
814 temp &= ~I2CR_TXAK; i2c_imx_read()
815 imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); i2c_imx_read()
852 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); i2c_imx_read()
853 temp &= ~(I2CR_MSTA | I2CR_MTX); i2c_imx_read()
854 imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); i2c_imx_read()
865 temp = readb(i2c_imx->base + IMX_I2C_I2CR); i2c_imx_read()
866 temp |= I2CR_MTX; i2c_imx_read()
867 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); i2c_imx_read()
872 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); i2c_imx_read()
873 temp |= I2CR_TXAK; i2c_imx_read()
874 imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); i2c_imx_read()
890 unsigned int i, temp; i2c_imx_xfer() local
910 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); i2c_imx_xfer()
911 temp |= I2CR_RSTA; i2c_imx_xfer()
912 imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); i2c_imx_xfer()
921 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); i2c_imx_xfer()
925 (temp & I2CR_IEN ? 1 : 0), (temp & I2CR_IIEN ? 1 : 0), i2c_imx_xfer()
926 (temp & I2CR_MSTA ? 1 : 0), (temp & I2CR_MTX ? 1 : 0), i2c_imx_xfer()
927 (temp & I2CR_TXAK ? 1 : 0), (temp & I2CR_RSTA ? 1 : 0)); i2c_imx_xfer()
928 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR); i2c_imx_xfer()
932 (temp & I2SR_ICF ? 1 : 0), (temp & I2SR_IAAS ? 1 : 0), i2c_imx_xfer()
933 (temp & I2SR_IBB ? 1 : 0), (temp & I2SR_IAL ? 1 : 0), i2c_imx_xfer()
934 (temp & I2SR_SRW ? 1 : 0), (temp & I2SR_IIF ? 1 : 0), i2c_imx_xfer()
935 (temp & I2SR_RXAK ? 1 : 0)); i2c_imx_xfer()
|
| H A D | i2c-ali15x3.c | 132 unsigned char temp; ali15x3_setup() local
145 pci_read_config_byte(ALI15X3_dev, SMBATPC, &temp); ali15x3_setup()
146 if (temp & ALI15X3_LOCK) { ali15x3_setup()
147 temp &= ~ALI15X3_LOCK; ali15x3_setup()
148 pci_write_config_byte(ALI15X3_dev, SMBATPC, temp); ali15x3_setup()
193 pci_read_config_byte(ALI15X3_dev, SMBCOM, &temp); ali15x3_setup()
194 if ((temp & 1) == 0) { ali15x3_setup()
196 pci_write_config_byte(ALI15X3_dev, SMBCOM, temp | 0x01); ali15x3_setup()
200 pci_read_config_byte(ALI15X3_dev, SMBHSTCFG, &temp); ali15x3_setup()
201 if ((temp & 1) == 0) { ali15x3_setup()
203 pci_write_config_byte(ALI15X3_dev, SMBHSTCFG, temp | 0x01); ali15x3_setup()
216 pci_read_config_byte(ALI15X3_dev, SMBREV, &temp); ali15x3_setup()
217 dev_dbg(&ALI15X3_dev->dev, "SMBREV = 0x%X\n", temp); ali15x3_setup()
229 int temp; ali15x3_transaction() local
239 temp = inb_p(SMBHSTSTS); ali15x3_transaction()
243 if (temp & ALI15X3_STS_BUSY) { ali15x3_transaction()
266 "clear busy condition (%02x)\n", temp); ali15x3_transaction()
268 temp = inb_p(SMBHSTSTS); ali15x3_transaction()
272 if (temp & (ALI15X3_STS_ERR | ALI15X3_STS_BUSY)) { ali15x3_transaction()
275 if ((temp = inb_p(SMBHSTSTS)) & ali15x3_transaction()
282 temp); ali15x3_transaction()
287 if (temp & ALI15X3_STS_DONE) { ali15x3_transaction()
288 outb_p(temp, SMBHSTSTS); ali15x3_transaction()
299 temp = inb_p(SMBHSTSTS); ali15x3_transaction()
300 } while ((!(temp & (ALI15X3_STS_ERR | ALI15X3_STS_DONE))) ali15x3_transaction()
309 if (temp & ALI15X3_STS_TERM) { ali15x3_transaction()
320 if (temp & ALI15X3_STS_COLL) { ali15x3_transaction()
328 if (temp & ALI15X3_STS_DEV) { ali15x3_transaction()
345 int temp; ali15x3_access() local
351 temp = inb_p(SMBHSTSTS); ali15x3_access()
353 (timeout < MAX_TIMEOUT) && !(temp & ALI15X3_STS_IDLE); ali15x3_access()
356 temp = inb_p(SMBHSTSTS); ali15x3_access()
359 dev_err(&adap->dev, "Idle wait Timeout! STS=0x%02x\n", temp); ali15x3_access()
422 temp = ali15x3_transaction(adap); ali15x3_access()
423 if (temp) ali15x3_access()
424 return temp; ali15x3_access()
|
| H A D | i2c-sis96x.c | 89 int temp; sis96x_transaction() local
96 if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) { sis96x_transaction()
99 "Resetting...\n", temp); sis96x_transaction()
105 if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) { sis96x_transaction()
106 dev_dbg(&sis96x_adapter.dev, "Failed (0x%02x)\n", temp); sis96x_transaction()
117 temp = sis96x_read(SMB_STS); sis96x_transaction()
118 sis96x_write(SMB_STS, temp & 0x1e); sis96x_transaction()
126 temp = sis96x_read(SMB_STS); sis96x_transaction()
127 } while (!(temp & 0x0e) && (timeout++ < MAX_TIMEOUT)); sis96x_transaction()
131 dev_dbg(&sis96x_adapter.dev, "SMBus Timeout! (0x%02x)\n", temp); sis96x_transaction()
136 if (temp & 0x02) { sis96x_transaction()
142 if (temp & 0x04) { sis96x_transaction()
148 sis96x_write(SMB_STS, temp); sis96x_transaction()
149 if ((temp = sis96x_read(SMB_STS))) { sis96x_transaction()
151 "end of transaction! (0x%02x)\n", temp); sis96x_transaction()
|
| H A D | i2c-amd756.c | 106 int temp; amd756_transaction() local
116 if ((temp = inw_p(SMB_GLOBAL_STATUS)) & (GS_HST_STS | GS_SMB_STS)) { amd756_transaction()
117 dev_dbg(&adap->dev, "SMBus busy (%04x). Waiting...\n", temp); amd756_transaction()
120 temp = inw_p(SMB_GLOBAL_STATUS); amd756_transaction()
121 } while ((temp & (GS_HST_STS | GS_SMB_STS)) && amd756_transaction()
125 dev_dbg(&adap->dev, "Busy wait timeout (%04x)\n", temp); amd756_transaction()
137 temp = inw_p(SMB_GLOBAL_STATUS); amd756_transaction()
138 } while ((temp & GS_HST_STS) && (timeout++ < MAX_TIMEOUT)); amd756_transaction()
146 if (temp & GS_PRERR_STS) { amd756_transaction()
151 if (temp & GS_COL_STS) { amd756_transaction()
156 if (temp & GS_TO_STS) { amd756_transaction()
161 if (temp & GS_HCYC_STS) amd756_transaction()
167 if (((temp = inw_p(SMB_GLOBAL_STATUS)) & GS_CLEAR_STS) != 0x00) { amd756_transaction()
169 "Failed reset at end of transaction (%04x)\n", temp); amd756_transaction()
326 u8 temp; amd756_probe() local
344 pci_read_config_byte(pdev, SMBGCFG, &temp); amd756_probe()
345 if ((temp & 128) == 0) { amd756_probe()
369 pci_read_config_byte(pdev, SMBREV, &temp); amd756_probe()
370 dev_dbg(&pdev->dev, "SMBREV = 0x%X\n", temp); amd756_probe()
|
| H A D | i2c-sis5595.c | 227 int temp; sis5595_transaction() local
232 temp = sis5595_read(SMB_STS_LO) + (sis5595_read(SMB_STS_HI) << 8); sis5595_transaction()
233 if (temp != 0x00) { sis5595_transaction()
234 dev_dbg(&adap->dev, "SMBus busy (%04x). Resetting...\n", temp); sis5595_transaction()
235 sis5595_write(SMB_STS_LO, temp & 0xff); sis5595_transaction()
236 sis5595_write(SMB_STS_HI, temp >> 8); sis5595_transaction()
237 if ((temp = sis5595_read(SMB_STS_LO) + (sis5595_read(SMB_STS_HI) << 8)) != 0x00) { sis5595_transaction()
238 dev_dbg(&adap->dev, "Failed! (%02x)\n", temp); sis5595_transaction()
251 temp = sis5595_read(SMB_STS_LO); sis5595_transaction()
252 } while (!(temp & 0x40) && (timeout++ < MAX_TIMEOUT)); sis5595_transaction()
260 if (temp & 0x10) { sis5595_transaction()
265 if (temp & 0x20) { sis5595_transaction()
272 temp = sis5595_read(SMB_STS_LO) + (sis5595_read(SMB_STS_HI) << 8); sis5595_transaction()
273 if (temp != 0x00) { sis5595_transaction()
274 sis5595_write(SMB_STS_LO, temp & 0xff); sis5595_transaction()
275 sis5595_write(SMB_STS_HI, temp >> 8); sis5595_transaction()
278 temp = sis5595_read(SMB_STS_LO) + (sis5595_read(SMB_STS_HI) << 8); sis5595_transaction()
279 if (temp != 0x00) sis5595_transaction()
280 dev_dbg(&adap->dev, "Failed reset at end of transaction (%02x)\n", temp); sis5595_transaction()
|
| H A D | i2c-ali1535.c | 140 unsigned char temp; ali1535_setup() local
184 pci_read_config_byte(dev, SMBCFG, &temp); ali1535_setup()
185 if ((temp & ALI1535_SMBIO_EN) == 0) { ali1535_setup()
192 pci_read_config_byte(dev, SMBHSTCFG, &temp); ali1535_setup()
193 if ((temp & 1) == 0) { ali1535_setup()
209 pci_read_config_byte(dev, SMBREV, &temp); ali1535_setup()
210 dev_dbg(&dev->dev, "SMBREV = 0x%X\n", temp); ali1535_setup()
223 int temp; ali1535_transaction() local
233 temp = inb_p(SMBHSTSTS); ali1535_transaction()
237 if (temp & ALI1535_STS_BUSY) { ali1535_transaction()
259 temp); ali1535_transaction()
261 temp = inb_p(SMBHSTSTS); ali1535_transaction()
265 if (temp & (ALI1535_STS_ERR | ALI1535_STS_BUSY)) { ali1535_transaction()
268 temp = inb_p(SMBHSTSTS); ali1535_transaction()
269 if (temp & (ALI1535_STS_ERR | ALI1535_STS_BUSY)) { ali1535_transaction()
276 "device on bus is probably hung\n", temp); ali1535_transaction()
281 if (temp & ALI1535_STS_DONE) ali1535_transaction()
282 outb_p(temp, SMBHSTSTS); ali1535_transaction()
292 temp = inb_p(SMBHSTSTS); ali1535_transaction()
293 } while (((temp & ALI1535_STS_BUSY) && !(temp & ALI1535_STS_IDLE)) ali1535_transaction()
302 if (temp & ALI1535_STS_FAIL) { ali1535_transaction()
311 if (temp & ALI1535_STS_BUSERR) { ali1535_transaction()
319 if (temp & ALI1535_STS_DEV) { ali1535_transaction()
325 if (!(temp & ALI1535_STS_DONE)) { ali1535_transaction()
336 if (!(temp & ALI1535_STS_DONE)) { ali1535_transaction()
340 } else if (temp & ALI1535_STS_ERR) { ali1535_transaction()
355 int temp; ali1535_access() local
360 temp = inb_p(SMBHSTSTS); ali1535_access()
362 (timeout < MAX_TIMEOUT) && !(temp & ALI1535_STS_IDLE); ali1535_access()
365 temp = inb_p(SMBHSTSTS); ali1535_access()
368 dev_warn(&adap->dev, "Idle wait Timeout! STS=0x%02x\n", temp); ali1535_access()
|
| H A D | i2c-viapro.c | 138 int temp; vt596_transaction() local
145 if ((temp = inb_p(SMBHSTSTS)) & 0x1F) { vt596_transaction()
147 "Resetting...\n", temp); vt596_transaction()
149 outb_p(temp, SMBHSTSTS); vt596_transaction()
150 if ((temp = inb_p(SMBHSTSTS)) & 0x1F) { vt596_transaction()
152 "(0x%02x)\n", temp); vt596_transaction()
163 temp = inb_p(SMBHSTSTS); vt596_transaction()
164 } while ((temp & 0x01) && (++timeout < MAX_TIMEOUT)); vt596_transaction()
172 if (temp & 0x10) { vt596_transaction()
178 if (temp & 0x08) { vt596_transaction()
183 if (temp & 0x04) { vt596_transaction()
189 if (temp & 0x1F) vt596_transaction()
190 outb_p(temp, SMBHSTSTS); vt596_transaction()
322 unsigned char temp; vt596_probe() local
366 pci_read_config_byte(pdev, SMBHSTCFG, &temp); vt596_probe()
370 pci_write_config_byte(pdev, SMBHSTCFG, temp & 0xfe); vt596_probe()
372 pci_write_config_byte(pdev, SMBHSTCFG, temp | 0x01); vt596_probe()
375 } else if (!(temp & 0x01)) { vt596_probe()
383 pci_write_config_byte(pdev, SMBHSTCFG, temp | 0x01); vt596_probe()
|
| H A D | i2c-amd8111.c | 197 unsigned char protocol, len, pec, temp[2]; amd8111_access() local
338 status = amd_ec_read(smbus, AMD_SMB_STS, temp + 0); amd8111_access()
342 if (~temp[0] & AMD_SMB_STS_DONE) { amd8111_access()
344 status = amd_ec_read(smbus, AMD_SMB_STS, temp + 0); amd8111_access()
349 if (~temp[0] & AMD_SMB_STS_DONE) { amd8111_access()
351 status = amd_ec_read(smbus, AMD_SMB_STS, temp + 0); amd8111_access()
356 if ((~temp[0] & AMD_SMB_STS_DONE) || (temp[0] & AMD_SMB_STS_STATUS)) amd8111_access()
372 status = amd_ec_read(smbus, AMD_SMB_DATA, temp + 0); amd8111_access()
375 status = amd_ec_read(smbus, AMD_SMB_DATA + 1, temp + 1); amd8111_access()
378 data->word = (temp[1] << 8) | temp[0]; amd8111_access()
|
| /linux-4.1.27/drivers/gpu/drm/gma500/ |
| H A D | oaktrail_hdmi_i2c.c | 79 u32 temp; hdmi_i2c_irq_enable() local
81 temp = HDMI_READ(HDMI_HICR); hdmi_i2c_irq_enable()
82 temp |= (HDMI_INTR_I2C_ERROR | HDMI_INTR_I2C_FULL | HDMI_INTR_I2C_DONE); hdmi_i2c_irq_enable()
83 HDMI_WRITE(HDMI_HICR, temp); hdmi_i2c_irq_enable()
97 u32 temp; xfer_read() local
105 temp = ((pmsg->len) << 20) | HI2C_EDID_READ | HI2C_ENABLE_TRANSACTION; xfer_read()
106 HDMI_WRITE(HDMI_HI2CHCR, temp); xfer_read()
180 u32 temp; hdmi_i2c_read() local
185 temp = HDMI_READ(HDMI_HI2CRDB0 + (i * 4)); hdmi_i2c_read()
186 memcpy(buf + (offset + i * 4), &temp, 4); hdmi_i2c_read()
191 temp = HDMI_READ(HDMI_HISR); hdmi_i2c_read()
192 HDMI_WRITE(HDMI_HISR, temp | HDMI_INTR_I2C_FULL); hdmi_i2c_read()
196 temp = HDMI_READ(HDMI_HI2CHCR); hdmi_i2c_read()
197 HDMI_WRITE(HDMI_HI2CHCR, temp | HI2C_READ_CONTINUE); hdmi_i2c_read()
207 u32 temp; hdmi_i2c_transaction_done() local
210 temp = HDMI_READ(HDMI_HISR); hdmi_i2c_transaction_done()
211 HDMI_WRITE(HDMI_HISR, temp | HDMI_INTR_I2C_DONE); hdmi_i2c_transaction_done()
215 temp = HDMI_READ(HDMI_HI2CHCR); hdmi_i2c_transaction_done()
216 HDMI_WRITE(HDMI_HI2CHCR, temp & ~HI2C_ENABLE_TRANSACTION); hdmi_i2c_transaction_done()
256 u32 temp; oaktrail_hdmi_i2c_gpio_fix() local
264 temp = readl(base + 0x44); oaktrail_hdmi_i2c_gpio_fix()
265 DRM_DEBUG_DRIVER("old gpio val %x\n", temp); oaktrail_hdmi_i2c_gpio_fix()
266 writel((temp | 0x00000a00), (base + 0x44)); oaktrail_hdmi_i2c_gpio_fix()
267 temp = readl(base + 0x44); oaktrail_hdmi_i2c_gpio_fix()
268 DRM_DEBUG_DRIVER("new gpio val %x\n", temp); oaktrail_hdmi_i2c_gpio_fix()
|
| H A D | oaktrail_hdmi.c | 281 u32 dspcntr, pipeconf, dpll, temp; oaktrail_crtc_hdmi_mode_set() local
325 temp = htotal_calculate(adjusted_mode); oaktrail_crtc_hdmi_mode_set()
326 REG_WRITE(htot_reg, temp); oaktrail_crtc_hdmi_mode_set()
342 temp = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start; oaktrail_crtc_hdmi_mode_set()
343 HDMI_WRITE(HDMI_HBLANK_A, ((adjusted_mode->crtc_hdisplay - 1) << 16) | temp); oaktrail_crtc_hdmi_mode_set()
382 u32 temp; oaktrail_crtc_hdmi_dpms() local
391 temp = REG_READ(DSPBCNTR); oaktrail_crtc_hdmi_dpms()
392 if ((temp & DISPLAY_PLANE_ENABLE) != 0) { oaktrail_crtc_hdmi_dpms()
393 REG_WRITE(DSPBCNTR, temp & ~DISPLAY_PLANE_ENABLE); oaktrail_crtc_hdmi_dpms()
401 temp = REG_READ(PIPEBCONF); oaktrail_crtc_hdmi_dpms()
402 if ((temp & PIPEACONF_ENABLE) != 0) { oaktrail_crtc_hdmi_dpms()
403 REG_WRITE(PIPEBCONF, temp & ~PIPEACONF_ENABLE); oaktrail_crtc_hdmi_dpms()
408 temp = REG_READ(PCH_PIPEBCONF); oaktrail_crtc_hdmi_dpms()
409 if ((temp & PIPEACONF_ENABLE) != 0) { oaktrail_crtc_hdmi_dpms()
410 REG_WRITE(PCH_PIPEBCONF, temp & ~PIPEACONF_ENABLE); oaktrail_crtc_hdmi_dpms()
418 temp = REG_READ(DPLL_CTRL); oaktrail_crtc_hdmi_dpms()
419 if ((temp & DPLL_PWRDN) == 0) { oaktrail_crtc_hdmi_dpms()
420 REG_WRITE(DPLL_CTRL, temp | (DPLL_PWRDN | DPLL_RESET)); oaktrail_crtc_hdmi_dpms()
432 temp = REG_READ(DPLL_CTRL); oaktrail_crtc_hdmi_dpms()
433 if ((temp & DPLL_PWRDN) != 0) { oaktrail_crtc_hdmi_dpms()
434 REG_WRITE(DPLL_CTRL, temp & ~(DPLL_PWRDN | DPLL_RESET)); oaktrail_crtc_hdmi_dpms()
435 temp = REG_READ(DPLL_CLK_ENABLE); oaktrail_crtc_hdmi_dpms()
436 REG_WRITE(DPLL_CLK_ENABLE, temp | DPLL_EN_DISP | DPLL_SEL_HDMI | DPLL_EN_HDMI); oaktrail_crtc_hdmi_dpms()
443 temp = REG_READ(PIPEBCONF); oaktrail_crtc_hdmi_dpms()
444 if ((temp & PIPEACONF_ENABLE) == 0) { oaktrail_crtc_hdmi_dpms()
445 REG_WRITE(PIPEBCONF, temp | PIPEACONF_ENABLE); oaktrail_crtc_hdmi_dpms()
450 temp = REG_READ(PCH_PIPEBCONF); oaktrail_crtc_hdmi_dpms()
451 if ((temp & PIPEACONF_ENABLE) == 0) { oaktrail_crtc_hdmi_dpms()
452 REG_WRITE(PCH_PIPEBCONF, temp | PIPEACONF_ENABLE); oaktrail_crtc_hdmi_dpms()
459 temp = REG_READ(DSPBCNTR); oaktrail_crtc_hdmi_dpms()
460 if ((temp & DISPLAY_PLANE_ENABLE) == 0) { oaktrail_crtc_hdmi_dpms()
461 REG_WRITE(DSPBCNTR, temp | DISPLAY_PLANE_ENABLE); oaktrail_crtc_hdmi_dpms()
498 u32 temp; oaktrail_hdmi_dpms() local
504 temp = 0x0; oaktrail_hdmi_dpms()
506 temp = 0x99; oaktrail_hdmi_dpms()
509 HDMI_WRITE(HDMI_VIDEO_REG, temp); oaktrail_hdmi_dpms()
533 u32 temp; oaktrail_hdmi_detect() local
535 temp = HDMI_READ(HDMI_HSR); oaktrail_hdmi_detect()
536 DRM_DEBUG_KMS("HDMI_HSR %x\n", temp); oaktrail_hdmi_detect()
538 if ((temp & HDMI_DETECT_HDP) != 0) oaktrail_hdmi_detect()
|
| H A D | gma_display.c | 207 u32 temp; gma_crtc_dpms() local
226 temp = REG_READ(map->dpll); gma_crtc_dpms()
227 if ((temp & DPLL_VCO_ENABLE) == 0) { gma_crtc_dpms()
228 REG_WRITE(map->dpll, temp); gma_crtc_dpms()
232 REG_WRITE(map->dpll, temp | DPLL_VCO_ENABLE); gma_crtc_dpms()
236 REG_WRITE(map->dpll, temp | DPLL_VCO_ENABLE); gma_crtc_dpms()
243 temp = REG_READ(map->cntr); gma_crtc_dpms()
244 if ((temp & DISPLAY_PLANE_ENABLE) == 0) { gma_crtc_dpms()
246 temp | DISPLAY_PLANE_ENABLE); gma_crtc_dpms()
254 temp = REG_READ(map->conf); gma_crtc_dpms()
255 if ((temp & PIPEACONF_ENABLE) == 0) gma_crtc_dpms()
256 REG_WRITE(map->conf, temp | PIPEACONF_ENABLE); gma_crtc_dpms()
258 temp = REG_READ(map->status); gma_crtc_dpms()
259 temp &= ~(0xFFFF); gma_crtc_dpms()
260 temp |= PIPE_FIFO_UNDERRUN; gma_crtc_dpms()
261 REG_WRITE(map->status, temp); gma_crtc_dpms()
290 temp = REG_READ(map->cntr); gma_crtc_dpms()
291 if ((temp & DISPLAY_PLANE_ENABLE) != 0) { gma_crtc_dpms()
293 temp & ~DISPLAY_PLANE_ENABLE); gma_crtc_dpms()
300 temp = REG_READ(map->conf); gma_crtc_dpms()
301 if ((temp & PIPEACONF_ENABLE) != 0) { gma_crtc_dpms()
302 REG_WRITE(map->conf, temp & ~PIPEACONF_ENABLE); gma_crtc_dpms()
312 temp = REG_READ(map->dpll); gma_crtc_dpms()
313 if ((temp & DPLL_VCO_ENABLE) != 0) { gma_crtc_dpms()
314 REG_WRITE(map->dpll, temp & ~DPLL_VCO_ENABLE); gma_crtc_dpms()
341 uint32_t temp; gma_crtc_cursor_set() local
351 temp = CURSOR_MODE_DISABLE; gma_crtc_cursor_set()
355 REG_WRITE(control, temp); gma_crtc_cursor_set()
429 temp = 0; gma_crtc_cursor_set()
431 temp |= (pipe << 28); gma_crtc_cursor_set()
432 temp |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE; gma_crtc_cursor_set()
435 REG_WRITE(control, temp); gma_crtc_cursor_set()
463 uint32_t temp = 0; gma_crtc_cursor_move() local
467 temp |= (CURSOR_POS_SIGN << CURSOR_X_SHIFT); gma_crtc_cursor_move()
471 temp |= (CURSOR_POS_SIGN << CURSOR_Y_SHIFT); gma_crtc_cursor_move()
475 temp |= ((x & CURSOR_POS_MASK) << CURSOR_X_SHIFT); gma_crtc_cursor_move()
476 temp |= ((y & CURSOR_POS_MASK) << CURSOR_Y_SHIFT); gma_crtc_cursor_move()
481 REG_WRITE((pipe == 0) ? CURAPOS : CURBPOS, temp); gma_crtc_cursor_move()
|
| H A D | mdfld_intel_display.c | 55 int count, temp; mdfldWaitForPipeDisable() local
73 temp = REG_READ(map->conf); mdfldWaitForPipeDisable()
74 if ((temp & PIPEACONF_PIPE_STATE) == 0) mdfldWaitForPipeDisable()
83 int count, temp; mdfldWaitForPipeEnable() local
101 temp = REG_READ(map->conf); mdfldWaitForPipeEnable()
102 if ((temp & PIPEACONF_PIPE_STATE) == 1) mdfldWaitForPipeEnable()
242 u32 temp; mdfld_disable_crtc() local
252 temp = REG_READ(map->cntr); mdfld_disable_crtc()
253 if ((temp & DISPLAY_PLANE_ENABLE) != 0) { mdfld_disable_crtc()
255 temp & ~DISPLAY_PLANE_ENABLE); mdfld_disable_crtc()
264 temp = REG_READ(map->conf); mdfld_disable_crtc()
265 if ((temp & PIPEACONF_ENABLE) != 0) { mdfld_disable_crtc()
266 temp &= ~PIPEACONF_ENABLE; mdfld_disable_crtc()
267 temp |= PIPECONF_PLANE_OFF | PIPECONF_CURSOR_OFF; mdfld_disable_crtc()
268 REG_WRITE(map->conf, temp); mdfld_disable_crtc()
275 temp = REG_READ(map->dpll); mdfld_disable_crtc()
276 if (temp & DPLL_VCO_ENABLE) { mdfld_disable_crtc()
280 temp &= ~(DPLL_VCO_ENABLE); mdfld_disable_crtc()
281 REG_WRITE(map->dpll, temp); mdfld_disable_crtc()
287 if (!(temp & MDFLD_PWR_GATE_EN)) { mdfld_disable_crtc()
289 REG_WRITE(map->dpll, temp | MDFLD_PWR_GATE_EN); mdfld_disable_crtc()
312 u32 temp; mdfld_crtc_dpms() local
331 temp = REG_READ(map->dpll); mdfld_crtc_dpms()
333 if ((temp & DPLL_VCO_ENABLE) == 0) { mdfld_crtc_dpms()
336 if (temp & MDFLD_PWR_GATE_EN) { mdfld_crtc_dpms()
337 temp &= ~MDFLD_PWR_GATE_EN; mdfld_crtc_dpms()
338 REG_WRITE(map->dpll, temp); mdfld_crtc_dpms()
343 REG_WRITE(map->dpll, temp); mdfld_crtc_dpms()
348 REG_WRITE(map->dpll, temp | DPLL_VCO_ENABLE); mdfld_crtc_dpms()
364 temp = REG_READ(map->cntr); mdfld_crtc_dpms()
365 if ((temp & DISPLAY_PLANE_ENABLE) == 0) { mdfld_crtc_dpms()
367 temp | DISPLAY_PLANE_ENABLE); mdfld_crtc_dpms()
373 temp = REG_READ(map->conf); mdfld_crtc_dpms()
374 if ((temp & PIPEACONF_ENABLE) == 0) { mdfld_crtc_dpms()
391 temp = REG_READ(map->cntr); mdfld_crtc_dpms()
393 temp & ~DISPLAY_PLANE_ENABLE); mdfld_crtc_dpms()
398 temp = REG_READ(map->conf); mdfld_crtc_dpms()
399 temp &= ~PIPEACONF_ENABLE; mdfld_crtc_dpms()
400 REG_WRITE(map->conf, temp); mdfld_crtc_dpms()
407 temp = REG_READ(map->cntr); mdfld_crtc_dpms()
409 temp | DISPLAY_PLANE_ENABLE); mdfld_crtc_dpms()
414 temp = REG_READ(map->conf); mdfld_crtc_dpms()
415 temp |= PIPEACONF_ENABLE; mdfld_crtc_dpms()
416 REG_WRITE(map->conf, temp); mdfld_crtc_dpms()
440 temp = REG_READ(map->cntr); mdfld_crtc_dpms()
441 if ((temp & DISPLAY_PLANE_ENABLE) != 0) { mdfld_crtc_dpms()
443 temp & ~DISPLAY_PLANE_ENABLE); mdfld_crtc_dpms()
450 temp = REG_READ(map->conf); mdfld_crtc_dpms()
451 if ((temp & PIPEACONF_ENABLE) != 0) { mdfld_crtc_dpms()
452 temp &= ~PIPEACONF_ENABLE; mdfld_crtc_dpms()
453 temp |= PIPECONF_PLANE_OFF | PIPECONF_CURSOR_OFF; mdfld_crtc_dpms()
454 REG_WRITE(map->conf, temp); mdfld_crtc_dpms()
461 temp = REG_READ(map->dpll); mdfld_crtc_dpms()
462 if (temp & DPLL_VCO_ENABLE) { mdfld_crtc_dpms()
466 temp &= ~(DPLL_VCO_ENABLE); mdfld_crtc_dpms()
467 REG_WRITE(map->dpll, temp); mdfld_crtc_dpms()
|
| H A D | oaktrail_crtc.c | 229 u32 temp; oaktrail_crtc_dpms() local
250 temp = REG_READ_WITH_AUX(map->dpll, i); oaktrail_crtc_dpms()
251 if ((temp & DPLL_VCO_ENABLE) == 0) { oaktrail_crtc_dpms()
252 REG_WRITE_WITH_AUX(map->dpll, temp, i); oaktrail_crtc_dpms()
257 temp | DPLL_VCO_ENABLE, i); oaktrail_crtc_dpms()
262 temp | DPLL_VCO_ENABLE, i); oaktrail_crtc_dpms()
269 temp = REG_READ_WITH_AUX(map->conf, i); oaktrail_crtc_dpms()
270 if ((temp & PIPEACONF_ENABLE) == 0) { oaktrail_crtc_dpms()
272 temp | PIPEACONF_ENABLE, i); oaktrail_crtc_dpms()
276 temp = REG_READ_WITH_AUX(map->cntr, i); oaktrail_crtc_dpms()
277 if ((temp & DISPLAY_PLANE_ENABLE) == 0) { oaktrail_crtc_dpms()
279 temp | DISPLAY_PLANE_ENABLE, oaktrail_crtc_dpms()
302 temp = REG_READ_WITH_AUX(map->cntr, i); oaktrail_crtc_dpms()
303 if ((temp & DISPLAY_PLANE_ENABLE) != 0) { oaktrail_crtc_dpms()
305 temp & ~DISPLAY_PLANE_ENABLE, i); oaktrail_crtc_dpms()
313 temp = REG_READ_WITH_AUX(map->conf, i); oaktrail_crtc_dpms()
314 if ((temp & PIPEACONF_ENABLE) != 0) { oaktrail_crtc_dpms()
316 temp & ~PIPEACONF_ENABLE, i); oaktrail_crtc_dpms()
322 temp = REG_READ_WITH_AUX(map->dpll, i); oaktrail_crtc_dpms()
323 if ((temp & DPLL_VCO_ENABLE) != 0) { oaktrail_crtc_dpms()
325 temp & ~DPLL_VCO_ENABLE, i); oaktrail_crtc_dpms()
|
| H A D | mdfld_device.c | 243 u32 temp = 0; mdfld_restore_display_registers() local
383 temp = REG_READ(mipi_reg); mdfld_restore_display_registers()
384 temp |= LP_OUTPUT_HOLD_RELEASE; mdfld_restore_display_registers()
385 REG_WRITE(mipi_reg, temp); mdfld_restore_display_registers()
390 temp = REG_READ(device_ready_reg); mdfld_restore_display_registers()
391 temp &= ~ULPS_MASK; mdfld_restore_display_registers()
392 temp |= 0x3; mdfld_restore_display_registers()
393 temp |= EXIT_ULPS_DEV_READY; mdfld_restore_display_registers()
394 REG_WRITE(device_ready_reg, temp); mdfld_restore_display_registers()
397 temp = REG_READ(device_ready_reg); mdfld_restore_display_registers()
398 temp &= ~ULPS_MASK; mdfld_restore_display_registers()
399 temp |= EXITING_ULPS; mdfld_restore_display_registers()
400 REG_WRITE(device_ready_reg, temp); mdfld_restore_display_registers()
|
| H A D | cdv_intel_crt.c | 42 u32 temp, reg; cdv_intel_crt_dpms() local
45 temp = REG_READ(reg); cdv_intel_crt_dpms()
46 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE); cdv_intel_crt_dpms()
47 temp &= ~ADPA_DAC_ENABLE; cdv_intel_crt_dpms()
51 temp |= ADPA_DAC_ENABLE; cdv_intel_crt_dpms()
54 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE; cdv_intel_crt_dpms()
57 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE; cdv_intel_crt_dpms()
60 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE; cdv_intel_crt_dpms()
64 REG_WRITE(reg, temp); cdv_intel_crt_dpms()
|
| /linux-4.1.27/drivers/acpi/ |
| H A D | acpi_lpat.c | 34 int i, delta_temp, delta_raw, temp; acpi_lpat_raw_to_temp() local
46 delta_temp = lpat[i+1].temp - lpat[i].temp; acpi_lpat_raw_to_temp()
48 temp = lpat[i].temp + (raw - lpat[i].raw) * delta_temp / delta_raw; acpi_lpat_raw_to_temp()
50 return temp; acpi_lpat_raw_to_temp()
59 * @temp: the temperature, used as a key to get the raw value from the
66 int temp) acpi_lpat_temp_to_raw()
72 if (temp >= lpat[i].temp && temp <= lpat[i+1].temp) acpi_lpat_temp_to_raw()
79 delta_temp = lpat[i+1].temp - lpat[i].temp; acpi_lpat_temp_to_raw()
81 raw = lpat[i].raw + (temp - lpat[i].temp) * delta_raw / delta_temp; acpi_lpat_temp_to_raw()
65 acpi_lpat_temp_to_raw(struct acpi_lpat_conversion_table *lpat_table, int temp) acpi_lpat_temp_to_raw() argument
|
| /linux-4.1.27/arch/parisc/include/uapi/asm/ |
| H A D | swab.h | 31 unsigned int temp; __arch_swab32() local
35 : "=r" (x), "=&r" (temp) __arch_swab32()
54 __u64 temp; __arch_swab64() local
59 : "=r" (x), "=&r" (temp) __arch_swab64()
|
| /linux-4.1.27/arch/mips/include/asm/ |
| H A D | edac.h | 11 unsigned long temp; atomic_scrub() local
29 : "=&r" (temp), "=" GCC_OFF_SMALL_ASM() (*virt_addr) atomic_scrub()
|
| H A D | bitops.h | 72 unsigned long temp; set_bit() local
82 : "=&r" (temp), "=" GCC_OFF_SMALL_ASM() (*m) set_bit()
91 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m) set_bit()
93 } while (unlikely(!temp)); set_bit()
103 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m) set_bit()
105 } while (unlikely(!temp)); set_bit()
124 unsigned long temp; clear_bit() local
134 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m) clear_bit()
143 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m) clear_bit()
145 } while (unlikely(!temp)); clear_bit()
155 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m) clear_bit()
157 } while (unlikely(!temp)); clear_bit()
191 unsigned long temp; change_bit() local
200 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m) change_bit()
204 unsigned long temp; change_bit() local
213 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m) change_bit()
215 } while (unlikely(!temp)); change_bit()
238 unsigned long temp; test_and_set_bit() local
248 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) test_and_set_bit()
253 unsigned long temp; test_and_set_bit() local
262 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) test_and_set_bit()
267 res = temp & (1UL << bit); test_and_set_bit()
292 unsigned long temp; test_and_set_bit_lock() local
302 : "=&r" (temp), "+m" (*m), "=&r" (res) test_and_set_bit_lock()
307 unsigned long temp; test_and_set_bit_lock() local
316 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) test_and_set_bit_lock()
321 res = temp & (1UL << bit); test_and_set_bit_lock()
347 unsigned long temp; test_and_clear_bit() local
358 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) test_and_clear_bit()
364 unsigned long temp; test_and_clear_bit() local
372 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) test_and_clear_bit()
375 } while (unlikely(!temp)); test_and_clear_bit()
379 unsigned long temp; test_and_clear_bit() local
389 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) test_and_clear_bit()
394 res = temp & (1UL << bit); test_and_clear_bit()
421 unsigned long temp; test_and_change_bit() local
431 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) test_and_change_bit()
436 unsigned long temp; test_and_change_bit() local
445 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) test_and_change_bit()
450 res = temp & (1UL << bit); test_and_change_bit()
|
| H A D | atomic.h | 48 int temp; \
57 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) \
60 int temp; \
69 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) \
71 } while (unlikely(!temp)); \
89 int temp; \
99 : "=&r" (result), "=&r" (temp), \
103 int temp; \
112 : "=&r" (result), "=&r" (temp), \
117 result = temp; result c_op i; \
159 int temp; atomic_sub_if_positive() local
173 : "=&r" (result), "=&r" (temp), atomic_sub_if_positive()
178 int temp; atomic_sub_if_positive() local
192 : "=&r" (result), "=&r" (temp), atomic_sub_if_positive()
327 long temp; \
336 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) \
339 long temp; \
348 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) \
350 } while (unlikely(!temp)); \
368 long temp; \
378 : "=&r" (result), "=&r" (temp), \
382 long temp; \
391 : "=&r" (result), "=&r" (temp), \
397 result = temp; result c_op i; \
440 long temp; atomic64_sub_if_positive() local
454 : "=&r" (result), "=&r" (temp), atomic64_sub_if_positive()
459 long temp; atomic64_sub_if_positive() local
473 : "=&r" (result), "=&r" (temp), atomic64_sub_if_positive()
|
| H A D | local.h | 34 unsigned long temp; local_add_return() local
44 : "=&r" (result), "=&r" (temp), "=m" (l->a.counter) local_add_return()
48 unsigned long temp; local_add_return() local
58 : "=&r" (result), "=&r" (temp), "=m" (l->a.counter) local_add_return()
79 unsigned long temp; local_sub_return() local
89 : "=&r" (result), "=&r" (temp), "=m" (l->a.counter) local_sub_return()
93 unsigned long temp; local_sub_return() local
103 : "=&r" (result), "=&r" (temp), "=m" (l->a.counter) local_sub_return()
|
| H A D | regdef.h | 23 #define AT $1 /* assembler temp - uppercase because of ".set at" */
66 #define AT $at /* assembler temp - uppercase because of ".set at" */
94 #define t9 $25 /* callee address for PIC/temp */
|
| /linux-4.1.27/drivers/hwmon/ |
| H A D | adt7470.c | 156 s8 temp[ADT7470_TEMP_COUNT]; member in struct:adt7470_data
227 /* Delay is 200ms * number of temp sensors. */ adt7470_read_temperatures()
251 data->temp[i] = i2c_smbus_read_byte_data(client, adt7470_read_temperatures()
253 if (data->temp[i]) adt7470_read_temperatures()
314 data->temp[i] = i2c_smbus_read_byte_data(client, adt7470_update_device()
412 long temp; set_auto_update_interval() local
414 if (kstrtol(buf, 10, &temp)) set_auto_update_interval()
417 temp = clamp_val(temp, 0, 60000); set_auto_update_interval()
420 data->auto_update_interval = temp; set_auto_update_interval()
440 long temp; set_num_temp_sensors() local
442 if (kstrtol(buf, 10, &temp)) set_num_temp_sensors()
445 temp = clamp_val(temp, -1, 10); set_num_temp_sensors()
448 data->num_temp_sensors = temp; set_num_temp_sensors()
449 if (temp < 0) set_num_temp_sensors()
473 long temp; set_temp_min() local
475 if (kstrtol(buf, 10, &temp)) set_temp_min()
478 temp = DIV_ROUND_CLOSEST(temp, 1000); set_temp_min()
479 temp = clamp_val(temp, -128, 127); set_temp_min()
482 data->temp_min[attr->index] = temp; set_temp_min()
484 temp); set_temp_min()
507 long temp; set_temp_max() local
509 if (kstrtol(buf, 10, &temp)) set_temp_max()
512 temp = DIV_ROUND_CLOSEST(temp, 1000); set_temp_max()
513 temp = clamp_val(temp, -128, 127); set_temp_max()
516 data->temp_max[attr->index] = temp; set_temp_max()
518 temp); set_temp_max()
529 return sprintf(buf, "%d\n", 1000 * data->temp[attr->index]); show_temp()
562 long temp; set_fan_max() local
564 if (kstrtol(buf, 10, &temp) || !temp) set_fan_max()
567 temp = FAN_RPM_TO_PERIOD(temp); set_fan_max()
568 temp = clamp_val(temp, 1, 65534); set_fan_max()
571 data->fan_max[attr->index] = temp; set_fan_max()
572 adt7470_write_word_data(client, ADT7470_REG_FAN_MAX(attr->index), temp); set_fan_max()
599 long temp; set_fan_min() local
601 if (kstrtol(buf, 10, &temp) || !temp) set_fan_min()
604 temp = FAN_RPM_TO_PERIOD(temp); set_fan_min()
605 temp = clamp_val(temp, 1, 65534); set_fan_min()
608 data->fan_min[attr->index] = temp; set_fan_min()
609 adt7470_write_word_data(client, ADT7470_REG_FAN_MIN(attr->index), temp); set_fan_min()
643 long temp; set_force_pwm_max() local
646 if (kstrtol(buf, 10, &temp)) set_force_pwm_max()
650 data->force_pwm_max = temp; set_force_pwm_max()
652 if (temp) set_force_pwm_max()
676 long temp; set_pwm() local
678 if (kstrtol(buf, 10, &temp)) set_pwm()
681 temp = clamp_val(temp, 0, 255); set_pwm()
684 data->pwm[attr->index] = temp; set_pwm()
685 i2c_smbus_write_byte_data(client, ADT7470_REG_PWM(attr->index), temp); set_pwm()
708 long temp; set_pwm_max() local
710 if (kstrtol(buf, 10, &temp)) set_pwm_max()
713 temp = clamp_val(temp, 0, 255); set_pwm_max()
716 data->pwm_max[attr->index] = temp; set_pwm_max()
718 temp); set_pwm_max()
741 long temp; set_pwm_min() local
743 if (kstrtol(buf, 10, &temp)) set_pwm_min()
746 temp = clamp_val(temp, 0, 255); set_pwm_min()
749 data->pwm_min[attr->index] = temp; set_pwm_min()
751 temp); set_pwm_min()
784 long temp; set_pwm_tmin() local
786 if (kstrtol(buf, 10, &temp)) set_pwm_tmin()
789 temp = DIV_ROUND_CLOSEST(temp, 1000); set_pwm_tmin()
790 temp = clamp_val(temp, -128, 127); set_pwm_tmin()
793 data->pwm_tmin[attr->index] = temp; set_pwm_tmin()
795 temp); set_pwm_tmin()
820 long temp; set_pwm_auto() local
823 if (kstrtol(buf, 10, &temp)) set_pwm_auto()
831 if (temp != 2 && temp != 1) set_pwm_auto()
833 temp--; set_pwm_auto()
836 data->pwm_automatic[attr->index] = temp; set_pwm_auto()
838 if (temp) set_pwm_auto()
880 long temp; set_pwm_auto_temp() local
883 if (kstrtol(buf, 10, &temp)) set_pwm_auto_temp()
886 temp = cvt_auto_temp(temp); set_pwm_auto_temp()
887 if (temp < 0) set_pwm_auto_temp()
888 return temp; set_pwm_auto_temp()
891 data->pwm_automatic[attr->index] = temp; set_pwm_auto_temp()
896 reg |= (temp << 4) & 0xF0; set_pwm_auto_temp()
899 reg |= temp & 0xF; set_pwm_auto_temp()
|
| H A D | adt7462.c | 212 u8 temp[ADT7462_TEMP_COUNT]; member in struct:adt7462_data
213 /* bits 6-7 are quarter pieces of temp */
701 data->temp[i] = i2c_smbus_read_byte_data(client, adt7462_update_device()
808 long temp; set_temp_min() local
810 if (kstrtol(buf, 10, &temp) || !temp_enabled(data, attr->index)) set_temp_min()
813 temp = DIV_ROUND_CLOSEST(temp, 1000) + 64; set_temp_min()
814 temp = clamp_val(temp, 0, 255); set_temp_min()
817 data->temp_min[attr->index] = temp; set_temp_min()
819 temp); set_temp_min()
846 long temp; set_temp_max() local
848 if (kstrtol(buf, 10, &temp) || !temp_enabled(data, attr->index)) set_temp_max()
851 temp = DIV_ROUND_CLOSEST(temp, 1000) + 64; set_temp_max()
852 temp = clamp_val(temp, 0, 255); set_temp_max()
855 data->temp_max[attr->index] = temp; set_temp_max()
857 temp); set_temp_max()
873 return sprintf(buf, "%d\n", 1000 * (data->temp[attr->index] - 64) + show_temp()
910 long temp; set_volt_max() local
912 if (kstrtol(buf, 10, &temp) || !x) set_volt_max()
915 temp *= 1000; /* convert mV to uV */ set_volt_max()
916 temp = DIV_ROUND_CLOSEST(temp, x); set_volt_max()
917 temp = clamp_val(temp, 0, 255); set_volt_max()
920 data->volt_max[attr->index] = temp; set_volt_max()
923 temp); set_volt_max()
952 long temp; set_volt_min() local
954 if (kstrtol(buf, 10, &temp) || !x) set_volt_min()
957 temp *= 1000; /* convert mV to uV */ set_volt_min()
958 temp = DIV_ROUND_CLOSEST(temp, x); set_volt_min()
959 temp = clamp_val(temp, 0, 255); set_volt_min()
962 data->volt_min[attr->index] = temp; set_volt_min()
965 temp); set_volt_min()
1021 u16 temp; show_fan_min() local
1024 temp = data->fan_min[attr->index]; show_fan_min()
1025 temp <<= 8; show_fan_min()
1028 !FAN_DATA_VALID(temp)) show_fan_min()
1031 return sprintf(buf, "%d\n", FAN_PERIOD_TO_RPM(temp)); show_fan_min()
1041 long temp; set_fan_min() local
1043 if (kstrtol(buf, 10, &temp) || !temp || set_fan_min()
1047 temp = FAN_RPM_TO_PERIOD(temp); set_fan_min()
1048 temp >>= 8; set_fan_min()
1049 temp = clamp_val(temp, 1, 255); set_fan_min()
1052 data->fan_min[attr->index] = temp; set_fan_min()
1054 temp); set_fan_min()
1089 long temp; set_force_pwm_max() local
1092 if (kstrtol(buf, 10, &temp)) set_force_pwm_max()
1097 if (temp) set_force_pwm_max()
1122 long temp; set_pwm() local
1124 if (kstrtol(buf, 10, &temp)) set_pwm()
1127 temp = clamp_val(temp, 0, 255); set_pwm()
1130 data->pwm[attr->index] = temp; set_pwm()
1131 i2c_smbus_write_byte_data(client, ADT7462_REG_PWM(attr->index), temp); set_pwm()
1152 long temp; set_pwm_max() local
1154 if (kstrtol(buf, 10, &temp)) set_pwm_max()
1157 temp = clamp_val(temp, 0, 255); set_pwm_max()
1160 data->pwm_max = temp; set_pwm_max()
1161 i2c_smbus_write_byte_data(client, ADT7462_REG_PWM_MAX, temp); set_pwm_max()
1184 long temp; set_pwm_min() local
1186 if (kstrtol(buf, 10, &temp)) set_pwm_min()
1189 temp = clamp_val(temp, 0, 255); set_pwm_min()
1192 data->pwm_min[attr->index] = temp; set_pwm_min()
1194 temp); set_pwm_min()
1218 long temp; set_pwm_hyst() local
1220 if (kstrtol(buf, 10, &temp)) set_pwm_hyst()
1223 temp = DIV_ROUND_CLOSEST(temp, 1000); set_pwm_hyst()
1224 temp = clamp_val(temp, 0, 15); set_pwm_hyst()
1227 temp &= ADT7462_PWM_HYST_MASK; set_pwm_hyst()
1228 temp |= data->pwm_trange[attr->index] & ADT7462_PWM_RANGE_MASK; set_pwm_hyst()
1231 data->pwm_trange[attr->index] = temp; set_pwm_hyst()
1233 temp); set_pwm_hyst()
1259 int temp; set_pwm_tmax() local
1275 temp = trange_value << ADT7462_PWM_RANGE_SHIFT; set_pwm_tmax()
1276 temp |= data->pwm_trange[attr->index] & ADT7462_PWM_HYST_MASK; set_pwm_tmax()
1279 data->pwm_trange[attr->index] = temp; set_pwm_tmax()
1281 temp); set_pwm_tmax()
1304 long temp; set_pwm_tmin() local
1306 if (kstrtol(buf, 10, &temp)) set_pwm_tmin()
1309 temp = DIV_ROUND_CLOSEST(temp, 1000) + 64; set_pwm_tmin()
1310 temp = clamp_val(temp, 0, 255); set_pwm_tmin()
1313 data->pwm_tmin[attr->index] = temp; set_pwm_tmin()
1315 temp); set_pwm_tmin()
1344 int temp = data->pwm_cfg[which] & ~ADT7462_PWM_CHANNEL_MASK; set_pwm_channel() local
1345 temp |= value << ADT7462_PWM_CHANNEL_SHIFT; set_pwm_channel()
1348 data->pwm_cfg[which] = temp; set_pwm_channel()
1349 i2c_smbus_write_byte_data(client, ADT7462_REG_PWM_CFG(which), temp); set_pwm_channel()
1361 long temp; set_pwm_auto() local
1363 if (kstrtol(buf, 10, &temp)) set_pwm_auto()
1366 switch (temp) { set_pwm_auto()
1387 case 0: /* temp[1234] only */ show_pwm_auto_temp()
1420 long temp; set_pwm_auto_temp() local
1422 if (kstrtol(buf, 10, &temp)) set_pwm_auto_temp()
1425 temp = cvt_auto_temp(temp); set_pwm_auto_temp()
1426 if (temp < 0) set_pwm_auto_temp()
1427 return temp; set_pwm_auto_temp()
1429 set_pwm_channel(client, data, attr->index, temp); set_pwm_auto_temp()
|
| H A D | k8temp.c | 49 u32 temp[2][2]; /* core, place */ member in struct:k8temp_data
67 pci_read_config_dword(pdev, REG_TEMP, &data->temp[0][0]); k8temp_update_device()
73 &data->temp[0][1]); k8temp_update_device()
81 &data->temp[1][0]); k8temp_update_device()
87 &data->temp[1][1]); k8temp_update_device()
119 int temp; show_temp() local
125 temp = TEMP_FROM_REG(data->temp[core][place]) + data->temp_offset; show_temp()
127 return sprintf(buf, "%d\n", temp); show_temp()
181 u32 temp; k8temp_probe() local
234 pci_read_config_dword(pdev, REG_TEMP, &temp); k8temp_probe()
236 if (!((temp >> 16) & 0xff)) /* if temp is 0 -49C is unlikely */ k8temp_probe()
243 pci_read_config_dword(pdev, REG_TEMP, &temp); k8temp_probe()
244 if (!((temp >> 16) & 0xff)) /* if temp is 0 -49C is unlikely */ k8temp_probe()
|
| H A D | ab8500.c | 57 int v_ntc, int *temp) ab8500_voltage_to_temp()
74 *temp = tbl[i].temp * 1000 + ((tbl[i + 1].temp - tbl[i].temp) * 1000 * ab8500_voltage_to_temp()
80 static int ab8500_read_sensor(struct abx500_temp *data, u8 sensor, int *temp) ab8500_read_sensor() argument
86 *temp = ab8500_btemp_get_batctrl_temp(ab8500_data->btemp); ab8500_read_sensor()
88 *temp = ab8500_btemp_get_temp(ab8500_data->btemp); ab8500_read_sensor()
94 ret = ab8500_voltage_to_temp(&ab8500_data->cfg, voltage, temp); ab8500_read_sensor()
108 dev_warn(&abx500_data->pdev->dev, "Power off due to critical temp\n"); ab8500_thermal_power_off()
56 ab8500_voltage_to_temp(struct ab8500_gpadc_cfg *cfg, int v_ntc, int *temp) ab8500_voltage_to_temp() argument
|
| H A D | i5k_amb.c | 160 unsigned long temp; store_amb_min() local
161 int ret = kstrtoul(buf, 10, &temp); store_amb_min()
165 temp = temp / 500; store_amb_min()
166 if (temp > 255) store_amb_min()
167 temp = 255; store_amb_min()
169 amb_write_byte(data, amb_reg_temp_min(attr->index), temp); store_amb_min()
180 unsigned long temp; store_amb_mid() local
181 int ret = kstrtoul(buf, 10, &temp); store_amb_mid()
185 temp = temp / 500; store_amb_mid()
186 if (temp > 255) store_amb_mid()
187 temp = 255; store_amb_mid()
189 amb_write_byte(data, amb_reg_temp_mid(attr->index), temp); store_amb_mid()
200 unsigned long temp; store_amb_max() local
201 int ret = kstrtoul(buf, 10, &temp); store_amb_max()
205 temp = temp / 500; store_amb_max()
206 if (temp > 255) store_amb_max()
207 temp = 255; store_amb_max()
209 amb_write_byte(data, amb_reg_temp_max(attr->index), temp); store_amb_max()
296 "temp%d_label", d); i5k_amb_hwmon_init()
311 "temp%d_input", d); i5k_amb_hwmon_init()
326 "temp%d_min", d); i5k_amb_hwmon_init()
342 "temp%d_mid", d); i5k_amb_hwmon_init()
358 "temp%d_max", d); i5k_amb_hwmon_init()
374 "temp%d_alarm", d); i5k_amb_hwmon_init()
|
| H A D | tmp421.c | 79 s16 temp[4]; member in struct:tmp421_data
85 int temp = reg & ~0xf; temp_from_s16() local
87 return (temp * 1000 + 128) / 256; temp_from_s16()
93 int temp = reg & ~0xf; temp_from_u16() local
96 temp -= 64 * 256; temp_from_u16()
98 return (temp * 1000 + 128) / 256; temp_from_u16()
114 data->temp[i] = i2c_smbus_read_byte_data(client, tmp421_update_device()
116 data->temp[i] |= i2c_smbus_read_byte_data(client, tmp421_update_device()
133 int temp; show_temp_value() local
137 temp = temp_from_u16(data->temp[index]); show_temp_value()
139 temp = temp_from_s16(data->temp[index]); show_temp_value()
142 return sprintf(buf, "%d\n", temp); show_temp_value()
155 if (data->temp[index] & 0x01) show_fault()
|
| H A D | i5500_temp.c | 50 long temp; show_temp() local
56 temp = ((long)tsthrhi - tsfsc) * 500; show_temp()
58 return sprintf(buf, "%ld\n", temp); show_temp()
66 long temp; show_thresh() local
70 temp = tsthr * 500; show_thresh()
72 return sprintf(buf, "%ld\n", temp); show_thresh()
|
| H A D | tmp401.c | 30 * few differences too, for example the local temp has a higher resolution
66 { 0x00, 0x01 }, /* temp */
75 { 0, 0 }, /* temp (unused) */
84 { 0x15, 0x10 }, /* temp */
93 { 0x00, 0x01, 0x23 }, /* temp */
100 { 0, 0, 0 }, /* temp - unused */
107 { 0x29, 0x10, 0x24 }, /* temp */
173 u16 temp[6][3]; member in struct:tmp401_data
183 int temp = reg; tmp401_register_to_temp() local
186 temp -= 64 * 256; tmp401_register_to_temp()
188 return DIV_ROUND_CLOSEST(temp * 125, 32); tmp401_register_to_temp()
191 static u16 tmp401_temp_to_register(long temp, u8 config, int zbits) tmp401_temp_to_register() argument
194 temp = clamp_val(temp, -64000, 191000); tmp401_temp_to_register()
195 temp += 64000; tmp401_temp_to_register()
197 temp = clamp_val(temp, 0, 127000); tmp401_temp_to_register()
199 return DIV_ROUND_CLOSEST(temp * (1 << (8 - zbits)), 1000) << zbits; tmp401_temp_to_register()
210 for (j = 0; j < num_regs; j++) { /* temp / low / ... */ tmp401_update_device_reg16()
222 data->temp[j][i] = val << 8; tmp401_update_device_reg16()
230 data->temp[j][i] |= val; tmp401_update_device_reg16()
319 tmp401_register_to_temp(data->temp[nr][index], data->config)); show_temp()
325 int temp, index = to_sensor_dev_attr(devattr)->index; show_temp_crit_hyst() local
332 temp = tmp401_register_to_temp(data->temp[3][index], data->config); show_temp_crit_hyst()
333 temp -= data->temp_crit_hyst * 1000; show_temp_crit_hyst()
336 return sprintf(buf, "%d\n", temp); show_temp_crit_hyst()
378 data->temp[nr][index] = reg; store_temp()
388 int temp, index = to_sensor_dev_attr(devattr)->index; store_temp_crit_hyst() local
405 temp = tmp401_register_to_temp(data->temp[3][index], data->config); store_temp_crit_hyst()
406 val = clamp_val(val, temp - 255000, temp); store_temp_crit_hyst()
407 reg = ((temp - val) + 500) / 1000; store_temp_crit_hyst()
|
| H A D | ds1621.c | 129 u16 temp[3]; /* Register values, word */ member in struct:ds1621_data
147 static inline u16 DS1621_TEMP_TO_REG(long temp, u8 zbits) DS1621_TEMP_TO_REG() argument
149 temp = clamp_val(temp, DS1621_TEMP_MIN, DS1621_TEMP_MAX); DS1621_TEMP_TO_REG()
150 temp = DIV_ROUND_CLOSEST(temp * (1 << (8 - zbits)), 1000) << zbits; DS1621_TEMP_TO_REG()
151 return temp; DS1621_TEMP_TO_REG()
214 for (i = 0; i < ARRAY_SIZE(data->temp); i++) ds1621_update_client()
215 data->temp[i] = i2c_smbus_read_word_swapped(client, ds1621_update_client()
220 if (data->temp[0] > data->temp[1]) /* input > min */ ds1621_update_client()
222 if (data->temp[0] < data->temp[2]) /* input < max */ ds1621_update_client()
243 DS1621_TEMP_FROM_REG(data->temp[attr->index])); show_temp()
259 data->temp[attr->index] = DS1621_TEMP_TO_REG(val, data->zbits); set_temp()
261 data->temp[attr->index]); set_temp()
|
| H A D | lm77.c | 69 int temp[t_num_temp]; /* index using temp_index */ member in struct:lm77_data
81 static inline s16 LM77_TEMP_TO_REG(int temp) LM77_TEMP_TO_REG() argument
83 return (temp / 500) * 8; LM77_TEMP_TO_REG()
123 data->temp[i] = lm77_update_device()
146 return sprintf(buf, "%d\n", data->temp[attr->index]); show_temp()
155 int temp; show_temp_hyst() local
157 temp = nr == t_min ? data->temp[nr] + data->temp[t_hyst] : show_temp_hyst()
158 data->temp[nr] - data->temp[t_hyst]; show_temp_hyst()
160 return sprintf(buf, "%d\n", temp); show_temp_hyst()
179 data->temp[nr] = val; set_temp()
203 val = clamp_val(data->temp[t_crit] - val, LM77_TEMP_MIN, LM77_TEMP_MAX); set_temp_hyst()
204 data->temp[t_hyst] = val; set_temp_hyst()
206 LM77_TEMP_TO_REG(data->temp[t_hyst])); set_temp_hyst()
|
| H A D | lm92.c | 114 s16 temp[t_num_regs]; /* index with enum temp_index */ member in struct:lm92_data
133 data->temp[i] = lm92_update_device()
151 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[attr->index])); show_temp()
169 data->temp[nr] = TEMP_TO_REG(val); set_temp()
170 i2c_smbus_write_word_swapped(client, regs[nr], data->temp[nr]); set_temp()
180 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[attr->index]) show_temp_hyst()
181 - TEMP_FROM_REG(data->temp[t_hyst])); show_temp_hyst()
188 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[t_min]) show_temp_min_hyst()
189 + TEMP_FROM_REG(data->temp[t_hyst])); show_temp_min_hyst()
208 data->temp[t_hyst] = set_temp_hyst()
209 TEMP_TO_REG(TEMP_FROM_REG(data->temp[attr->index]) - val); set_temp_hyst()
211 data->temp[t_hyst]); set_temp_hyst()
220 return sprintf(buf, "%d\n", ALARMS_FROM_REG(data->temp[t_input])); show_alarms()
228 return sprintf(buf, "%d\n", (data->temp[t_input] >> bitnr) & 1); show_alarm()
|
| H A D | adt7x10.c | 77 s16 temp[4]; /* Register values, member in struct:adt7x10_data
159 int temp; adt7x10_update_temp() local
167 temp = adt7x10_read_word(dev, ADT7X10_REG_TEMP[0]); adt7x10_update_temp()
168 if (temp < 0) { adt7x10_update_temp()
169 ret = temp; adt7x10_update_temp()
174 data->temp[0] = temp; adt7x10_update_temp()
190 for (i = 1; i < ARRAY_SIZE(data->temp); i++) { adt7x10_fill_cache()
197 data->temp[i] = ret; adt7x10_fill_cache()
211 static s16 ADT7X10_TEMP_TO_REG(long temp) ADT7X10_TEMP_TO_REG() argument
213 return DIV_ROUND_CLOSEST(clamp_val(temp, ADT7X10_TEMP_MIN, ADT7X10_TEMP_TO_REG()
250 data->temp[attr->index])); adt7x10_show_temp()
260 long temp; adt7x10_set_temp() local
263 ret = kstrtol(buf, 10, &temp); adt7x10_set_temp()
268 data->temp[nr] = ADT7X10_TEMP_TO_REG(temp); adt7x10_set_temp()
269 ret = adt7x10_write_word(dev, ADT7X10_REG_TEMP[nr], data->temp[nr]); adt7x10_set_temp()
294 ADT7X10_REG_TO_TEMP(data, data->temp[nr]) - hyst); adt7x10_show_t_hyst()
309 limit = ADT7X10_REG_TO_TEMP(data, data->temp[1]); adt7x10_set_t_hyst()
|
| H A D | max6697.c | 93 u8 temp[8][4]; /* [nr][0]=temp [1]=ext [2]=max [3]=crit */ member in struct:max6697_data
206 data->temp[i][MAX6697_TEMP_EXT] = val; max6697_update_device()
214 data->temp[i][MAX6697_TEMP_INPUT] = val; max6697_update_device()
221 data->temp[i][MAX6697_TEMP_MAX] = val; max6697_update_device()
230 data->temp[i][MAX6697_TEMP_CRIT] = val; max6697_update_device()
257 int temp; show_temp_input() local
262 temp = (data->temp[index][MAX6697_TEMP_INPUT] - data->temp_offset) << 3; show_temp_input()
263 temp |= data->temp[index][MAX6697_TEMP_EXT] >> 5; show_temp_input()
265 return sprintf(buf, "%d\n", temp * 125); show_temp_input()
274 int temp; show_temp() local
279 temp = data->temp[nr][index]; show_temp()
280 temp -= data->temp_offset; show_temp()
282 return sprintf(buf, "%d\n", temp * 1000); show_temp()
307 long temp; set_temp() local
310 ret = kstrtol(buf, 10, &temp); set_temp()
315 temp = DIV_ROUND_CLOSEST(temp, 1000) + data->temp_offset; set_temp()
316 temp = clamp_val(temp, 0, data->type == max6581 ? 255 : 127); set_temp()
317 data->temp[nr][index] = temp; set_temp()
321 temp); set_temp()
|
| H A D | atxp1.c | 268 u8 temp; atxp1_detect() local
284 temp = i2c_smbus_read_byte_data(new_client, 0x00); atxp1_detect()
286 if (!((i2c_smbus_read_byte_data(new_client, 0x10) == temp) && atxp1_detect()
287 (i2c_smbus_read_byte_data(new_client, 0x11) == temp))) atxp1_detect()
291 temp = vid_which_vrm(); atxp1_detect()
293 if ((temp != 90) && (temp != 91)) { atxp1_detect()
295 temp / 10, temp % 10); atxp1_detect()
|
| H A D | lm75.c | 87 s16 temp[3]; /* Register values, member in struct:lm75_data
100 static inline long lm75_reg_to_mc(s16 temp, u8 resolution) lm75_reg_to_mc() argument
102 return ((temp >> (16 - resolution)) * 1000) >> (resolution - 8); lm75_reg_to_mc()
107 static int lm75_read_temp(void *dev, long *temp) lm75_read_temp() argument
114 *temp = lm75_reg_to_mc(data->temp[0], data->resolution); lm75_read_temp()
128 return sprintf(buf, "%ld\n", lm75_reg_to_mc(data->temp[attr->index], show_temp()
139 long temp; set_temp() local
143 error = kstrtol(buf, 10, &temp); set_temp()
157 temp = clamp_val(temp, LM75_TEMP_MIN, LM75_TEMP_MAX); set_temp()
158 data->temp[nr] = DIV_ROUND_CLOSEST(temp << (resolution - 8), set_temp()
160 lm75_write_value(client, LM75_REG_TEMP[nr], data->temp[nr]); set_temp()
533 for (i = 0; i < ARRAY_SIZE(data->temp); i++) { lm75_update_device()
545 data->temp[i] = status; lm75_update_device()
|
| /linux-4.1.27/drivers/macintosh/ |
| H A D | therm_windtunnel.c | 59 int overheat_temp; /* 100% fan at this temp */
61 int temp; member in struct:__anon5360
75 int temp; member in struct:__anon5361
93 print_temp( const char *s, int temp ) print_temp()
95 printk("%s%d.%d C", s ? s : "", temp>>8, (temp & 255)*10/256 ); print_temp()
101 return sprintf(buf, "%d.%d\n", x.temp>>8, (x.temp & 255)*10/256 ); show_cpu_temperature()
160 print_temp("CPU-temp: ", x.temp ); tune_fan()
171 int temp, i, level, casetemp; poll_temp() local
173 temp = read_reg( x.thermostat, 0, 2 ); poll_temp()
176 if( temp < 0 ) poll_temp()
182 if( LOG_TEMP && x.temp != temp ) { poll_temp()
183 print_temp("CPU-temp: ", temp ); poll_temp()
187 x.temp = temp; poll_temp()
191 for( i=0; (temp & 0xffff) > fan_table[i].temp ; i++ ) poll_temp()
197 for( i=0; (temp & 0xffff) >= fan_table[i+1].temp ; i++ ) poll_temp()
231 /* remote temp. controls fan */ setup_hardware()
374 int hyst_temp, os_temp, temp; attach_thermostat() local
379 if( (temp=read_reg(cl, 0, 2)) < 0 ) attach_thermostat()
383 if( temp < 0x1600 || temp > 0x3c00 ) attach_thermostat()
391 print_temp("Temp: ", temp ); attach_thermostat()
396 x.temp = temp; attach_thermostat()
|
| H A D | windfarm_rm31.c | 120 static int cpu_check_overtemp(s32 temp) cpu_check_overtemp() argument
127 if (temp >= (cpu_all_tmax + LOW_OVER_IMMEDIATE)) { cpu_check_overtemp()
133 if (temp >= (cpu_all_tmax + HIGH_OVER_IMMEDIATE)) { cpu_check_overtemp()
149 cpu_thist[i] = temp; cpu_check_overtemp()
150 cpu_thist_total += temp; cpu_check_overtemp()
160 cpu_thist[cpu_thist_pt] = temp; cpu_check_overtemp()
163 cpu_thist_total += temp; cpu_check_overtemp()
167 FIX32TOPRINT(t_avg), FIX32TOPRINT(t_old), FIX32TOPRINT(temp)); cpu_check_overtemp()
195 (temp < (cpu_all_tmax + LOW_OVER_CLEAR))) { cpu_check_overtemp()
203 static int read_one_cpu_vals(int cpu, s32 *temp, s32 *power) read_one_cpu_vals() argument
211 DBG(" CPU%d: temp reading error !\n", cpu); read_one_cpu_vals()
214 DBG_LOTS(" CPU%d: temp = %d.%03d\n", cpu, FIX32TOPRINT((dtemp))); read_one_cpu_vals()
215 *temp = dtemp; read_one_cpu_vals()
249 s32 speed, temp, power, t_max = 0; cpu_fans_tick() local
259 err = read_one_cpu_vals(cpu, &temp, &power); cpu_fans_tick()
266 /* Keep track of highest temp */ cpu_fans_tick()
267 t_max = max(t_max, temp); cpu_fans_tick()
274 wf_cpu_pid_run(sp, power, temp); cpu_fans_tick()
368 s32 temp, dtemp; backside_fan_tick() local
385 err = wf_sensor_get(backside_temp, &temp); backside_fan_tick()
387 printk(KERN_WARNING "windfarm: U3 temp sensor error %d\n", backside_fan_tick()
393 speed = wf_pid_run(&backside_pid, temp); backside_fan_tick()
395 DBG_LOTS("backside PID temp=%d.%.3d speed=%d\n", backside_fan_tick()
396 FIX32TOPRINT(temp), speed); backside_fan_tick()
400 printk(KERN_WARNING "windfarm: DIMMs temp sensor error %d\n", backside_fan_tick()
455 s32 temp; slots_fan_tick() local
467 err = wf_sensor_get(slots_temp, &temp); slots_fan_tick()
469 pr_warning("wf_rm31: slots temp sensor error %d\n", err); slots_fan_tick()
474 speed = wf_pid_run(&slots_pid, temp); slots_fan_tick()
476 DBG_LOTS("slots PID temp=%d.%.3d speed=%d\n", slots_fan_tick()
477 FIX32TOPRINT(temp), speed); slots_fan_tick()
610 if (!strcmp(sr->name, "cpu-diode-temp-0")) rm31_new_sensor()
612 else if (!strcmp(sr->name, "cpu-diode-temp-1")) rm31_new_sensor()
622 else if (!strcmp(sr->name, "backside-temp")) rm31_new_sensor()
624 else if (!strcmp(sr->name, "slots-temp")) rm31_new_sensor()
626 else if (!strcmp(sr->name, "dimms-temp")) rm31_new_sensor()
|
| H A D | windfarm_pm112.c | 196 static int cpu_check_overtemp(s32 temp) cpu_check_overtemp() argument
202 if (temp >= (cpu_all_tmax + LOW_OVER_IMMEDIATE)) { cpu_check_overtemp()
208 if (temp >= (cpu_all_tmax + HIGH_OVER_IMMEDIATE)) { cpu_check_overtemp()
219 cpu_thist[cpu_thist_pt] = temp; cpu_check_overtemp()
222 cpu_thist_total += temp; cpu_check_overtemp()
226 FIX32TOPRINT(t_avg), FIX32TOPRINT(t_old), FIX32TOPRINT(temp)); cpu_check_overtemp()
254 (temp < (cpu_all_tmax + LOW_OVER_CLEAR))) { cpu_check_overtemp()
266 s32 temp, power, t_max = 0; cpu_fans_tick() local
276 err = sr->ops->get_value(sr, &temp); cpu_fans_tick()
286 /* Keep track of highest temp */ cpu_fans_tick()
287 t_max = max(t_max, temp); cpu_fans_tick()
303 t = wf_cpu_pid_run(sp, power, temp); cpu_fans_tick()
310 cpu, FIX32TOPRINT(power), FIX32TOPRINT(temp)); cpu_fans_tick()
353 s32 temp; backside_fan_tick() local
371 err = u4_temp->ops->get_value(u4_temp, &temp); backside_fan_tick()
373 printk(KERN_WARNING "windfarm: U4 temp sensor error %d\n", backside_fan_tick()
379 speed = wf_pid_run(&backside_pid, temp); backside_fan_tick()
380 DBG_LOTS("backside PID temp=%d.%.3d speed=%d\n", backside_fan_tick()
381 FIX32TOPRINT(temp), speed); backside_fan_tick()
403 s32 temp; drive_bay_fan_tick() local
421 err = hd_temp->ops->get_value(hd_temp, &temp); drive_bay_fan_tick()
423 printk(KERN_WARNING "windfarm: drive bay temp sensor " drive_bay_fan_tick()
429 speed = wf_pid_run(&drive_bay_pid, temp); drive_bay_fan_tick()
430 DBG_LOTS("drive_bay PID temp=%d.%.3d speed=%d\n", drive_bay_fan_tick()
431 FIX32TOPRINT(temp), speed); drive_bay_fan_tick()
601 if (!strncmp(sr->name, "cpu-temp-", 9)) { pm112_new_sensor()
612 } else if (!strcmp(sr->name, "hd-temp")) { pm112_new_sensor()
618 } else if (!strcmp(sr->name, "backside-temp")) { pm112_new_sensor()
|
| H A D | windfarm_pm72.c | 126 static int cpu_check_overtemp(s32 temp) cpu_check_overtemp() argument
133 if (temp >= (cpu_all_tmax + LOW_OVER_IMMEDIATE)) { cpu_check_overtemp()
139 if (temp >= (cpu_all_tmax + HIGH_OVER_IMMEDIATE)) { cpu_check_overtemp()
155 cpu_thist[i] = temp; cpu_check_overtemp()
156 cpu_thist_total += temp; cpu_check_overtemp()
166 cpu_thist[cpu_thist_pt] = temp; cpu_check_overtemp()
169 cpu_thist_total += temp; cpu_check_overtemp()
173 FIX32TOPRINT(t_avg), FIX32TOPRINT(t_old), FIX32TOPRINT(temp)); cpu_check_overtemp()
201 (temp < (cpu_all_tmax + LOW_OVER_CLEAR))) { cpu_check_overtemp()
209 static int read_one_cpu_vals(int cpu, s32 *temp, s32 *power) read_one_cpu_vals() argument
217 DBG(" CPU%d: temp reading error !\n", cpu); read_one_cpu_vals()
220 DBG_LOTS(" CPU%d: temp = %d.%03d\n", cpu, FIX32TOPRINT((dtemp))); read_one_cpu_vals()
221 *temp = dtemp; read_one_cpu_vals()
255 s32 intake, temp, power, t_max = 0; cpu_fans_tick_split() local
267 err = read_one_cpu_vals(cpu, &temp, &power); cpu_fans_tick_split()
274 /* Keep track of highest temp */ cpu_fans_tick_split()
275 t_max = max(t_max, temp); cpu_fans_tick_split()
282 wf_cpu_pid_run(sp, power, temp); cpu_fans_tick_split()
311 s32 temp, power, intake, pump; cpu_fans_tick_combined() local
337 /* Keep track of highest temp */ cpu_fans_tick_combined()
344 /* Use the max temp & power of both */ cpu_fans_tick_combined()
345 temp = max(temp0, temp1); cpu_fans_tick_combined()
349 wf_cpu_pid_run(sp, power, temp); cpu_fans_tick_combined()
466 s32 temp; backside_fan_tick() local
483 err = wf_sensor_get(backside_temp, &temp); backside_fan_tick()
485 printk(KERN_WARNING "windfarm: U4 temp sensor error %d\n", backside_fan_tick()
491 speed = wf_pid_run(&backside_pid, temp); backside_fan_tick()
493 DBG_LOTS("backside PID temp=%d.%.3d speed=%d\n", backside_fan_tick()
494 FIX32TOPRINT(temp), speed); backside_fan_tick()
546 s32 temp; drives_fan_tick() local
563 err = wf_sensor_get(drives_temp, &temp); drives_fan_tick()
565 pr_warning("wf_pm72: drive bay temp sensor error %d\n", err); drives_fan_tick()
570 speed = wf_pid_run(&drives_pid, temp); drives_fan_tick()
572 DBG_LOTS("drives PID temp=%d.%.3d speed=%d\n", drives_fan_tick()
573 FIX32TOPRINT(temp), speed); drives_fan_tick()
720 if (!strcmp(sr->name, "cpu-diode-temp-0")) pm72_new_sensor()
722 else if (!strcmp(sr->name, "cpu-diode-temp-1")) pm72_new_sensor()
732 else if (!strcmp(sr->name, "backside-temp")) pm72_new_sensor()
734 else if (!strcmp(sr->name, "hd-temp")) pm72_new_sensor()
|
| H A D | windfarm_lm87_sensor.c | 71 s32 temp; wf_lm87_get() local
79 temp = wf_lm87_read_reg(lm->i2c, LM87_INT_TEMP); wf_lm87_get()
80 if (temp < 0) wf_lm87_get()
81 return temp; wf_lm87_get()
82 *value = temp << 16; wf_lm87_get()
114 if (strcmp(np->name, "int-temp")) wf_lm87_probe()
120 name = "dimms-temp"; wf_lm87_probe()
122 name = "between-cpus-temp"; wf_lm87_probe()
|
| H A D | ans-lcd.c | 84 char ch, __user *temp; anslcd_ioctl() local
103 temp = (char __user *) arg; anslcd_ioctl()
104 __get_user(ch, temp); anslcd_ioctl()
105 for (; ch; temp++) { /* FIXME: This is ugly, but should work, as a \0 byte is not a valid command code */ anslcd_ioctl()
107 __get_user(ch, temp); anslcd_ioctl()
|
| H A D | windfarm_lm75_sensor.c | 112 name = "hd-temp"; wf_lm75_probe()
114 name = "incoming-air-temp"; wf_lm75_probe()
116 name = "optical-drive-temp"; wf_lm75_probe()
118 name = "hard-drive-temp"; wf_lm75_probe()
120 name = "slots-temp"; wf_lm75_probe()
122 name = "cpu-inlet-temp-0"; wf_lm75_probe()
124 name = "cpu-inlet-temp-1"; wf_lm75_probe()
|
| H A D | windfarm_pm121.c | 104 * sensor : hard-drive-temp
114 * sensor : hard-drive-temp
126 * sensor : optical-drive-temp
136 * sensor : optical-drive-temp
148 * sensor : gpu-temp
158 * sensor : gpu-temp
170 * sensor : north-bridge-temp
180 * sensor : north-bridge-temp
191 * sensors : cpu-temp, cpu-power
198 * sensor : cpu-temp
596 s32 temp, new_setpoint; pm121_sys_fans_tick() local
611 rc = sensor->ops->get_value(sensor, &temp); pm121_sys_fans_tick()
621 FIX32TOPRINT(temp)); pm121_sys_fans_tick()
623 new_setpoint = wf_pid_run(&st->pid, temp); pm121_sys_fans_tick()
730 s32 new_setpoint, temp, power; pm121_cpu_fans_tick() local
743 rc = sensor_cpu_temp->ops->get_value(sensor_cpu_temp, &temp); pm121_cpu_fans_tick()
745 printk(KERN_WARNING "pm121: CPU temp sensor error %d\n", pm121_cpu_fans_tick()
759 pr_debug("pm121: CPU Fans tick ! CPU temp: %d.%03d°C, power: %d.%03d\n", pm121_cpu_fans_tick()
760 FIX32TOPRINT(temp), FIX32TOPRINT(power)); pm121_cpu_fans_tick()
762 if (temp > st->pid.param.tmax) pm121_cpu_fans_tick()
765 new_setpoint = wf_cpu_pid_run(&st->pid, power, temp); pm121_cpu_fans_tick()
925 all = pm121_register_sensor(sr, "cpu-temp", pm121_new_sensor()
933 all = pm121_register_sensor(sr, "hard-drive-temp", pm121_new_sensor()
935 all = pm121_register_sensor(sr, "optical-drive-temp", pm121_new_sensor()
937 all = pm121_register_sensor(sr, "incoming-air-temp", pm121_new_sensor()
939 all = pm121_register_sensor(sr, "north-bridge-temp", pm121_new_sensor()
941 all = pm121_register_sensor(sr, "gpu-temp", pm121_new_sensor()
|
| H A D | windfarm_pid.h | 12 * for CPU control with 2 input sample types (temp and power)
73 int tindex; /* index of current temp */
78 s32 temps[2]; /* temp. history buffer */
85 extern s32 wf_cpu_pid_run(struct wf_cpu_pid_state *st, s32 power, s32 temp);
|
| /linux-4.1.27/arch/arc/include/asm/ |
| H A D | atomic.h | 29 unsigned int temp; \
36 : "=&r"(temp) /* Early clobber, to prevent reg reuse */ \
44 unsigned int temp; \
57 : "=&r"(temp) \
63 return temp; \
114 unsigned long temp; \
120 temp = v->counter; \
121 temp c_op i; \
122 v->counter = temp; \
125 return temp; \
|
| H A D | irqflags.h | 60 unsigned long temp, flags; arch_local_irq_save() local
67 : "=r"(temp), "=r"(flags) arch_local_irq_save()
97 unsigned long temp; arch_local_irq_disable() local
103 : "=&r"(temp) arch_local_irq_disable()
113 unsigned long temp; arch_local_save_flags() local
117 : "=&r"(temp) arch_local_save_flags()
121 return temp; arch_local_save_flags()
|
| H A D | bitops.h | 34 unsigned int temp; \
60 : "=&r"(temp) /* Early clobber, to prevent reg reuse */ \
80 unsigned long old, temp; \
97 : "=&r"(old), "=&r"(temp) \
127 unsigned long temp, flags; \
135 temp = *m; \
136 *m = temp c_op (1UL << (nr & 0x1f)); \
166 unsigned long temp; \
169 temp = *m; \
170 *m = temp c_op (1UL << (nr & 0x1f)); \
|
| /linux-4.1.27/arch/powerpc/sysdev/ |
| H A D | ipic.c | 528 u32 temp; ipic_unmask_irq() local
532 temp = ipic_read(ipic->regs, ipic_info[src].mask); ipic_unmask_irq()
533 temp |= (1 << (31 - ipic_info[src].bit)); ipic_unmask_irq()
534 ipic_write(ipic->regs, ipic_info[src].mask, temp); ipic_unmask_irq()
544 u32 temp; ipic_mask_irq() local
548 temp = ipic_read(ipic->regs, ipic_info[src].mask); ipic_mask_irq()
549 temp &= ~(1 << (31 - ipic_info[src].bit)); ipic_mask_irq()
550 ipic_write(ipic->regs, ipic_info[src].mask, temp); ipic_mask_irq()
564 u32 temp; ipic_ack_irq() local
568 temp = 1 << (31 - ipic_info[src].bit); ipic_ack_irq()
569 ipic_write(ipic->regs, ipic_info[src].ack, temp); ipic_ack_irq()
583 u32 temp; ipic_mask_irq_and_ack() local
587 temp = ipic_read(ipic->regs, ipic_info[src].mask); ipic_mask_irq_and_ack()
588 temp &= ~(1 << (31 - ipic_info[src].bit)); ipic_mask_irq_and_ack()
589 ipic_write(ipic->regs, ipic_info[src].mask, temp); ipic_mask_irq_and_ack()
591 temp = 1 << (31 - ipic_info[src].bit); ipic_mask_irq_and_ack()
592 ipic_write(ipic->regs, ipic_info[src].ack, temp); ipic_mask_irq_and_ack()
704 u32 temp = 0, ret; ipic_init() local
729 temp |= SICFR_IPSA; ipic_init()
731 temp |= SICFR_IPSB; ipic_init()
733 temp |= SICFR_IPSC; ipic_init()
735 temp |= SICFR_IPSD; ipic_init()
737 temp |= SICFR_MPSA; ipic_init()
739 temp |= SICFR_MPSB; ipic_init()
741 ipic_write(ipic->regs, IPIC_SICFR, temp); ipic_init()
744 temp = 0; ipic_init()
746 temp = SERCR_MCPR; ipic_init()
747 ipic_write(ipic->regs, IPIC_SERCR, temp); ipic_init()
750 temp = ipic_read(ipic->regs, IPIC_SEMSR); ipic_init()
753 temp |= SEMSR_SIRQ0; ipic_init()
755 temp &= ~SEMSR_SIRQ0; ipic_init()
757 ipic_write(ipic->regs, IPIC_SEMSR, temp); ipic_init()
775 u32 temp; ipic_set_priority() local
784 temp = ipic_read(ipic->regs, ipic_info[src].prio); ipic_set_priority()
787 temp &= ~(0x7 << (20 + (3 - priority) * 3)); ipic_set_priority()
788 temp |= ipic_info[src].prio_mask << (20 + (3 - priority) * 3); ipic_set_priority()
790 temp &= ~(0x7 << (4 + (7 - priority) * 3)); ipic_set_priority()
791 temp |= ipic_info[src].prio_mask << (4 + (7 - priority) * 3); ipic_set_priority()
794 ipic_write(ipic->regs, ipic_info[src].prio, temp); ipic_set_priority()
803 u32 temp; ipic_set_highest_priority() local
805 temp = ipic_read(ipic->regs, IPIC_SICFR); ipic_set_highest_priority()
808 temp &= 0x7f000000; ipic_set_highest_priority()
809 temp |= (src & 0x7f) << 24; ipic_set_highest_priority()
811 ipic_write(ipic->regs, IPIC_SICFR, temp); ipic_set_highest_priority()
827 u32 temp; ipic_enable_mcp() local
829 temp = ipic_read(ipic->regs, IPIC_SERMR); ipic_enable_mcp()
830 temp |= (1 << (31 - mcp_irq)); ipic_enable_mcp()
831 ipic_write(ipic->regs, IPIC_SERMR, temp); ipic_enable_mcp()
837 u32 temp; ipic_disable_mcp() local
839 temp = ipic_read(ipic->regs, IPIC_SERMR); ipic_disable_mcp()
840 temp &= (1 << (31 - mcp_irq)); ipic_disable_mcp()
841 ipic_write(ipic->regs, IPIC_SERMR, temp); ipic_disable_mcp()
|
| H A D | tsi108_pci.c | 152 u32 temp; tsi108_direct_read_config() local
165 __tsi108_read_pci_config(temp, cfg_addr, "lbzx"); tsi108_direct_read_config()
168 __tsi108_read_pci_config(temp, cfg_addr, "lhbrx"); tsi108_direct_read_config()
171 __tsi108_read_pci_config(temp, cfg_addr, "lwbrx"); tsi108_direct_read_config()
175 *val = temp; tsi108_direct_read_config()
178 if ((0xFFFFFFFF != temp) && (0xFFFF != temp) && (0xFF != temp)) { tsi108_direct_read_config()
286 u_int temp = 0; get_pci_source() local
298 temp = get_pci_source()
303 if (temp & (1 << mask % 4)) { get_pci_source()
311 temp = tsi108_read_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_ENABLE); get_pci_source()
313 temp & ~TSI108_PCI_IRP_ENABLE_P_INT); get_pci_source()
323 temp = get_pci_source()
326 printk(">> stat=0x%08x intad=0x%08x ", pci_irp_stat, temp); get_pci_source()
327 temp = get_pci_source()
330 printk("cfg_ctl=0x%08x ", temp); get_pci_source()
331 temp = get_pci_source()
334 printk("irp_enable=0x%08x\n", temp); get_pci_source()
|
| /linux-4.1.27/sound/pci/emu10k1/ |
| H A D | emu10k1_callback.c | 322 unsigned int temp; start_voice() local
352 temp = FXBUS_MIDI_LEFT | (FXBUS_MIDI_RIGHT << 8) | start_voice()
354 snd_emu10k1_ptr_write(hw, A_FXRT1, ch, temp); start_voice()
356 temp = (FXBUS_MIDI_LEFT << 16) | (FXBUS_MIDI_RIGHT << 20) | start_voice()
358 snd_emu10k1_ptr_write(hw, FXRT, ch, temp); start_voice()
381 temp = (unsigned int)vp->acutoff << 8 | (unsigned char)vp->avol; start_voice()
382 snd_emu10k1_ptr_write(hw, IFATN, vp->ch, temp); start_voice()
399 temp = vp->reg.parm.reverb; start_voice()
400 temp += (int)vp->chan->control[MIDI_CTL_E1_REVERB_DEPTH] * 9 / 10; start_voice()
401 LIMITMAX(temp, 255); start_voice()
403 snd_emu10k1_ptr_write(hw, PSST, vp->ch, (temp << 24) | addr); start_voice()
407 temp = vp->reg.parm.chorus; start_voice()
408 temp += (int)chan->control[MIDI_CTL_E3_CHORUS_DEPTH] * 9 / 10; start_voice()
409 LIMITMAX(temp, 255); start_voice()
410 temp = (temp <<24) | addr; start_voice()
411 snd_emu10k1_ptr_write(hw, DSL, ch, temp); start_voice()
418 temp = (hw->silent_page.addr << hw->address_mode) | (hw->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0); start_voice()
419 snd_emu10k1_ptr_write(hw, MAPA, ch, temp); start_voice()
420 snd_emu10k1_ptr_write(hw, MAPB, ch, temp); start_voice()
439 temp = ((unsigned int)hw->silent_page.addr << hw_address_mode) | (hw->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0); start_voice()
440 snd_emu10k1_ptr_write(hw, MAPA, ch, temp); start_voice()
441 snd_emu10k1_ptr_write(hw, MAPB, ch, temp); start_voice()
453 temp = vp->reg.parm.filterQ; start_voice()
454 temp = (temp<<28) | addr; start_voice()
456 temp |= CCCA_INTERPROM_0; start_voice()
459 temp |= shift << 25; start_voice()
462 temp |= CCCA_8BITSELECT; start_voice()
463 snd_emu10k1_ptr_write(hw, CCCA, ch, temp); start_voice()
466 temp = (unsigned int)vp->vtarget << 16; start_voice()
467 snd_emu10k1_ptr_write(hw, VTFT, ch, temp | vp->ftarget); start_voice()
468 snd_emu10k1_ptr_write(hw, CVCF, ch, temp | 0xff00); start_voice()
478 unsigned int temp, ptarget; trigger_voice() local
494 temp = ptarget | (vp->apan << 8) | vp->aaux; trigger_voice()
495 snd_emu10k1_ptr_write(hw, PTRX, vp->ch, temp); trigger_voice()
|
| /linux-4.1.27/tools/iio/ |
| H A D | iio_utils.c | 250 struct iio_channel_info temp; bsort_channel_array_by_index() local
256 temp = (*ci_array)[y + 1]; bsort_channel_array_by_index()
258 (*ci_array)[y] = temp; bsort_channel_array_by_index()
494 char *temp = malloc(strlen(basedir) + strlen(filename) + 2); _write_sysfs_int() local
496 if (temp == NULL) _write_sysfs_int()
498 sprintf(temp, "%s/%s", basedir, filename); _write_sysfs_int()
499 sysfsfp = fopen(temp, "w"); _write_sysfs_int()
501 printf("failed to open %s\n", temp); _write_sysfs_int()
508 sysfsfp = fopen(temp, "r"); _write_sysfs_int()
510 printf("failed to open %s\n", temp); _write_sysfs_int()
525 free(temp); _write_sysfs_int()
543 char *temp = malloc(strlen(basedir) + strlen(filename) + 2); _write_sysfs_string() local
545 if (temp == NULL) { _write_sysfs_string()
549 sprintf(temp, "%s/%s", basedir, filename); _write_sysfs_string()
550 sysfsfp = fopen(temp, "w"); _write_sysfs_string()
552 printf("Could not open %s\n", temp); _write_sysfs_string()
559 sysfsfp = fopen(temp, "r"); _write_sysfs_string()
565 fscanf(sysfsfp, "%s", temp); _write_sysfs_string()
567 if (strcmp(temp, val) != 0) { _write_sysfs_string()
571 temp, _write_sysfs_string()
579 free(temp); _write_sysfs_string()
604 char *temp = malloc(strlen(basedir) + strlen(filename) + 2); read_sysfs_posint() local
606 if (temp == NULL) { read_sysfs_posint()
610 sprintf(temp, "%s/%s", basedir, filename); read_sysfs_posint()
611 sysfsfp = fopen(temp, "r"); read_sysfs_posint()
619 free(temp); read_sysfs_posint()
627 char *temp = malloc(strlen(basedir) + strlen(filename) + 2); read_sysfs_float() local
629 if (temp == NULL) { read_sysfs_float()
633 sprintf(temp, "%s/%s", basedir, filename); read_sysfs_float()
634 sysfsfp = fopen(temp, "r"); read_sysfs_float()
642 free(temp); read_sysfs_float()
650 char *temp = malloc(strlen(basedir) + strlen(filename) + 2); read_sysfs_string() local
652 if (temp == NULL) { read_sysfs_string()
656 sprintf(temp, "%s/%s", basedir, filename); read_sysfs_string()
657 sysfsfp = fopen(temp, "r"); read_sysfs_string()
665 free(temp); read_sysfs_string()
|
| /linux-4.1.27/arch/powerpc/platforms/85xx/ |
| H A D | mpc85xx_mds.c | 101 int temp; mpc8568_mds_phy_fixups() local
110 temp = phy_read(phydev, 30); mpc8568_mds_phy_fixups()
112 if (temp < 0) mpc8568_mds_phy_fixups()
113 return temp; mpc8568_mds_phy_fixups()
115 temp = (temp & (~0x8000)) | 0x4000; mpc8568_mds_phy_fixups()
116 err = phy_write(phydev,30, temp); mpc8568_mds_phy_fixups()
126 temp = phy_read(phydev, 30); mpc8568_mds_phy_fixups()
128 if (temp < 0) mpc8568_mds_phy_fixups()
129 return temp; mpc8568_mds_phy_fixups()
131 temp = phy_read(phydev, 30); mpc8568_mds_phy_fixups()
133 if (temp < 0) mpc8568_mds_phy_fixups()
134 return temp; mpc8568_mds_phy_fixups()
136 temp &= ~0x0020; mpc8568_mds_phy_fixups()
138 err = phy_write(phydev,30,temp); mpc8568_mds_phy_fixups()
144 temp = phy_read(phydev, 16); mpc8568_mds_phy_fixups()
146 if (temp < 0) mpc8568_mds_phy_fixups()
147 return temp; mpc8568_mds_phy_fixups()
149 temp &= ~0x0060; mpc8568_mds_phy_fixups()
150 err = phy_write(phydev,16,temp); mpc8568_mds_phy_fixups()
|
| /linux-4.1.27/drivers/tty/serial/ |
| H A D | imx.c | 359 unsigned long temp; imx_stop_tx() local
368 temp = readl(port->membase + UCR1); imx_stop_tx()
369 writel(temp & ~UCR1_TXMPTYEN, port->membase + UCR1); imx_stop_tx()
374 temp = readl(port->membase + UCR2); imx_stop_tx()
376 temp &= ~UCR2_CTS; imx_stop_tx()
378 temp |= UCR2_CTS; imx_stop_tx()
379 writel(temp, port->membase + UCR2); imx_stop_tx()
381 temp = readl(port->membase + UCR4); imx_stop_tx()
382 temp &= ~UCR4_TCEN; imx_stop_tx()
383 writel(temp, port->membase + UCR4); imx_stop_tx()
393 unsigned long temp; imx_stop_rx() local
404 temp = readl(sport->port.membase + UCR2); imx_stop_rx()
405 writel(temp & ~UCR2_RXEN, sport->port.membase + UCR2); imx_stop_rx()
408 temp = readl(sport->port.membase + UCR1); imx_stop_rx()
409 writel(temp & ~UCR1_RRDYEN, sport->port.membase + UCR1); imx_stop_rx()
426 unsigned long temp; imx_transmit_buffer() local
446 temp = readl(sport->port.membase + UCR1); imx_transmit_buffer()
447 temp &= ~UCR1_TXMPTYEN; imx_transmit_buffer()
449 temp |= UCR1_TDMAEN; imx_transmit_buffer()
450 writel(temp, sport->port.membase + UCR1); imx_transmit_buffer()
452 writel(temp, sport->port.membase + UCR1); imx_transmit_buffer()
479 unsigned long temp; dma_tx_callback() local
485 temp = readl(sport->port.membase + UCR1); dma_tx_callback()
486 temp &= ~UCR1_TDMAEN; dma_tx_callback()
487 writel(temp, sport->port.membase + UCR1); dma_tx_callback()
521 unsigned long temp; imx_dma_tx() local
559 temp = readl(sport->port.membase + UCR1); imx_dma_tx()
560 temp |= UCR1_TDMAEN; imx_dma_tx()
561 writel(temp, sport->port.membase + UCR1); imx_dma_tx()
576 unsigned long temp; imx_start_tx() local
580 temp = readl(port->membase + UCR2); imx_start_tx()
582 temp &= ~UCR2_CTS; imx_start_tx()
584 temp |= UCR2_CTS; imx_start_tx()
585 writel(temp, port->membase + UCR2); imx_start_tx()
587 temp = readl(port->membase + UCR4); imx_start_tx()
588 temp |= UCR4_TCEN; imx_start_tx()
589 writel(temp, port->membase + UCR4); imx_start_tx()
593 temp = readl(sport->port.membase + UCR1); imx_start_tx()
594 writel(temp | UCR1_TXMPTYEN, sport->port.membase + UCR1); imx_start_tx()
601 temp = readl(sport->port.membase + UCR1); imx_start_tx()
602 temp &= ~UCR1_TDMAEN; imx_start_tx()
603 temp |= UCR1_TXMPTYEN; imx_start_tx()
604 writel(temp, sport->port.membase + UCR1); imx_start_tx()
648 unsigned long flags, temp; imx_rxint() local
658 temp = readl(sport->port.membase + USR2); imx_rxint()
659 if (temp & USR2_BRCD) { imx_rxint()
719 unsigned long temp; imx_dma_rxint() local
724 temp = readl(sport->port.membase + USR2); imx_dma_rxint()
725 if ((temp & USR2_RDR) && !sport->dma_is_rxing) { imx_dma_rxint()
729 temp = readl(sport->port.membase + UCR1); imx_dma_rxint()
730 temp &= ~(UCR1_RRDYEN); imx_dma_rxint()
731 writel(temp, sport->port.membase + UCR1); imx_dma_rxint()
817 unsigned long temp; imx_set_mctrl() local
820 temp = readl(sport->port.membase + UCR2); imx_set_mctrl()
821 temp &= ~(UCR2_CTS | UCR2_CTSC); imx_set_mctrl()
823 temp |= UCR2_CTS | UCR2_CTSC; imx_set_mctrl()
824 writel(temp, sport->port.membase + UCR2); imx_set_mctrl()
827 temp = readl(sport->port.membase + uts_reg(sport)) & ~UTS_LOOP; imx_set_mctrl()
829 temp |= UTS_LOOP; imx_set_mctrl()
830 writel(temp, sport->port.membase + uts_reg(sport)); imx_set_mctrl()
839 unsigned long flags, temp; imx_break_ctl() local
843 temp = readl(sport->port.membase + UCR1) & ~UCR1_SNDBRK; imx_break_ctl()
846 temp |= UCR1_SNDBRK; imx_break_ctl()
848 writel(temp, sport->port.membase + UCR1); imx_break_ctl()
870 unsigned long temp; imx_rx_dma_done() local
876 temp = readl(sport->port.membase + UCR1); imx_rx_dma_done()
877 temp |= UCR1_RRDYEN; imx_rx_dma_done()
878 writel(temp, sport->port.membase + UCR1); imx_rx_dma_done()
1053 unsigned long temp; imx_enable_dma() local
1058 temp = readl(sport->port.membase + UCR1); imx_enable_dma()
1059 temp |= UCR1_RDMAEN | UCR1_TDMAEN | UCR1_ATDMAEN | imx_enable_dma()
1062 writel(temp, sport->port.membase + UCR1); imx_enable_dma()
1065 temp = readl(sport->port.membase + UCR4); imx_enable_dma()
1066 temp |= UCR4_IDDMAEN; imx_enable_dma()
1067 writel(temp, sport->port.membase + UCR4); imx_enable_dma()
1074 unsigned long temp; imx_disable_dma() local
1077 temp = readl(sport->port.membase + UCR1); imx_disable_dma()
1078 temp &= ~(UCR1_RDMAEN | UCR1_TDMAEN | UCR1_ATDMAEN); imx_disable_dma()
1079 writel(temp, sport->port.membase + UCR1); imx_disable_dma()
1082 temp = readl(sport->port.membase + UCR2); imx_disable_dma()
1083 temp &= ~(UCR2_CTSC | UCR2_CTS); imx_disable_dma()
1084 writel(temp, sport->port.membase + UCR2); imx_disable_dma()
1087 temp = readl(sport->port.membase + UCR4); imx_disable_dma()
1088 temp &= ~UCR4_IDDMAEN; imx_disable_dma()
1089 writel(temp, sport->port.membase + UCR4); imx_disable_dma()
1101 unsigned long flags, temp; imx_startup() local
1117 temp = readl(sport->port.membase + UCR4); imx_startup()
1120 temp &= ~(UCR4_CTSTL_MASK << UCR4_CTSTL_SHF); imx_startup()
1121 temp |= CTSTL << UCR4_CTSTL_SHF; imx_startup()
1123 writel(temp & ~UCR4_DREN, sport->port.membase + UCR4); imx_startup()
1128 temp = readl(sport->port.membase + UCR2); imx_startup()
1129 temp &= ~UCR2_SRST; imx_startup()
1130 writel(temp, sport->port.membase + UCR2); imx_startup()
1143 temp = readl(sport->port.membase + UCR1); imx_startup()
1144 temp |= UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN; imx_startup()
1146 writel(temp, sport->port.membase + UCR1); imx_startup()
1148 temp = readl(sport->port.membase + UCR4); imx_startup()
1149 temp |= UCR4_OREN; imx_startup()
1150 writel(temp, sport->port.membase + UCR4); imx_startup()
1152 temp = readl(sport->port.membase + UCR2); imx_startup()
1153 temp |= (UCR2_RXEN | UCR2_TXEN); imx_startup()
1155 temp |= UCR2_IRTS; imx_startup()
1156 writel(temp, sport->port.membase + UCR2); imx_startup()
1159 temp = readl(sport->port.membase + UCR3); imx_startup()
1160 temp |= IMX21_UCR3_RXDMUXSEL | UCR3_ADNIMP; imx_startup()
1161 writel(temp, sport->port.membase + UCR3); imx_startup()
1176 unsigned long temp; imx_shutdown() local
1200 temp = readl(sport->port.membase + UCR2); imx_shutdown()
1201 temp &= ~(UCR2_TXEN); imx_shutdown()
1202 writel(temp, sport->port.membase + UCR2); imx_shutdown()
1215 temp = readl(sport->port.membase + UCR1); imx_shutdown()
1216 temp &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN); imx_shutdown()
1218 writel(temp, sport->port.membase + UCR1); imx_shutdown()
1229 unsigned long temp; imx_flush_buffer() local
1240 temp = readl(sport->port.membase + UCR1); imx_flush_buffer()
1241 temp &= ~UCR1_TDMAEN; imx_flush_buffer()
1242 writel(temp, sport->port.membase + UCR1); imx_flush_buffer()
1257 temp = readl(sport->port.membase + UCR2); imx_flush_buffer()
1258 temp &= ~UCR2_SRST; imx_flush_buffer()
1259 writel(temp, sport->port.membase + UCR2); imx_flush_buffer()
1491 unsigned long temp; imx_poll_init() local
1505 temp = readl(sport->port.membase + UCR1); imx_poll_init()
1507 temp |= IMX1_UCR1_UARTCLKEN; imx_poll_init()
1508 temp |= UCR1_UARTEN | UCR1_RRDYEN; imx_poll_init()
1509 temp &= ~(UCR1_TXMPTYEN | UCR1_RTSDEN); imx_poll_init()
1510 writel(temp, sport->port.membase + UCR1); imx_poll_init()
1512 temp = readl(sport->port.membase + UCR2); imx_poll_init()
1513 temp |= UCR2_RXEN; imx_poll_init()
1514 writel(temp, sport->port.membase + UCR2); imx_poll_init()
1563 unsigned long temp; imx_rs485_config() local
1566 temp = readl(sport->port.membase + UCR2); imx_rs485_config()
1567 temp &= ~UCR2_CTSC; imx_rs485_config()
1569 temp &= ~UCR2_CTS; imx_rs485_config()
1571 temp |= UCR2_CTS; imx_rs485_config()
1572 writel(temp, sport->port.membase + UCR2); imx_rs485_config()
|
| H A D | fsl_lpuart.c | 287 unsigned char temp; lpuart_stop_tx() local
289 temp = readb(port->membase + UARTCR2); lpuart_stop_tx()
290 temp &= ~(UARTCR2_TIE | UARTCR2_TCIE); lpuart_stop_tx()
291 writeb(temp, port->membase + UARTCR2); lpuart_stop_tx()
296 unsigned long temp; lpuart32_stop_tx() local
298 temp = lpuart32_read(port->membase + UARTCTRL); lpuart32_stop_tx()
299 temp &= ~(UARTCTRL_TIE | UARTCTRL_TCIE); lpuart32_stop_tx()
300 lpuart32_write(temp, port->membase + UARTCTRL); lpuart32_stop_tx()
305 unsigned char temp; lpuart_stop_rx() local
307 temp = readb(port->membase + UARTCR2); lpuart_stop_rx()
308 writeb(temp & ~UARTCR2_RE, port->membase + UARTCR2); lpuart_stop_rx()
313 unsigned long temp; lpuart32_stop_rx() local
315 temp = lpuart32_read(port->membase + UARTCTRL); lpuart32_stop_rx()
316 lpuart32_write(temp & ~UARTCTRL_RE, port->membase + UARTCTRL); lpuart32_stop_rx()
492 unsigned char temp; lpuart_timer_func() local
507 temp = readb(sport->port.membase + UARTCR5); lpuart_timer_func()
508 writeb(temp & ~UARTCR5_RDMAS, sport->port.membase + UARTCR5); lpuart_timer_func()
516 unsigned char temp; lpuart_prepare_rx() local
524 temp = readb(sport->port.membase + UARTCR5); lpuart_prepare_rx()
525 writeb(temp | UARTCR5_RDMAS, sport->port.membase + UARTCR5); lpuart_prepare_rx()
577 unsigned char temp; lpuart_start_tx() local
579 temp = readb(port->membase + UARTCR2); lpuart_start_tx()
580 writeb(temp | UARTCR2_TIE, port->membase + UARTCR2); lpuart_start_tx()
594 unsigned long temp; lpuart32_start_tx() local
596 temp = lpuart32_read(port->membase + UARTCTRL); lpuart32_start_tx()
597 lpuart32_write(temp | UARTCTRL_TIE, port->membase + UARTCTRL); lpuart32_start_tx()
825 unsigned int temp = 0; lpuart_get_mctrl() local
830 temp |= TIOCM_CTS; lpuart_get_mctrl()
833 temp |= TIOCM_RTS; lpuart_get_mctrl()
835 return temp; lpuart_get_mctrl()
840 unsigned int temp = 0; lpuart32_get_mctrl() local
845 temp |= TIOCM_CTS; lpuart32_get_mctrl()
848 temp |= TIOCM_RTS; lpuart32_get_mctrl()
850 return temp; lpuart32_get_mctrl()
855 unsigned char temp; lpuart_set_mctrl() local
857 temp = readb(port->membase + UARTMODEM) & lpuart_set_mctrl()
861 temp |= UARTMODEM_RXRTSE; lpuart_set_mctrl()
864 temp |= UARTMODEM_TXCTSE; lpuart_set_mctrl()
866 writeb(temp, port->membase + UARTMODEM); lpuart_set_mctrl()
871 unsigned long temp; lpuart32_set_mctrl() local
873 temp = lpuart32_read(port->membase + UARTMODIR) & lpuart32_set_mctrl()
877 temp |= UARTMODIR_RXRTSE; lpuart32_set_mctrl()
880 temp |= UARTMODIR_TXCTSE; lpuart32_set_mctrl()
882 lpuart32_write(temp, port->membase + UARTMODIR); lpuart32_set_mctrl()
887 unsigned char temp; lpuart_break_ctl() local
889 temp = readb(port->membase + UARTCR2) & ~UARTCR2_SBK; lpuart_break_ctl()
892 temp |= UARTCR2_SBK; lpuart_break_ctl()
894 writeb(temp, port->membase + UARTCR2); lpuart_break_ctl()
899 unsigned long temp; lpuart32_break_ctl() local
901 temp = lpuart32_read(port->membase + UARTCTRL) & ~UARTCTRL_SBK; lpuart32_break_ctl()
904 temp |= UARTCTRL_SBK; lpuart32_break_ctl()
906 lpuart32_write(temp, port->membase + UARTCTRL); lpuart32_break_ctl()
1074 unsigned char temp; lpuart_startup() local
1077 temp = readb(sport->port.membase + UARTPFIFO); lpuart_startup()
1079 sport->txfifo_size = 0x1 << (((temp >> UARTPFIFO_TXSIZE_OFF) & lpuart_startup()
1084 sport->rxfifo_size = 0x1 << (((temp >> UARTPFIFO_RXSIZE_OFF) & lpuart_startup()
1097 temp = readb(port->membase + UARTCR5); lpuart_startup()
1098 temp &= ~UARTCR5_RDMAS; lpuart_startup()
1099 writeb(temp | UARTCR5_TDMAS, port->membase + UARTCR5); lpuart_startup()
1112 temp = readb(sport->port.membase + UARTCR2); lpuart_startup()
1113 temp |= (UARTCR2_RIE | UARTCR2_TIE | UARTCR2_RE | UARTCR2_TE); lpuart_startup()
1114 writeb(temp, sport->port.membase + UARTCR2); lpuart_startup()
1125 unsigned long temp; lpuart32_startup() local
1128 temp = lpuart32_read(sport->port.membase + UARTFIFO); lpuart32_startup()
1130 sport->txfifo_size = 0x1 << (((temp >> UARTFIFO_TXSIZE_OFF) & lpuart32_startup()
1133 sport->rxfifo_size = 0x1 << (((temp >> UARTFIFO_RXSIZE_OFF) & lpuart32_startup()
1145 temp = lpuart32_read(sport->port.membase + UARTCTRL); lpuart32_startup()
1146 temp |= (UARTCTRL_RIE | UARTCTRL_TIE | UARTCTRL_RE | UARTCTRL_TE); lpuart32_startup()
1147 temp |= UARTCTRL_ILIE; lpuart32_startup()
1148 lpuart32_write(temp, sport->port.membase + UARTCTRL); lpuart32_startup()
1157 unsigned char temp; lpuart_shutdown() local
1163 temp = readb(port->membase + UARTCR2); lpuart_shutdown()
1164 temp &= ~(UARTCR2_TE | UARTCR2_RE | lpuart_shutdown()
1166 writeb(temp, port->membase + UARTCR2); lpuart_shutdown()
1184 unsigned long temp; lpuart32_shutdown() local
1190 temp = lpuart32_read(port->membase + UARTCTRL); lpuart32_shutdown()
1191 temp &= ~(UARTCTRL_TE | UARTCTRL_RE | lpuart32_shutdown()
1193 lpuart32_write(temp, port->membase + UARTCTRL); lpuart32_shutdown()
1865 unsigned long temp; lpuart_suspend() local
1869 temp = lpuart32_read(sport->port.membase + UARTCTRL); lpuart_suspend()
1870 temp &= ~(UARTCTRL_TE | UARTCTRL_TIE | UARTCTRL_TCIE); lpuart_suspend()
1871 lpuart32_write(temp, sport->port.membase + UARTCTRL); lpuart_suspend()
1874 temp = readb(sport->port.membase + UARTCR2); lpuart_suspend()
1875 temp &= ~(UARTCR2_TE | UARTCR2_TIE | UARTCR2_TCIE); lpuart_suspend()
1876 writeb(temp, sport->port.membase + UARTCR2); lpuart_suspend()
1887 unsigned long temp; lpuart_resume() local
1891 temp = lpuart32_read(sport->port.membase + UARTCTRL); lpuart_resume()
1892 temp |= (UARTCTRL_RIE | UARTCTRL_TIE | UARTCTRL_RE | lpuart_resume()
1894 lpuart32_write(temp, sport->port.membase + UARTCTRL); lpuart_resume()
1897 temp = readb(sport->port.membase + UARTCR2); lpuart_resume()
1898 temp |= (UARTCR2_RIE | UARTCR2_TIE | UARTCR2_RE | UARTCR2_TE); lpuart_resume()
1899 writeb(temp, sport->port.membase + UARTCR2); lpuart_resume()
|
| /linux-4.1.27/include/acpi/ |
| H A D | acpi_lpat.h | 20 int temp; member in struct:acpi_lpat
34 int temp);
48 int temp) acpi_lpat_temp_to_raw()
47 acpi_lpat_temp_to_raw(struct acpi_lpat_conversion_table *lpat_table, int temp) acpi_lpat_temp_to_raw() argument
|
| /linux-4.1.27/drivers/video/fbdev/sis/ |
| H A D | init301.c | 287 unsigned short modeflag,index,temp,backupindex; SiS_GetRatePtr() local
326 temp = LCDRefreshIndex[SiS_GetBIOSLCDResInfo(SiS_Pr)]; SiS_GetRatePtr()
327 if(index > temp) index = temp; SiS_GetRatePtr()
353 temp = SiS_Pr->SiS_RefIndex[RRTI + i].Ext_InfoFlag; SiS_GetRatePtr()
354 temp &= ModeTypeMask; SiS_GetRatePtr()
355 if(temp < SiS_Pr->SiS_ModeType) break; SiS_GetRatePtr()
362 temp = SiS_Pr->SiS_RefIndex[RRTI + i - 1].Ext_InfoFlag; SiS_GetRatePtr()
363 if(temp & InterlaceMode) i++; SiS_GetRatePtr()
404 unsigned short temp,temp1; SiS_CR36BIOSWord23b() local
408 temp = 1 << ((SiS_GetReg(SiS_Pr->SiS_P3d4,0x36) >> 4) & 0x0f); SiS_CR36BIOSWord23b()
410 if(temp1 & temp) return true; SiS_CR36BIOSWord23b()
420 unsigned short temp,temp1; SiS_CR36BIOSWord23d() local
424 temp = 1 << ((SiS_GetReg(SiS_Pr->SiS_P3d4,0x36) >> 4) & 0x0f); SiS_CR36BIOSWord23d()
426 if(temp1 & temp) return true; SiS_CR36BIOSWord23d()
649 unsigned short tempal,temp,i,j; SiS_VBWait() local
651 temp = 0; SiS_VBWait()
655 if(temp & 0x01) { SiS_VBWait()
663 temp ^= 0x01; SiS_VBWait()
914 unsigned short temp; SiS_SetChrontelGPIO() local
921 temp = SiS_GetRegShort((acpibase + 0x3c)); /* ACPI register 0x3c: GP Event 1 I/O mode select */ SiS_SetChrontelGPIO()
922 temp &= 0xFEFF; SiS_SetChrontelGPIO()
923 SiS_SetRegShort((acpibase + 0x3c), temp); SiS_SetChrontelGPIO()
924 temp = SiS_GetRegShort((acpibase + 0x3c)); SiS_SetChrontelGPIO()
925 temp = SiS_GetRegShort((acpibase + 0x3a)); /* ACPI register 0x3a: GP Pin Level (low/high) */ SiS_SetChrontelGPIO()
926 temp &= 0xFEFF; SiS_SetChrontelGPIO()
927 if(!(myvbinfo & SetCRT2ToTV)) temp |= 0x0100; SiS_SetChrontelGPIO()
928 SiS_SetRegShort((acpibase + 0x3a), temp); SiS_SetChrontelGPIO()
929 temp = SiS_GetRegShort((acpibase + 0x3a)); SiS_SetChrontelGPIO()
937 unsigned short tempax, tempbx, temp; SiS_GetVBInfo() local
954 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30); SiS_GetVBInfo()
955 tempbx |= temp; SiS_GetVBInfo()
980 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); SiS_GetVBInfo()
981 if((temp & (EnableDualEdge | SetToLCDA)) == (EnableDualEdge | SetToLCDA)) { SiS_GetVBInfo()
989 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35) & 0xe0; SiS_GetVBInfo()
990 if(temp == 0x60) tempbx |= SetCRT2ToHiVision; SiS_GetVBInfo()
998 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); SiS_GetVBInfo()
999 if(temp & SetToLCDA) { SiS_GetVBInfo()
1003 if(temp & EnableCHYPbPr) { SiS_GetVBInfo()
1017 temp = SetCRT2ToSVIDEO | SiS_GetVBInfo()
1028 temp = SetCRT2ToAVIDEO | SiS_GetVBInfo()
1035 temp = SetCRT2ToLCDA | SiS_GetVBInfo()
1040 temp = SetCRT2ToTV | SetCRT2ToLCD; SiS_GetVBInfo()
1042 temp = SetCRT2ToLCD; SiS_GetVBInfo()
1047 if(!(tempbx & temp)) { SiS_GetVBInfo()
1165 unsigned char temp; SiS_SetYPbPr() local
1186 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); SiS_SetYPbPr()
1187 if(temp & 0x08) { SiS_SetYPbPr()
1188 switch((temp >> 4)) { SiS_SetYPbPr()
1208 unsigned short temp, temp1, resinfo = 0, romindex = 0; SiS_SetTVMode() local
1225 temp = 0; SiS_SetTVMode()
1228 temp = 0x35; SiS_SetTVMode()
1231 temp = 0x38; SiS_SetTVMode()
1237 if(temp) { SiS_SetTVMode()
1241 SiS_SetRegAND(SiS_Pr->SiS_P3d4,temp,0x3F); SiS_SetTVMode()
1244 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,temp); SiS_SetTVMode()
1274 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35); SiS_SetTVMode()
1275 if((temp & TVOverScan) || (SiS_Pr->SiS_CHOverScan == 1)) { SiS_SetTVMode()
1279 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x79); SiS_SetTVMode()
1280 if((temp & 0x80) || (SiS_Pr->SiS_CHOverScan == 1)) { SiS_SetTVMode()
1289 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); SiS_SetTVMode()
1291 if(temp & EnablePALM) SiS_Pr->SiS_TVMode |= TVSetPALM; SiS_SetTVMode()
1292 else if(temp & EnablePALN) SiS_Pr->SiS_TVMode |= TVSetPALN; SiS_SetTVMode()
1294 if(temp & EnableNTSCJ) { SiS_SetTVMode()
1407 unsigned short temp = SiS_Pr->SiS_LCDResInfo; SiS_GetBIOSLCDResInfo() local
1409 switch(temp) { SiS_GetBIOSLCDResInfo()
1410 case Panel_1280x768_2: temp = Panel_1280x768; break; SiS_GetBIOSLCDResInfo()
1411 case Panel_1280x800_2: temp = Panel_1280x800; break; SiS_GetBIOSLCDResInfo()
1412 case Panel_1280x854: temp = Panel661_1280x854; break; SiS_GetBIOSLCDResInfo()
1414 return temp; SiS_GetBIOSLCDResInfo()
1422 unsigned short temp; SiS_GetLCDInfoBIOS() local
1425 if((temp = SISGETROMW(6)) != SiS_Pr->PanelHT) { SiS_GetLCDInfoBIOS()
1427 SiS_Pr->PanelHT = temp; SiS_GetLCDInfoBIOS()
1429 if((temp = SISGETROMW(8)) != SiS_Pr->PanelVT) { SiS_GetLCDInfoBIOS()
1431 SiS_Pr->PanelVT = temp; SiS_GetLCDInfoBIOS()
1468 unsigned short temp,modeflag,resinfo=0,modexres=0,modeyres=0; SiS_GetLCDResInfo() local
1502 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x36); SiS_GetLCDResInfo()
1505 if(temp == 0) temp = 0x02; SiS_GetLCDResInfo()
1510 SiS_Pr->SiS_LCDTypeInfo = temp >> 4; SiS_GetLCDResInfo()
1512 SiS_Pr->SiS_LCDTypeInfo = (temp & 0x0F) - 1; SiS_GetLCDResInfo()
1514 temp &= 0x0f; SiS_GetLCDResInfo()
1519 if(temp < 0x0f) temp &= 0x07; SiS_GetLCDResInfo()
1522 temp = SiS300SeriesLCDRes[temp]; SiS_GetLCDResInfo()
1529 if (temp == Panel310_1152x768) temp = Panel_320x240_2; /* Verified working */ SiS_GetLCDResInfo()
1530 else if(temp == Panel310_320x240_2) temp = Panel_320x240_2; SiS_GetLCDResInfo()
1531 else if(temp == Panel310_320x240_3) temp = Panel_320x240_3; SiS_GetLCDResInfo()
1533 if(temp == Panel661_1280x854) temp = Panel_1280x854; SiS_GetLCDResInfo()
1538 if(temp == Panel310_1280x768) { SiS_GetLCDResInfo()
1539 temp = Panel_1280x768_2; SiS_GetLCDResInfo()
1542 if(temp == Panel661_1280x800) { SiS_GetLCDResInfo()
1543 temp = Panel_1280x800_2; SiS_GetLCDResInfo()
1548 SiS_Pr->SiS_LCDResInfo = temp; SiS_GetLCDResInfo()
1570 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x37); SiS_GetLCDResInfo()
1571 SiS_Pr->SiS_LCDInfo = temp & ~0x000e; SiS_GetLCDResInfo()
1572 /* Need temp below! */ SiS_GetLCDResInfo()
1595 if(temp & 0x08) SiS_Pr->SiS_LCDInfo |= LCDPass11; SiS_GetLCDResInfo()
1599 if(temp & 0x02) SiS_Pr->SiS_LCDInfo |= LCDDualLink; SiS_GetLCDResInfo()
1610 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35); SiS_GetLCDResInfo()
1611 if(temp & 0x01) SiS_Pr->SiS_LCDInfo |= LCDRGB18Bit; SiS_GetLCDResInfo()
1613 if(temp & 0x02) SiS_Pr->SiS_LCDInfo |= LCDDualLink; SiS_GetLCDResInfo()
3809 unsigned short temp; SiS_HandlePWD() local
3819 temp = 0x00; SiS_HandlePWD()
3821 temp = 0x80; SiS_HandlePWD()
3824 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x27,0x7f,temp); SiS_HandlePWD()
3841 unsigned short temp=0; SiS_DisableBridge() local
3975 temp = SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00); SiS_DisableBridge()
3978 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x00,temp); SiS_DisableBridge()
4035 temp = SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00); SiS_DisableBridge()
4038 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x00,temp); SiS_DisableBridge()
4115 temp = SiS_GetCH701x(SiS_Pr,0x61); SiS_DisableBridge()
4116 if(temp < 1) { SiS_DisableBridge()
4237 unsigned short temp=0, tempah; SiS_EnableBridge() local
4288 temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x32) & 0xDF; /* lock mode */ SiS_EnableBridge()
4291 if(!(tempah & SetCRT2ToRAMDAC)) temp |= 0x20; SiS_EnableBridge()
4293 SiS_SetReg(SiS_Pr->SiS_P3c4,0x32,temp); SiS_EnableBridge()
4382 temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x32) & 0xDF; SiS_EnableBridge()
4386 if(!(SiS_LCDAEnabled(SiS_Pr))) temp |= 0x20; SiS_EnableBridge()
4389 SiS_SetReg(SiS_Pr->SiS_P3c4,0x32,temp); SiS_EnableBridge()
4628 temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x32) & 0xDF; /* lock mode */ SiS_EnableBridge()
4631 if(!(tempah & SetCRT2ToRAMDAC)) temp |= 0x20; SiS_EnableBridge()
4633 SiS_SetReg(SiS_Pr->SiS_P3c4,0x32,temp); SiS_EnableBridge()
4638 temp = SiS_GetReg(SiS_Pr->SiS_Part1Port,0x2E); SiS_EnableBridge()
4639 if(!(temp & 0x80)) { SiS_EnableBridge()
4735 temp = SiS_GetCH701x(SiS_Pr,0x66); SiS_EnableBridge()
4736 temp &= 0x20; SiS_EnableBridge()
4758 if(temp) { SiS_EnableBridge()
4826 unsigned char temp; SiS_SetCRT2Offset() local
4835 temp = (unsigned char)(((offset >> 3) & 0xFF) + 1); SiS_SetCRT2Offset()
4836 if(offset & 0x07) temp++; SiS_SetCRT2Offset()
4837 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x03,temp); SiS_SetCRT2Offset()
5014 unsigned short temp, index, modeidindex, refreshratetableindex; SiS_SetCRT2FIFO_300() local
5064 temp = ((SiS_GetReg(SiS_Pr->SiS_P3c4,0x14) >> 6) & 0x03) << 1; SiS_SetCRT2FIFO_300()
5065 if(!temp) temp++; SiS_SetCRT2FIFO_300()
5066 temp <<= 2; SiS_SetCRT2FIFO_300()
5068 data2 = temp - ((colorth * VCLK) / MCLK); SiS_SetCRT2FIFO_300()
5070 temp = (28 * 16) % data2; SiS_SetCRT2FIFO_300()
5072 if(temp) data2++; SiS_SetCRT2FIFO_300()
5148 temp = data % (MCLK << 4); SiS_SetCRT2FIFO_300()
5150 if(temp) data++; SiS_SetCRT2FIFO_300()
5156 temp = 0x16; SiS_SetCRT2FIFO_300()
5158 temp = 0x13; SiS_SetCRT2FIFO_300()
5160 temp = 0x16; SiS_SetCRT2FIFO_300()
5164 temp = 0x1b; SiS_SetCRT2FIFO_300()
5166 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x01,0xe0,temp); SiS_SetCRT2FIFO_300()
5223 unsigned short temp, modeflag, i, j, xres=0, VGAVDE; SiS_SetGroup1_301() local
5266 temp = SiS_Pr->SiS_VGAHT - 96; SiS_SetGroup1_301()
5267 if(!(modeflag & HalfDCLK)) temp -= 32; SiS_SetGroup1_301()
5269 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x04); SiS_SetGroup1_301()
5270 temp |= ((SiS_GetReg(SiS_Pr->SiS_P3c4,0x0b) & 0xc0) << 2); SiS_SetGroup1_301()
5271 temp -= 3; SiS_SetGroup1_301()
5272 temp <<= 3; SiS_SetGroup1_301()
5274 if(SiS_Pr->SiS_RVBHRS2) temp = SiS_Pr->SiS_RVBHRS2; SiS_SetGroup1_301()
5276 SiS_Pr->CHSyncStart = temp; SiS_SetGroup1_301()
5297 temp = (SiS_Pr->SiS_VGAVT - VGAVDE) >> 1; SiS_SetGroup1_301()
5298 SiS_Pr->CVSyncStart = VGAVDE + temp; SiS_SetGroup1_301()
5300 temp >>= 3; SiS_SetGroup1_301()
5301 SiS_Pr->CVSyncEnd = SiS_Pr->CVSyncStart + temp; SiS_SetGroup1_301()
5319 temp = SiS_Pr->CCRT1CRTC[16] & 0xE0; SiS_SetGroup1_301()
5320 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,CRTranslation[0x0E],0x1F,temp); SiS_SetGroup1_301()
5322 temp = (SiS_Pr->CCRT1CRTC[16] & 0x01) << 5; SiS_SetGroup1_301()
5323 if(modeflag & DoubleScanMode) temp |= 0x80; SiS_SetGroup1_301()
5324 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,CRTranslation[0x09],0x5F,temp); SiS_SetGroup1_301()
5326 temp = 0; SiS_SetGroup1_301()
5327 temp |= (SiS_GetReg(SiS_Pr->SiS_P3c4,0x01) & 0x01); SiS_SetGroup1_301()
5328 if(modeflag & HalfDCLK) temp |= 0x08; SiS_SetGroup1_301()
5329 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x16,temp); /* SR01: HalfDCLK[3], 8/9 div dotclock[0] */ SiS_SetGroup1_301()
5334 temp = 0; SiS_SetGroup1_301()
5336 temp = (SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x01) << 7; SiS_SetGroup1_301()
5338 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1A,temp); /* SR0E, dither[7] */ SiS_SetGroup1_301()
5340 temp = SiS_GetRegByte((SiS_Pr->SiS_P3ca+0x02)); SiS_SetGroup1_301()
5341 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1b,temp); /* ? */ SiS_SetGroup1_301()
5353 unsigned short push2, tempax, tempbx, tempcx, temp; SiS_SetGroup1_LVDS() local
5437 temp = (tempax & 0x0007); SiS_SetGroup1_LVDS()
5438 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1A,temp); /* BPLHDESKEW[2:0] */ SiS_SetGroup1_LVDS()
5439 temp = (tempax >> 3) & 0x00FF; SiS_SetGroup1_LVDS()
5440 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x16,temp); /* BPLHDESKEW[10:3] */ SiS_SetGroup1_LVDS()
5457 temp = tempax; SiS_SetGroup1_LVDS()
5458 if(temp & 0x07) temp += 8; SiS_SetGroup1_LVDS()
5459 temp >>= 3; SiS_SetGroup1_LVDS()
5460 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x17,temp); /* BPLHDEE */ SiS_SetGroup1_LVDS()
5473 temp = (tempcx >> 3) & 0x00FF; SiS_SetGroup1_LVDS()
5480 case 0x0d: temp = 0x56; break; SiS_SetGroup1_LVDS()
5481 case 0x10: temp = 0x60; break; SiS_SetGroup1_LVDS()
5482 case 0x13: temp = 0x5f; break; SiS_SetGroup1_LVDS()
5492 case 0x5e: temp = 0x54; break; SiS_SetGroup1_LVDS()
5497 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x14,temp); /* BPLHRS */ SiS_SetGroup1_LVDS()
5500 temp += 2; SiS_SetGroup1_LVDS()
5502 temp += 8; SiS_SetGroup1_LVDS()
5504 temp = tempcx + SiS_Pr->PanelHRE; SiS_SetGroup1_LVDS()
5505 if(temp >= SiS_Pr->SiS_HT) temp -= SiS_Pr->SiS_HT; SiS_SetGroup1_LVDS()
5506 temp >>= 3; SiS_SetGroup1_LVDS()
5510 temp += 10; SiS_SetGroup1_LVDS()
5513 temp &= 0x1F; SiS_SetGroup1_LVDS()
5514 temp |= ((tempcx & 0x07) << 5); SiS_SetGroup1_LVDS()
5515 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x15,temp); /* BPLHRE */ SiS_SetGroup1_LVDS()
5556 temp = tempbx & 0x00FF; SiS_SetGroup1_LVDS()
5559 if(ModeNo == 0x10) temp = 0xa9; SiS_SetGroup1_LVDS()
5562 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x18,temp); /* BPLVRS */ SiS_SetGroup1_LVDS()
5574 temp = tempcx & 0x000F; SiS_SetGroup1_LVDS()
5575 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0xF0,temp); /* BPLVRE */ SiS_SetGroup1_LVDS()
5577 temp = ((tempbx >> 8) & 0x07) << 3; SiS_SetGroup1_LVDS()
5580 if(SiS_Pr->SiS_VGAVDE != SiS_Pr->SiS_VDE) temp |= 0x40; SiS_SetGroup1_LVDS()
5582 } else if(SiS_Pr->SiS_VGAVDE != SiS_Pr->SiS_VDE) temp |= 0x40; SiS_SetGroup1_LVDS()
5583 if(SiS_Pr->SiS_SetFlag & EnableLVDSDDA) temp |= 0x40; SiS_SetGroup1_LVDS()
5589 if(SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x03) temp |= 0x80; SiS_SetGroup1_LVDS()
5594 if(SiS_GetReg(SiS_Pr->SiS_P3c4,0x06) & 0x10) temp |= 0x80; SiS_SetGroup1_LVDS()
5596 if(SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x01) temp |= 0x80; SiS_SetGroup1_LVDS()
5600 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x1A,tempbx,temp); SiS_SetGroup1_LVDS()
5635 temp = ((tempbx >> 8) & 0x07) << 3; SiS_SetGroup1_LVDS()
5636 temp |= ((tempcx >> 8) & 0x07); SiS_SetGroup1_LVDS()
5637 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1D,temp); SiS_SetGroup1_LVDS()
5647 temp = (tempeax % (unsigned int)SiS_Pr->SiS_VDE); SiS_SetGroup1_LVDS()
5649 if(temp) tempeax++; SiS_SetGroup1_LVDS()
5653 temp = (unsigned short)(tempeax & 0x00FF); SiS_SetGroup1_LVDS()
5654 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1E,temp); /* BPLVCFACT */ SiS_SetGroup1_LVDS()
5655 tempvcfact = temp; SiS_SetGroup1_LVDS()
5663 temp = (tempeax % tempebx); SiS_SetGroup1_LVDS()
5665 if(temp) tempeax++; SiS_SetGroup1_LVDS()
5668 temp = (unsigned short)(tempeax & 0x00FF); SiS_SetGroup1_LVDS()
5669 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x37,temp); SiS_SetGroup1_LVDS()
5670 temp = (unsigned short)((tempeax & 0x00FF00) >> 8); SiS_SetGroup1_LVDS()
5671 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x36,temp); SiS_SetGroup1_LVDS()
5672 temp = (unsigned short)((tempeax & 0x00030000) >> 16); SiS_SetGroup1_LVDS()
5673 if(SiS_Pr->SiS_VDE == SiS_Pr->SiS_VGAVDE) temp |= 0x04; SiS_SetGroup1_LVDS()
5674 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x35,temp); SiS_SetGroup1_LVDS()
5677 temp = (unsigned short)(tempeax & 0x00FF); SiS_SetGroup1_LVDS()
5678 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x3c,temp); SiS_SetGroup1_LVDS()
5679 temp = (unsigned short)((tempeax & 0x00FF00) >> 8); SiS_SetGroup1_LVDS()
5680 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x3b,temp); SiS_SetGroup1_LVDS()
5681 temp = (unsigned short)(((tempeax & 0x00030000) >> 16) << 6); SiS_SetGroup1_LVDS()
5682 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x3a,0x3f,temp); SiS_SetGroup1_LVDS()
5683 temp = 0; SiS_SetGroup1_LVDS()
5684 if(SiS_Pr->SiS_VDE != SiS_Pr->SiS_VGAVDE) temp |= 0x08; SiS_SetGroup1_LVDS()
5685 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x30,0xf3,temp); SiS_SetGroup1_LVDS()
5713 temp = (unsigned short)(tempecx & 0x00FF); SiS_SetGroup1_LVDS()
5714 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1F,temp); SiS_SetGroup1_LVDS()
5732 temp = ((tempbx >> 8) & 0x07) << 3; SiS_SetGroup1_LVDS()
5733 temp = temp | ((tempecx >> 8) & 0x07); SiS_SetGroup1_LVDS()
5734 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x20,temp); SiS_SetGroup1_LVDS()
5741 temp = (unsigned short)((tempecx & 0xFF00) >> 8); SiS_SetGroup1_LVDS()
5742 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x22,temp); SiS_SetGroup1_LVDS()
5743 temp = (unsigned short)(tempecx & 0x00FF); SiS_SetGroup1_LVDS()
5744 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x23,temp); SiS_SetGroup1_LVDS()
5815 temp = (tempax >> 8) << 3; SiS_SetGroup1_LVDS()
5816 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x35,~0x078,temp); SiS_SetGroup1_LVDS()
5828 temp = (tempax >> 8) << 3; SiS_SetGroup1_LVDS()
5829 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x3C,~0x038,temp); SiS_SetGroup1_LVDS()
5836 temp = tempeax & 0x7f; SiS_SetGroup1_LVDS()
5838 if(temp) tempeax++; SiS_SetGroup1_LVDS()
5839 temp = tempeax & 0x3f; SiS_SetGroup1_LVDS()
5840 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x45,temp); SiS_SetGroup1_LVDS()
5852 temp = tempax & 0x00FF; SiS_SetGroup1_LVDS()
5853 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x43,temp); SiS_SetGroup1_LVDS()
5854 temp = ((tempax & 0xFF00) >> 8) << 3; SiS_SetGroup1_LVDS()
5855 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port, 0x44, 0x07, temp); SiS_SetGroup1_LVDS()
5862 temp = tempeax & 0xFF; SiS_SetGroup1_LVDS()
5863 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x42,temp); SiS_SetGroup1_LVDS()
5864 temp = (tempeax & 0xFF00) >> 8; SiS_SetGroup1_LVDS()
5865 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x41,temp); SiS_SetGroup1_LVDS()
5866 temp = ((tempeax & 0xFF0000) >> 16) | 0x10; SiS_SetGroup1_LVDS()
5867 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x40,temp); SiS_SetGroup1_LVDS()
5868 temp = ((tempeax & 0x01000000) >> 24) << 7; SiS_SetGroup1_LVDS()
5869 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port, 0x3C, 0x7F, temp); SiS_SetGroup1_LVDS()
5911 unsigned short temp=0, tempax=0, tempbx=0, tempcx=0, bridgeadd=0; SiS_SetGroup1() local
5954 temp = (SiS_Pr->SiS_VGAHT - 1) & 0x0FF; /* BTVGA2HT 0x08,0x09 */ SiS_SetGroup1()
5955 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x08,temp); /* CRT2 Horizontal Total */ SiS_SetGroup1()
5957 temp = (((SiS_Pr->SiS_VGAHT - 1) & 0xFF00) >> 8) << 4; SiS_SetGroup1()
5958 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x09,0x0f,temp); /* CRT2 Horizontal Total Overflow [7:4] */ SiS_SetGroup1()
5960 temp = (SiS_Pr->SiS_VGAHDE + 12) & 0x0FF; /* BTVGA2HDEE 0x0A,0x0C */ SiS_SetGroup1()
5961 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x0A,temp); /* CRT2 Horizontal Display Enable End */ SiS_SetGroup1()
5991 temp = (tempcx >> 4) & 0xF0; SiS_SetGroup1()
5992 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x09,0x0F,temp); /* CRT2 Horizontal Total Overflow [7:4] */ SiS_SetGroup1()
6077 temp = ((tempbx >> 8) & 0x0F) | ((pushbx >> 4) & 0xF0); SiS_SetGroup1()
6078 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x0C,temp); /* Overflow */ SiS_SetGroup1()
6083 temp = tempcx & 0x00FF; SiS_SetGroup1()
6090 temp--; SiS_SetGroup1()
6094 temp--; SiS_SetGroup1()
6097 temp--; SiS_SetGroup1()
6100 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x0E,temp); /* CRT2 Vertical Total */ SiS_SetGroup1()
6105 temp = ((tempbx >> 5) & 0x38) | ((tempcx >> 8) & 0x07); SiS_SetGroup1()
6106 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x12,temp); /* Overflow */ SiS_SetGroup1()
6150 temp = ((tempbx >> 4) & 0x70) | (tempcx & 0x0F); SiS_SetGroup1()
6151 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x11,temp); /* CRT2 Vert. Retrace End; Overflow */ SiS_SetGroup1()
6160 temp = 0x20; SiS_SetGroup1()
6162 temp = 0x10; SiS_SetGroup1()
6163 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) temp = 0x2c; SiS_SetGroup1()
6164 if(SiS_Pr->SiS_LCDResInfo == Panel_1280x1024) temp = 0x20; SiS_SetGroup1()
6167 if(SiS_Pr->SiS_LCDResInfo == Panel_1280x1024) temp = 0x20; SiS_SetGroup1()
6169 if(SiS_Pr->SiS_LCDResInfo == Panel_1280x960) temp = 0x24; SiS_SetGroup1()
6170 if(SiS_Pr->SiS_LCDResInfo == Panel_Custom) temp = 0x2c; SiS_SetGroup1()
6171 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) temp = 0x08; SiS_SetGroup1()
6173 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) temp = 0x2c; SiS_SetGroup1()
6174 else temp = 0x20; SiS_SetGroup1()
6179 temp = ROMAddr[0x221]; SiS_SetGroup1()
6181 temp = ROMAddr[0x222]; SiS_SetGroup1()
6183 temp = ROMAddr[0x223]; SiS_SetGroup1()
6185 temp = ROMAddr[0x224]; SiS_SetGroup1()
6189 if(SiS_Pr->PDC != -1) temp = SiS_Pr->PDC; SiS_SetGroup1()
6193 temp = 0x20; SiS_SetGroup1()
6195 if(SiS_Pr->SiS_LCDResInfo == Panel_640x480) temp = 0x04; SiS_SetGroup1()
6199 temp = ROMAddr[0x220]; SiS_SetGroup1()
6203 if(SiS_Pr->PDC != -1) temp = SiS_Pr->PDC; SiS_SetGroup1()
6207 temp &= 0x3c; SiS_SetGroup1()
6209 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,~0x3C,temp); /* Panel Link Delay Compensation; (Software Command Reset; Power Saving) */ SiS_SetGroup1()
6221 if(SiS_Pr->ChipType == SIS_740) temp = 0x03; SiS_SetGroup1()
6222 else temp = 0x00; SiS_SetGroup1()
6224 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) temp = 0x0a; SiS_SetGroup1()
6233 temp = 0x08; SiS_SetGroup1()
6240 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2D,tempbl,temp); /* Panel Link Delay Compensation */ SiS_SetGroup1()
6328 unsigned char temp; SiS_SetGroup2_C_ELV() local
6343 temp = 0x10; SiS_SetGroup2_C_ELV()
6344 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) temp |= 0x04; SiS_SetGroup2_C_ELV()
6345 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x4e,0xeb,temp); SiS_SetGroup2_C_ELV()
6526 unsigned short temp; SiS_SetGroup2_Tail() local
6530 temp = 0xc3; SiS_SetGroup2_Tail()
6532 temp++; SiS_SetGroup2_Tail()
6533 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) temp += 2; SiS_SetGroup2_Tail()
6535 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x2f,temp); SiS_SetGroup2_Tail()
6538 temp = 0x4d; SiS_SetGroup2_Tail()
6540 temp++; SiS_SetGroup2_Tail()
6541 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) temp++; SiS_SetGroup2_Tail()
6543 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x2f,temp); SiS_SetGroup2_Tail()
6553 temp = 1; SiS_SetGroup2_Tail()
6554 if(ModeNo <= 0x13) temp = 3; SiS_SetGroup2_Tail()
6555 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x0b,temp); SiS_SetGroup2_Tail()
6586 unsigned short i, j, tempax, tempbx, tempcx, tempch, tempcl, temp; SiS_SetGroup2() local
6609 temp = 0; SiS_SetGroup2()
6610 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToAVIDEO)) temp |= 0x08; SiS_SetGroup2()
6611 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToSVIDEO)) temp |= 0x04; SiS_SetGroup2()
6612 if(SiS_Pr->SiS_VBInfo & SetCRT2ToSCART) temp |= 0x02; SiS_SetGroup2()
6613 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) temp |= 0x01; SiS_SetGroup2()
6615 if(!(SiS_Pr->SiS_TVMode & TVSetPAL)) temp |= 0x10; SiS_SetGroup2()
6617 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x00,temp); SiS_SetGroup2()
6716 temp = tempax + (unsigned short)TimingPoint[0]; SiS_SetGroup2()
6717 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x01,temp); SiS_SetGroup2()
6719 temp = tempax + (unsigned short)TimingPoint[1]; SiS_SetGroup2()
6720 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x02,temp); SiS_SetGroup2()
6809 temp = (tempcx >> 8) & 0x0F; SiS_SetGroup2()
6810 temp |= ((tempbx >> 2) & 0xC0); SiS_SetGroup2()
6812 temp |= 0x10; SiS_SetGroup2()
6813 if(SiS_Pr->SiS_VBInfo & SetCRT2ToAVIDEO) temp |= 0x20; SiS_SetGroup2()
6815 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x30,temp); SiS_SetGroup2()
6828 temp = ((tempbx >> 3) & 0x60) | 0x18; SiS_SetGroup2()
6829 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x46,temp); SiS_SetGroup2()
6890 temp = (tempcx & 0x0300) >> 6; SiS_SetGroup2()
6891 temp |= ((tempbx >> 8) & 0x03); SiS_SetGroup2()
6893 temp |= 0x10; SiS_SetGroup2()
6894 if(SiS_Pr->SiS_TVMode & TVSetYPbPr525p) temp |= 0x20; SiS_SetGroup2()
6895 else if(SiS_Pr->SiS_TVMode & TVSetYPbPr750p) temp |= 0x40; SiS_SetGroup2()
6897 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x4D,temp); SiS_SetGroup2()
6899 temp = SiS_GetReg(SiS_Pr->SiS_Part2Port,0x43); SiS_SetGroup2()
6900 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x43,(temp - 3)); SiS_SetGroup2()
6905 temp = 0; SiS_SetGroup2()
6906 if(SiS_Pr->SiS_TVMode & TVSetPALM) temp = 8; SiS_SetGroup2()
6907 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x4e,0xf7,temp); SiS_SetGroup2()
6914 temp = SiS_GetReg(SiS_Pr->SiS_Part2Port,0x01); SiS_SetGroup2()
6915 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x01,(temp - 1)); SiS_SetGroup2()
6936 temp = 0x01; SiS_SetGroup2()
6940 temp = 0x02; SiS_SetGroup2()
6942 temp = 0x01; SiS_SetGroup2()
6947 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x0B,temp); SiS_SetGroup2()
6955 temp = (tempcx >> 3) & 0xE0; SiS_SetGroup2()
6959 temp |= 0x10; SiS_SetGroup2()
6962 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x1A,0x0f,temp); SiS_SetGroup2()
7034 temp = (tempbx >> 5) & 0x38; SiS_SetGroup2()
7035 temp |= ((tempcx >> 8) & 0x07); SiS_SetGroup2()
7036 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x02,temp); SiS_SetGroup2()
7081 temp = (tempbx >> 4) & 0xF0; SiS_SetGroup2()
7083 temp |= (tempbx & 0x0F); SiS_SetGroup2()
7086 temp &= 0xf0; SiS_SetGroup2()
7087 temp |= (SiS_Pr->CVSyncEnd & 0x0f); SiS_SetGroup2()
7090 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x01,temp); SiS_SetGroup2()
7103 temp = 0; SiS_SetGroup2()
7106 temp = SiS_Pr->SiS_HT - ((SiS_Pr->PanelXRes - SiS_Pr->SiS_HDE) / 2); SiS_SetGroup2()
7107 if(SiS_IsDualLink(SiS_Pr)) temp >>= 1; SiS_SetGroup2()
7110 temp += bridgeoffset; SiS_SetGroup2()
7111 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x1F,temp); /* lcdhdes */ SiS_SetGroup2()
7112 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x20,0x0F,((temp >> 4) & 0xf0)); SiS_SetGroup2()
7252 unsigned short temp, temp1, temp2;
7256 temp = (unsigned short)((int)((temp1 | ((temp2 & 0xf0) << 4))) + shift);
7257 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x1f,temp);
7258 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x20,0x0f,((temp >> 4) & 0xf0));
7259 temp = SiS_GetReg(SiS_Pr->SiS_Part2Port,0x2b) & 0x0f;
7260 temp = (unsigned short)((int)(temp) + shift);
7261 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x2b,0xf0,(temp & 0x0f));
7264 temp = (unsigned short)((int)((temp1 | ((temp2 & 0xf0) << 4))) + shift);
7265 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x43,temp);
7266 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x42,0x0f,((temp >> 4) & 0xf0));
7273 unsigned short temp, temp1, resinfo = 0; SiS_SetGroup4_C_ELV() local
7290 temp = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x3a); SiS_SetGroup4_C_ELV()
7291 if(!(temp & 0x01)) { SiS_SetGroup4_C_ELV()
7298 if(SiS_Pr->SiS_TVMode & TVSetYPbPr750p) temp = 0x0000; SiS_SetGroup4_C_ELV()
7299 else if(SiS_Pr->SiS_TVMode & TVSetYPbPr525p) temp = 0x0002; SiS_SetGroup4_C_ELV()
7300 else if(SiS_Pr->SiS_TVMode & TVSetHiVision) temp = 0x0400; SiS_SetGroup4_C_ELV()
7301 else temp = 0x0402; SiS_SetGroup4_C_ELV()
7306 if(SiS_Pr->SiS_TVMode & TVAspect43LB) temp |= 0x01; SiS_SetGroup4_C_ELV()
7307 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0x7c,(temp & 0xff)); SiS_SetGroup4_C_ELV()
7308 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x3a,0xfb,(temp >> 8)); SiS_SetGroup4_C_ELV()
7314 if(temp1 == 0x01) temp |= 0x01; SiS_SetGroup4_C_ELV()
7315 if(temp1 == 0x03) temp |= 0x04; /* ? why not 0x10? */ SiS_SetGroup4_C_ELV()
7316 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xf8,(temp & 0xff)); SiS_SetGroup4_C_ELV()
7317 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x3a,0xfb,(temp >> 8)); SiS_SetGroup4_C_ELV()
7348 unsigned short vclkindex, temp, reg1, reg2; SiS_SetCRT2VCLK() local
7374 temp = 0x08; SiS_SetCRT2VCLK()
7375 if(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC) temp |= 0x20; SiS_SetCRT2VCLK()
7376 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x12,temp); SiS_SetCRT2VCLK()
7407 unsigned short tempax, tempcx, tempbx, modeflag, temp, resinfo; SiS_SetGroup4() local
7447 temp = (tempbx >> 1) & 0x80; SiS_SetGroup4()
7452 temp |= ((tempcx >> 5) & 0x78); SiS_SetGroup4()
7458 temp |= ((tempcx >> 8) & 0x07); SiS_SetGroup4()
7459 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x15,temp); SiS_SetGroup4()
7466 temp = 0; SiS_SetGroup4()
7467 if(tempbx > 800) temp = 0x60; SiS_SetGroup4()
7469 temp = 0; SiS_SetGroup4()
7470 if(tempbx > 1024) temp = 0xC0; SiS_SetGroup4()
7471 else if(tempbx >= 960) temp = 0xA0; SiS_SetGroup4()
7473 temp = 0; SiS_SetGroup4()
7474 if(tempbx >= 1280) temp = 0x40; SiS_SetGroup4()
7475 else if(tempbx >= 1024) temp = 0x20; SiS_SetGroup4()
7477 temp = 0x80; SiS_SetGroup4()
7478 if(tempbx >= 1024) temp = 0xA0; SiS_SetGroup4()
7481 temp |= SiS_Pr->Init_P4_0E; SiS_SetGroup4()
7485 temp &= 0xf0; SiS_SetGroup4()
7486 temp |= 0x0A; SiS_SetGroup4()
7490 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x0E,0x10,temp); SiS_SetGroup4()
7495 if(!(temp & 0xE0)) tempebx >>=1; SiS_SetGroup4()
7514 temp = (unsigned short)(tempeax & 0x000000FF); SiS_SetGroup4()
7515 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x1B,temp); SiS_SetGroup4()
7516 temp = (unsigned short)((tempeax & 0x0000FF00) >> 8); SiS_SetGroup4()
7517 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x1A,temp); SiS_SetGroup4()
7518 temp = (unsigned short)((tempeax >> 12) & 0x70); /* sic! */ SiS_SetGroup4()
7519 temp |= (tempcx & 0x4F); SiS_SetGroup4()
7520 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x19,temp); SiS_SetGroup4()
7540 temp = tempax % 32; SiS_SetGroup4()
7542 if(temp) tempax++; SiS_SetGroup4()
7556 temp = ((tempax >> 4) & 0x30) | tempbx; SiS_SetGroup4()
7558 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x1E,temp); SiS_SetGroup4()
7560 temp = 0x0036; tempbx = 0xD0; SiS_SetGroup4()
7562 temp = 0x0026; tempbx = 0xC0; /* See En/DisableBridge() */ SiS_SetGroup4()
7566 temp |= 0x01; SiS_SetGroup4()
7569 temp &= ~0x01; SiS_SetGroup4()
7574 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x1F,tempbx,temp); SiS_SetGroup4()
7580 temp = (tempbx >> 5) & 0x38; SiS_SetGroup4()
7581 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x21,0xC0,temp); SiS_SetGroup4()
7991 unsigned short temp; SiS_SetCHTVReg() local
7996 temp = CHTVRegData[resindex].Reg[0]; SiS_SetCHTVReg()
7997 if(SiS_Pr->SiS_TVMode & TVSetNTSCJ) temp |= 0x10; SiS_SetCHTVReg()
7998 SiS_SetCH701x(SiS_Pr,0x00,temp); SiS_SetCHTVReg()
8007 temp = CHTVRegData[resindex].Reg[7]; SiS_SetCHTVReg()
8008 if(SiS_Pr->SiS_TVMode & TVSetNTSCJ) temp = 0x66; SiS_SetCHTVReg()
8009 SiS_SetCH701x(SiS_Pr,0x07,temp); SiS_SetCHTVReg()
8020 temp = SiS_GetCH701x(SiS_Pr,0x21) & ~0x02; SiS_SetCHTVReg()
8027 if(SiS_Pr->SiS_TVMode & (TVSetPALN | TVSetNTSCJ)) temp |= 0x02; SiS_SetCHTVReg()
8028 SiS_SetCH701x(SiS_Pr,0x21,temp); SiS_SetCHTVReg()
8045 unsigned short temp; SiS_Chrontel701xBLOn() local
8052 temp = SiS_GetCH701x(SiS_Pr,0x66); SiS_Chrontel701xBLOn()
8053 temp |= 0x20; SiS_Chrontel701xBLOn()
8054 SiS_SetCH701x(SiS_Pr,0x66,temp); SiS_Chrontel701xBLOn()
8062 unsigned short temp; SiS_Chrontel701xBLOff() local
8066 temp = SiS_GetCH701x(SiS_Pr,0x66); SiS_Chrontel701xBLOff()
8067 temp &= 0xDF; SiS_Chrontel701xBLOff()
8068 SiS_SetCH701x(SiS_Pr,0x66,temp); SiS_Chrontel701xBLOff()
8210 unsigned char temp, temp1; SiS_ChrontelResetVSync() local
8214 temp = SiS_GetCH701x(SiS_Pr,0x47); SiS_ChrontelResetVSync()
8215 temp &= 0x7f; /* Use external VSYNC */ SiS_ChrontelResetVSync()
8216 SiS_SetCH701x(SiS_Pr,0x47,temp); SiS_ChrontelResetVSync()
8218 temp = SiS_GetCH701x(SiS_Pr,0x47); SiS_ChrontelResetVSync()
8219 temp |= 0x80; /* Use internal VSYNC */ SiS_ChrontelResetVSync()
8220 SiS_SetCH701x(SiS_Pr,0x47,temp); SiS_ChrontelResetVSync()
8227 unsigned short temp; SiS_Chrontel701xOn() local
8231 temp = SiS_GetCH701x(SiS_Pr,0x1c); SiS_Chrontel701xOn()
8232 temp |= 0x04; /* Invert XCLK phase */ SiS_Chrontel701xOn()
8233 SiS_SetCH701x(SiS_Pr,0x1c,temp); SiS_Chrontel701xOn()
8236 temp = SiS_GetCH701x(SiS_Pr,0x01); SiS_Chrontel701xOn()
8237 temp &= 0x3f; SiS_Chrontel701xOn()
8238 temp |= 0x80; /* Enable YPrPb (HDTV) */ SiS_Chrontel701xOn()
8239 SiS_SetCH701x(SiS_Pr,0x01,temp); SiS_Chrontel701xOn()
8242 temp = SiS_GetCH701x(SiS_Pr,0x01); SiS_Chrontel701xOn()
8243 temp &= 0x3f; SiS_Chrontel701xOn()
8244 temp |= 0xc0; /* Enable SCART + CVBS */ SiS_Chrontel701xOn()
8245 SiS_SetCH701x(SiS_Pr,0x01,temp); SiS_Chrontel701xOn()
8252 temp = SiS_GetCH701x(SiS_Pr,0x49); SiS_Chrontel701xOn()
8254 temp = SiS_GetCH701x(SiS_Pr,0x73); SiS_Chrontel701xOn()
8255 temp |= 0x60; SiS_Chrontel701xOn()
8256 SiS_SetCH701x(SiS_Pr,0x73,temp); SiS_Chrontel701xOn()
8258 temp = SiS_GetCH701x(SiS_Pr,0x47); SiS_Chrontel701xOn()
8259 temp &= 0x7f; SiS_Chrontel701xOn()
8260 SiS_SetCH701x(SiS_Pr,0x47,temp); SiS_Chrontel701xOn()
8262 temp = SiS_GetCH701x(SiS_Pr,0x47); SiS_Chrontel701xOn()
8263 temp |= 0x80; SiS_Chrontel701xOn()
8264 SiS_SetCH701x(SiS_Pr,0x47,temp); SiS_Chrontel701xOn()
8272 unsigned short temp; SiS_Chrontel701xOff() local
8283 temp = SiS_GetCH701x(SiS_Pr,0x76); SiS_Chrontel701xOff()
8284 temp &= 0xfc; SiS_Chrontel701xOff()
8285 SiS_SetCH701x(SiS_Pr,0x76,temp); SiS_Chrontel701xOff()
8294 unsigned short temp; SiS_ChrontelResetDB() local
8298 temp = SiS_GetCH701x(SiS_Pr,0x4a); /* Version ID */ SiS_ChrontelResetDB()
8299 temp &= 0x01; SiS_ChrontelResetDB()
8300 if(!temp) { SiS_ChrontelResetDB()
8303 temp = SiS_GetCH701x(SiS_Pr,0x49); SiS_ChrontelResetDB()
8314 SiS_SetCH701x(SiS_Pr,0x49,temp); SiS_ChrontelResetDB()
8320 temp = SiS_GetCH701x(SiS_Pr,0x5c); SiS_ChrontelResetDB()
8321 temp &= 0xef; SiS_ChrontelResetDB()
8322 SiS_SetCH701x(SiS_Pr,0x5c,temp); SiS_ChrontelResetDB()
8323 temp = SiS_GetCH701x(SiS_Pr,0x5c); SiS_ChrontelResetDB()
8324 temp |= 0x10; SiS_ChrontelResetDB()
8325 SiS_SetCH701x(SiS_Pr,0x5c,temp); SiS_ChrontelResetDB()
8326 temp = SiS_GetCH701x(SiS_Pr,0x5c); SiS_ChrontelResetDB()
8327 temp &= 0xef; SiS_ChrontelResetDB()
8328 SiS_SetCH701x(SiS_Pr,0x5c,temp); SiS_ChrontelResetDB()
8329 temp = SiS_GetCH701x(SiS_Pr,0x61); SiS_ChrontelResetDB()
8330 if(!temp) { SiS_ChrontelResetDB()
8346 unsigned short temp; SiS_ChrontelInitTVVSync() local
8357 temp = SiS_GetCH701x(SiS_Pr,0x49); SiS_ChrontelInitTVVSync()
8358 temp &= 1; SiS_ChrontelInitTVVSync()
8359 if(temp != 1) { /* TV block powered? (0 = yes, 1 = no) */ SiS_ChrontelInitTVVSync()
8360 temp = SiS_GetCH701x(SiS_Pr,0x47); SiS_ChrontelInitTVVSync()
8361 temp &= 0x70; SiS_ChrontelInitTVVSync()
8362 SiS_SetCH701x(SiS_Pr,0x47,temp); /* enable VSYNC */ SiS_ChrontelInitTVVSync()
8364 temp = SiS_GetCH701x(SiS_Pr,0x47); SiS_ChrontelInitTVVSync()
8365 temp |= 0x80; SiS_ChrontelInitTVVSync()
8366 SiS_SetCH701x(SiS_Pr,0x47,temp); /* disable VSYNC */ SiS_ChrontelInitTVVSync()
8375 unsigned short temp,temp1; SiS_ChrontelDoSomething3() local
8379 temp = SiS_GetCH701x(SiS_Pr,0x61); SiS_ChrontelDoSomething3()
8380 if(temp < 1) { SiS_ChrontelDoSomething3()
8381 temp++; SiS_ChrontelDoSomething3()
8382 SiS_SetCH701x(SiS_Pr,0x61,temp); SiS_ChrontelDoSomething3()
8392 temp = SiS_GetCH701x(SiS_Pr,0x61); SiS_ChrontelDoSomething3()
8393 if(temp < 2) { SiS_ChrontelDoSomething3()
8394 temp++; SiS_ChrontelDoSomething3()
8395 SiS_SetCH701x(SiS_Pr,0x61,temp); SiS_ChrontelDoSomething3()
8399 temp = SiS_GetCH701x(SiS_Pr,0x66); SiS_ChrontelDoSomething3()
8400 temp |= 0x5f; SiS_ChrontelDoSomething3()
8401 SiS_SetCH701x(SiS_Pr,0x66,temp); SiS_ChrontelDoSomething3()
8412 temp = SiS_GetCH701x(SiS_Pr,0x76); SiS_ChrontelDoSomething3()
8413 temp |= 0x03; SiS_ChrontelDoSomething3()
8414 SiS_SetCH701x(SiS_Pr,0x76,temp); SiS_ChrontelDoSomething3()
8415 temp = SiS_GetCH701x(SiS_Pr,0x66); SiS_ChrontelDoSomething3()
8416 temp &= 0x7f; SiS_ChrontelDoSomething3()
8417 SiS_SetCH701x(SiS_Pr,0x66,temp); SiS_ChrontelDoSomething3()
8426 unsigned short temp; SiS_ChrontelDoSomething2() local
8431 temp = SiS_GetCH701x(SiS_Pr,0x66); SiS_ChrontelDoSomething2()
8432 temp &= 0x04; /* PLL stable? -> bail out */ SiS_ChrontelDoSomething2()
8433 if(temp == 0x04) break; SiS_ChrontelDoSomething2()
8442 temp = SiS_GetCH701x(SiS_Pr,0x76); SiS_ChrontelDoSomething2()
8443 temp &= 0xfb; /* Reset PLL */ SiS_ChrontelDoSomething2()
8444 SiS_SetCH701x(SiS_Pr,0x76,temp); SiS_ChrontelDoSomething2()
8446 temp = SiS_GetCH701x(SiS_Pr,0x76); SiS_ChrontelDoSomething2()
8447 temp |= 0x04; /* PLL normal operation */ SiS_ChrontelDoSomething2()
8448 SiS_SetCH701x(SiS_Pr,0x76,temp); SiS_ChrontelDoSomething2()
8463 unsigned short temp; SiS_ChrontelDoSomething1() local
8465 temp = SiS_GetCH701x(SiS_Pr,0x03); SiS_ChrontelDoSomething1()
8466 temp |= 0x80; /* Set datapath 1 to TV */ SiS_ChrontelDoSomething1()
8467 temp &= 0xbf; /* Set datapath 2 to LVDS */ SiS_ChrontelDoSomething1()
8468 SiS_SetCH701x(SiS_Pr,0x03,temp); SiS_ChrontelDoSomething1()
8472 temp = SiS_GetCH701x(SiS_Pr,0x1c); SiS_ChrontelDoSomething1()
8473 temp &= 0xfb; /* Normal XCLK phase */ SiS_ChrontelDoSomething1()
8474 SiS_SetCH701x(SiS_Pr,0x1c,temp); SiS_ChrontelDoSomething1()
8478 temp = SiS_GetCH701x(SiS_Pr,0x64); SiS_ChrontelDoSomething1()
8479 temp |= 0x40; /* ? Bit not defined */ SiS_ChrontelDoSomething1()
8480 SiS_SetCH701x(SiS_Pr,0x64,temp); SiS_ChrontelDoSomething1()
8482 temp = SiS_GetCH701x(SiS_Pr,0x03); SiS_ChrontelDoSomething1()
8483 temp &= 0x3f; /* D1 input to both LVDS and TV */ SiS_ChrontelDoSomething1()
8484 SiS_SetCH701x(SiS_Pr,0x03,temp); SiS_ChrontelDoSomething1()
8494 temp = SiS_GetCH701x(SiS_Pr,0x66); SiS_ChrontelDoSomething1()
8495 if(temp != 0x45) { SiS_ChrontelDoSomething1()
8506 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x34); SiS_ChrontelDoSomething1()
8507 SiS_ChrontelDoSomething3(SiS_Pr,temp); SiS_ChrontelDoSomething1()
8733 unsigned short tempah,temp; SiS_SetTrumpBlockLoop() local
8746 temp = SiS_WriteDDC2Data(SiS_Pr,tempah); /* Write DAB (S0=0=write) */ SiS_SetTrumpBlockLoop()
8747 if(temp) continue; /* (ERROR: no ack) */ SiS_SetTrumpBlockLoop()
8749 temp = SiS_WriteDDC2Data(SiS_Pr,tempah); /* Write register number */ SiS_SetTrumpBlockLoop()
8750 if(temp) continue; /* (ERROR: no ack) */ SiS_SetTrumpBlockLoop()
8753 temp = SiS_WriteDDC2Data(SiS_Pr,tempah);/* Write DAB (S0=0=write) */ SiS_SetTrumpBlockLoop()
8754 if(temp) break; SiS_SetTrumpBlockLoop()
8756 if(temp) continue; SiS_SetTrumpBlockLoop()
8792 unsigned short temp, i; SiS_SetChReg() local
8800 temp = SiS_WriteDDC2Data(SiS_Pr, SiS_Pr->SiS_DDC_DeviceAddr); /* Write DAB (S0=0=write) */ SiS_SetChReg()
8801 if(temp) continue; /* (ERROR: no ack) */ SiS_SetChReg()
8802 temp = SiS_WriteDDC2Data(SiS_Pr, (reg | myor)); /* Write RAB (700x: set bit 7, see datasheet) */ SiS_SetChReg()
8803 if(temp) continue; /* (ERROR: no ack) */ SiS_SetChReg()
8804 temp = SiS_WriteDDC2Data(SiS_Pr, val); /* Write data */ SiS_SetChReg()
8805 if(temp) continue; /* (ERROR: no ack) */ SiS_SetChReg()
8865 unsigned short tempah, temp, i; SiS_GetChReg() local
8873 temp = SiS_WriteDDC2Data(SiS_Pr,SiS_Pr->SiS_DDC_DeviceAddr); /* Write DAB (S0=0=write) */ SiS_GetChReg()
8874 if(temp) continue; /* (ERROR: no ack) */ SiS_GetChReg()
8875 temp = SiS_WriteDDC2Data(SiS_Pr,SiS_Pr->SiS_DDC_ReadAddr | myor); /* Write RAB (700x: | 0x80) */ SiS_GetChReg()
8876 if(temp) continue; /* (ERROR: no ack) */ SiS_GetChReg()
8878 temp = SiS_WriteDDC2Data(SiS_Pr,SiS_Pr->SiS_DDC_DeviceAddr | 0x01);/* DAB (S0=1=read) */ SiS_GetChReg()
8879 if(temp) continue; /* (ERROR: no ack) */ SiS_GetChReg()
8968 unsigned short temp = 0, myadaptnum = adaptnum; SiS_InitDDCRegs() local
9024 temp = 4 - (myadaptnum * 2); SiS_InitDDCRegs()
9025 if(flag) temp = 0; SiS_InitDDCRegs()
9054 temp = myadaptnum; SiS_InitDDCRegs()
9056 temp = 0; SiS_InitDDCRegs()
9060 if(flag) temp = 0; SiS_InitDDCRegs()
9063 SiS_Pr->SiS_DDC_Data = 0x02 << temp; SiS_InitDDCRegs()
9064 SiS_Pr->SiS_DDC_Clk = 0x01 << temp; SiS_InitDDCRegs()
9124 unsigned short temp, ret=0; SiS_DoProbeDDC() local
9135 temp = (unsigned char)SiS_ReadDDC2Data(SiS_Pr); SiS_DoProbeDDC()
9137 if(temp == 0) { SiS_DoProbeDDC()
9146 temp = (unsigned char)SiS_ReadDDC2Data(SiS_Pr); SiS_DoProbeDDC()
9148 temp &= mask; SiS_DoProbeDDC()
9149 if(temp == value) ret = 0; SiS_DoProbeDDC()
9153 if(temp == 0x30) ret = 0; SiS_DoProbeDDC()
9358 unsigned short i,flag,temp; SiS_WriteDDC2Data() local
9377 temp = SiS_CheckACK(SiS_Pr); /* Check acknowledge */ SiS_WriteDDC2Data()
9378 return temp; SiS_WriteDDC2Data()
9384 unsigned short i, temp, getdata; SiS_ReadDDC2Data() local
9395 temp = SiS_GetReg(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index); SiS_ReadDDC2Data()
9396 if(temp & SiS_Pr->SiS_DDC_Data) getdata |= 0x01; SiS_ReadDDC2Data()
9415 unsigned short temp, watchdog=1000; SiS_SetSCLKHigh() local
9422 temp = SiS_GetReg(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index); SiS_SetSCLKHigh()
9423 } while((!(temp & SiS_Pr->SiS_DDC_Clk)) && --watchdog); SiS_SetSCLKHigh()
9578 unsigned short index = 0, temp = 0; GetOEMTVPtr661_2_GEN() local
9594 temp++; GetOEMTVPtr661_2_GEN()
9596 temp += 0x0100; GetOEMTVPtr661_2_GEN()
9598 return (unsigned int)(index | (temp << 16)); GetOEMTVPtr661_2_GEN()
9642 unsigned short delay=0,index,myindex,temp,romptr=0; SetDelayComp() local
9910 temp = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x36) & 0xf0) >> 4; SetDelayComp()
9911 if(temp == 8) { /* 1400x1050 BIOS (COMPAL) */ SetDelayComp()
9914 } else if(temp == 6) { SetDelayComp()
9917 } else if(temp > 7) { /* 1280x1024 BIOS (which one?) */ SetDelayComp()
9949 unsigned short index,temp,temp1,romptr=0; SetAntiFlicker() local
9958 temp = GetTVPtrIndex(SiS_Pr); SetAntiFlicker()
9959 temp >>= 1; /* 0: NTSC/YPbPr, 1: PAL, 2: HiTV */ SetAntiFlicker()
9960 temp1 = temp; SetAntiFlicker()
9979 temp = ROMAddr[romptr + temp1 + index]; SetAntiFlicker()
9981 temp = SiS310_TVAntiFlick1[temp][index]; SetAntiFlicker()
9983 temp <<= 4; SetAntiFlicker()
9985 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x0A,0x8f,temp); /* index 0A D[6:4] */ SetAntiFlicker()
9992 unsigned short index,temp,temp1,romptr=0; SetEdgeEnhance() local
9994 temp = temp1 = GetTVPtrIndex(SiS_Pr) >> 1; /* 0: NTSC/YPbPr, 1: PAL, 2: HiTV */ SetEdgeEnhance()
10018 temp = ROMAddr[romptr + temp1 + index]; SetEdgeEnhance()
10020 temp = SiS310_TVEdge1[temp][index]; SetEdgeEnhance()
10022 temp <<= 5; SetEdgeEnhance()
10023 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x3A,0x1F,temp); /* index 0A D[7:5] */ SetEdgeEnhance()
10029 unsigned short index, temp, i, j; SetYFilter() local
10037 temp = GetTVPtrIndex(SiS_Pr) >> 1; /* 0: NTSC/YPbPr, 1: PAL, 2: HiTV */ SetYFilter()
10039 if(SiS_Pr->SiS_TVMode & TVSetNTSCJ) temp = 1; /* NTSC-J uses PAL */ SetYFilter()
10040 else if(SiS_Pr->SiS_TVMode & TVSetPALM) temp = 3; /* PAL-M */ SetYFilter()
10041 else if(SiS_Pr->SiS_TVMode & TVSetPALN) temp = 4; /* PAL-N */ SetYFilter()
10042 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) temp = 1; /* HiVision uses PAL */ SetYFilter()
10046 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,SiS310_TVYFilter2[temp][index][j]); SetYFilter()
10049 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,SiS310_TVYFilter2[temp][index][j]); SetYFilter()
10053 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,SiS310_TVYFilter1[temp][index][j]); SetYFilter()
10062 unsigned short index,temp,i,j,resinfo,romptr=0; SetPhaseIncr() local
10088 temp = GetTVPtrIndex(SiS_Pr); SetPhaseIncr()
10111 romptr += (temp << 2); SetPhaseIncr()
10116 index = temp % 2; SetPhaseIncr()
10117 temp >>= 1; /* 0:NTSC, 1:PAL, 2:HiTV */ SetPhaseIncr()
10120 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,SiS310_TVPhaseIncr1[temp][index][j]); SetPhaseIncr()
10122 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,SiS310_TVPhaseIncr2[temp][index][j]); SetPhaseIncr()
10124 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,SiS310_TVPhaseIncr1[temp][index][j]); SetPhaseIncr()
10310 unsigned char temp; SetCRT2SyncDither661() local
10329 temp = (infoflag >> 6) | 0x0c; SetCRT2SyncDither661()
10331 temp ^= 0x04; SetCRT2SyncDither661()
10332 if(SiS_Pr->SiS_ModeType >= Mode24Bpp) temp |= 0x10; SetCRT2SyncDither661()
10334 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x1a,0xe0,temp); SetCRT2SyncDither661()
10336 temp = 0x30; SetCRT2SyncDither661()
10337 if(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit) temp = 0x20; SetCRT2SyncDither661()
10338 temp |= infoflag; SetCRT2SyncDither661()
10339 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0x0f,temp); SetCRT2SyncDither661()
10340 temp = 0; SetCRT2SyncDither661()
10342 if(SiS_Pr->SiS_ModeType >= Mode24Bpp) temp |= 0x80; SetCRT2SyncDither661()
10344 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x1a,0x7f,temp); SetCRT2SyncDither661()
10444 unsigned short tempcl,tempch,tempbl,tempbh,tempbx,tempax,temp; SiS_FinalizeLCD() local
10567 temp = tempbx & 0xff; SiS_FinalizeLCD()
10568 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1b,temp); SiS_FinalizeLCD()
10569 temp = (tempbx >> 8) & 0x03; SiS_FinalizeLCD()
10570 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x1d,0xf8,temp); SiS_FinalizeLCD()
10631 temp = tempbx & 0xff; SiS_FinalizeLCD()
10632 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x04,temp); SiS_FinalizeLCD()
10633 temp = ((tempbx & 0xff00) >> 4) | tempcl; SiS_FinalizeLCD()
10634 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x01,0x80,temp); SiS_FinalizeLCD()
10650 unsigned char temp; SetOEMLCDData2() local
10680 temp = SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00); SetOEMLCDData2()
10681 if(temp & 0x80) { SetOEMLCDData2()
10682 temp = SiS_GetReg(SiS_Pr->SiS_Part1Port,0x18); SetOEMLCDData2()
10683 temp++; SetOEMLCDData2()
10684 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x18,temp); SetOEMLCDData2()
10755 unsigned short index,temp,romptr=0; SetOEMLCDDelay() local
10774 temp = GetOEMLCDPtr(SiS_Pr, 0); SetOEMLCDDelay()
10783 romptr += (temp * 2); SetOEMLCDDelay()
10786 temp = ROMAddr[romptr]; SetOEMLCDDelay()
10789 temp = SiS300_OEMLCDDelay2[temp][index]; SetOEMLCDDelay()
10791 temp = SiS300_OEMLCDDelay3[temp][index]; SetOEMLCDDelay()
10797 romptr += (temp * 2); SetOEMLCDDelay()
10800 temp = ROMAddr[romptr]; SetOEMLCDDelay()
10802 temp = SiS300_OEMLCDDelay5[temp][index]; SetOEMLCDDelay()
10808 romptr += (temp * 2); SetOEMLCDDelay()
10811 temp = ROMAddr[romptr]; SetOEMLCDDelay()
10813 temp = SiS300_OEMLCDDelay4[temp][index]; SetOEMLCDDelay()
10816 temp = SiS300_OEMLCDDelay4[temp][index]; SetOEMLCDDelay()
10820 temp &= 0x3c; SetOEMLCDDelay()
10821 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,~0x3C,temp); /* index 0A D[6:4] */ SetOEMLCDDelay()
10829 unsigned short index,temp; SetOEMLCDData()
10837 temp = GetOEMLCDPtr(SiS_Pr, 1); SetOEMLCDData()
10838 if(temp == 0xFFFF) return; SetOEMLCDData()
10842 SiS_SetReg(SiS_Pr->SiS_Part1Port,i,SiS300_LCDHData[temp][index][j]); SetOEMLCDData()
10844 SiS_SetRegANDOR(SiS_SiS_Part1Port,0x1a, 0xf8, (SiS300_LCDHData[temp][index][j] & 0x07)); SetOEMLCDData()
10847 SiS_SetReg(SiS_SiS_Part1Port,0x18, SiS300_LCDVData[temp][index][0]); SetOEMLCDData()
10848 SiS_SetRegANDOR(SiS_SiS_Part1Port,0x19, 0xF0, SiS300_LCDVData[temp][index][1]); SetOEMLCDData()
10849 SiS_SetRegANDOR(SiS_SiS_Part1Port,0x1A, 0xC7, (SiS300_LCDVData[temp][index][2] & 0x38)); SetOEMLCDData()
10851 SiS_SetReg(SiS_Pr->SiS_Part1Port,i,SiS300_LCDVData[temp][index][j]); SetOEMLCDData()
10878 unsigned short index,temp,romptr=0; SetOEMTVDelay() local
10886 temp = GetOEMTVPtr(SiS_Pr); SetOEMTVDelay()
10891 romptr += (temp * 2); SetOEMTVDelay()
10894 temp = ROMAddr[romptr]; SetOEMTVDelay()
10897 temp = SiS300_OEMTVDelay301[temp][index]; SetOEMTVDelay()
10899 temp = SiS300_OEMTVDelayLVDS[temp][index]; SetOEMTVDelay()
10902 temp &= 0x3c; SetOEMTVDelay()
10903 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,~0x3C,temp); SetOEMTVDelay()
10910 unsigned short index,temp,romptr=0; SetOEMAntiFlicker() local
10918 temp = GetOEMTVPtr(SiS_Pr); SetOEMAntiFlicker()
10923 romptr += (temp * 2); SetOEMAntiFlicker()
10926 temp = ROMAddr[romptr]; SetOEMAntiFlicker()
10928 temp = SiS300_OEMTVFlicker[temp][index]; SetOEMAntiFlicker()
10930 temp &= 0x70; SetOEMAntiFlicker()
10931 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x0A,0x8F,temp); SetOEMAntiFlicker()
10938 unsigned short index,i,j,temp,romptr=0; SetOEMPhaseIncr() local
10950 temp = GetOEMTVPtr(SiS_Pr); SetOEMPhaseIncr()
10956 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,SiS300_Phase2[temp][index][j]); SetOEMPhaseIncr()
10960 romptr += (temp * 2); SetOEMPhaseIncr()
10968 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,SiS300_Phase1[temp][index][j]); SetOEMPhaseIncr()
10978 unsigned short index,temp,i,j,romptr=0; SetOEMYFilter() local
10988 temp = GetOEMTVPtr(SiS_Pr); SetOEMYFilter()
10990 if(SiS_Pr->SiS_TVMode & TVSetPALM) temp = 8; SetOEMYFilter()
10991 else if(SiS_Pr->SiS_TVMode & TVSetPALN) temp = 9; SetOEMYFilter()
10998 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,SiS300_Filter2[temp][index][j]); SetOEMYFilter()
11001 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,SiS300_Filter2[temp][index][j]); SetOEMYFilter()
11005 romptr += (temp * 2); SetOEMYFilter()
11013 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,SiS300_Filter1[temp][index][j]); SetOEMYFilter()
|
| H A D | init.c | 932 u8 temp; SiS_SetRegANDOR() local
934 temp = SiS_GetReg(Port, Index); SiS_SetRegANDOR()
935 temp = (temp & (DataAND)) | DataOR; SiS_SetRegANDOR()
936 SiS_SetReg(Port, Index, temp); SiS_SetRegANDOR()
942 u8 temp; SiS_SetRegAND() local
944 temp = SiS_GetReg(Port, Index); SiS_SetRegAND()
945 temp &= DataAND; SiS_SetRegAND()
946 SiS_SetReg(Port, Index, temp); SiS_SetRegAND()
952 u8 temp; SiS_SetRegOR() local
954 temp = SiS_GetReg(Port, Index); SiS_SetRegOR()
955 temp |= DataOR; SiS_SetRegOR()
956 SiS_SetReg(Port, Index, temp); SiS_SetRegOR()
1154 unsigned short temp; SiSSetLVDSetc() local
1166 temp = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00); SiSSetLVDSetc()
1167 if((temp == 1) || (temp == 2)) return; SiSSetLVDSetc()
1174 temp = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x37) & 0x0e) >> 1; SiSSetLVDSetc()
1175 if((temp >= 2) && (temp <= 5)) SiS_Pr->SiS_IF_DEF_LVDS = 1; SiSSetLVDSetc()
1176 if(temp == 3) SiS_Pr->SiS_IF_DEF_TRUMPION = 1; SiSSetLVDSetc()
1177 if((temp == 4) || (temp == 5)) { SiSSetLVDSetc()
1189 temp = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x37) & 0x0e) >> 1; SiSSetLVDSetc()
1190 if((temp >= 2) && (temp <= 3)) SiS_Pr->SiS_IF_DEF_LVDS = 1; SiSSetLVDSetc()
1191 if(temp == 3) SiS_Pr->SiS_IF_DEF_CH70xx = 2; SiSSetLVDSetc()
1201 temp = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x38) & 0xe0) >> 5; SiSSetLVDSetc()
1202 if((temp >= 2) && (temp <= 3)) SiS_Pr->SiS_IF_DEF_LVDS = 1; SiSSetLVDSetc()
1203 if(temp == 3) SiS_Pr->SiS_IF_DEF_CH70xx = 2; SiSSetLVDSetc()
1204 if(temp == 4) SiS_Pr->SiS_IF_DEF_CONEX = 1; /* Not yet supported */ SiSSetLVDSetc()
1348 unsigned short temp; SiS_SetSegRegLower() local
1351 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cb) & 0xf0; SiS_SetSegRegLower()
1352 temp |= (value >> 4); SiS_SetSegRegLower()
1353 SiS_SetRegByte(SiS_Pr->SiS_P3cb, temp); SiS_SetSegRegLower()
1354 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cd) & 0xf0; SiS_SetSegRegLower()
1355 temp |= (value & 0x0f); SiS_SetSegRegLower()
1356 SiS_SetRegByte(SiS_Pr->SiS_P3cd, temp); SiS_SetSegRegLower()
1362 unsigned short temp; SiS_SetSegRegUpper() local
1365 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cb) & 0x0f; SiS_SetSegRegUpper()
1366 temp |= (value & 0xf0); SiS_SetSegRegUpper()
1367 SiS_SetRegByte(SiS_Pr->SiS_P3cb, temp); SiS_SetSegRegUpper()
1368 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cd) & 0x0f; SiS_SetSegRegUpper()
1369 temp |= (value << 4); SiS_SetSegRegUpper()
1370 SiS_SetRegByte(SiS_Pr->SiS_P3cd, temp); SiS_SetSegRegUpper()
1389 unsigned short temp = value >> 8; SiS_SetSegmentRegOver() local
1391 temp &= 0x07; SiS_SetSegmentRegOver()
1392 temp |= (temp << 4); SiS_SetSegmentRegOver()
1393 SiS_SetReg(SiS_Pr->SiS_P3c4,0x1d,temp); SiS_SetSegmentRegOver()
1689 unsigned short temp, temp1, temp2; SiS_DoLowModeTest() local
1693 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x11); SiS_DoLowModeTest()
1699 SiS_SetReg(SiS_Pr->SiS_P3d4,0x11,temp); SiS_DoLowModeTest()
1807 unsigned short xres, temp, colordepth, infoflag; SiS_GetOffset() local
1819 temp = xres / 16; SiS_GetOffset()
1820 if(infoflag & InterlaceMode) temp <<= 1; SiS_GetOffset()
1821 temp *= colordepth; SiS_GetOffset()
1822 if(xres % 16) temp += (colordepth >> 1); SiS_GetOffset()
1824 return temp; SiS_GetOffset()
2076 unsigned short temp, i, j, modeflag; SiS_SetCRT1CRTC() local
2087 temp = SiS_GetRefCRT1CRTC(SiS_Pr, RRTI, SiS_Pr->SiS_UseWide); SiS_SetCRT1CRTC()
2090 if((temp == 0x20) && (SiS_Pr->Alternate1600x1200)) temp = 0x57; SiS_SetCRT1CRTC()
2092 crt1data = (unsigned char *)&SiS_Pr->SiS_CRT1Table[temp].CR[0]; SiS_SetCRT1CRTC()
2114 temp = (crt1data[16] & 0x01) << 5; SiS_SetCRT1CRTC()
2115 if(modeflag & DoubleScanMode) temp |= 0x80; SiS_SetCRT1CRTC()
2116 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,temp); SiS_SetCRT1CRTC()
2125 if(!(temp = crt1data[5] & 0x1f)) { SiS_SetCRT1CRTC()
2128 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x05,0xe0,((temp - 1) & 0x1f)); SiS_SetCRT1CRTC()
2129 temp = (crt1data[16] >> 5) + 3; SiS_SetCRT1CRTC()
2130 if(temp > 7) temp -= 7; SiS_SetCRT1CRTC()
2131 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0e,0x1f,(temp << 5)); SiS_SetCRT1CRTC()
2146 unsigned short temp, DisplayUnit, infoflag; SiS_SetCRT1Offset() local
2156 temp = (DisplayUnit >> 8) & 0x0f; SiS_SetCRT1Offset()
2157 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0xF0,temp); SiS_SetCRT1Offset()
2164 temp = (DisplayUnit >> 8) + 1; SiS_SetCRT1Offset()
2165 if(DisplayUnit & 0xff) temp++; SiS_SetCRT1Offset()
2167 if(ModeNo == 0x4a || ModeNo == 0x49) temp--; SiS_SetCRT1Offset()
2169 SiS_SetReg(SiS_Pr->SiS_P3c4,0x10,temp); SiS_SetCRT1Offset()
2306 unsigned short temp, index, VCLK, MCLK, colorth; SiS_SetCRT1FIFO_300() local
2326 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35) & 0xc3; SiS_SetCRT1FIFO_300()
2327 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x16,0x3c,temp); SiS_SetCRT1FIFO_300()
2334 temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x16) >> 6; SiS_SetCRT1FIFO_300()
2335 if(!temp) break; SiS_SetCRT1FIFO_300()
2336 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x16,0x3f,((temp - 1) << 6)); SiS_SetCRT1FIFO_300()
2342 temp = (ThresholdLow << 4) | 0x0f; SiS_SetCRT1FIFO_300()
2343 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,temp); SiS_SetCRT1FIFO_300()
2345 temp = (ThresholdLow & 0x10) << 1; SiS_SetCRT1FIFO_300()
2346 if(ModeNo > 0x13) temp |= 0x40; SiS_SetCRT1FIFO_300()
2347 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0f,0x9f,temp); SiS_SetCRT1FIFO_300()
2353 temp = ThresholdLow + 3; SiS_SetCRT1FIFO_300()
2354 if(temp > 0x0f) temp = 0x0f; SiS_SetCRT1FIFO_300()
2355 SiS_SetReg(SiS_Pr->SiS_P3c4,0x09,temp); SiS_SetCRT1FIFO_300()
3077 unsigned short temp; SiS_ResetVB() local
3082 temp = ROMAddr[VB310Data_1_2_Offset] | 0x40; SiS_ResetVB()
3083 if(SiS_Pr->SiS_ROMNew) temp = ROMAddr[0x80] | 0x40; SiS_ResetVB()
3084 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp); SiS_ResetVB()
3086 temp = ROMAddr[0x7e] | 0x40; SiS_ResetVB()
3087 if(SiS_Pr->SiS_ROMNew) temp = ROMAddr[0x80] | 0x40; SiS_ResetVB()
3088 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp); SiS_ResetVB()
3091 temp = 0x40; SiS_ResetVB()
3092 if(SiS_Pr->SiS_XGIROM) temp |= ROMAddr[0x7e]; SiS_ResetVB()
3094 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp); SiS_ResetVB()
3545 int A, B, C, D, E, F, temp; SiS_Generic_ConvertCRData() local
3575 temp = HBE - ((E - 1) & 255); SiS_Generic_ConvertCRData()
3576 B = (temp > 0) ? temp : (temp + 256); SiS_Generic_ConvertCRData()
3578 temp = HRE - ((E + F + 3) & 63); SiS_Generic_ConvertCRData()
3579 C = (temp > 0) ? temp : (temp + 64); SiS_Generic_ConvertCRData()
3623 temp = VBE - ((E - 1) & 511); SiS_Generic_ConvertCRData()
3624 B = (temp > 0) ? temp : (temp + 512); SiS_Generic_ConvertCRData()
3628 temp = VRE - ((E + F - 1) & 31); SiS_Generic_ConvertCRData()
3629 C = (temp > 0) ? temp : (temp + 32); SiS_Generic_ConvertCRData()
|
| /linux-4.1.27/drivers/net/wireless/iwlwifi/mvm/ |
| H A D | tt.c | 102 void iwl_mvm_tt_temp_changed(struct iwl_mvm *mvm, u32 temp) iwl_mvm_tt_temp_changed() argument
108 if (mvm->temperature == temp) iwl_mvm_tt_temp_changed()
111 mvm->temperature = temp; iwl_mvm_tt_temp_changed()
120 int temp; iwl_mvm_temp_notif_parse() local
129 temp = le32_to_cpu(notif->temp); iwl_mvm_temp_notif_parse()
132 if (WARN_ON_ONCE(temp < 0)) iwl_mvm_temp_notif_parse()
133 temp = 0; iwl_mvm_temp_notif_parse()
135 IWL_DEBUG_TEMP(mvm, "DTS_MEASUREMENT_NOTIFICATION - %d\n", temp); iwl_mvm_temp_notif_parse()
137 return temp; iwl_mvm_temp_notif_parse()
145 int *temp = data; iwl_mvm_temp_notif_wait() local
152 *temp = ret; iwl_mvm_temp_notif_wait()
162 int temp; iwl_mvm_temp_notif() local
168 temp = iwl_mvm_temp_notif_parse(mvm, pkt); iwl_mvm_temp_notif()
169 if (temp < 0) iwl_mvm_temp_notif()
172 iwl_mvm_tt_temp_changed(mvm, temp); iwl_mvm_temp_notif()
191 int ret, temp; iwl_mvm_get_temp() local
197 iwl_mvm_temp_notif_wait, &temp); iwl_mvm_get_temp()
213 return temp; iwl_mvm_get_temp()
221 s32 temp; check_exit_ctkill() local
239 temp = iwl_mvm_get_temp(mvm); check_exit_ctkill()
245 if (temp < 0) check_exit_ctkill()
248 IWL_DEBUG_TEMP(mvm, "NIC temperature: %d\n", temp); check_exit_ctkill()
250 if (temp <= tt->params->ct_kill_exit) { check_exit_ctkill()
|
| /linux-4.1.27/drivers/sbus/char/ |
| H A D | max1617.h | 5 #define MAX1617_AMB_TEMP 0x00 /* Ambient temp in C */
6 #define MAX1617_CPU_TEMP 0x01 /* Processor die temp in C */
|
| /linux-4.1.27/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ |
| H A D | therm.h | 4 u8 temp; member in struct:nvbios_therm_threshold
33 int temp; member in struct:nvbios_therm_trip_point
|
| /linux-4.1.27/arch/arm/mach-s3c24xx/ |
| H A D | bast-irq.c | 71 unsigned long temp; bast_pc104_mask() local
73 temp = __raw_readb(BAST_VA_PC104_IRQMASK); bast_pc104_mask()
74 temp &= ~bast_pc104_irqmasks[data->irq]; bast_pc104_mask()
75 __raw_writeb(temp, BAST_VA_PC104_IRQMASK); bast_pc104_mask()
90 unsigned long temp; bast_pc104_unmask() local
92 temp = __raw_readb(BAST_VA_PC104_IRQMASK); bast_pc104_unmask()
93 temp |= bast_pc104_irqmasks[data->irq]; bast_pc104_unmask()
94 __raw_writeb(temp, BAST_VA_PC104_IRQMASK); bast_pc104_unmask()
|
| /linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/bios/ |
| H A D | timing.c | 88 u16 data = nvbios_timingEe(bios, idx, ver, hdr, cnt, len), temp; nvbios_timingEp() local
148 temp = nv_ro16(bios, data + 0x2c); nvbios_timingEp()
149 p->timing_20_2c_003f = (temp & 0x003f) >> 0; nvbios_timingEp()
150 p->timing_20_2c_1fc0 = (temp & 0x1fc0) >> 6; nvbios_timingEp()
153 temp = nv_ro16(bios, data + 0x31); nvbios_timingEp()
154 p->timing_20_31_0007 = (temp & 0x0007) >> 0; nvbios_timingEp()
155 p->timing_20_31_0078 = (temp & 0x0078) >> 3; nvbios_timingEp()
156 p->timing_20_31_0780 = (temp & 0x0780) >> 7; nvbios_timingEp()
157 p->timing_20_31_0800 = (temp & 0x0800) >> 11; nvbios_timingEp()
158 p->timing_20_31_7000 = (temp & 0x7000) >> 12; nvbios_timingEp()
159 p->timing_20_31_8000 = (temp & 0x8000) >> 15; nvbios_timingEp()
|
| H A D | rammap.c | 79 u32 data = nvbios_rammapEe(bios, idx, ver, hdr, cnt, len), temp; nvbios_rammapEp() local
96 temp = nv_ro32(bios, data + 0x09); nvbios_rammapEp()
97 p->rammap_11_09_01ff = (temp & 0x000001ff) >> 0; nvbios_rammapEp()
98 p->rammap_11_0a_03fe = (temp & 0x0003fe00) >> 9; nvbios_rammapEp()
99 p->rammap_11_0a_0400 = (temp & 0x00040000) >> 18; nvbios_rammapEp()
100 p->rammap_11_0a_0800 = (temp & 0x00080000) >> 19; nvbios_rammapEp()
101 p->rammap_11_0b_01f0 = (temp & 0x01f00000) >> 20; nvbios_rammapEp()
102 p->rammap_11_0b_0200 = (temp & 0x02000000) >> 25; nvbios_rammapEp()
103 p->rammap_11_0b_0400 = (temp & 0x04000000) >> 26; nvbios_rammapEp()
104 p->rammap_11_0b_0800 = (temp & 0x08000000) >> 27; nvbios_rammapEp()
|
| /linux-4.1.27/drivers/usb/misc/sisusbvga/ |
| H A D | sisusb_init.c | 191 unsigned short temp; SiS_SetSegRegLower() local
194 temp = SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3cb) & 0xf0; SiS_SetSegRegLower()
195 temp |= (value >> 4); SiS_SetSegRegLower()
196 SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3cb, temp); SiS_SetSegRegLower()
197 temp = SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3cd) & 0xf0; SiS_SetSegRegLower()
198 temp |= (value & 0x0f); SiS_SetSegRegLower()
199 SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3cd, temp); SiS_SetSegRegLower()
204 unsigned short temp; SiS_SetSegRegUpper() local
207 temp = SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3cb) & 0x0f; SiS_SetSegRegUpper()
208 temp |= (value & 0xf0); SiS_SetSegRegUpper()
209 SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3cb, temp); SiS_SetSegRegUpper()
210 temp = SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3cd) & 0x0f; SiS_SetSegRegUpper()
211 temp |= (value << 4); SiS_SetSegRegUpper()
212 SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3cd, temp); SiS_SetSegRegUpper()
229 unsigned short temp = value >> 8; SiS_SetSegmentRegOver() local
231 temp &= 0x07; SiS_SetSegmentRegOver()
232 temp |= (temp << 4); SiS_SetSegmentRegOver()
233 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x1d, temp); SiS_SetSegmentRegOver()
323 unsigned short xres, temp, colordepth, infoflag; SiS_GetOffset() local
330 temp = xres / 16; SiS_GetOffset()
333 temp <<= 1; SiS_GetOffset()
335 temp *= colordepth; SiS_GetOffset()
338 temp += (colordepth >> 1); SiS_GetOffset()
340 return temp; SiS_GetOffset()
463 unsigned short rrti, i, index, temp; SiS_GetRatePtr() local
480 temp = SiS_GetRatePtr()
482 if (temp < SiS_Pr->SiS_ModeType) SiS_GetRatePtr()
515 unsigned short temp, i, j, modeflag; SiS_SetCRT1CRTC() local
540 temp = SiS_Pr->SiS_CRT1Table[index].CR[16] & 0xE0; SiS_SetCRT1CRTC()
541 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x0E, temp); SiS_SetCRT1CRTC()
543 temp = ((SiS_Pr->SiS_CRT1Table[index].CR[16]) & 0x01) << 5; SiS_SetCRT1CRTC()
545 temp |= 0x80; SiS_SetCRT1CRTC()
546 SiS_SetRegANDOR(SiS_Pr, SiS_Pr->SiS_P3d4, 0x09, 0x5F, temp); SiS_SetCRT1CRTC()
564 unsigned short temp; SiS_SetCRT1Offset() local
566 temp = (du >> 8) & 0x0f; SiS_SetCRT1Offset()
567 SiS_SetRegANDOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x0E, 0xF0, temp); SiS_SetCRT1Offset()
575 temp = (du >> 8) & 0xff; SiS_SetCRT1Offset()
577 temp++; SiS_SetCRT1Offset()
578 temp++; SiS_SetCRT1Offset()
579 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x10, temp); SiS_SetCRT1Offset()
|
| /linux-4.1.27/drivers/phy/ |
| H A D | phy-sun4i-usb.c | 86 u32 temp, usbc_bit = BIT(phy->index * 2); sun4i_usb_phy_write() local
92 temp = readl(phy_data->base + REG_PHYCTL); sun4i_usb_phy_write()
95 temp &= ~(0xff << 8); sun4i_usb_phy_write()
98 temp |= ((addr + i) << 8); sun4i_usb_phy_write()
99 writel(temp, phy_data->base + REG_PHYCTL); sun4i_usb_phy_write()
102 temp = readb(phy_data->base + REG_PHYCTL); sun4i_usb_phy_write()
104 temp |= PHYCTL_DATA; sun4i_usb_phy_write()
106 temp &= ~PHYCTL_DATA; sun4i_usb_phy_write()
107 temp &= ~usbc_bit; sun4i_usb_phy_write()
108 writeb(temp, phy_data->base + REG_PHYCTL); sun4i_usb_phy_write()
111 temp = readb(phy_data->base + REG_PHYCTL); sun4i_usb_phy_write()
112 temp |= usbc_bit; sun4i_usb_phy_write()
113 writeb(temp, phy_data->base + REG_PHYCTL); sun4i_usb_phy_write()
115 temp = readb(phy_data->base + REG_PHYCTL); sun4i_usb_phy_write()
116 temp &= ~usbc_bit; sun4i_usb_phy_write()
117 writeb(temp, phy_data->base + REG_PHYCTL); sun4i_usb_phy_write()
|
| /linux-4.1.27/drivers/cpufreq/ |
| H A D | cpufreq-nforce2.c | 118 int temp; nforce2_write_pll() local
124 for (temp = 0; temp <= 0x3f; temp++) nforce2_write_pll()
139 u32 fsb, temp = 0; nforce2_fsb_read() local
151 pci_read_config_byte(nforce2_dev, NFORCE2_PLLENABLE, (u8 *)&temp); nforce2_fsb_read()
153 if (bootfsb || !temp) nforce2_fsb_read()
157 pci_read_config_dword(nforce2_dev, NFORCE2_PLLREG, &temp); nforce2_fsb_read()
158 fsb = nforce2_calc_fsb(temp); nforce2_fsb_read()
171 u32 temp = 0; nforce2_set_fsb() local
188 pci_read_config_byte(nforce2_dev, NFORCE2_PLLENABLE, (u8 *)&temp); nforce2_set_fsb()
189 if (!temp) { nforce2_set_fsb()
199 temp = 0x01; nforce2_set_fsb()
200 pci_write_config_byte(nforce2_dev, NFORCE2_PLLENABLE, (u8)temp); nforce2_set_fsb()
224 temp = 0x40; nforce2_set_fsb()
225 pci_write_config_byte(nforce2_dev, NFORCE2_PLLADR, (u8)temp); nforce2_set_fsb()
|
| /linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/therm/ |
| H A D | g84.c | 71 nv_wr32(therm, 0x20480, sensor->thrs_shutdown.temp); g84_therm_program_alarms()
74 nv_wr32(therm, 0x204c4, sensor->thrs_fan_boost.temp); g84_therm_program_alarms()
77 nv_wr32(therm, 0x204c0, sensor->thrs_critical.temp); g84_therm_program_alarms()
80 nv_wr32(therm, 0x20414, sensor->thrs_down_clock.temp); g84_therm_program_alarms()
85 sensor->thrs_fan_boost.temp, sensor->thrs_fan_boost.hysteresis, g84_therm_program_alarms()
86 sensor->thrs_down_clock.temp, g84_therm_program_alarms()
88 sensor->thrs_critical.temp, sensor->thrs_critical.hysteresis, g84_therm_program_alarms()
89 sensor->thrs_shutdown.temp, sensor->thrs_shutdown.hysteresis); g84_therm_program_alarms()
102 int temp, cur; g84_therm_threshold_hyst_emulation() local
105 temp = nv_rd32(therm, thrs_reg); g84_therm_threshold_hyst_emulation()
108 if (temp == thrs->temp) { g84_therm_threshold_hyst_emulation()
109 nv_wr32(therm, thrs_reg, thrs->temp - thrs->hysteresis); g84_therm_threshold_hyst_emulation()
112 nv_wr32(therm, thrs_reg, thrs->temp); g84_therm_threshold_hyst_emulation()
118 if (new_state == NVKM_THERM_THRS_LOWER && cur > thrs->temp) g84_therm_threshold_hyst_emulation()
121 cur < thrs->temp - thrs->hysteresis) g84_therm_threshold_hyst_emulation()
|
| H A D | base.c | 35 u8 temp = therm->temp_get(therm); nvkm_therm_update_trip() local
41 if (temp >= trip[i].temp) nvkm_therm_update_trip()
46 if (last_trip && temp <= (last_trip->temp) && nvkm_therm_update_trip()
47 temp > (last_trip->temp - last_trip->hysteresis)) nvkm_therm_update_trip()
67 u8 temp = therm->temp_get(therm); nvkm_therm_update_linear() local
71 if (temp < linear_min_temp) nvkm_therm_update_linear()
73 else if (temp > linear_max_temp) nvkm_therm_update_linear()
77 duty = (temp - linear_min_temp); nvkm_therm_update_linear()
204 return priv->bios_sensor.thrs_fan_boost.temp; nvkm_therm_attr_get()
208 return priv->bios_sensor.thrs_down_clock.temp; nvkm_therm_attr_get()
212 return priv->bios_sensor.thrs_critical.temp; nvkm_therm_attr_get()
216 return priv->bios_sensor.thrs_shutdown.temp; nvkm_therm_attr_get()
248 priv->bios_sensor.thrs_fan_boost.temp = value; nvkm_therm_attr_set()
256 priv->bios_sensor.thrs_down_clock.temp = value; nvkm_therm_attr_set()
264 priv->bios_sensor.thrs_critical.temp = value; nvkm_therm_attr_set()
272 priv->bios_sensor.thrs_shutdown.temp = value; nvkm_therm_attr_set()
|
| H A D | temp.c | 33 priv->bios_sensor.thrs_fan_boost.temp = 90; nvkm_therm_temp_set_defaults()
36 priv->bios_sensor.thrs_down_clock.temp = 95; nvkm_therm_temp_set_defaults()
39 priv->bios_sensor.thrs_critical.temp = 105; nvkm_therm_temp_set_defaults()
42 priv->bios_sensor.thrs_shutdown.temp = 135; nvkm_therm_temp_set_defaults()
148 int temp = therm->temp_get(therm); nvkm_therm_threshold_hyst_polling() local
152 if (temp >= thrs->temp && prev_state == NVKM_THERM_THRS_LOWER) { nvkm_therm_threshold_hyst_polling()
155 } else if (temp <= thrs->temp - thrs->hysteresis && nvkm_therm_threshold_hyst_polling()
205 sensor->thrs_fan_boost.temp, sensor->thrs_fan_boost.hysteresis, nvkm_therm_program_alarms_polling()
206 sensor->thrs_down_clock.temp, nvkm_therm_program_alarms_polling()
208 sensor->thrs_critical.temp, sensor->thrs_critical.hysteresis, nvkm_therm_program_alarms_polling()
209 sensor->thrs_shutdown.temp, sensor->thrs_shutdown.hysteresis); nvkm_therm_program_alarms_polling()
|
| /linux-4.1.27/crypto/ |
| H A D | sha1_generic.c | 32 u32 temp[SHA_WORKSPACE_WORDS]; sha1_generic_block_fn() local
35 sha_transform(sst->state, src, temp); sha1_generic_block_fn()
38 memzero_explicit(temp, sizeof(temp)); sha1_generic_block_fn()
|
| /linux-4.1.27/include/trace/events/ |
| H A D | thermal.h | 20 __field(int, temp)
27 __entry->temp = tz->temperature;
30 TP_printk("thermal_zone=%s id=%d temp_prev=%d temp=%d",
32 __entry->temp)
|
| /linux-4.1.27/drivers/usb/misc/ |
| H A D | trancevibrator.c | 62 int temp, retval, old; set_speed() local
64 temp = simple_strtoul(buf, NULL, 10); set_speed()
65 if (temp > 255) set_speed()
66 temp = 255; set_speed()
67 else if (temp < 0) set_speed()
68 temp = 0; set_speed()
70 tv->speed = temp; set_speed()
|
| /linux-4.1.27/arch/alpha/kernel/ |
| H A D | core_wildfire.c | 179 unsigned long temp; wildfire_hardware_probe() local
190 temp = fast->qsd_whami.csr; wildfire_hardware_probe()
192 printk(KERN_ERR "fast QSD_WHAMI at base %p is 0x%lx\n", fast, temp); wildfire_hardware_probe()
195 hard_qbb = (temp >> 8) & 7; wildfire_hardware_probe()
196 soft_qbb = (temp >> 4) & 7; wildfire_hardware_probe()
217 temp = qsa->qsa_qbb_id.csr; wildfire_hardware_probe()
219 printk(KERN_ERR "QSA_QBB_ID at base %p is 0x%lx\n", qsa, temp); wildfire_hardware_probe()
222 if (temp & 0x40) /* Is there an HS? */ wildfire_hardware_probe()
225 if (temp & 0x20) { /* Is there a GP? */ wildfire_hardware_probe()
227 temp = 0; wildfire_hardware_probe()
229 temp |= gp->gpa_qbb_map[i].csr << (i * 8); wildfire_hardware_probe()
232 i, gp, temp); wildfire_hardware_probe()
237 if (temp & 8) { /* Is there a QBB? */ wildfire_hardware_probe()
238 soft_qbb = temp & 7; wildfire_hardware_probe()
242 temp >>= 4; wildfire_hardware_probe()
251 temp = qsd->qsd_whami.csr; wildfire_hardware_probe()
253 printk(KERN_ERR "QSD_WHAMI at base %p is 0x%lx\n", qsd, temp); wildfire_hardware_probe()
255 hard_qbb = (temp >> 8) & 7; wildfire_hardware_probe()
260 temp = qsa->qsa_qbb_pop[0].csr; wildfire_hardware_probe()
262 printk(KERN_ERR "QSA_QBB_POP_0 at base %p is 0x%lx\n", qsa, temp); wildfire_hardware_probe()
264 wildfire_cpu_mask |= ((temp >> 0) & 0xf) << (soft_qbb << 2); wildfire_hardware_probe()
265 wildfire_mem_mask |= ((temp >> 4) & 0xf) << (soft_qbb << 2); wildfire_hardware_probe()
267 temp = qsa->qsa_qbb_pop[1].csr; wildfire_hardware_probe()
269 printk(KERN_ERR "QSA_QBB_POP_1 at base %p is 0x%lx\n", qsa, temp); wildfire_hardware_probe()
272 wildfire_ior_mask |= ((temp >> 4) & 0xf) << (soft_qbb << 2); wildfire_hardware_probe()
274 temp = qsa->qsa_qbb_id.csr; wildfire_hardware_probe()
276 printk(KERN_ERR "QSA_QBB_ID at %p is 0x%lx\n", qsa, temp); wildfire_hardware_probe()
278 if (temp & 0x20) wildfire_hardware_probe()
|
| /linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/bus/ |
| H A D | hwsq.h | 118 u32 temp = hwsq_rd32(ram, reg); hwsq_mask() local
119 if (temp != ((temp & ~mask) | data) || reg->force) hwsq_mask()
120 hwsq_wr32(ram, reg, (temp & ~mask) | data); hwsq_mask()
121 return temp; hwsq_mask()
|
| /linux-4.1.27/arch/mips/pci/ |
| H A D | ops-lantiq.c | 33 u32 temp; ltq_pci_config_access() local
59 temp = ltq_r32(((u32 *)(cfg_base))); ltq_pci_config_access()
60 temp = swab32(temp); ltq_pci_config_access()
63 ltq_w32(temp, ((u32 *)cfg_base)); ltq_pci_config_access()
|
| /linux-4.1.27/arch/arm/mach-socfpga/ |
| H A D | socfpga.c | 95 u32 temp; socfpga_cyclone5_restart() local
97 temp = readl(rst_manager_base_addr + SOCFPGA_RSTMGR_CTRL); socfpga_cyclone5_restart()
100 temp |= RSTMGR_CTRL_SWCOLDRSTREQ; socfpga_cyclone5_restart()
102 temp |= RSTMGR_CTRL_SWWARMRSTREQ; socfpga_cyclone5_restart()
103 writel(temp, rst_manager_base_addr + SOCFPGA_RSTMGR_CTRL); socfpga_cyclone5_restart()
|
| /linux-4.1.27/tools/testing/selftests/size/ |
| H A D | get_size.c | 59 unsigned long long temp; print_k_value() local
64 temp = num; print_k_value()
65 temp = (temp * units)/1024; print_k_value()
66 num = temp; print_k_value()
|
| /linux-4.1.27/drivers/media/usb/dvb-usb/ |
| H A D | af9005-fe.c | 108 u8 temp; af9005_is_fecmon_available() local
114 fec_vtb_rsd_mon_en_len, &temp); af9005_is_fecmon_available()
117 if (temp & 1) { af9005_is_fecmon_available()
122 reg_ofsm_read_rbc_en_len, &temp); af9005_is_fecmon_available()
125 if ((temp & 1) == 0) af9005_is_fecmon_available()
141 u8 temp, temp0, temp1, temp2; af9005_get_post_vit_err_cw_count() local
151 &temp); af9005_get_post_vit_err_cw_count()
154 if (!temp) { af9005_get_post_vit_err_cw_count()
241 u8 temp, temp0, temp1, temp2; af9005_get_pre_vit_err_bit_count() local
248 &temp); af9005_get_pre_vit_err_bit_count()
251 if (!temp) { af9005_get_pre_vit_err_bit_count()
292 &temp); af9005_get_pre_vit_err_bit_count()
295 if (temp == 0) { af9005_get_pre_vit_err_bit_count()
298 } else if (temp == 1) { af9005_get_pre_vit_err_bit_count()
310 &temp); af9005_get_pre_vit_err_bit_count()
313 switch (temp) { af9005_get_pre_vit_err_bit_count()
443 u8 temp; af9005_fe_read_status() local
451 agc_lock_pos, agc_lock_len, &temp); af9005_fe_read_status()
454 if (temp) af9005_fe_read_status()
459 &temp); af9005_fe_read_status()
462 if (temp) af9005_fe_read_status()
468 mp2if_sync_byte_locked_pos, &temp); af9005_fe_read_status()
471 if (temp) af9005_fe_read_status()
479 reg_strong_sginal_detected_len, &temp); af9005_fe_read_status()
482 if (temp != state->strong) { af9005_fe_read_status()
483 deb_info("adjust for strong signal %d\n", temp); af9005_fe_read_status()
484 state->strong = temp; af9005_fe_read_status()
778 u8 temp; af9005_fe_select_bw() local
781 temp = 0; af9005_fe_select_bw()
784 temp = 1; af9005_fe_select_bw()
787 temp = 2; af9005_fe_select_bw()
794 reg_bw_len, temp); af9005_fe_select_bw()
800 u8 temp = on; af9005_fe_power() local
803 ret = af9005_send_command(state->d, 0x03, &temp, 1, NULL, 0); af9005_fe_power()
820 u8 temp, temp0 = 0, temp1 = 0, temp2 = 0; af9005_fe_init() local
839 xd_I2C_reg_ofdm_rst, &temp))) af9005_fe_init()
841 if (temp & (regmask[reg_ofdm_rst_len - 1] << reg_ofdm_rst_pos)) af9005_fe_init()
864 temp = 0x01; af9005_fe_init()
865 ret = af9005_send_command(state->d, 0x03, &temp, 1, NULL, 0); af9005_fe_init()
875 temp = regmask[reg_ofdm_rst_len - 1] << reg_ofdm_rst_pos; af9005_fe_init()
1108 u8 temp, temp0, temp1, temp2; af9005_fe_set_frontend() local
1199 temp = 0; af9005_fe_set_frontend()
1200 ret = af9005_write_tuner_registers(state->d, 0xffff, &temp, 1); af9005_fe_set_frontend()
1234 u8 temp; af9005_fe_get_frontend() local
1240 &temp); af9005_fe_get_frontend()
1245 switch (temp) { af9005_fe_get_frontend()
1264 &temp); af9005_fe_get_frontend()
1268 switch (temp) { af9005_fe_get_frontend()
1290 reg_dec_pri_pos, reg_dec_pri_len, &temp); af9005_fe_get_frontend()
1293 /* if temp is set = high priority */ af9005_fe_get_frontend()
1294 deb_info("PRIORITY %s\n", temp ? "high" : "low"); af9005_fe_get_frontend()
1300 &temp); af9005_fe_get_frontend()
1304 switch (temp) { af9005_fe_get_frontend()
1331 &temp); af9005_fe_get_frontend()
1335 switch (temp) { af9005_fe_get_frontend()
1361 reg_tpsd_gi_pos, reg_tpsd_gi_len, &temp); af9005_fe_get_frontend()
1365 switch (temp) { af9005_fe_get_frontend()
1388 &temp); af9005_fe_get_frontend()
1392 switch (temp) { af9005_fe_get_frontend()
1406 reg_bw_len, &temp); af9005_fe_get_frontend()
1408 switch (temp) { af9005_fe_get_frontend()
|
| /linux-4.1.27/drivers/net/ethernet/sfc/ |
| H A D | siena.c | 326 efx_oword_t temp; siena_rx_push_rss_config() local
329 memcpy(&temp, efx->rx_hash_key, sizeof(temp)); siena_rx_push_rss_config()
330 efx_writeo(efx, &temp, FR_BZ_RX_RSS_TKEY); siena_rx_push_rss_config()
334 2 * sizeof(temp) + FRF_CZ_RX_RSS_IPV6_TKEY_HI_WIDTH / 8 || siena_rx_push_rss_config()
336 memcpy(&temp, efx->rx_hash_key, sizeof(temp)); siena_rx_push_rss_config()
337 efx_writeo(efx, &temp, FR_CZ_RX_RSS_IPV6_REG1); siena_rx_push_rss_config()
338 memcpy(&temp, efx->rx_hash_key + sizeof(temp), sizeof(temp)); siena_rx_push_rss_config()
339 efx_writeo(efx, &temp, FR_CZ_RX_RSS_IPV6_REG2); siena_rx_push_rss_config()
340 EFX_POPULATE_OWORD_2(temp, FRF_CZ_RX_RSS_IPV6_THASH_ENABLE, 1, siena_rx_push_rss_config()
342 memcpy(&temp, efx->rx_hash_key + 2 * sizeof(temp), siena_rx_push_rss_config()
344 efx_writeo(efx, &temp, FR_CZ_RX_RSS_IPV6_REG3); siena_rx_push_rss_config()
355 efx_oword_t temp; siena_init_nic() local
364 efx_reado(efx, &temp, FR_AZ_TX_RESERVED); siena_init_nic()
365 EFX_SET_OWORD_FIELD(temp, FRF_BZ_TX_FLUSH_MIN_LEN_EN, 1); siena_init_nic()
366 efx_writeo(efx, &temp, FR_AZ_TX_RESERVED); siena_init_nic()
371 efx_reado(efx, &temp, FR_AZ_TX_CFG); siena_init_nic()
372 EFX_SET_OWORD_FIELD(temp, FRF_AZ_TX_NO_EOP_DISC_EN, 0); siena_init_nic()
373 EFX_SET_OWORD_FIELD(temp, FRF_CZ_TX_FILTER_EN_BIT, 1); siena_init_nic()
374 efx_writeo(efx, &temp, FR_AZ_TX_CFG); siena_init_nic()
376 efx_reado(efx, &temp, FR_AZ_RX_CFG); siena_init_nic()
377 EFX_SET_OWORD_FIELD(temp, FRF_BZ_RX_DESC_PUSH_EN, 0); siena_init_nic()
378 EFX_SET_OWORD_FIELD(temp, FRF_BZ_RX_INGR_EN, 1); siena_init_nic()
382 EFX_SET_OWORD_FIELD(temp, FRF_BZ_RX_HASH_INSRT_HDR, 1); siena_init_nic()
383 EFX_SET_OWORD_FIELD(temp, FRF_BZ_RX_HASH_ALG, 1); siena_init_nic()
384 EFX_SET_OWORD_FIELD(temp, FRF_BZ_RX_IP_HASH, 1); siena_init_nic()
385 EFX_SET_OWORD_FIELD(temp, FRF_BZ_RX_USR_BUF_SIZE, siena_init_nic()
387 efx_writeo(efx, &temp, FR_AZ_RX_CFG); siena_init_nic()
397 EFX_POPULATE_OWORD_1(temp, FRF_BZ_FLS_EVQ_ID, 0); siena_init_nic()
398 efx_writeo(efx, &temp, FR_BZ_DP_CTRL); siena_init_nic()
400 EFX_POPULATE_OWORD_1(temp, FRF_CZ_USREV_DIS, 1); siena_init_nic()
401 efx_writeo(efx, &temp, FR_CZ_USR_EV_CFG); siena_init_nic()
|
| H A D | mcdi_mon.c | 45 SENSOR(CONTROLLER_TEMP, "Controller board temp.", TEMP, -1),
46 SENSOR(PHY_COMMON_TEMP, "PHY temp.", TEMP, -1),
48 SENSOR(PHY0_TEMP, "PHY temp.", TEMP, 0),
50 SENSOR(PHY1_TEMP, "PHY temp.", TEMP, 1),
61 SENSOR(AOE_TEMP, "AOE FPGA temp.", TEMP, -1),
62 SENSOR(PSU_AOE_TEMP, "AOE regulator temp.", TEMP, -1),
63 SENSOR(PSU_TEMP, "Controller regulator temp.",
78 SENSOR(CONTROLLER_2_TEMP, "Controller board temp. 2", TEMP, -1),
79 SENSOR(VREG_INTERNAL_TEMP, "Regulator die temp.", TEMP, -1),
80 SENSOR(VREG_0V9_TEMP, "0.9V regulator temp.", TEMP, -1),
81 SENSOR(VREG_1V2_TEMP, "1.2V regulator temp.", TEMP, -1),
85 "Controller die temp. (int. ADC)", TEMP, -1),
89 "Controller die temp. (ext. ADC)", TEMP, -1),
90 SENSOR(AMBIENT_TEMP, "Ambient temp.", TEMP, -1),
94 SENSOR(HOTPOINT_TEMP, "Controller board temp. (hotpoint)", TEMP, -1),
426 hwmon_prefix = "temp"; efx_mcdi_mon_probe()
|
| /linux-4.1.27/arch/hexagon/include/asm/ |
| H A D | spinlock.h | 72 int temp; arch_read_trylock() local
80 : "=&r" (temp) arch_read_trylock()
84 return temp; arch_read_trylock()
115 int temp; arch_write_trylock() local
123 : "=&r" (temp) arch_write_trylock()
127 return temp; arch_write_trylock()
160 int temp; arch_spin_trylock() local
168 : "=&r" (temp) arch_spin_trylock()
172 return temp; arch_spin_trylock()
|
| /linux-4.1.27/arch/mips/include/asm/mach-pmcs-msp71xx/ |
| H A D | msp_regops.h | 76 u32 temp; set_value_reg32() local
88 : "=&r" (temp), "=" GCC_OFF_SMALL_ASM() (*addr) set_value_reg32()
98 u32 temp; set_reg32() local
109 : "=&r" (temp), "=" GCC_OFF_SMALL_ASM() (*addr) set_reg32()
119 u32 temp; clear_reg32() local
130 : "=&r" (temp), "=" GCC_OFF_SMALL_ASM() (*addr) clear_reg32()
140 u32 temp; toggle_reg32() local
151 : "=&r" (temp), "=" GCC_OFF_SMALL_ASM() (*addr) toggle_reg32()
161 u32 temp; read_reg32() local
169 : "=&r" (temp) read_reg32()
172 return temp; read_reg32()
184 u32 temp; blocking_read_reg32() local
192 : "=&r" (temp) blocking_read_reg32()
195 return temp; blocking_read_reg32()
|
| /linux-4.1.27/sound/isa/sb/ |
| H A D | emu8000_callback.c | 236 unsigned int temp; start_voice() local
286 temp = vp->reg.parm.chorus; start_voice()
287 temp += (int)chan->control[MIDI_CTL_E3_CHORUS_DEPTH] * 9 / 10; start_voice()
288 LIMITMAX(temp, 255); start_voice()
289 temp = (temp <<24) | (unsigned int)addr; start_voice()
290 EMU8000_CSL_WRITE(hw, ch, temp); start_voice()
294 temp = vp->reg.parm.filterQ; start_voice()
295 temp = (temp<<28) | (unsigned int)addr; start_voice()
296 EMU8000_CCCA_WRITE(hw, ch, temp); start_voice()
303 temp = vp->vtarget << 16; start_voice()
304 EMU8000_VTFT_WRITE(hw, ch, temp | vp->ftarget); start_voice()
305 EMU8000_CVCF_WRITE(hw, ch, temp | 0xff00); start_voice()
317 unsigned int temp; trigger_voice() local
323 temp = vp->reg.parm.reverb; trigger_voice()
324 temp += (int)vp->chan->control[MIDI_CTL_E1_REVERB_DEPTH] * 9 / 10; trigger_voice()
325 LIMITMAX(temp, 255); trigger_voice()
326 temp = (temp << 8) | (vp->ptarget << 16) | vp->aaux; trigger_voice()
327 EMU8000_PTRX_WRITE(hw, ch, temp); trigger_voice()
374 unsigned int temp; set_pan() local
376 temp = ((unsigned int)vp->apan<<24) | ((unsigned int)vp->reg.loopstart - 1); set_pan()
377 EMU8000_PSST_WRITE(hw, vp->ch, temp); set_pan()
|
| H A D | emu8000_pcm.c | 283 unsigned int temp; setup_voice() local
314 temp = rec->panning[ch]; setup_voice()
315 temp = (temp <<24) | ((unsigned int)rec->loop_start[ch] - 1); setup_voice()
316 EMU8000_PSST_WRITE(hw, ch, temp); setup_voice()
318 temp = 0; // chorus setup_voice()
319 temp = (temp << 24) | ((unsigned int)rec->loop_start[ch] + rec->buf_size - 1); setup_voice()
320 EMU8000_CSL_WRITE(hw, ch, temp); setup_voice()
322 temp = 0; // filterQ setup_voice()
323 temp = (temp << 28) | ((unsigned int)rec->loop_start[ch] - 1); setup_voice()
324 EMU8000_CCCA_WRITE(hw, ch, temp); setup_voice()
337 unsigned int temp, aux; start_voice() local
347 temp = 0; // reverb start_voice()
352 temp = (temp << 8) | (pt << 16) | aux; start_voice()
353 EMU8000_PTRX_WRITE(hw, ch, temp); start_voice()
|
| /linux-4.1.27/drivers/ata/ |
| H A D | sata_fsl.c | 376 u32 temp; fsl_sata_rx_watermark_store() local
384 temp = ioread32(csr_base + TRANSCFG); fsl_sata_rx_watermark_store()
385 temp &= 0xffffffe0; fsl_sata_rx_watermark_store()
386 iowrite32(temp | rx_watermark, csr_base + TRANSCFG); fsl_sata_rx_watermark_store()
658 u32 temp; sata_fsl_freeze() local
668 temp = ioread32(hcr_base + HCONTROL); sata_fsl_freeze()
669 iowrite32((temp & ~0x3F), hcr_base + HCONTROL); sata_fsl_freeze()
679 u32 temp; sata_fsl_thaw() local
682 temp = ioread32(hcr_base + HSTATUS); sata_fsl_thaw()
684 VPRINTK("xx_thaw, pending IRQs = 0x%x\n", (temp & 0x3F)); sata_fsl_thaw()
686 if (temp & 0x3F) sata_fsl_thaw()
687 iowrite32((temp & 0x3F), hcr_base + HSTATUS); sata_fsl_thaw()
690 temp = ioread32(hcr_base + HCONTROL); sata_fsl_thaw()
691 iowrite32((temp | DEFAULT_PORT_IRQ_ENABLE_MASK), hcr_base + HCONTROL); sata_fsl_thaw()
701 u32 temp; sata_fsl_pmp_attach() local
703 temp = ioread32(hcr_base + HCONTROL); sata_fsl_pmp_attach()
704 iowrite32((temp | HCONTROL_PMP_ATTACHED), hcr_base + HCONTROL); sata_fsl_pmp_attach()
711 u32 temp; sata_fsl_pmp_detach() local
713 temp = ioread32(hcr_base + HCONTROL); sata_fsl_pmp_detach()
714 temp &= ~HCONTROL_PMP_ATTACHED; sata_fsl_pmp_detach()
715 iowrite32(temp, hcr_base + HCONTROL); sata_fsl_pmp_detach()
718 temp = ioread32(hcr_base + HCONTROL); sata_fsl_pmp_detach()
719 iowrite32((temp | DEFAULT_PORT_IRQ_ENABLE_MASK), hcr_base + HCONTROL); sata_fsl_pmp_detach()
731 u32 temp; sata_fsl_port_start() local
769 temp = ioread32(hcr_base + HCONTROL); sata_fsl_port_start()
770 iowrite32((temp | HCONTROL_ONLINE_PHY_RST), hcr_base + HCONTROL); sata_fsl_port_start()
785 u32 temp; sata_fsl_port_stop() local
790 temp = ioread32(hcr_base + HCONTROL); sata_fsl_port_stop()
791 temp &= ~HCONTROL_ONLINE_PHY_RST; sata_fsl_port_stop()
792 temp |= HCONTROL_FORCE_OFFLINE; sata_fsl_port_stop()
793 iowrite32(temp, hcr_base + HCONTROL); sata_fsl_port_stop()
810 u32 temp; sata_fsl_dev_classify() local
812 temp = ioread32(hcr_base + SIGNATURE); sata_fsl_dev_classify()
814 VPRINTK("raw sig = 0x%x\n", temp); sata_fsl_dev_classify()
818 tf.lbah = (temp >> 24) & 0xff; sata_fsl_dev_classify()
819 tf.lbam = (temp >> 16) & 0xff; sata_fsl_dev_classify()
820 tf.lbal = (temp >> 8) & 0xff; sata_fsl_dev_classify()
821 tf.nsect = temp & 0xff; sata_fsl_dev_classify()
832 u32 temp; sata_fsl_hardreset() local
842 temp = ioread32(hcr_base + HCONTROL); sata_fsl_hardreset()
843 temp &= ~HCONTROL_ONLINE_PHY_RST; sata_fsl_hardreset()
844 iowrite32(temp, hcr_base + HCONTROL); sata_fsl_hardreset()
847 temp = ata_wait_register(ap, hcr_base + HSTATUS, ONLINE, ONLINE, sata_fsl_hardreset()
850 if (temp & ONLINE) { sata_fsl_hardreset()
881 temp = ioread32(hcr_base + HCONTROL); sata_fsl_hardreset()
882 temp |= (HCONTROL_ONLINE_PHY_RST | HCONTROL_SNOOP_ENABLE); sata_fsl_hardreset()
883 temp |= HCONTROL_PMP_ATTACHED; sata_fsl_hardreset()
884 iowrite32(temp, hcr_base + HCONTROL); sata_fsl_hardreset()
886 temp = ata_wait_register(ap, hcr_base + HSTATUS, ONLINE, 0, 1, 500); sata_fsl_hardreset()
888 if (!(temp & ONLINE)) { sata_fsl_hardreset()
903 temp = ata_wait_register(ap, hcr_base + HSTATUS, 0xFF, 0, 1, 500); sata_fsl_hardreset()
904 if ((!(temp & 0x10)) || ata_link_offline(link)) { sata_fsl_hardreset()
915 temp = ata_wait_register(ap, hcr_base + HSTATUS, 0xFF, 0x10, sata_fsl_hardreset()
918 if ((temp & 0xFF) != 0x18) { sata_fsl_hardreset()
947 u32 temp; sata_fsl_softreset() local
997 temp = ata_wait_register(ap, CQ + hcr_base, 0x1, 0x1, 1, 5000); sata_fsl_softreset()
998 if (temp & 0x1) { sata_fsl_softreset()
1359 u32 temp; sata_fsl_init_controller() local
1368 temp = ioread32(hcr_base + HCONTROL); sata_fsl_init_controller()
1369 iowrite32(temp & ~HCONTROL_LEGACY, hcr_base + HCONTROL); sata_fsl_init_controller()
1372 temp = ioread32(hcr_base + HSTATUS); sata_fsl_init_controller()
1373 if (temp & 0x3F) sata_fsl_init_controller()
1374 iowrite32((temp & 0x3F), hcr_base + HSTATUS); sata_fsl_init_controller()
1377 temp = ioread32(hcr_base + HCONTROL); sata_fsl_init_controller()
1378 iowrite32((temp & ~0x3F), hcr_base + HCONTROL); sata_fsl_init_controller()
1460 u32 temp; sata_fsl_probe() local
1475 temp = ioread32(csr_base + TRANSCFG); sata_fsl_probe()
1476 temp = temp & 0xffffffe0; sata_fsl_probe()
1477 iowrite32(temp | TRANSCFG_RX_WATER_MARK, csr_base + TRANSCFG); sata_fsl_probe()
|
| /linux-4.1.27/drivers/memory/ |
| H A D | omap-gpmc.c | 1252 u32 temp; gpmc_round_ps_to_sync_clk() local
1256 temp = gpmc_ps_to_ticks(time_ps); gpmc_round_ps_to_sync_clk()
1257 temp = (temp + div - 1) / div; gpmc_round_ps_to_sync_clk()
1258 return gpmc_ticks_to_ps(temp * div); gpmc_round_ps_to_sync_clk()
1266 u32 temp; gpmc_calc_sync_read_timings() local
1269 temp = dev_t->t_avdp_r; gpmc_calc_sync_read_timings()
1276 temp = max_t(u32, temp, gpmc_t->clk_activation + dev_t->t_avdh); gpmc_calc_sync_read_timings()
1277 temp = max_t(u32, gpmc_t->adv_on + gpmc_ticks_to_ps(1), temp); gpmc_calc_sync_read_timings()
1279 gpmc_t->adv_rd_off = gpmc_round_ps_to_ticks(temp); gpmc_calc_sync_read_timings()
1282 temp = dev_t->t_oeasu; /* XXX: remove this ? */ gpmc_calc_sync_read_timings()
1284 temp = max_t(u32, temp, gpmc_t->clk_activation + dev_t->t_ach); gpmc_calc_sync_read_timings()
1285 temp = max_t(u32, temp, gpmc_t->adv_rd_off + gpmc_calc_sync_read_timings()
1288 gpmc_t->oe_on = gpmc_round_ps_to_ticks(temp); gpmc_calc_sync_read_timings()
1295 temp = max_t(u32, dev_t->t_iaa, dev_t->cyc_iaa * gpmc_t->sync_clk); gpmc_calc_sync_read_timings()
1296 temp += gpmc_t->clk_activation; gpmc_calc_sync_read_timings()
1298 temp = max_t(u32, temp, gpmc_t->oe_on + gpmc_calc_sync_read_timings()
1300 gpmc_t->access = gpmc_round_ps_to_ticks(temp); gpmc_calc_sync_read_timings()
1306 temp = max_t(u32, dev_t->t_cez_r, dev_t->t_oez); gpmc_calc_sync_read_timings()
1307 temp = gpmc_round_ps_to_sync_clk(temp, gpmc_t->sync_clk) + gpmc_calc_sync_read_timings()
1311 temp = max_t(u32, temp, gpmc_t->cs_rd_off + dev_t->t_ce_rdyz); gpmc_calc_sync_read_timings()
1312 gpmc_t->rd_cycle = gpmc_round_ps_to_ticks(temp); gpmc_calc_sync_read_timings()
1321 u32 temp; gpmc_calc_sync_write_timings() local
1324 temp = dev_t->t_avdp_w; gpmc_calc_sync_write_timings()
1326 temp = max_t(u32, temp, gpmc_calc_sync_write_timings()
1328 temp = max_t(u32, gpmc_t->adv_on + gpmc_ticks_to_ps(1), temp); gpmc_calc_sync_write_timings()
1330 gpmc_t->adv_wr_off = gpmc_round_ps_to_ticks(temp); gpmc_calc_sync_write_timings()
1333 temp = max_t(u32, dev_t->t_weasu, gpmc_calc_sync_write_timings()
1339 temp = max_t(u32, temp, gpmc_calc_sync_write_timings()
1341 temp = max_t(u32, temp, gpmc_t->adv_wr_off + gpmc_calc_sync_write_timings()
1344 gpmc_t->wr_data_mux_bus = gpmc_round_ps_to_ticks(temp); gpmc_calc_sync_write_timings()
1357 temp = gpmc_t->we_on + dev_t->t_wpl; gpmc_calc_sync_write_timings()
1358 temp = max_t(u32, temp, gpmc_calc_sync_write_timings()
1360 temp = max_t(u32, temp, gpmc_calc_sync_write_timings()
1362 gpmc_t->we_off = gpmc_round_ps_to_ticks(temp); gpmc_calc_sync_write_timings()
1368 temp = gpmc_round_ps_to_sync_clk(dev_t->t_cez_w, gpmc_t->sync_clk); gpmc_calc_sync_write_timings()
1369 temp += gpmc_t->wr_access; gpmc_calc_sync_write_timings()
1372 temp = max_t(u32, temp, gpmc_calc_sync_write_timings()
1374 gpmc_t->wr_cycle = gpmc_round_ps_to_ticks(temp); gpmc_calc_sync_write_timings()
1383 u32 temp; gpmc_calc_async_read_timings() local
1386 temp = dev_t->t_avdp_r; gpmc_calc_async_read_timings()
1388 temp = max_t(u32, gpmc_t->adv_on + gpmc_ticks_to_ps(1), temp); gpmc_calc_async_read_timings()
1389 gpmc_t->adv_rd_off = gpmc_round_ps_to_ticks(temp); gpmc_calc_async_read_timings()
1392 temp = dev_t->t_oeasu; gpmc_calc_async_read_timings()
1394 temp = max_t(u32, temp, gpmc_calc_async_read_timings()
1396 gpmc_t->oe_on = gpmc_round_ps_to_ticks(temp); gpmc_calc_async_read_timings()
1399 temp = max_t(u32, dev_t->t_iaa, /* XXX: remove t_iaa in async ? */ gpmc_calc_async_read_timings()
1401 temp = max_t(u32, temp, gpmc_calc_async_read_timings()
1403 temp = max_t(u32, temp, gpmc_calc_async_read_timings()
1405 gpmc_t->access = gpmc_round_ps_to_ticks(temp); gpmc_calc_async_read_timings()
1411 temp = max_t(u32, dev_t->t_rd_cycle, gpmc_calc_async_read_timings()
1413 temp = max_t(u32, temp, gpmc_t->oe_off + dev_t->t_oez); gpmc_calc_async_read_timings()
1414 gpmc_t->rd_cycle = gpmc_round_ps_to_ticks(temp); gpmc_calc_async_read_timings()
1423 u32 temp; gpmc_calc_async_write_timings() local
1426 temp = dev_t->t_avdp_w; gpmc_calc_async_write_timings()
1428 temp = max_t(u32, gpmc_t->adv_on + gpmc_ticks_to_ps(1), temp); gpmc_calc_async_write_timings()
1429 gpmc_t->adv_wr_off = gpmc_round_ps_to_ticks(temp); gpmc_calc_async_write_timings()
1432 temp = dev_t->t_weasu; gpmc_calc_async_write_timings()
1434 temp = max_t(u32, temp, gpmc_t->adv_wr_off + dev_t->t_aavdh); gpmc_calc_async_write_timings()
1435 temp = max_t(u32, temp, gpmc_t->adv_wr_off + gpmc_calc_async_write_timings()
1438 gpmc_t->wr_data_mux_bus = gpmc_round_ps_to_ticks(temp); gpmc_calc_async_write_timings()
1447 temp = gpmc_t->we_on + dev_t->t_wpl; gpmc_calc_async_write_timings()
1448 gpmc_t->we_off = gpmc_round_ps_to_ticks(temp); gpmc_calc_async_write_timings()
1454 temp = max_t(u32, dev_t->t_wr_cycle, gpmc_calc_async_write_timings()
1456 gpmc_t->wr_cycle = gpmc_round_ps_to_ticks(temp); gpmc_calc_async_write_timings()
1464 u32 temp; gpmc_calc_sync_common_timings() local
1473 temp = max_t(u32, dev_t->t_ces, dev_t->t_avds); gpmc_calc_sync_common_timings()
1474 gpmc_t->clk_activation = gpmc_round_ps_to_ticks(temp); gpmc_calc_sync_common_timings()
1495 u32 temp; gpmc_calc_common_timings() local
1501 temp = dev_t->t_avdasu; gpmc_calc_common_timings()
1503 temp = max_t(u32, temp, gpmc_calc_common_timings()
1505 gpmc_t->adv_on = gpmc_round_ps_to_ticks(temp); gpmc_calc_common_timings()
|
| /linux-4.1.27/arch/m68k/include/asm/ |
| H A D | m68360_pram.h | 92 unsigned long rtemp; /* Rx temp */
97 unsigned long ttemp; /* Tx temp */
98 unsigned long rcrc; /* temp receive CRC */
99 unsigned long tcrc; /* temp transmit CRC */
121 unsigned short tmp; /* temp */
122 unsigned short tmp_mb; /* temp */
152 unsigned long rx_temp; /* Rx temp */
157 unsigned long ttemp; /* Tx temp */
158 unsigned long rcrc; /* temp receive CRC */
159 unsigned long tcrc; /* temp transmit CRC */
177 unsigned short rtemp; /* temp storage */
204 unsigned long rtemp; /* Rx temp */
209 unsigned long ttemp; /* Tx temp */
210 unsigned long rcrc; /* temp receive CRC */
211 unsigned long tcrc; /* temp transmit CRC */
255 unsigned long rtemp; /* Rx temp */
260 unsigned long ttemp; /* Tx temp */
273 unsigned long rtemp; /* Rx temp */
278 unsigned long ttemp; /* Tx temp */
297 unsigned long rtemp; /* Rx temp */
302 unsigned long ttemp; /* Tx temp */
310 unsigned long itemp; /* IDMA temp */
326 unsigned long rtemp; /* Rx temp */
331 unsigned long ttemp; /* Tx temp */
332 unsigned long rcrc; /* temp receive CRC */
333 unsigned long tcrc; /* temp transmit CRC */
385 unsigned short taddr_h; /* temp address (MSB) */
386 unsigned short taddr_m; /* temp address */
387 unsigned short taddr_l; /* temp address (LSB) */
403 unsigned long rtemp; /* Rx temp */
408 unsigned long ttemp; /* Tx temp */
409 unsigned long rcrc; /* temp receive CRC */
410 unsigned long tcrc; /* temp transmit CRC */
|
| /linux-4.1.27/drivers/s390/char/ |
| H A D | vmcp.c | 139 int temp; vmcp_ioctl() local
150 temp = session->resp_code; vmcp_ioctl()
152 return put_user(temp, argp); vmcp_ioctl()
157 temp = get_user(session->bufsize, argp); vmcp_ioctl()
160 temp = -EINVAL; vmcp_ioctl()
163 return temp; vmcp_ioctl()
165 temp = session->resp_size; vmcp_ioctl()
167 return put_user(temp, argp); vmcp_ioctl()
|
| /linux-4.1.27/arch/powerpc/include/asm/ |
| H A D | edac.h | 22 unsigned int temp; atomic_scrub() local
34 : "=&r"(temp) atomic_scrub()
|
| /linux-4.1.27/arch/arm/mach-imx/ |
| H A D | clk-pllv2.c | 82 s64 temp; __clk_pllv2_recalc_rate() local
102 temp = (u64) ref_clk * mfn_abs; __clk_pllv2_recalc_rate()
103 do_div(temp, mfd + 1); __clk_pllv2_recalc_rate()
105 temp = -temp; __clk_pllv2_recalc_rate()
106 temp = (ref_clk * mfi) + temp; __clk_pllv2_recalc_rate()
108 return temp; __clk_pllv2_recalc_rate()
|
| /linux-4.1.27/drivers/gpu/ipu-v3/ |
| H A D | ipu-csi.c | 204 u32 temp; ipu_csi_set_testgen_mclk() local
215 temp = ipu_csi_read(csi, CSI_SENS_CONF); ipu_csi_set_testgen_mclk()
216 temp &= ~CSI_SENS_CONF_DIVRATIO_MASK; ipu_csi_set_testgen_mclk()
217 ipu_csi_write(csi, temp | (div_ratio << CSI_SENS_CONF_DIVRATIO_SHIFT), ipu_csi_set_testgen_mclk()
535 u32 temp; ipu_csi_set_test_generator() local
539 temp = ipu_csi_read(csi, CSI_TST_CTRL); ipu_csi_set_test_generator()
542 temp &= ~CSI_TEST_GEN_MODE_EN; ipu_csi_set_test_generator()
543 ipu_csi_write(csi, temp, CSI_TST_CTRL); ipu_csi_set_test_generator()
548 temp &= ~(CSI_TEST_GEN_R_MASK | CSI_TEST_GEN_G_MASK | ipu_csi_set_test_generator()
550 temp |= CSI_TEST_GEN_MODE_EN; ipu_csi_set_test_generator()
551 temp |= (r_value << CSI_TEST_GEN_R_SHIFT) | ipu_csi_set_test_generator()
554 ipu_csi_write(csi, temp, CSI_TST_CTRL); ipu_csi_set_test_generator()
566 u32 temp; ipu_csi_set_mipi_datatype() local
575 temp = ipu_csi_read(csi, CSI_MIPI_DI); ipu_csi_set_mipi_datatype()
576 temp &= ~(0xff << (vc * 8)); ipu_csi_set_mipi_datatype()
577 temp |= (cfg.mipi_dt << (vc * 8)); ipu_csi_set_mipi_datatype()
578 ipu_csi_write(csi, temp, CSI_MIPI_DI); ipu_csi_set_mipi_datatype()
590 u32 temp; ipu_csi_set_skip_smfc() local
597 temp = ipu_csi_read(csi, CSI_SKIP); ipu_csi_set_skip_smfc()
598 temp &= ~(CSI_MAX_RATIO_SKIP_SMFC_MASK | CSI_ID_2_SKIP_MASK | ipu_csi_set_skip_smfc()
600 temp |= (max_ratio << CSI_MAX_RATIO_SKIP_SMFC_SHIFT) | ipu_csi_set_skip_smfc()
603 ipu_csi_write(csi, temp, CSI_SKIP); ipu_csi_set_skip_smfc()
|
| /linux-4.1.27/arch/x86/include/asm/ |
| H A D | highmem.h | 45 * temp fixed addresses/persistent kmap area VMALLOC_END
46 * PKMAP_BASE temp fixed addresses/vmalloc area
52 * The temp fixed area is only used during boot for early_ioremap(), and
54 * available after early boot so the temp fixed area is available for re-use.
|
| /linux-4.1.27/drivers/gpu/drm/nouveau/include/nvkm/engine/ |
| H A D | pm.h | 16 /*XXX: temp for daemon backend */
|
| /linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/ |
| H A D | gk104.c | 43 u32 temp = nv_rd32(i2c, 0x00dc68), i; gk104_aux_mask() local
47 temp &= ~(type << (i * 4)); gk104_aux_mask()
50 temp |= type << (i * 4); gk104_aux_mask()
53 nv_wr32(i2c, 0x00dc68, temp); gk104_aux_mask()
|
| /linux-4.1.27/arch/metag/kernel/ |
| H A D | cachepart.c | 47 unsigned int temp = cpart & SYSC_xCPARTG_AND_BITS; get_global_dcache_size() local
48 return (get_dcache_size() * ((temp >> SYSC_xCPARTG_AND_S) + 1)) >> 4; get_global_dcache_size()
54 unsigned int temp = cpart & SYSC_xCPARTG_AND_BITS; get_global_icache_size() local
55 return (get_icache_size() * ((temp >> SYSC_xCPARTG_AND_S) + 1)) >> 4; get_global_icache_size()
|
| /linux-4.1.27/arch/powerpc/platforms/86xx/ |
| H A D | sbc8641d.c | 81 unsigned int temp; mpc86xx_time_init() local
87 temp = mfspr(SPRN_HID0); mpc86xx_time_init()
88 temp |= HID0_TBEN; mpc86xx_time_init()
89 mtspr(SPRN_HID0, temp); mpc86xx_time_init()
|
| /linux-4.1.27/sound/soc/codecs/ |
| H A D | rl6231.c | 28 int i, red, bound, temp; rl6231_calc_dmic_clk() local
35 temp = bound - rate; rl6231_calc_dmic_clk()
36 if (temp < red) { rl6231_calc_dmic_clk()
37 red = temp; rl6231_calc_dmic_clk()
|
| /linux-4.1.27/drivers/gpu/drm/ast/ |
| H A D | ast_mode.c | 274 u16 temp; ast_set_crtc_reg() local
278 temp = (mode->crtc_htotal >> 3) - 5; ast_set_crtc_reg()
279 if (temp & 0x100) ast_set_crtc_reg()
281 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x00, 0x00, temp); ast_set_crtc_reg()
283 temp = (mode->crtc_hdisplay >> 3) - 1; ast_set_crtc_reg()
284 if (temp & 0x100) ast_set_crtc_reg()
286 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x01, 0x00, temp); ast_set_crtc_reg()
288 temp = (mode->crtc_hblank_start >> 3) - 1; ast_set_crtc_reg()
289 if (temp & 0x100) ast_set_crtc_reg()
291 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x02, 0x00, temp); ast_set_crtc_reg()
293 temp = ((mode->crtc_hblank_end >> 3) - 1) & 0x7f; ast_set_crtc_reg()
294 if (temp & 0x20) ast_set_crtc_reg()
296 if (temp & 0x40) ast_set_crtc_reg()
298 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x03, 0xE0, (temp & 0x1f)); ast_set_crtc_reg()
300 temp = (mode->crtc_hsync_start >> 3) - 1; ast_set_crtc_reg()
301 if (temp & 0x100) ast_set_crtc_reg()
303 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x04, 0x00, temp); ast_set_crtc_reg()
305 temp = ((mode->crtc_hsync_end >> 3) - 1) & 0x3f; ast_set_crtc_reg()
306 if (temp & 0x20) ast_set_crtc_reg()
308 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05)); ast_set_crtc_reg()
314 temp = (mode->crtc_vtotal) - 2; ast_set_crtc_reg()
315 if (temp & 0x100) ast_set_crtc_reg()
317 if (temp & 0x200) ast_set_crtc_reg()
319 if (temp & 0x400) ast_set_crtc_reg()
321 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x06, 0x00, temp); ast_set_crtc_reg()
323 temp = (mode->crtc_vsync_start) - 1; ast_set_crtc_reg()
324 if (temp & 0x100) ast_set_crtc_reg()
326 if (temp & 0x200) ast_set_crtc_reg()
328 if (temp & 0x400) ast_set_crtc_reg()
330 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x10, 0x00, temp); ast_set_crtc_reg()
332 temp = (mode->crtc_vsync_end - 1) & 0x3f; ast_set_crtc_reg()
333 if (temp & 0x10) ast_set_crtc_reg()
335 if (temp & 0x20) ast_set_crtc_reg()
337 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x70, temp & 0xf); ast_set_crtc_reg()
339 temp = mode->crtc_vdisplay - 1; ast_set_crtc_reg()
340 if (temp & 0x100) ast_set_crtc_reg()
342 if (temp & 0x200) ast_set_crtc_reg()
344 if (temp & 0x400) ast_set_crtc_reg()
346 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x12, 0x00, temp); ast_set_crtc_reg()
348 temp = mode->crtc_vblank_start - 1; ast_set_crtc_reg()
349 if (temp & 0x100) ast_set_crtc_reg()
351 if (temp & 0x200) ast_set_crtc_reg()
353 if (temp & 0x400) ast_set_crtc_reg()
355 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x15, 0x00, temp); ast_set_crtc_reg()
357 temp = mode->crtc_vblank_end - 1; ast_set_crtc_reg()
358 if (temp & 0x100) ast_set_crtc_reg()
360 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x16, 0x00, temp); ast_set_crtc_reg()
|
| /linux-4.1.27/drivers/iio/pressure/ |
| H A D | ms5611_core.c | 70 s32 *temp, s32 *pressure) ms5611_read_temp_and_pressure()
108 *temp = t; ms5611_read_temp_and_pressure()
135 s32 temp, pressure; ms5611_read_raw() local
142 &temp, &pressure); ms5611_read_raw()
149 *val = temp * 10; ms5611_read_raw()
69 ms5611_read_temp_and_pressure(struct iio_dev *indio_dev, s32 *temp, s32 *pressure) ms5611_read_temp_and_pressure() argument
|
| /linux-4.1.27/drivers/net/ethernet/hisilicon/ |
| H A D | hip04_mdio.c | 96 int temp, i; hip04_mdio_reset() local
100 temp = hip04_mdio_read(bus, i, MII_BMCR); hip04_mdio_reset()
101 if (temp < 0) hip04_mdio_reset()
104 temp |= BMCR_RESET; hip04_mdio_reset()
105 if (hip04_mdio_write(bus, i, MII_BMCR, temp) < 0) hip04_mdio_reset()
|
| /linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| H A D | ramfuc.h | 114 u32 temp = ramfuc_rd32(ram, reg); ramfuc_mask() local
115 if (temp != ((temp & ~mask) | data) || reg->force) { ramfuc_mask()
116 ramfuc_wr32(ram, reg, (temp & ~mask) | data); ramfuc_mask()
119 return temp; ramfuc_mask()
|
| /linux-4.1.27/arch/s390/net/ |
| H A D | bpf_jit.S | 31 * %r4 = pointer to temp buffer
61 la %r4,STK_OFF_TMP(%r15); /* Arg3 = temp bufffer */ \
64 LOAD %r14,STK_OFF_TMP(%r15); /* Load from temp bufffer */ \
87 la %r4,STK_OFF_TMP(%r15) # Arg3 = pointer to temp buffer
90 llgc %r14,STK_OFF_TMP(%r15) # Load result from temp buffer
|
| /linux-4.1.27/arch/powerpc/crypto/ |
| H A D | sha1.c | 29 extern void powerpc_sha_transform(u32 *state, const u8 *src, u32 *temp);
55 u32 temp[SHA_WORKSPACE_WORDS]; sha1_update() local
64 powerpc_sha_transform(sctx->state, src, temp); sha1_update()
69 memzero_explicit(temp, sizeof(temp)); sha1_update()
|
| /linux-4.1.27/drivers/thermal/st/ |
| H A D | st_thermal.c | 22 #define mcelsius(temp) ((temp) * 1000)
119 unsigned int temp; st_thermal_get_temp() local
129 ret = regmap_field_read(sensor->temp_data, &temp); st_thermal_get_temp()
133 temp += sensor->cdata->temp_adjust_val; st_thermal_get_temp()
134 temp = mcelsius(temp); st_thermal_get_temp()
136 dev_dbg(dev, "temperature: %d\n", temp); st_thermal_get_temp()
138 *temperature = temp; st_thermal_get_temp()
162 int trip, unsigned long *temp) st_thermal_get_trip_temp()
169 *temp = mcelsius(sensor->cdata->crit_temp); st_thermal_get_trip_temp()
161 st_thermal_get_trip_temp(struct thermal_zone_device *th, int trip, unsigned long *temp) st_thermal_get_trip_temp() argument
|
| /linux-4.1.27/arch/arm/mach-hisi/ |
| H A D | hotplug.c | 217 unsigned int temp; hip01_set_cpu() local
230 temp = readl_relaxed(ctrl_base + HIP01_PERI9); hip01_set_cpu()
231 temp |= PERI9_CPU1_RESET; hip01_set_cpu()
232 writel_relaxed(temp, ctrl_base + HIP01_PERI9); hip01_set_cpu()
237 temp = readl_relaxed(ctrl_base + HIP01_PERI9); hip01_set_cpu()
238 temp &= ~PERI9_CPU1_RESET; hip01_set_cpu()
239 writel_relaxed(temp, ctrl_base + HIP01_PERI9); hip01_set_cpu()
|
| /linux-4.1.27/drivers/platform/x86/ |
| H A D | intel_mid_thermal.c | 130 * the appropriate temp value from ADC value.
131 * The adc code vs sensor temp curve is split into five parts
132 * to achieve very close approximate temp value with less than
137 int temp; adc_to_temp() local
153 temp = 177 - (adc_val/5); adc_to_temp()
155 temp = 111 - (adc_val/8); adc_to_temp()
157 temp = 92 - (adc_val/10); adc_to_temp()
159 temp = 91 - (adc_val/10); adc_to_temp()
161 temp = 112 - (adc_val/6); adc_to_temp()
164 *tp = temp * 1000; adc_to_temp()
170 * @temp: holds the current temperature for the sensor after reading
173 * temperature. The converted value is stored in temp.
177 static int mid_read_temp(struct thermal_zone_device *tzd, unsigned long *temp) mid_read_temp() argument
218 *temp = td_info->curr_temp = curr_temp; mid_read_temp()
398 * initialize_sensor - sets default temp and timer ranges
451 * read_curr_temp - reads the current temperature and stores in temp
452 * @temp: holds the current temperature value after reading
456 static int read_curr_temp(struct thermal_zone_device *tzd, unsigned long *temp) read_curr_temp() argument
459 return mid_read_temp(tzd, temp); read_curr_temp()
|
| /linux-4.1.27/drivers/thermal/samsung/ |
| H A D | exynos_tmu.c | 185 unsigned long temp);
193 unsigned long temp; exynos_report_trigger() local
206 tz->ops->get_trip_temp(tz, i, &temp); exynos_report_trigger()
207 if (tz->last_temperature < temp) exynos_report_trigger()
220 static int temp_to_code(struct exynos_tmu_data *data, u8 temp) temp_to_code() argument
227 temp_code = (temp - pdata->first_point_trim) * temp_to_code()
233 temp_code = temp + data->temp_error1 - pdata->first_point_trim; temp_to_code()
236 temp_code = temp + pdata->default_temp_offset; temp_to_code()
250 int temp; code_to_temp() local
254 temp = (temp_code - data->temp_error1) * code_to_temp()
260 temp = temp_code - data->temp_error1 + pdata->first_point_trim; code_to_temp()
263 temp = temp_code - pdata->default_temp_offset; code_to_temp()
267 return temp; code_to_temp()
294 unsigned long temp; get_th_reg() local
307 temp = trips[i].temperature / MCELSIUS; get_th_reg()
309 temp -= (trips[i].hysteresis / MCELSIUS); get_th_reg()
313 threshold |= temp_to_code(data, temp) << 8 * i; get_th_reg()
377 unsigned long reference, temp; exynos4210_tmu_initialize() local
405 temp = trips[i].temperature / MCELSIUS; exynos4210_tmu_initialize()
406 writeb(temp - reference, data->base + exynos4210_tmu_initialize()
545 unsigned long temp, temp_hist; exynos7_tmu_initialize() local
587 tz->ops->get_trip_temp(tz, i, &temp); exynos7_tmu_initialize()
588 temp /= MCELSIUS; exynos7_tmu_initialize()
591 temp_hist = temp - (temp_hist / MCELSIUS); exynos7_tmu_initialize()
594 threshold_code = temp_to_code(data, temp); exynos7_tmu_initialize()
716 static int exynos_get_temp(void *p, long *temp) exynos_get_temp() argument
726 *temp = code_to_temp(data, data->tmu_read(data)) * MCELSIUS; exynos_get_temp()
736 unsigned long temp) get_emul_con_reg()
738 if (temp) { get_emul_con_reg()
739 temp /= MCELSIUS; get_emul_con_reg()
748 val |= (temp_to_code(data, temp) << get_emul_con_reg()
754 val |= (temp_to_code(data, temp) << get_emul_con_reg()
766 unsigned long temp) exynos4412_tmu_set_emulation()
779 val = get_emul_con_reg(data, val, temp); exynos4412_tmu_set_emulation()
784 unsigned long temp) exynos5440_tmu_set_emulation()
789 val = get_emul_con_reg(data, val, temp); exynos5440_tmu_set_emulation()
793 static int exynos_tmu_set_emulation(void *drv_data, unsigned long temp) exynos_tmu_set_emulation() argument
801 if (temp && temp < MCELSIUS) exynos_tmu_set_emulation()
806 data->tmu_set_emulation(data, temp); exynos_tmu_set_emulation()
816 static int exynos_tmu_set_emulation(void *drv_data, unsigned long temp) exynos_tmu_set_emulation() argument
735 get_emul_con_reg(struct exynos_tmu_data *data, unsigned int val, unsigned long temp) get_emul_con_reg() argument
765 exynos4412_tmu_set_emulation(struct exynos_tmu_data *data, unsigned long temp) exynos4412_tmu_set_emulation() argument
783 exynos5440_tmu_set_emulation(struct exynos_tmu_data *data, unsigned long temp) exynos5440_tmu_set_emulation() argument
|
| /linux-4.1.27/sound/drivers/vx/ |
| H A D | vx_mixer.c | 915 struct snd_kcontrol_new temp; snd_vx_mixer_new() local
923 temp = vx_control_output_level; snd_vx_mixer_new()
924 temp.index = i; snd_vx_mixer_new()
925 temp.tlv.p = chip->hw->output_level_db_scale; snd_vx_mixer_new()
926 if ((err = snd_ctl_add(card, snd_ctl_new1(&temp, chip))) < 0) snd_vx_mixer_new()
933 temp = vx_control_audio_gain; snd_vx_mixer_new()
934 temp.index = i; snd_vx_mixer_new()
935 temp.name = "PCM Playback Volume"; snd_vx_mixer_new()
936 temp.private_value = val; snd_vx_mixer_new()
937 if ((err = snd_ctl_add(card, snd_ctl_new1(&temp, chip))) < 0) snd_vx_mixer_new()
939 temp = vx_control_output_switch; snd_vx_mixer_new()
940 temp.index = i; snd_vx_mixer_new()
941 temp.private_value = val; snd_vx_mixer_new()
942 if ((err = snd_ctl_add(card, snd_ctl_new1(&temp, chip))) < 0) snd_vx_mixer_new()
944 temp = vx_control_monitor_gain; snd_vx_mixer_new()
945 temp.index = i; snd_vx_mixer_new()
946 temp.private_value = val; snd_vx_mixer_new()
947 if ((err = snd_ctl_add(card, snd_ctl_new1(&temp, chip))) < 0) snd_vx_mixer_new()
949 temp = vx_control_monitor_switch; snd_vx_mixer_new()
950 temp.index = i; snd_vx_mixer_new()
951 temp.private_value = val; snd_vx_mixer_new()
952 if ((err = snd_ctl_add(card, snd_ctl_new1(&temp, chip))) < 0) snd_vx_mixer_new()
956 temp = vx_control_audio_gain; snd_vx_mixer_new()
957 temp.index = i; snd_vx_mixer_new()
958 temp.name = "PCM Capture Volume"; snd_vx_mixer_new()
959 temp.private_value = (i * 2) | (1 << 8); snd_vx_mixer_new()
960 if ((err = snd_ctl_add(card, snd_ctl_new1(&temp, chip))) < 0) snd_vx_mixer_new()
981 temp = vx_control_saturation; snd_vx_mixer_new()
982 temp.index = i; snd_vx_mixer_new()
983 temp.private_value = val; snd_vx_mixer_new()
984 if ((err = snd_ctl_add(card, snd_ctl_new1(&temp, chip))) < 0) snd_vx_mixer_new()
988 temp = vx_control_vu_meter; snd_vx_mixer_new()
989 temp.index = i; snd_vx_mixer_new()
990 temp.name = name; snd_vx_mixer_new()
991 temp.private_value = val; snd_vx_mixer_new()
992 if ((err = snd_ctl_add(card, snd_ctl_new1(&temp, chip))) < 0) snd_vx_mixer_new()
995 temp = vx_control_peak_meter; snd_vx_mixer_new()
996 temp.index = i; snd_vx_mixer_new()
997 temp.name = name; snd_vx_mixer_new()
998 temp.private_value = val; snd_vx_mixer_new()
999 if ((err = snd_ctl_add(card, snd_ctl_new1(&temp, chip))) < 0) snd_vx_mixer_new()
|
| /linux-4.1.27/drivers/iio/adc/ |
| H A D | mcp3422.c | 119 u32 temp; mcp3422_read() local
123 temp = buf[0] << 16 | buf[1] << 8 | buf[2]; mcp3422_read()
127 temp = buf[0] << 8 | buf[1]; mcp3422_read()
131 *value = sign_extend32(temp, mcp3422_sign_extend[sample_rate]); mcp3422_read()
197 u8 temp; mcp3422_write_raw() local
225 temp = MCP3422_SRATE_240; mcp3422_write_raw()
228 temp = MCP3422_SRATE_60; mcp3422_write_raw()
231 temp = MCP3422_SRATE_15; mcp3422_write_raw()
236 temp = MCP3422_SRATE_3; mcp3422_write_raw()
245 config |= MCP3422_SAMPLE_RATE_VALUE(temp); mcp3422_write_raw()
|
| /linux-4.1.27/arch/parisc/math-emu/ |
| H A D | fcnvfxt.c | 65 register unsigned int src, temp; sgl_to_sgl_fcnvfxt() local
93 temp = src; sgl_to_sgl_fcnvfxt()
94 Sgl_clear_signexponent_set_hidden(temp); sgl_to_sgl_fcnvfxt()
95 Int_from_sgl_mantissa(temp,src_exponent); sgl_to_sgl_fcnvfxt()
96 if (Sgl_isone_sign(src)) result = -Sgl_all(temp); sgl_to_sgl_fcnvfxt()
97 else result = Sgl_all(temp); sgl_to_sgl_fcnvfxt()
130 register unsigned int src, temp, resultp2; sgl_to_dbl_fcnvfxt() local
165 temp = src; sgl_to_dbl_fcnvfxt()
166 Sgl_clear_signexponent_set_hidden(temp); sgl_to_dbl_fcnvfxt()
167 Dint_from_sgl_mantissa(temp,src_exponent,resultp1,resultp2); sgl_to_dbl_fcnvfxt()
|
| /linux-4.1.27/drivers/s390/crypto/ |
| H A D | zcrypt_cca_key.h | 161 unsigned char *temp; zcrypt_type6_mex_key_de() local
183 temp = key->pvtMeSec.exponent + zcrypt_type6_mex_key_de()
185 if (copy_from_user(temp, mex->b_key, mex->inputdatalength)) zcrypt_type6_mex_key_de()
189 temp = key->pvtMeSec.modulus + zcrypt_type6_mex_key_de()
191 if (copy_from_user(temp, mex->n_modulus, mex->inputdatalength)) zcrypt_type6_mex_key_de()
223 unsigned char *temp; zcrypt_type6_mex_key_en() local
232 temp = key->exponent; zcrypt_type6_mex_key_en()
233 if (copy_from_user(temp, mex->b_key, mex->inputdatalength)) zcrypt_type6_mex_key_en()
237 if (temp[i]) zcrypt_type6_mex_key_en()
241 memmove(temp, temp + i, mex->inputdatalength - i); zcrypt_type6_mex_key_en()
242 temp += mex->inputdatalength - i; zcrypt_type6_mex_key_en()
244 if (copy_from_user(temp, mex->n_modulus, mex->inputdatalength)) zcrypt_type6_mex_key_en()
|
| /linux-4.1.27/drivers/pci/host/ |
| H A D | pci-keystone.c | 164 int temp, max_host_irqs, legacy = 1, *host_irqs, ret = -EINVAL; ks_pcie_get_irq_controller_info() local
187 temp = of_irq_count(*np_temp); ks_pcie_get_irq_controller_info()
188 if (!temp) ks_pcie_get_irq_controller_info()
190 if (temp > max_host_irqs) ks_pcie_get_irq_controller_info()
192 (legacy ? "legacy" : "MSI"), temp); ks_pcie_get_irq_controller_info()
198 for (temp = 0; temp < max_host_irqs; temp++) { ks_pcie_get_irq_controller_info()
199 host_irqs[temp] = irq_of_parse_and_map(*np_temp, temp); ks_pcie_get_irq_controller_info()
200 if (!host_irqs[temp]) ks_pcie_get_irq_controller_info()
203 if (temp) { ks_pcie_get_irq_controller_info()
204 *num_irqs = temp; ks_pcie_get_irq_controller_info()
|
| /linux-4.1.27/drivers/usb/isp1760/ |
| H A D | isp1760-hcd.c | 1296 u32 temp; isp1760_run() local
1313 temp = reg_read32(hcd->regs, HC_HW_MODE_CTRL); isp1760_run()
1314 reg_write32(hcd->regs, HC_HW_MODE_CTRL, temp | HW_GLOBAL_INTR_EN); isp1760_run()
1711 u32 temp, status = 0; isp1760_hub_status_data() local
1725 temp = reg_read32(hcd->regs, HC_PORTSC1); isp1760_hub_status_data()
1727 if (temp & PORT_OWNER) { isp1760_hub_status_data()
1728 if (temp & PORT_CSC) { isp1760_hub_status_data()
1729 temp &= ~PORT_CSC; isp1760_hub_status_data()
1730 reg_write32(hcd->regs, HC_PORTSC1, temp); isp1760_hub_status_data()
1742 if ((temp & mask) != 0 isp1760_hub_status_data()
1743 || ((temp & PORT_RESUME) != 0 isp1760_hub_status_data()
1759 u16 temp; isp1760_hub_descriptor() local
1767 temp = 1 + (ports / 8); isp1760_hub_descriptor()
1768 desc->bDescLength = 7 + 2 * temp; isp1760_hub_descriptor()
1771 memset(&desc->u.hs.DeviceRemovable[0], 0, temp); isp1760_hub_descriptor()
1772 memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp); isp1760_hub_descriptor()
1775 temp = HUB_CHAR_INDV_PORT_OCPM; isp1760_hub_descriptor()
1778 temp |= HUB_CHAR_INDV_PORT_LPSM; isp1760_hub_descriptor()
1781 temp |= HUB_CHAR_NO_LPSM; isp1760_hub_descriptor()
1782 desc->wHubCharacteristics = cpu_to_le16(temp); isp1760_hub_descriptor()
1816 u32 temp, status; isp1760_hub_control() local
1844 temp = reg_read32(hcd->regs, HC_PORTSC1); isp1760_hub_control()
1855 reg_write32(hcd->regs, HC_PORTSC1, temp & ~PORT_PE); isp1760_hub_control()
1861 if (temp & PORT_RESET) isp1760_hub_control()
1864 if (temp & PORT_SUSPEND) { isp1760_hub_control()
1865 if ((temp & PORT_PE) == 0) isp1760_hub_control()
1868 temp &= ~(PORT_RWC_BITS); isp1760_hub_control()
1870 temp | PORT_RESUME); isp1760_hub_control()
1881 temp & ~PORT_POWER); isp1760_hub_control()
1884 reg_write32(hcd->regs, HC_PORTSC1, temp | PORT_CSC); isp1760_hub_control()
1910 temp = reg_read32(hcd->regs, HC_PORTSC1); isp1760_hub_control()
1913 if (temp & PORT_CSC) isp1760_hub_control()
1918 if (temp & PORT_RESUME) { isp1760_hub_control()
1937 temp = reg_read32(hcd->regs, HC_PORTSC1); isp1760_hub_control()
1939 temp & ~(PORT_RWC_BITS | PORT_RESUME)); isp1760_hub_control()
1948 temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10)); isp1760_hub_control()
1953 if ((temp & PORT_RESET) isp1760_hub_control()
1960 reg_write32(hcd->regs, HC_PORTSC1, temp & ~PORT_RESET); isp1760_hub_control()
1973 temp = check_reset_complete(hcd, wIndex, isp1760_hub_control()
1982 if (temp & PORT_OWNER) isp1760_hub_control()
1985 if (temp & PORT_CONNECT) { isp1760_hub_control()
1990 if (temp & PORT_PE) isp1760_hub_control()
1992 if (temp & (PORT_SUSPEND|PORT_RESUME)) isp1760_hub_control()
1994 if (temp & PORT_RESET) isp1760_hub_control()
1996 if (temp & PORT_POWER) isp1760_hub_control()
2017 temp = reg_read32(hcd->regs, HC_PORTSC1); isp1760_hub_control()
2018 if (temp & PORT_OWNER) isp1760_hub_control()
2021 /* temp &= ~PORT_RWC_BITS; */ isp1760_hub_control()
2024 reg_write32(hcd->regs, HC_PORTSC1, temp | PORT_PE); isp1760_hub_control()
2028 if ((temp & PORT_PE) == 0 isp1760_hub_control()
2029 || (temp & PORT_RESET) != 0) isp1760_hub_control()
2032 reg_write32(hcd->regs, HC_PORTSC1, temp | PORT_SUSPEND); isp1760_hub_control()
2037 temp | PORT_POWER); isp1760_hub_control()
2040 if (temp & PORT_RESUME) isp1760_hub_control()
2046 if ((temp & (PORT_PE|PORT_CONNECT)) == PORT_CONNECT isp1760_hub_control()
2047 && PORT_USB11(temp)) { isp1760_hub_control()
2048 temp |= PORT_OWNER; isp1760_hub_control()
2050 temp |= PORT_RESET; isp1760_hub_control()
2051 temp &= ~PORT_PE; isp1760_hub_control()
2060 reg_write32(hcd->regs, HC_PORTSC1, temp); isp1760_hub_control()
2089 u32 temp; isp1760_stop() local
2100 temp = reg_read32(hcd->regs, HC_HW_MODE_CTRL); isp1760_stop()
2101 reg_write32(hcd->regs, HC_HW_MODE_CTRL, temp &= ~HW_GLOBAL_INTR_EN); isp1760_stop()
2109 u32 command, temp; isp1760_shutdown() local
2112 temp = reg_read32(hcd->regs, HC_HW_MODE_CTRL); isp1760_shutdown()
2113 reg_write32(hcd->regs, HC_HW_MODE_CTRL, temp &= ~HW_GLOBAL_INTR_EN); isp1760_shutdown()
|
| /linux-4.1.27/drivers/media/radio/ |
| H A D | radio-terratec.c | 85 int temp; terratec_s_frequency() local
96 temp = 102400; terratec_s_frequency()
98 if (rest % temp == rest) terratec_s_frequency()
102 rest = rest - temp; terratec_s_frequency()
106 temp = temp / 2; terratec_s_frequency()
|
| /linux-4.1.27/drivers/gpu/drm/amd/amdkfd/ |
| H A D | kfd_device_queue_manager_cik.c | 101 unsigned int temp; register_process_cik() local
118 temp = get_sh_mem_bases_32(pdd); register_process_cik()
119 qpd->sh_mem_bases = SHARED_BASE(temp); register_process_cik()
122 temp = get_sh_mem_bases_nybble_64(pdd); register_process_cik()
123 qpd->sh_mem_bases = compute_sh_mem_bases_64bit(temp); register_process_cik()
127 qpd->pqm->process->is_32bit_user_mode, temp, qpd->sh_mem_bases); register_process_cik()
|
| /linux-4.1.27/arch/arm/mach-mmp/ |
| H A D | pm-mmp2.c | 162 int temp; mmp2_pm_enter() local
164 temp = __raw_readl(MMP2_ICU_INT4_MASK); mmp2_pm_enter()
165 if (temp & (1 << 1)) { mmp2_pm_enter()
170 temp = __raw_readl(APMU_SRAM_PWR_DWN); mmp2_pm_enter()
171 temp |= ((1 << 19) | (1 << 18)); mmp2_pm_enter()
172 __raw_writel(temp, APMU_SRAM_PWR_DWN); mmp2_pm_enter()
|
| /linux-4.1.27/security/selinux/ss/ |
| H A D | hashtab.c | 99 struct hashtab_node *cur, *temp; hashtab_destroy() local
107 temp = cur; hashtab_destroy()
109 kfree(temp); hashtab_destroy()
|
| /linux-4.1.27/tools/perf/util/ |
| H A D | trace-event.h | 52 /* size is only valid if temp is 'true' */
54 bool temp; member in struct:tracing_data
59 int fd, bool temp);
|
| /linux-4.1.27/drivers/misc/ |
| H A D | apds9802als.c | 84 int temp; als_lux0_input_data_show() local
93 temp = i2c_smbus_read_byte_data(client, 0x81); als_lux0_input_data_show()
94 i2c_smbus_write_byte_data(client, 0x81, temp | 0x08); als_lux0_input_data_show()
100 temp = i2c_smbus_read_byte_data(client, 0x8C); /* LSB data */ als_lux0_input_data_show()
101 if (temp < 0) { als_lux0_input_data_show()
102 ret_val = temp; als_lux0_input_data_show()
112 temp = (ret_val << 8) | temp; als_lux0_input_data_show()
113 return sprintf(buf, "%d\n", temp); als_lux0_input_data_show()
|
| /linux-4.1.27/drivers/scsi/ |
| H A D | scsicam.c | 234 unsigned long heads, sectors, cylinders, temp; setsize() local
239 temp = cylinders * sectors; /* Compute divisor for heads */ setsize()
240 heads = capacity / temp; /* Compute value for number of heads */ setsize()
241 if (capacity % temp) { /* If no remainder, done! */ setsize()
243 temp = cylinders * heads; /* Compute divisor for sectors */ setsize()
244 sectors = capacity / temp; /* Compute value for sectors per setsize()
246 if (capacity % temp) { /* If no remainder, done! */ setsize()
248 temp = heads * sectors; /* Compute divisor for cylinders */ setsize()
249 cylinders = capacity / temp; /* Compute number of cylinders */ setsize()
|