| /linux-4.1.27/drivers/gpu/drm/tegra/ |
| D | sor.c | 73 static inline u32 tegra_sor_readl(struct tegra_sor *sor, unsigned long offset) in tegra_sor_readl() argument
75 return readl(sor->regs + (offset << 2)); in tegra_sor_readl()
78 static inline void tegra_sor_writel(struct tegra_sor *sor, u32 value, in tegra_sor_writel() argument
81 writel(value, sor->regs + (offset << 2)); in tegra_sor_writel()
84 static int tegra_sor_dp_train_fast(struct tegra_sor *sor, in tegra_sor_dp_train_fast() argument
97 tegra_sor_writel(sor, value, SOR_LANE_DRIVE_CURRENT_0); in tegra_sor_dp_train_fast()
103 tegra_sor_writel(sor, value, SOR_LANE_PREEMPHASIS_0); in tegra_sor_dp_train_fast()
109 tegra_sor_writel(sor, value, SOR_LANE_POST_CURSOR_0); in tegra_sor_dp_train_fast()
112 tegra_sor_writel(sor, 0, SOR_LVDS); in tegra_sor_dp_train_fast()
114 value = tegra_sor_readl(sor, SOR_DP_PADCTL_0); in tegra_sor_dp_train_fast()
[all …]
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| D | Makefile | 13 sor.o \
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| /linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
| D | gm204.c | 79 priv->sor.nr = 4; in gm204_disp_ctor()
82 priv->sor.power = nv50_sor_power; in gm204_disp_ctor()
83 priv->sor.hda_eld = gf110_hda_eld; in gm204_disp_ctor()
84 priv->sor.hdmi = gf110_hdmi_ctrl; in gm204_disp_ctor()
85 priv->sor.magic = gm204_sor_magic; in gm204_disp_ctor()
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| D | gm107.c | 78 priv->sor.nr = 4; in gm107_disp_ctor()
81 priv->sor.power = nv50_sor_power; in gm107_disp_ctor()
82 priv->sor.hda_eld = gf110_hda_eld; in gm107_disp_ctor()
83 priv->sor.hdmi = gk104_hdmi_ctrl; in gm107_disp_ctor()
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| D | gt215.c | 77 priv->sor.nr = 4; in gt215_disp_ctor()
81 priv->sor.power = nv50_sor_power; in gt215_disp_ctor()
82 priv->sor.hda_eld = gt215_hda_eld; in gt215_disp_ctor()
83 priv->sor.hdmi = gt215_hdmi_ctrl; in gt215_disp_ctor()
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| D | gk110.c | 78 priv->sor.nr = 4; in gk110_disp_ctor()
81 priv->sor.power = nv50_sor_power; in gk110_disp_ctor()
82 priv->sor.hda_eld = gf110_hda_eld; in gk110_disp_ctor()
83 priv->sor.hdmi = gk104_hdmi_ctrl; in gk110_disp_ctor()
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| D | gk104.c | 243 priv->sor.nr = 4; in gk104_disp_ctor()
246 priv->sor.power = nv50_sor_power; in gk104_disp_ctor()
247 priv->sor.hda_eld = gf110_hda_eld; in gk104_disp_ctor()
248 priv->sor.hdmi = gk104_hdmi_ctrl; in gk104_disp_ctor()
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| D | gt200.c | 122 priv->sor.nr = 2; in gt200_disp_ctor()
126 priv->sor.power = nv50_sor_power; in gt200_disp_ctor()
127 priv->sor.hdmi = g84_hdmi_ctrl; in gt200_disp_ctor()
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| D | g94.c | 106 priv->sor.nr = 4; in g94_disp_ctor()
110 priv->sor.power = nv50_sor_power; in g94_disp_ctor()
111 priv->sor.hdmi = g84_hdmi_ctrl; in g94_disp_ctor()
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| D | g84.c | 246 priv->sor.nr = 2; in g84_disp_ctor()
250 priv->sor.power = nv50_sor_power; in g84_disp_ctor()
251 priv->sor.hdmi = g84_hdmi_ctrl; in g84_disp_ctor()
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| D | gf110.c | 691 for (i = 0; i < priv->sor.nr; i++) { in gf110_disp_main_init()
902 *conf = priv->sor.lvdsconf; in exec_clkcmp()
1058 if (priv->sor.magic) in gf110_disp_intr_unk2_2()
1059 priv->sor.magic(outp); in gf110_disp_intr_unk2_2()
1279 priv->sor.nr = 4; in gf110_disp_ctor()
1282 priv->sor.power = nv50_sor_power; in gf110_disp_ctor()
1283 priv->sor.hda_eld = gf110_hda_eld; in gf110_disp_ctor()
1284 priv->sor.hdmi = gf110_hdmi_ctrl; in gf110_disp_ctor()
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| D | nv50.c | 1045 return priv->sor.power(object, priv, data, size, head, outp); in nv50_disp_main_mthd()
1047 if (!priv->sor.hda_eld) in nv50_disp_main_mthd()
1049 return priv->sor.hda_eld(object, priv, data, size, head, outp); in nv50_disp_main_mthd()
1051 if (!priv->sor.hdmi) in nv50_disp_main_mthd()
1053 return priv->sor.hdmi(object, priv, data, size, head, outp); in nv50_disp_main_mthd()
1063 priv->sor.lvdsconf = args->v0.script; in nv50_disp_main_mthd()
1170 for (i = 0; i < priv->sor.nr; i++) { in nv50_disp_main_init()
1465 for (i = 0; !(ctrl & (1 << head)) && i < priv->sor.nr; i++) in exec_script()
1523 for (i = 0; !(ctrl & (1 << head)) && i < priv->sor.nr; i++) in exec_clkcmp()
1551 *conf = priv->sor.lvdsconf; in exec_clkcmp()
[all …]
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| D | dport.c | 333 if (!outp->base.info.location && priv->sor.magic) in nvkm_dp_train()
334 priv->sor.magic(&outp->base); in nvkm_dp_train()
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| D | nv50.h | 36 } sor; member
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| /linux-4.1.27/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ |
| D | dcb.h | 36 struct sor_conf sor; member
45 struct sor_conf sor; member
50 struct sor_conf sor; member
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| /linux-4.1.27/arch/powerpc/sysdev/ |
| D | cpm2.c | 330 u32 dir, par, sor, odr, dat; member
352 setbits32(&iop[port].sor, pin); in cpm2_set_pin()
354 clrbits32(&iop[port].sor, pin); in cpm2_set_pin()
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| D | cpm1.c | 303 __be32 dir, par, sor, odr, dat; member
337 setbits32(&iop->sor, pin); in cpm1_set_pin32()
339 clrbits32(&iop->sor, pin); in cpm1_set_pin32()
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| D | cpm_common.c | 226 u32 dir, par, sor, odr, dat; member
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| /linux-4.1.27/arch/ia64/kernel/ |
| D | unaligned.c | 296 rotate_reg (unsigned long sor, unsigned long rrb, unsigned long reg) in rotate_reg() argument
299 if (reg >= sor) in rotate_reg()
300 reg -= sor; in rotate_reg()
313 long sor = 8 * ((regs->cr_ifs >> 14) & 0xf); in set_rse_reg() local
323 if (ridx < sor) in set_rse_reg()
324 ridx = rotate_reg(sor, rrb_gr, ridx); in set_rse_reg()
386 long sor = 8 * ((regs->cr_ifs >> 14) & 0xf); in get_rse_reg() local
396 if (ridx < sor) in get_rse_reg()
397 ridx = rotate_reg(sor, rrb_gr, ridx); in get_rse_reg()
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| /linux-4.1.27/Documentation/devicetree/bindings/gpu/ |
| D | nvidia,tegra20-host1x.txt | 197 - sor: serial output resource
200 - compatible: For Tegra124, must contain "nvidia,tegra124-sor". Otherwise,
201 must contain '"nvidia,<chip>-sor", "nvidia,tegra124-sor"', where <chip>
208 - sor: clock input for the SOR hardware
215 - sor
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| /linux-4.1.27/drivers/gpu/drm/nouveau/ |
| D | nouveau_bios.c | 1445 entry->lvdsconf.sor.link = (conf & 0x00000030) >> 4; in parse_dcb20_entry()
1446 link = entry->lvdsconf.sor.link; in parse_dcb20_entry()
1471 entry->dpconf.sor.link = (conf & 0x00000030) >> 4; in parse_dcb20_entry()
1498 link = entry->dpconf.sor.link; in parse_dcb20_entry()
1503 entry->tmdsconf.sor.link = (conf & 0x00000030) >> 4; in parse_dcb20_entry()
1505 link = entry->tmdsconf.sor.link; in parse_dcb20_entry()
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| /linux-4.1.27/arch/arm/boot/dts/ |
| D | tegra124.dtsi | 139 sor@0,54540000 {
140 compatible = "nvidia,tegra124-sor";
147 clock-names = "sor", "parent", "dp", "safe";
149 reset-names = "sor";
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| D | tegra124-nyan.dtsi | 28 sor@0,54540000 {
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| D | tegra124-venice2.dts | 33 sor@0,54540000 {
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