Searched refs:r21 (Results 1 - 130 of 130) sorted by relevance

/linux-4.1.27/arch/sh/lib64/
H A Dudivsi3.S7 clobbered: r18,r19,r20,r21,r22,r25,tr0
16 sub r20,r25,r21
17 mmulfx.w r21,r21,r19
18 mshflo.w r21,r63,r21
23 msub.w r21,r19,r19
26 * It would be nice for scheduling to do this add to r21 before
30 addi r19,-2,r21
31 mulu.l r4,r21,r18
33 shlli r21,15,r21
36 mmacnfx.wl r25,r19,r21
40 mulu.l r25,r21,r19
49 mulu.l r25,r21,r19
H A Dsdivsi3.S8 /* clobbered: r1,r18,r19,r20,r21,r25,tr0 */
18 shari r25, 58, r21 /* extract 5(6) bit index (s2.4 with hole -1..1) */
20 ldx.ub r20, r21, r19 /* u0.8 */
22 shlli r21, 1, r21
24 ldx.w r20, r21, r21 /* s2.14 */
27 sub r21, r19, r19 /* some 11 bit inverse in s1.14 */
28 muls.l r19, r19, r21 /* u0.28 */
31 muls.l r25, r21, r18 /* s2.58 */
45 xor r21, r0, r21 /* You could also use the constant 1 << 27. */
46 add r21, r25, r21
47 sub r21, r19, r21
48 shard r21, r1, r21
49 sub r21, r0, r0
H A Dudivdi3.S9 movi 0xffffffffffffbaf1,r21 /* .l shift count 17. */
10 sub r21,r5,r1
35 mshalds.l r1,r21,r1
42 shlri r2,22,r21
43 mulu.l r21,r1,r21
46 shlrd r21,r0,r21
47 mulu.l r21,r3,r5
48 add r8,r21,r8
49 mcmpgt.l r21,r63,r21 // See Note 1
51 mshfhi.l r63,r21,r21
53 andc r2,r21,r2
83 mshalds.l r1,r21,r1
89 shlri r25,22,r21
90 mulu.l r21,r1,r21
93 shlri r21,40,r21
94 mulu.l r21,r7,r5
95 add r8,r21,r8
H A Dstrcpy.S35 sub r3, r2, r21
36 addi r21, 8, r20
37 ldx.q r0, r21, r5
87 ldx.q r0, r21, r5
H A Dcopy_user_memcpy.S178 addi r6, -8, r21
188 ldx.q r22, r21, r25
H A Dmemcpy.S163 addi r6, -8, r21
172 ldx.q r22, r21, r25
/linux-4.1.27/arch/sh/boot/compressed/
H A Dhead_64.S65 movi ITLB_FIXED, r21
67 1: putcfg r21, 0, r63 /* Clear MMUIR[n].PTEH.V */
68 addi r21, TLB_STEP, r21
69 bne r21, r22, tr1
73 movi DTLB_FIXED, r21
75 1: putcfg r21, 0, r63 /* Clear MMUDR[n].PTEH.V */
76 addi r21, TLB_STEP, r21
77 bne r21, r22, tr1
80 movi ITLB_FIXED, r21
82 putcfg r21, 1, r22 /* Set MMUIR[0].PTEL */
84 putcfg r21, 0, r22 /* Set MMUIR[0].PTEH */
87 movi DTLB_FIXED, r21
89 putcfg r21, 1, r22 /* Set MMUDR[0].PTEL */
91 putcfg r21, 0, r22 /* Set MMUDR[0].PTEH */
94 movi ICCR_BASE, r21
97 putcfg r21, ICCR_REG0, r22
98 putcfg r21, ICCR_REG1, r23
102 movi OCCR_BASE, r21
105 putcfg r21, OCCR_REG0, r22
106 putcfg r21, OCCR_REG1, r23
/linux-4.1.27/arch/sh/kernel/
H A Dhead_64.S189 movi MMUIR_FIRST, r21
192 putcfg r21, 0, ZERO /* Clear MMUIR[n].PTEH.V */
193 addi r21, MMUIR_STEP, r21
194 bne r21, r22, tr1
198 movi MMUDR_FIRST, r21
201 putcfg r21, 0, ZERO /* Clear MMUDR[n].PTEH.V */
202 addi r21, MMUDR_STEP, r21
203 bne r21, r22, tr1
206 movi MMUIR_FIRST, r21
209 putcfg r21, 1, r22 /* Set MMUIR[0].PTEL */
212 putcfg r21, 0, r22 /* Set MMUIR[0].PTEH */
215 movi MMUDR_FIRST, r21
218 putcfg r21, 1, r22 /* Set MMUDR[0].PTEL */
221 putcfg r21, 0, r22 /* Set MMUDR[0].PTEH */
226 addi r21, MMUDR_STEP, r21
229 putcfg r21, 1, r22 /* PTEL first */
232 putcfg r21, 0, r22 /* PTEH last */
238 movi ICCR_BASE, r21
241 putcfg r21, ICCR_REG0, r22
242 putcfg r21, ICCR_REG1, r23
245 movi OCCR_BASE, r21
248 putcfg r21, OCCR_REG0, r22
249 putcfg r21, OCCR_REG1, r23
257 getcon SR, r21
259 or r21, r22, r21
260 putcon r21, SSR
300 getcon SR, r21
302 and r21, r22, r22
305 xor r21, r22, r21
306 shlri r21, 15, r21 /* Supposedly 0/1 */
307 st.q r31, 0 , r21 /* Set fpu_in_use */
309 movi 0, r21
310 st.q r31, 0 , r21 /* Set fpu_in_use */
312 or r21, ZERO, r31 /* Set FPU flag at last */
/linux-4.1.27/arch/parisc/kernel/
H A Dpacache.S81 LDREG ITLB_SID_STRIDE(%r1), %r21
94 add %r21, %r20, %r20 /* increment space */
117 add %r21, %r20, %r20 /* increment space */
124 LDREG DTLB_SID_STRIDE(%r1), %r21
137 add %r21, %r20, %r20 /* increment space */
160 add %r21, %r20, %r20 /* increment space */
446 ldd 16(%r25), %r21
453 std %r21, 16(%r26)
456 ldd 48(%r25), %r21
463 std %r21, 48(%r26)
466 ldd 80(%r25), %r21
473 std %r21, 80(%r26)
476 ldd 112(%r25), %r21
482 std %r21, 112(%r26)
503 ldw 8(%r25), %r21
507 stw %r21, 8(%r26)
511 ldw 24(%r25), %r21
515 stw %r21, 24(%r26)
519 ldw 40(%r25), %r21
523 stw %r21, 40(%r26)
527 ldw 56(%r25), %r21
532 stw %r21, 56(%r26)
626 tlb_lock %r20,%r21,%r22
629 tlb_unlock %r20,%r21,%r22
643 ldd 16(%r29), %r21
650 std %r21, 16(%r28)
653 ldd 48(%r29), %r21
660 std %r21, 48(%r28)
663 ldd 80(%r29), %r21
670 std %r21, 80(%r28)
673 ldd 112(%r29), %r21
679 std %r21, 112(%r28)
704 ldw 8(%r29), %r21
708 stw %r21, 8(%r28)
712 ldw 24(%r29), %r21
716 stw %r21, 24(%r28)
720 ldw 40(%r29), %r21
724 stw %r21, 40(%r28)
728 ldw 56(%r29), %r21
732 stw %r21, 56(%r28)
773 tlb_lock %r20,%r21,%r22
775 tlb_unlock %r20,%r21,%r22
857 tlb_lock %r20,%r21,%r22
859 tlb_unlock %r20,%r21,%r22
897 tlb_lock %r20,%r21,%r22
899 tlb_unlock %r20,%r21,%r22
933 tlb_lock %r20,%r21,%r22
935 tlb_unlock %r20,%r21,%r22
975 tlb_lock %r20,%r21,%r22
977 tlb_unlock %r20,%r21,%r22
1079 ldo -1(%r23), %r21
1080 ANDCM %r26, %r21, %r26
1100 ldo -1(%r23), %r21
1101 ANDCM %r26, %r21, %r26
1122 ldo -1(%r23), %r21
1123 ANDCM %r26, %r21, %r26
1186 ldo -1(%r23), %r21
1187 ANDCM %r26, %r21, %r26
H A Dsys_parisc32.c19 int r22, int r21, int r20) sys32_unimplemented()
18 sys32_unimplemented(int r26, int r25, int r24, int r23, int r22, int r21, int r20) sys32_unimplemented() argument
H A Dunaligned.c336 "2: ldw 4(%%sr1,%2),%%r21\n" emulate_stw()
340 " andcm %%r21, %%r19, %%r21\n" emulate_stw()
342 " or %%r1, %%r21, %%r21\n" emulate_stw()
344 " stw %%r21,4(%%sr1,%2)\n" emulate_stw()
355 : "r19", "r20", "r21", "r22", "r1", FIXUP_BRANCH_CLOBBER ); emulate_stw()
386 "2: ldd 8(%%sr1,%2),%%r21\n" emulate_std()
390 " andcm %%r21, %%r19, %%r21\n" emulate_std()
392 " or %%r1, %%r21, %%r21\n" emulate_std()
394 "4: std %%r21,8(%%sr1,%2)\n" emulate_std()
407 : "r19", "r20", "r21", "r22", "r1", FIXUP_BRANCH_CLOBBER ); emulate_std()
418 "2: ldw 8(%%sr1,%3),%%r21\n" emulate_std()
423 " andcm %%r21, %%r19, %%r21\n" emulate_std()
425 " or %2, %%r21, %2\n" emulate_std()
442 : "r19", "r20", "r21", "r1", FIXUP_BRANCH_CLOBBER ); emulate_std()
H A Dsyscall.S133 depdi 0, 31, 32, %r21
175 STREG %r21, TASK_PT_GR21(%r1)
202 stw %r21, -56(%r30) /* 6th argument */
337 LDREG TASK_PT_GR21(%r1), %r21
342 stw %r21, -56(%r30) /* 6th argument */
418 - %r28 (return), %r21 (errno)
483 LDREGX %r20(%sr2,r28), %r21 /* Scratch use of r21 */
486 be,n 0(%sr2,%r21)
489 ldo -ENOSYS(%r0),%r21 /* set errno */
514 %r21 - Kernel error code
518 %r21 has the following meanings:
582 mfctl %cr27, %r21 /* Get current thread register */
583 cmpb,<>,n %r21, %r28, cas_lock /* Called recursive? */
585 ldo -EDEADLOCK(%r0), %r21
590 ldo -EAGAIN(%r0), %r21 /* Spin in userspace */
603 ldo -EAGAIN(%r0), %r21 /* Spin in userspace */
641 copy %r0, %r21
652 ldo -EFAULT(%r0),%r21 /* set errno */
675 %r21 - Kernel error code
677 %r21 has the following meanings:
770 ldo -EAGAIN(%r0), %r21 /* Spin in userspace */
852 copy %r0, %r21
861 ldo -EFAULT(%r0),%r21 /* set errno */
H A Dreal2.S258 ldd 5*REG_SZ(%arg1), %r21
H A Dentry.S1656 %r21 - %r22 non-standard syscall args
1843 LDREG TASK_PT_GR21(%r1),%r21
2097 bv %r0(%r25) /* r21 */
2098 copy %r21,%r1
2171 bv %r0(%r25) /* r21 */
2172 copy %r1,%r21
H A Dsignal.c532 * We need to be able to restore the syscall arguments (r21-r26) to
/linux-4.1.27/arch/parisc/include/asm/
H A Dchecksum.h50 " ldws 8(%1), %%r21\n" ip_fast_csum()
53 " addc %0, %%r21, %0\n" ip_fast_csum()
60 " extru %0, 15, 16, %%r21\n" ip_fast_csum()
61 " addc %%r20, %%r21, %0\n" ip_fast_csum()
62 " extru %0, 15, 16, %%r21\n" ip_fast_csum()
63 " add %0, %%r21, %0\n" ip_fast_csum()
68 : "r19", "r20", "r21", "memory"); ip_fast_csum()
144 " ldd,ma 8(%1), %%r21\n" /* 2cd saddr */ csum_ipv6_magic()
147 " add,dc %%r21, %0, %0\n" csum_ipv6_magic()
167 " ldw,ma 4(%1), %%r21\n" /* 2cd saddr */ csum_ipv6_magic()
170 " addc %%r21, %0, %0\n" csum_ipv6_magic()
175 " ldw,ma 4(%1), %%r21\n" /* 4th saddr */ csum_ipv6_magic()
178 " addc %%r21, %0, %0\n" csum_ipv6_magic()
185 : "r19", "r20", "r21", "r22", "memory"); csum_ipv6_magic()
H A Dunistd.h84 #define K_LOAD_ARGS_6(r26,r25,r24,r23,r22,r21) \
85 register unsigned long __r21 __asm__("r21") = (unsigned long)(r21); \
99 #define K_CLOB_ARGS_5 K_CLOB_ARGS_6, "%r21"
H A Dasmregs.h39 arg5: .reg r21
67 r21: .reg %r21
H A Dassembly.h201 STREG %r21, PT_GR21(\regs) variable
235 LDREG PT_GR21(\regs), %r21
/linux-4.1.27/arch/ia64/lib/
H A Dip_fast_csum.S43 (p7) ld4 r21=[r15],8
50 add r20=r20,r21
98 ld4 r21=[in1],4
108 add r16=r20,r21
H A Dmemcpy_mck.S41 #define src_pre_l2 r21
172 and r21=-8,tmp
178 add src0=src0,r21 // setting up src pointer
179 add dst0=dst0,r21 // setting up dest pointer
294 shr.u r21=in2,7 // this much cache line
299 cmp.lt p7,p8=1,r21
300 add cnt=-1,r21
362 (p6) or r21=r28,r27
379 * xxxxxx xx <----- r21 has xxxxxxxx already
392 EX(.ex_handler, (p6) st8 [dst1]=r21,8) // more than 8 byte to copy
512 shrp r21=r22,r38,shift; /* speculative work */ \
553 #define C r21
H A Dcopy_page.S28 #define src2 r21
H A Dclear_user.S30 #define len2 r21
H A Dcopy_page_mck.S87 #define t13 r21
H A Dmemcpy.S33 # define t3 r21
H A Dstrlen.S77 #define val r21
H A Dstrlen_user.S79 #define val r21
H A Dmemset.S36 #define bytecnt r21
H A Ddo_csum.S99 #define last r21
H A Dcopy_user.S61 #define saved_pr r21
/linux-4.1.27/tools/testing/selftests/powerpc/copyloops/asm/
H A Dppc_asm.h14 #define R21 r21
/linux-4.1.27/arch/microblaze/kernel/
H A Dprocess.c37 pr_info(" r21=%08lX, r22=%08lX, r23=%08lX, r24=%08lX\n", show_regs()
38 regs->r21, regs->r22, regs->r23, regs->r24); show_regs()
110 * r21 is the thread reg, r10 is 6th arg to clone copy_thread()
114 childregs->r21 = childregs->r10; copy_thread()
H A Dasm-offsets.c51 DEFINE(PT_R21, offsetof(struct pt_regs, r21)); main()
110 DEFINE(CC_R21, offsetof(struct cpu_context, r21)); main()
H A Dmcount.S37 swi r21, r1, 72; \
68 lwi r21, r1, 72; \
H A Dentry-nommu.S89 swi r21, r1, PT_R21
175 lwi r21, r1, PT_R21
243 swi r21, r1, PT_R21
334 swi r21, r1, PT_R21
408 swi r21, r11, CC_R21
454 lwi r21, r11, CC_R21
550 lwi r21, r1, PT_R21
H A Dsignal.c71 COPY(r18); COPY(r19); COPY(r20); COPY(r21); restore_sigcontext()
132 COPY(r18); COPY(r19); COPY(r20); COPY(r21); setup_sigcontext()
H A Dentry.S197 swi r21, r1, PT_R21; \
233 lwi r21, r1, PT_R21; \
893 swi r21, r11, CC_R21
932 lwi r21, r11, CC_R21
/linux-4.1.27/arch/tile/kernel/
H A Dintvec_32.S430 push_reg r21, r52
456 moveli r21, lo16(__per_cpu_offset)
459 auli r21, r21, ha16(__per_cpu_offset)
462 s2a r20, r20, r21
478 PTREGS_PTR(r21, PTREGS_OFFSET_FLAGS)
490 sw r21, r32
550 IRQ_DISABLE(r20, r21)
819 IRQ_DISABLE(r20,r21)
867 IRQ_DISABLE(r20, r21)
936 IRQ_DISABLE(r20,r21)
945 IRQ_ENABLE(r20, r21)
995 pop_reg_zero r21, r3, sp, PTREGS_OFFSET_EX1 - PTREGS_OFFSET_PC
998 mtspr SPR_EX_CONTEXT_K_0, r21
1054 { move r20, zero; move r21, zero }
1098 pop_reg r21
1204 IRQ_ENABLE(r20, r21)
1210 lw r21, r20
1211 addi r21, r21, 1
1213 sw r20, r21
1246 moveli r21, __NR_syscalls
1248 slt_u r21, TREG_SYSCALL_NR_NAME, r21
1252 bbns r21, .Linvalid_syscall
1606 auli r21, zero, ha16(atomic_locks)
1612 addli r21, r21, lo16(atomic_locks)
1621 mm ATOMIC_LOCK_REG_NAME, r25, r21, 2, (ATOMIC_HASH_SHIFT + 2) - 1
1653 lw r21, r0
1658 seq r22, r21, r1 /* See if cmpxchg matches. */
1659 and r25, r21, r1 /* If atomic_update, compute (*mem & mask) */
1669 seq r22, r24, r21 /* Are we storing the value we loaded? */
1682 move r0, r21
1690 move r0, r21
1709 tns r21, ATOMIC_LOCK_REG_NAME
1717 movei r21, 0
1725 bzt r21, .Ldo_cmpxchg\bitwidth
1748 tns r21, ATOMIC_LOCK_REG_NAME
1753 bzt r21, .Ldo_cmpxchg\bitwidth
1787 lw r21, r0
1793 seq r26, r21, r2
1816 move r0, r21
H A Dintvec_64.S398 * cache line 2: r14...r21
626 push_reg r21, r52
658 PTREGS_PTR(r21, PTREGS_OFFSET_FLAGS)
670 st r21, r32
689 IRQ_DISABLE(r20, r21)
697 moveli r21, hw2_last(__per_cpu_offset)
700 shl16insli r21, r21, hw1(__per_cpu_offset)
703 shl16insli r21, r21, hw0(__per_cpu_offset)
704 shl3add r20, r20, r21
723 moveli r21, hw2_last(intvec_feedback)
724 shl16insli r21, r21, hw1(intvec_feedback)
725 shl16insli r21, r21, hw0(intvec_feedback)
726 add r20, r20, r21
845 IRQ_DISABLE(r20,r21)
898 IRQ_DISABLE(r20, r21)
960 IRQ_DISABLE(r20,r21)
967 IRQ_ENABLE_LOAD(r20, r21)
970 IRQ_ENABLE_APPLY(r20, r21)
1022 pop_reg_zero r21, r27, sp, PTREGS_OFFSET_EX1 - PTREGS_OFFSET_CMPEXCH
1025 mtspr CMPEXCH_VALUE, r21
1028 pop_reg r21, sp, PTREGS_OFFSET_REG(31) - PTREGS_OFFSET_PC
1034 mtspr SPR_EX_CONTEXT_K_0, r21
1086 { move r21, zero; move r22, zero }
1112 pop_reg r21, sp, PTREGS_OFFSET_REG(13) - PTREGS_OFFSET_REG(21)
1134 /* r21 already restored above */
1213 IRQ_ENABLE(r20, r21)
1220 ld4s r21, r20
1222 addi r21, r21, 1
1226 st4 r20, r21
1267 moveli r21, __NR_syscalls
1278 cmpltu r21, TREG_SYSCALL_NR_NAME, r21
1282 blbc r21, .Linvalid_syscall
1350 cmpltu r21, TREG_SYSCALL_NR_NAME, r21
1354 blbc r21, .Linvalid_syscall
H A Dregs_32.S110 r16, r17, r18, r19, r20, r21, r22, r23, \
H A Dregs_64.S110 r16, r17, r18, r19, r20, r21, r22, r23, \
H A Dkgdb.c50 { "r21", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[21])},
/linux-4.1.27/arch/microblaze/lib/
H A Duaccess_old.S110 4: lwi r21, r6, 0x000C + offset; \
118 12: swi r21, r5, 0x000C + offset; \
198 swi r21, r1, 20
203 loop: /* r4, r19, r20, r21, r22, r23, r24, r25 are used for storing values */
221 lwi r21, r1, 20
241 lwi r21, r1, 20
/linux-4.1.27/arch/ia64/kernel/
H A Divt.S120 shl r21=r16,3 // shift bit 60 into sign bit
123 shr.u r22=r21,3
143 (p6) shr.u r21=r21,PGDIR_SHIFT+PAGE_SHIFT
144 (p7) shr.u r21=r21,PGDIR_SHIFT+PAGE_SHIFT-3
148 cmp.eq p7,p6=0,r21 // unused address bits all zeroes?
174 dep r21=r19,r20,3,(PAGE_SHIFT-3) // r21=pte_offset(pmd,addr)
176 (p7) ld8 r18=[r21] // read *pte
217 * r21 = equivalent of pte_offset(pmd, ifa)
223 ld8 r25=[r21] // read *pte again
341 MOV_FROM_IPSR(p0, r21)
346 shr.u r22=r16,61 // get the region number into r21
356 extr.u r23=r21,IA64_PSR_CPL0_BIT,2 // extract psr.cpl
381 MOV_FROM_IPSR(p0, r21)
386 shr.u r22=r16,61 // get the region number into r21
405 extr.u r23=r21,IA64_PSR_CPL0_BIT,2 // extract psr.cpl
417 dep r21=-1,r21,IA64_PSR_ED_BIT,1
420 MOV_TO_IPSR(p6, r21, r24)
451 * Clobbered: b0, r18, r19, r21, r22, psr.dt (cleared)
455 shl r21=r16,3 // shift bit 60 into sign bit
473 (p6) shr.u r21=r21,PGDIR_SHIFT+PAGE_SHIFT
474 (p7) shr.u r21=r21,PGDIR_SHIFT+PAGE_SHIFT-3
478 cmp.eq p7,p6=0,r21 // unused address bits all zeroes?
735 mov.m r21=ar.fpsr // M2 (12 cyc)
830 ld8 r21=[r17] // M cumulated utime
837 add r21=r21,r18 // A sum utime
840 st8 [r17]=r21 // M update utime
914 * - r21: saved ar.fpsr
1006 st8 [r16]=r21,PT(R8)-PT(AR_FPSR) // save ar.fpsr
1065 ld8 r21=[r17] // cumulated utime
1072 add r21=r21,r18 // sum utime
1075 st8 [r17]=r21 // update utime
H A Drelocate_kernel.S71 ld4 r21=[r17],4 // r21=ptce_stride[0]
90 add r18=r21,r18
282 st8 [in0]=r21, 8 // r21
H A Dentry.S181 adds r21=IA64_TASK_THREAD_KSP_OFFSET,in0
195 ld8 sp=[r21] // load kernel stack pointer of new task
290 mov r21=b0
304 st8 [r14]=r21,SW(B1)-SW(B0) // save b0
311 mov r21=ar.lc // I-unit
321 st8 [r15]=r21 // save ar.lc
349 mov r21=pr
352 st8 [r3]=r21 // save predicate registers
381 ld8 r21=[r2],16 // restore b0
416 mov b0=r21
671 * r21: user-level b0
716 (pKStk) ld4 r21=[r20] // r21 <- preempt_count
717 (pUStk) mov r21=0 // r21 <- 0
719 cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0)
781 MOV_FROM_PSR(pKStk, r22, r21) // M2 read PSR now that interrupts are disabled
784 ld8 r21=[r2],PT(AR_RNAT)-PT(B0) // M0|1 load b0
860 (pKStk) ld4 r21=[r20] // r21 <- preempt_count
861 (pUStk) mov r21=0 // r21 <- 0
863 cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0)
873 adds r21=PT(PR)+16,r12
876 lfetch [r21],PT(CR_IPSR)-PT(PR)
880 lfetch [r21]
909 ld8.fill r21=[r3],16
977 ld8 r21=[r17],16 // load b0
1138 mov b0=r21 // I0
H A Dfsys.S167 // r21 = address of mmio_ptr
201 add r21 = IA64_CLKSRC_MMIO_OFFSET,r20
218 ld8 r30 = [r21] // clocksource->mmio_ptr
281 mov r21 = r8
300 (p14) shr.u r21 = r2, 4
303 EX(.fail_efault, st8 [r23] = r21)
401 mov r21=ar.fpsr
428 * - r21: ar.fpsr
520 ld8 r21=[r17] // cumulated utime
527 add r21=r21,r18 // sum utime
530 st8 [r17]=r21 // update utime
H A Dminstate.h55 mov r21=ar.fpsr; /* M */ \
134 .mem.offset 8,0; st8.spill [r17]=r21,16; /* save ar.fpsr */ \
174 .mem.offset 8,0; st8.spill [r3]=r21,16; \
H A Dmca_asm.S69 ld4 r21=[r17],4 // r21=ptce_stride[0]
89 add r18=r21,r18
876 movl r21=PAGE_KERNEL // page properties
880 or r21=r20,r21 // construct PA | page properties
887 itr.d dtr[r20]=r21
1050 movl r21=PAGE_KERNEL // page properties
1053 or r21=r20,r21 // construct PA | page properties
1063 itr.d dtr[r20]=r21
H A Dprocess.c133 printk("r20 : %016lx r21 : %016lx r22 : %016lx\n", regs->r20, regs->r21, regs->r22); show_regs()
H A Dasm-offsets.c110 DEFINE(IA64_PT_REGS_R21_OFFSET, offsetof (struct pt_regs, r21)); foo()
H A Dgate.S340 mov r21=ar.fpsr // M2 (12 cyc)
H A Dhead.S373 ld8 r21=[r19],8;;
374 st8[r20]=r21,8
H A Dunaligned.c220 RPT(r20), RPT(r21), RPT(r22), RPT(r23),
H A Dmca.c938 copy_reg(&bank[21-16], ms->pmsa_nat_bits, &regs->r21, nat); finish_pt_regs()
H A Dunwind.c215 offsetof(struct pt_regs, r21),
/linux-4.1.27/arch/score/include/asm/
H A Dasmmacro.h46 sw r21, [r0, PT_R21] variable
143 lw r21, [r0, PT_R21] variable
/linux-4.1.27/arch/nios2/include/asm/
H A Dentry.h96 stw r21, SW_R21(sp) variable
110 ldw r21, SW_R21(sp) variable
H A Dptrace.h58 unsigned long r21; member in struct:switch_stack
H A Delf.h81 pr_reg[28] = sw->r21; \
/linux-4.1.27/arch/arc/include/asm/
H A Dunwind.h38 unsigned long r21; member in struct:arc700_regs
97 PTREGS_INFO(r21), \
H A Dptrace.h63 long r25, r24, r23, r22, r21, r20, r19, r18, r17, r16, r15, r14, r13; member in struct:callee_regs
H A Dentry.h125 PUSH r21
135 POP r21
/linux-4.1.27/arch/arc/kernel/
H A Dctx_sw.c39 "st.a r21, [sp, -4] \n\t" __switch_to()
95 "ld.ab r21, [sp, 4] \n\t" __switch_to()
/linux-4.1.27/arch/tile/lib/
H A Datomic_asm_32.S137 tns r21, ATOMIC_LOCK_REG_NAME
141 bzt r21, 1b /* branch if lock acquired */
155 tns r21, ATOMIC_LOCK_REG_NAME
159 bzt r21, 1b /* branch if lock acquired */
/linux-4.1.27/arch/microblaze/include/uapi/asm/
H A Dptrace.h38 microblaze_reg_t r21; member in struct:pt_regs
H A Delf.h112 _r->r20 = _r->r21 = _r->r22 = _r->r23 = \
/linux-4.1.27/arch/powerpc/boot/
H A Dppc_asm.h50 #define r21 21 macro
/linux-4.1.27/arch/powerpc/crypto/
H A Daes-spe-regs.h32 #define rW5 r21
H A Dsha1-spe-asm.S32 #define rW7 r21
70 evstdw r21,64(r1); \
83 evldw r21,64(r1); \
H A Dsha256-spe-asm.S41 #define rW7 r21
61 evstdw r21,64(r1); \
76 evldw r21,64(r1); \
H A Dmd5-asm.S35 #define rW12 r21
H A Daes-spe-modes.S98 evstdw r21,72(r1); \
112 evldw r21,72(r1); \
/linux-4.1.27/arch/hexagon/include/uapi/asm/
H A Duser.h34 unsigned long r21; member in struct:user_regs_struct
H A Dregisters.h149 unsigned long r21; member in struct:pt_regs::__anon1458::__anon1459
/linux-4.1.27/arch/alpha/include/uapi/asm/
H A Dptrace.h31 unsigned long r21; member in struct:pt_regs
/linux-4.1.27/arch/arc/include/uapi/asm/
H A Dptrace.h44 long r25, r24, r23, r22, r21, r20; member in struct:user_regs_struct::__anon140
/linux-4.1.27/tools/testing/selftests/powerpc/switch_endian/
H A Dswitch_endian_test.S47 addi r21, r15, 21
/linux-4.1.27/arch/powerpc/lib/
H A Dcopyuser_64.S477 std r21,-112(1)
485 21: ld r21,512(4)
499 33: std r21,520(3)
517 51: ld r21,528(4)
536 69: std r21,520(3)
565 ld r21,-112(1)
584 ld r21,-112(1)
H A Dcopyuser_power7.S77 ld r21,STK_REG(R21)(r1)
152 std r21,STK_REG(R21)(r1)
177 err2; ld r21,120(r4)
194 err2; std r21,120(r3)
207 ld r21,STK_REG(R21)(r1)
H A Dmemcpy_power7.S85 std r21,STK_REG(R21)(r1)
110 ld r21,120(r4)
127 std r21,120(r3)
140 ld r21,STK_REG(R21)(r1)
H A Dcrtsavres.S342 std r21,-88(r1)
399 ld r21,-88(r1)
/linux-4.1.27/tools/testing/selftests/powerpc/copyloops/
H A Dcopyuser_64.S477 std r21,-112(1)
485 21: ld r21,512(4)
499 33: std r21,520(3)
517 51: ld r21,528(4)
536 69: std r21,520(3)
565 ld r21,-112(1)
584 ld r21,-112(1)
H A Dcopyuser_power7.S77 ld r21,STK_REG(R21)(r1)
152 std r21,STK_REG(R21)(r1)
177 err2; ld r21,120(r4)
194 err2; std r21,120(r3)
207 ld r21,STK_REG(R21)(r1)
H A Dmemcpy_power7.S85 std r21,STK_REG(R21)(r1)
110 ld r21,120(r4)
127 std r21,120(r3)
140 ld r21,STK_REG(R21)(r1)
/linux-4.1.27/arch/powerpc/kernel/
H A Dswsusp_asm64.S103 SAVE_REGISTER(r21)
220 RESTORE_REGISTER(r21)
H A Dhead_44x.S73 * r21 will be loaded with the physical runtime address of _stext
76 0: mflr r21 /* Make it accessible */
77 addis r21,r21,(_stext - 0b)@ha
78 addi r21,r21,(_stext - 0b)@l /* Get our current runtime base */
88 rlwinm r6,r21,0,4,31 /* r6 = PHYS_START % 256M */
124 * r21 will contain the current offset of _stext
136 rlwinm r8,r21,0,4,31 /* r8 = (_stext & 0xfffffff) */
H A Dkgdb.c295 { "r21", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[21]) },
H A Dhead_8xx.S592 add r10, r10, r21 ;b 151f
/linux-4.1.27/arch/sh/mm/
H A DMakefile65 -ffixed-r20 -ffixed-r21 -ffixed-r22 -ffixed-r23 \
/linux-4.1.27/arch/tile/include/asm/
H A Dbarrier.h42 "r20", "r21", "r22", "r23", "r24", __mb_incoherent()
/linux-4.1.27/arch/nios2/kernel/
H A Dasm-offsets.c72 OFFSET(SW_R21, switch_stack, r21); main()
H A Dsignal.c72 err |= __get_user(sw->r21, &gregs[20]); rt_restore_ucontext()
154 err |= __put_user(sw->r21, &gregs[20]); rt_setup_ucontext()
H A Dkgdb.c54 { "r21", GDB_SIZEOF_REG, -1 },
H A Dinsnemu.S148 stw r21, 84(sp)
579 ldw r21, 84(sp)
/linux-4.1.27/arch/powerpc/kvm/
H A Dbooke_interrupts.S190 stw r21, VCPU_GPR(R21)(r4)
270 lwz r21, VCPU_GPR(R21)(r4)
308 stw r21, VCPU_GPR(R21)(r4)
328 lwz r21, HOST_NV_GPR(R21)(r1)
373 stw r21, HOST_NV_GPR(R21)(r1)
393 lwz r21, VCPU_GPR(R21)(r4)
H A Dbookehv_interrupts.S129 PPC_STL r21, VCPU_GPR(R21)(r4)
461 PPC_LL r21, VCPU_GPR(R21)(r4)
495 PPC_STL r21, VCPU_GPR(R21)(r4)
515 PPC_LL r21, HOST_NV_GPR(R21)(r1)
558 PPC_STL r21, HOST_NV_GPR(R21)(r1)
578 PPC_LL r21, VCPU_GPR(R21)(r4)
H A Dbook3s_interrupts.S49 PPC_LL r21, VCPU_GPR(R21)(vcpu); \
193 PPC_STL r21, VCPU_GPR(R21)(r7)
H A Dbook3s_hv_rmhandlers.S739 ld r21, VCPU_GPR(R21)(r4)
1314 std r21, VCPU_GPR(R21)(r9)
2127 std r21, VCPU_GPR(R21)(r3)
2238 ld r21, VCPU_GPR(R21)(r4)
/linux-4.1.27/arch/unicore32/include/asm/
H A Dthread_info.h52 __u32 r21; member in struct:cpu_context_save
/linux-4.1.27/arch/hexagon/kernel/
H A Dvm_events.c70 regs->r21, show_regs()
H A Dkgdb.c53 { "r21", GDB_SIZEOF_REG, offsetof(struct pt_regs, r21)},
/linux-4.1.27/arch/alpha/include/asm/
H A Da.out-core.h61 dump->regs[EF_A5] = pt->r21; aout_dump_thread()
/linux-4.1.27/arch/hexagon/include/asm/
H A Delf.h140 DEST.r21 = REGS->r21; \
H A Dprocessor.h121 unsigned long r21; member in struct:hexagon_switch_stack::__anon1415::__anon1416
/linux-4.1.27/drivers/media/dvb-frontends/
H A Dcx24113.c248 u8 r21 = (cx24113_readreg(state, 0x21) & 0xc0) | enable; cx24113_enable() local
250 r21 |= (1 << 1); cx24113_enable()
251 return cx24113_writereg(state, 0x21, r21); cx24113_enable()
/linux-4.1.27/arch/hexagon/lib/
H A Dmemcpy.S248 memd(sp+#16) = R21:20; /* save r20,r21 on stack */
537 r21:20 = memd(sp+#16); /* restore r20+r21 */
/linux-4.1.27/arch/tile/kernel/vdso/
H A Dvgettimeofday.c168 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", vdso_fallback_gettime()
/linux-4.1.27/arch/microblaze/include/asm/
H A Dthread_info.h44 __u32 r21; member in struct:cpu_context
/linux-4.1.27/arch/score/kernel/
H A Dentry.S348 sw r21, [\reg, THREAD_REG21];
364 lw r21, [\reg, THREAD_REG21];
/linux-4.1.27/arch/openrisc/kernel/
H A Dhead.S475 CLEAR_GPR(r21)
610 CLEAR_GPR(r21)
1393 l.mfspr r21,r0,SPR_ICCFGR
1394 l.andi r21,r21,SPR_ICCFGR_CBS
1395 l.srli r21,r21,7
1397 l.sll r14,r23,r21
H A Dentry.S77 l.lwz r21,PT_GPR21(r1) ;\
115 l.sw PT_GPR21(r1),r21 ;\
153 l.sw PT_GPR21(r1),r21 ;\
/linux-4.1.27/arch/sh/kernel/cpu/sh5/
H A Dentry.S742 st.q SP, FRAME_R(21), r21
1000 ld.q SP, FRAME_R(21), r21
1765 st.q r0, 0x0a8, r21
1968 movi LVBR_block_end, r21
1969 andi r21, -4, r21
1982 sub r21, r30, r30 /* r30 = actual size */
1992 bne r19, r21, tr1
/linux-4.1.27/arch/alpha/kernel/
H A Dsignal.c178 err |= __get_user(regs->r21, sc->sc_regs+21); restore_sigcontext()
313 err |= __put_user(regs->r21, sc->sc_regs+21); setup_sigcontext()
H A Dptrace.c87 PT_REG( r20), PT_REG( r21), PT_REG( r22), PT_REG( r23),
H A Dprocess.c318 dest[21] = pt->r21; dump_elf_thread()
H A Dtraps.c88 regs->r19, regs->r20, regs->r21); dik_show_regs()
672 printk("r19= %016lx r20= %016lx r21= %016lx\n", do_entUna()
767 R(r19), R(r20), R(r21), R(r22), R(r23), R(r24), R(r25), R(r26),
/linux-4.1.27/arch/unicore32/kernel/
H A Dprocess.c148 printk(KERN_DEFAULT "r23: %08lx r22: %08lx r21: %08lx r20: %08lx\n", __show_regs()
H A Dentry.S136 scno .req r21 @ syscall number
/linux-4.1.27/arch/ia64/include/uapi/asm/
H A Dptrace.h126 unsigned long r21; /* scratch */ member in struct:pt_regs
/linux-4.1.27/drivers/net/wireless/b43/
H A Dradio_2057.c131 r20, r21, r22, r23, r24, r25, r26, r27) \
153 .radio_txmix2g_tune_boost_pu_core1 = r21, \
H A Dradio_2055.c272 r12, r13, r14, r15, r16, r17, r18, r19, r20, r21) \
294 .radio_c2_tx_mxbgtrim = r21
H A Dradio_2056.c3040 r20, r21, r22, r23, r24, r25, r26, r27, r28, r29, \
3063 .radio_tx0_pada_boost_tune = r21, \
/linux-4.1.27/arch/powerpc/include/asm/
H A Dppc_asm.h590 #define r21 %r21 macro
/linux-4.1.27/arch/arm/mach-omap2/
H A Dmux34xx.c1176 _OMAP3_BALLENTRY(HSUSB0_CLK, "r21", NULL),
1524 _OMAP3_BALLENTRY(MCBSP2_DR, "r21", NULL),
1952 _OMAP3_BALLENTRY(MCBSP2_DR, "r21", NULL),
/linux-4.1.27/sound/soc/codecs/
H A Dcs42l52.c89 { CS42L52_MASTERB_VOL, 0x00 }, /* r21 Master B Volume */
H A Dcs42l56.c99 { 33, 0x00 }, /* r21 - ADCB Attenuator */
H A Dcs42l73.c77 { 33, 0x00 }, /* r21 - LO Right Analog Volume */
/linux-4.1.27/drivers/net/ethernet/tile/
H A Dtilepro.c334 "r20", "r21", "r22", "r23", "r24", __netio_fastio1()
/linux-4.1.27/arch/powerpc/xmon/
H A Dxmon.c2499 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",

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