Searched refs:r18 (Results 1 - 132 of 132) sorted by relevance

/linux-4.1.27/arch/sh/lib64/
H A Dudivsi3.S7 clobbered: r18,r19,r20,r21,r22,r25,tr0
19 ptabs r18,tr0
31 mulu.l r4,r21,r18
34 shlrd r18,r0,r18
35 mulu.l r18,r22,r20
45 add r18,r19,r18
55 add r18,r19,r18
58 add.l r18,r25,r0
H A Dsdivsi3.S8 /* clobbered: r1,r18,r19,r20,r21,r25,tr0 */
25 ptabs r18, tr0
31 muls.l r25, r21, r18 /* s2.58 */
34 sub r19, r18, r18
35 shari r18, 28, r18 /* some 22 bit inverse in s1.30 */
36 muls.l r18, r25, r0 /* s2.60 */
37 muls.l r18, r4, r25 /* s32.30 */
40 muls.l r19, r18, r19 /* s-16.74 */
42 shari r4, 14, r18 /* s19.-14 */
44 muls.l r19, r18, r19 /* s15.30 */
H A Dstrlen.S13 ptabs r18, tr4
H A Dudivdi3.S57 ptabs r18,tr0
106 ptabs r18,tr0
H A Dcopy_page.S40 ptabs r18, tr0
H A Dmemset.S29 ptabs r18, tr2
H A Dstrcpy.S26 ptabs r18,tr4
H A Dcopy_user_memcpy.S76 ptabs r18,tr1
210 ptabs r18,tr1
H A Dmemcpy.S61 ptabs r18,tr1
194 ptabs r18,tr1
/linux-4.1.27/arch/microblaze/lib/
H A Dumodsi3.S30 rsub r18, r5, r6
31 beqi r18, return_here
34 xor r18, r5, r6
35 bgeid r18, 16
39 rsub r18, r5, r6 /* microblazecmp */
40 bgti r18, return_here
46 addik r18, r0, 0x7fffffff
47 and r5, r5, r18
48 and r6, r6, r18
H A Dudivsi3.S30 rsub r18, r5, r6
31 beqid r18, return_here
35 xor r18, r5, r6
36 bgeid r18, 16
40 rsub r18, r6, r5 /* microblazecmp */
41 blti r18, return_here
/linux-4.1.27/arch/ia64/kernel/
H A Drelocate_kernel.S46 mov r18=ar.rnat
54 mov ar.rnat=r18
69 ld8 r18=[r2],(O(PTCE_COUNT)-O(PTCE_BASE));; // r18=ptce_base
85 ptc.e r18
87 add r18=r22,r18
90 add r18=r21,r18
99 mov r18=KERNEL_TR_PAGE_SHIFT<<2
101 ptr.i r16, r18
102 ptr.d r16, r18
109 mov r18=IA64_GRANULE_SHIFT<<2
111 ptr.i r16,r18
123 mov r18=IA64_GRANULE_SHIFT<<2
125 ptr.d r16,r18
152 and r18=r30, r16
158 ld8 r14=[r18], 8;;
270 st8 [in0]=r18, 8 // r18
H A Divt.S113 movl r18=PAGE_SHIFT
127 cmp.ne p8,p0=r18,r26
128 sub r27=r26,r18
130 (p8) dep r25=r18,r25,2,6
135 shr.u r18=r22,PGDIR_SHIFT // get bottom portion of pgd index bit
146 (p6) dep r17=r18,r19,3,(PAGE_SHIFT-3) // r17=pgd_offset for region 5
147 (p7) dep r17=r18,r17,3,(PAGE_SHIFT-6) // r17=pgd_offset for region[0-4]
152 shr.u r18=r22,PMD_SHIFT // shift pmd index into position
161 shr.u r18=r22,PMD_SHIFT // shift pmd index into position
165 dep r17=r18,r29,3,(PAGE_SHIFT-3) // r17=pmd_offset(pud,addr)
167 dep r17=r18,r17,3,(PAGE_SHIFT-3) // r17=pmd_offset(pgd,addr)
176 (p7) ld8 r18=[r21] // read *pte
179 (p7) tbit.z p6,p7=r18,_PAGE_P_BIT // page present bit cleared?
185 ITC_I_AND_D(p10, p11, r18, r24) // insert the instruction TLB entry and
221 * r18 = *pte
237 (p7) cmp.ne.or.andcm p6,p7=r25,r18 // did *pte change
264 1: ld8 r18=[r17] // read *pte
267 tbit.z p6,p0=r18,_PAGE_P_BIT // page present bit cleared?
270 ITC_I(p0, r18, r19)
282 cmp.ne p7,p0=r18,r19
308 1: ld8 r18=[r17] // read *pte
311 tbit.z p6,p0=r18,_PAGE_P_BIT // page present bit cleared?
314 ITC_D(p0, r18, r19)
326 cmp.ne p7,p0=r18,r19
358 shr.u r18=r16,57 // move address bit 61 to bit 4
360 andcm r18=0x10,r18 // bit 4=~address-bit(61)
364 or r19=r19,r18 // set bit 4 (uncached) if the access was to region 6
367 ITC_I(p0, r19, r18) // insert the TLB entry
422 ITC_D(p7, r19, r18) // insert the TLB entry
451 * Clobbered: b0, r18, r19, r21, r22, psr.dt (cleared)
456 MOV_FROM_ITIR(r18)
459 extr.u r18=r18,2,6 // get the faulting page size
462 add r22=-PAGE_SHIFT,r18 // adjustment for hugetlb address
463 add r18=PGDIR_SHIFT-PAGE_SHIFT,r18
466 shr.u r18=r16,r18
476 (p6) dep r17=r18,r19,3,(PAGE_SHIFT-3) // r17=pgd_offset for region 5
477 (p7) dep r17=r18,r17,3,(PAGE_SHIFT-6) // r17=pgd_offset for region[0-4]
480 shr.u r18=r22,PUD_SHIFT // shift pud index into position
482 shr.u r18=r22,PMD_SHIFT // shift pmd index into position
488 dep r17=r18,r17,3,(PAGE_SHIFT-3) // r17=p[u|m]d_offset(pgd,addr)
492 shr.u r18=r22,PMD_SHIFT // shift pmd index into position
495 dep r17=r18,r17,3,(PAGE_SHIFT-3) // r17=pmd_offset(pud,addr)
541 THASH(p0, r17, r16, r18) // compute virtual address of L3 PTE
547 1: ld8 r18=[r17]
548 ;; // avoid RAW on r18
549 mov ar.ccv=r18 // set compare value for cmpxchg
550 or r25=_PAGE_D|_PAGE_A,r18 // set the dirty and accessed bits
551 tbit.z p7,p6 = r18,_PAGE_P_BIT // Check present bit
556 (p6) cmp.eq p6,p7=r26,r18 // Only compare if page is present
558 ITC_D(p6, r25, r18) // install updated PTE
566 ld8 r18=[r17] // read PTE again
568 cmp.eq p6,p7=r18,r25 // is it same as the newly installed
575 1: ld8 r18=[r17]
576 ;; // avoid RAW on r18
577 or r18=_PAGE_D|_PAGE_A,r18 // set the dirty and accessed bits
580 st8 [r17]=r18 // store back updated PTE
581 ITC_D(p0, r18, r16) // install updated PTE
602 MOV_FROM_IIP(r18)
605 (p6) mov r16=r18 // if so, use cr.iip instead of cr.ifa
608 THASH(p0, r17, r16, r18) // compute virtual address of L3 PTE
613 1: ld8 r18=[r17]
615 mov ar.ccv=r18 // set compare value for cmpxchg
616 or r25=_PAGE_A,r18 // set the accessed bit
617 tbit.z p7,p6 = r18,_PAGE_P_BIT // Check present bit
622 (p6) cmp.eq p6,p7=r26,r18 // Only if page present
632 ld8 r18=[r17] // read PTE again
634 cmp.eq p6,p7=r18,r25 // is it same as the newly installed
641 1: ld8 r18=[r17]
643 or r18=_PAGE_A,r18 // set the accessed bit
646 st8 [r17]=r18 // store back updated PTE
647 ITC_I(p0, r18, r16) // install updated PTE
662 THASH(p0, r17, r16, r18) // compute virtual address of L3 PTE
668 1: ld8 r18=[r17]
669 ;; // avoid RAW on r18
670 mov ar.ccv=r18 // set compare value for cmpxchg
671 or r25=_PAGE_A,r18 // set the dirty bit
672 tbit.z p7,p6 = r18,_PAGE_P_BIT // Check present bit
677 (p6) cmp.eq p6,p7=r26,r18 // Only if page is present
686 ld8 r18=[r17] // read PTE again
688 cmp.eq p6,p7=r18,r25 // is it same as the newly installed
694 1: ld8 r18=[r17]
695 ;; // avoid RAW on r18
696 or r18=_PAGE_A,r18 // set the accessed bit
698 st8 [r17]=r18 // store back updated PTE
699 ITC_D(p0, r18, r16) // install updated PTE
732 mov r18=__IA64_BREAK_SYSCALL // A
750 cmp.eq p0,p7=r18,r17 // I0 is this a system call?
805 MOV_FROM_ITC(p0, p14, r30, r18) // M get cycle for accounting
812 mov r18=ar.bsp // M2 (12 cyc)
826 ld8 r18=[r16],TI_AC_STIME-TI_AC_STAMP // M get last stamp
831 sub r22=r19,r18 // A stime before leave
834 sub r18=r30,r19 // A elapsed time in user
837 add r21=r21,r18 // A sum utime
911 * - r18: saved bsp (after switching to kernel stack)
955 (pKStk) mov r18=r0 // make sure r18 isn't NaT
977 (pUStk) sub r18=r18,r22 // r18=RSE.ndirty*8
991 shl r18=r18,16 // compute ar.rsc to be used for "loadrs"
997 st8 [r16]=r18,PT(R12)-PT(LOADRS) // save ar.rsc value for "loadrs"
1061 ld8 r18=[r16],TI_AC_STIME-TI_AC_STAMP // time at last check in kernel
1066 sub r22=r19,r18 // stime before leave kernel
1069 sub r18=r20,r19 // elapsed time in user mode
1072 add r21=r21,r18 // sum utime
1200 and r18=0xf,r17 // r18 = cr.ipsr.code{3:0}
1203 cmp.ne.or p6,p0=IA64_ISR_CODE_LFETCH,r18
1207 MOV_TO_IPSR(p0, r16, r18)
1232 MOV_FROM_IIM(r18)
1235 shl r18=r18,43 // put sign bit in position (43=64-21)
1239 shr r18=r18,39 // sign extend (39=43-4)
1242 add r17=r17,r18 // now add the offset
H A Dminstate.h82 (pUStk) mov r18=ar.bsp; \
97 (pKStk) mov r18=r0; /* make sure r18 isn't NaT */ \
107 (pUStk) sub r18=r18,r22; /* r18=RSE.ndirty*8 */ \
115 shl r18=r18,16; /* compute ar.rsc to be used for "loadrs" */ \
126 st8 [r17]=r18,16; /* save ar.rsc value for "loadrs" */ \
170 .mem.offset 0,0; st8.spill [r2]=r18,16; \
175 mov r18=b6; \
207 st8 [r24]=r18,16; /* b6 */ \
215 (pUStk) extr.u r17=r18,3,6; \
216 (pUStk) sub r16=r18,r22; \
243 mov r18=ar.bsp; \
H A Dgate.S130 (p1) br.cond.spnt setup_rbs // yup -> (clobbers p8, r14-r16, and r18-r20)
170 (p1) br.cond.spnt restore_rbs // yup -> (clobbers r14-r18, f6 & f7)
203 mov r18=ar.bspstore
215 extr.u r20=r18,3,6
222 (p8) st8 [r18]=r19 // if bspstore points at RNaT slot, store RNaT there now
246 adds r18=(RNAT_OFF+SIGCONTEXT_OFF),sp
249 ld8 r16=[r18] // get new rnat
250 extr.u r18=r15,3,6 // r18 <- rse_slot_num(bsp0)
268 add r18=r18,r14 // r18 (delta) <- rse_slot_num(bsp0) - rse_num_regs(bspstore1,bsp1)
272 (p7) adds r18=-62,r18 // delta -= 62
274 setf.sig f6=r18
280 add r17=r17,r18
281 shr r18=r18,63
285 sub r17=r17,r18 // r17 = delta/63
332 shladd r18=r17,3,r14 // A
335 lfetch [r18] // M0|1
345 (p6) ld8 r18=[r18] // M0|1
349 (p6) tbit.z.unc p8,p0=r18,0 // I0 (dual-issues with "mov b7=r18"!)
353 (p6) mov b7=r18 // I0
H A Dmca_asm.S67 ld8 r18=[r2],(O(PTCE_COUNT)-O(PTCE_BASE));; // r18=ptce_base
84 ptc.e r18
86 add r18=r22,r18
89 add r18=r21,r18
100 mov r18=KERNEL_TR_PAGE_SHIFT<<2
102 ptr.i r16, r18
103 ptr.d r16, r18
113 mov r18=IA64_GRANULE_SHIFT<<2
115 ptr.i r16,r18
126 mov r18=IA64_GRANULE_SHIFT<<2
128 ptr.d r16,r18
152 ld8 r18=[r3] // Get processor state parameter on existing PALE_CHECK.
154 tbit.nz p6,p7=r18,60
160 movl r18=ia64_reload_tr;;
161 LOAD_PHYSICAL(p0,r18,ia64_reload_tr);;
162 mov b1=r18;;
168 mov r18=KERNEL_TR_PAGE_SHIFT<<2
171 mov cr.itir=r18
175 movl r18=PAGE_KERNEL
179 or r18=r17,r18
181 itr.i itr[r16]=r18
183 itr.d dtr[r16]=r18
191 ld8 r18=[r2] // load PAL PTE
202 itr.i itr[r20]=r18
212 add r18=r19,r16
219 mov cr.ifa=r18
224 mov r18 = 1
228 st8 [r2] =r18
442 // r18 processor state parameter
474 st8 [temp1]=r18 // proc_state_param
868 mov r18=IA64_GRANULE_SHIFT<<2 // for cr.itir.ps
870 ptr.d r15,r18
883 mov cr.itir=r18
1043 mov r18=IA64_GRANULE_SHIFT<<2 // for cr.itir.ps
1045 ptr.d r16,r18
1055 mov cr.itir=r18
H A Dhead.S237 mov r18=KERNEL_TR_PAGE_SHIFT<<2
240 mov cr.itir=r18
244 movl r18=PAGE_KERNEL
248 or r18=r2,r18
252 itr.i itr[r16]=r18
254 itr.d dtr[r16]=r18
322 dep r18=0,r3,0,12
324 or r18=r17,r18
337 itr.d dtr[r19]=r18
362 mov r18=PERCPU_PAGE_SIZE
365 add r19=r19,r18
371 shr.u r18=r18,3
375 adds r18=-1,r18;;
376 cmp4.lt p7,p6=0,r18
463 mov r18=0
466 1: mov r16=dbr[r18]
471 mov r17=ibr[r18]
472 add r18=1,r18
488 mov r18=-1
492 add r18=1,r18
494 mov dbr[r18]=r16
499 mov ibr[r18]=r17
949 mov r18=ar.rnat // save ar.rnat
954 mov ar.rnat=r18 // restore ar.rnat
991 movl r18=KERNEL_START
996 or r3=r3,r18
997 or r14=r14,r18
1000 mov r18=ar.rnat // save ar.rnat
1005 mov ar.rnat=r18 // restore ar.rnat
1126 movl r18=tlb_purge_done;;
1127 DATA_VA_TO_PA(r18);;
1128 mov b1=r18 // Return location
1129 movl r18=ia64_do_tlb_purge;;
1130 DATA_VA_TO_PA(r18);;
1131 mov b2=r18 // doing tlb_flush work
1147 RESTORE_REGION_REGS(r25, r17,r18,r19);;
H A Dentry.S285 mov.m r18=ar.fpsr // preserve fpsr
355 st8 [r14]=r18 // save fpsr
396 ld8 r18=[r14],16 // restore caller's unat
453 mov ar.unat=r18 // restore caller's unat
668 * r18: user-level b6
711 RSM_PSR_I(p0, r2, r18) // disable interrupts
721 RSM_PSR_I(pUStk, r2, r18)
730 adds r18=TI_FLAGS+IA64_TASK_SIZE,r13
732 (p6) ld4 r31=[r18] // load current_thread_info()->flags
739 adds r18=TI_FLAGS+IA64_TASK_SIZE,r13
741 (p6) ld4 r31=[r18] // load current_thread_info()->flags
747 ld8 r18=[r2],PT(R9)-PT(B6) // load b6
806 mov b6=r18 // I0 restore b6
813 shr.u r18=r19,16 // I0|1 get byte size of existing "dirty" partition
905 ld8.fill r18=[r2],16
947 (pUStk) mov r18=IA64_KR(CURRENT)// M2 (12 cycle read latency)
985 (pUStk) adds r3=TI_AC_LEAVE+IA64_TASK_SIZE,r18
987 (pUStk) adds r18=IA64_TASK_THREAD_ON_USTACK_OFFSET,r18
993 (pUStk) adds r18=IA64_TASK_THREAD_ON_USTACK_OFFSET,r18 // deferred
1007 (pUStk) st1 [r18]=r17 // restore current->thread.on_ustack
1008 shr.u r18=r19,16 // get byte size of existing "dirty" partition
1016 (pUStk) st1 [r18]=r17 // restore current->thread.on_ustack
1017 shr.u r18=r19,16 // get byte size of existing "dirty" partition
1034 sub r16=r16,r18 // krbs = old bsp - size of dirty partition
1038 add r18=64,r18 // don't force in0-in7 into memory...
1057 shr.u loc1=r18,9 // RNaTslots <= floor(dirtySize / (64*8))
1058 sub r17=r17,r18 // r17 = (physStackedSize + 8) - dirtySize
1139 (pLvSys)mov r18=r0 // A clear r18 for leave_syscall, no-op otherwise
H A Dfsys.S106 add r18=IA64_TASK_CLEAR_CHILD_TID_OFFSET,r16
120 (p6) st8 [r18]=r32
121 (p7) st8 [r18]=r17
125 mov r18=0 // i must not leak kernel bits...
164 // r18 = (not used)
355 shladd r18=r3,1,r17
357 ld2 r20=[r18] // r20 = cpu_to_node_map[cpu]
396 shladd r18=r17,3,r14
398 ld8 r18=[r18] // load normal (heavy-weight) syscall entry-point
427 * - r18: address of syscall entry point
504 mov b6=r18 // I0 copy syscall entry-point to b6 (7 cyc)
507 mov r18=ar.bsp // M2 save (kernel) ar.bsp (12 cyc)
516 ld8 r18=[r16],TI_AC_STIME-TI_AC_STAMP // time at last check in kernel
521 sub r22=r19,r18 // stime before leave kernel
524 sub r18=r30,r19 // elapsed time in user mode
527 add r21=r21,r18 // sum utime
H A Dprocess.c132 printk("r17 : %016lx r18 : %016lx r19 : %016lx\n", regs->r17, regs->r18, regs->r19); show_regs()
H A Dasm-offsets.c107 DEFINE(IA64_PT_REGS_R18_OFFSET, offsetof (struct pt_regs, r18)); foo()
H A Dunaligned.c219 RPT(r16), RPT(r17), RPT(r18), RPT(r19),
H A Dmca.c935 copy_reg(&bank[18-16], ms->pmsa_nat_bits, &regs->r18, nat); finish_pt_regs()
H A Dunwind.c212 offsetof(struct pt_regs, r18),
/linux-4.1.27/arch/unicore32/lib/
H A Dcopy_page.S29 mov r18, r1
33 ldm.w (r0 - r15), [r18]+
/linux-4.1.27/arch/ia64/hp/sim/boot/
H A Dboot_head.S119 add r18=8,r29 /* second index */
122 st8 [r18]=r0,16 /* clear remaining bits */
125 st8 [r18]=r0,16 /* clear remaining bits */
128 st8 [r18]=r0,16 /* clear remaining bits */
132 st8 [r18]=r0,16 /* clear remaining bits */
136 st8 [r18]=r0,16 /* clear remaining bits */
139 st8 [r18]=r0,16 /* clear remaining bits */
142 st8 [r18]=r0,16 /* clear remaining bits */
145 st8 [r18]=r0,16 /* clear remaining bits */
/linux-4.1.27/drivers/media/usb/dvb-usb-v2/
H A Dmxl111sf-gpio.c217 u8 r12, r15, r17, r18, r3D, r82, r84, r89; mxl111sf_config_pin_mux_modes() local
225 ret = mxl111sf_read_reg(state, 0x18, &r18); mxl111sf_config_pin_mux_modes()
252 r18 |= PIN_MUX_MPEG_PAR_EN_MASK; mxl111sf_config_pin_mux_modes()
254 r18 &= ~PIN_MUX_MPEG_SER_EN_MASK; mxl111sf_config_pin_mux_modes()
280 r18 &= ~PIN_MUX_MPEG_PAR_EN_MASK; mxl111sf_config_pin_mux_modes()
282 r18 |= PIN_MUX_MPEG_SER_EN_MASK; mxl111sf_config_pin_mux_modes()
308 r18 &= ~PIN_MUX_MPEG_PAR_EN_MASK; mxl111sf_config_pin_mux_modes()
310 r18 &= ~PIN_MUX_MPEG_SER_EN_MASK; mxl111sf_config_pin_mux_modes()
336 r18 &= ~PIN_MUX_MPEG_PAR_EN_MASK; mxl111sf_config_pin_mux_modes()
338 r18 |= PIN_MUX_MPEG_SER_EN_MASK; mxl111sf_config_pin_mux_modes()
364 r18 &= ~PIN_MUX_MPEG_PAR_EN_MASK; mxl111sf_config_pin_mux_modes()
366 r18 |= PIN_MUX_MPEG_SER_EN_MASK; mxl111sf_config_pin_mux_modes()
392 r18 &= ~PIN_MUX_MPEG_PAR_EN_MASK; mxl111sf_config_pin_mux_modes()
394 r18 |= PIN_MUX_MPEG_SER_EN_MASK; mxl111sf_config_pin_mux_modes()
420 r18 &= ~PIN_MUX_MPEG_PAR_EN_MASK; mxl111sf_config_pin_mux_modes()
422 r18 |= PIN_MUX_MPEG_SER_EN_MASK; mxl111sf_config_pin_mux_modes()
448 r18 |= PIN_MUX_MPEG_PAR_EN_MASK; mxl111sf_config_pin_mux_modes()
450 r18 &= ~PIN_MUX_MPEG_SER_EN_MASK; mxl111sf_config_pin_mux_modes()
476 r18 &= ~PIN_MUX_MPEG_PAR_EN_MASK; mxl111sf_config_pin_mux_modes()
478 r18 &= ~PIN_MUX_MPEG_SER_EN_MASK; mxl111sf_config_pin_mux_modes()
505 r18 &= ~PIN_MUX_MPEG_PAR_EN_MASK; mxl111sf_config_pin_mux_modes()
507 r18 &= ~PIN_MUX_MPEG_SER_EN_MASK; mxl111sf_config_pin_mux_modes()
534 ret = mxl111sf_write_reg(state, 0x18, r18); mxl111sf_config_pin_mux_modes()
/linux-4.1.27/tools/testing/selftests/powerpc/copyloops/asm/
H A Dppc_asm.h11 #define R18 r18
/linux-4.1.27/arch/microblaze/kernel/
H A Dentry-nommu.S86 swi r18, r1, PT_R18
178 lwi r18, r1, PT_R18
240 swi r18, r1, PT_R18
331 swi r18, r1, PT_R18
404 swi r18, r11, CC_R18
458 lwi r18, r11, CC_R18
527 lwi r18, r1, PT_MODE
528 swi r18, r0, PER_CPU(KM)
531 lwi r18, r1, PT_FSR
532 mts rfsr, r18
533 lwi r18, r1, PT_ESR
534 mts resr, r18
535 lwi r18, r1, PT_EAR
536 mts rear, r18
537 lwi r18, r1, PT_MSR
538 mts rmsr, r18
553 lwi r18, r1, PT_R18
H A Dasm-offsets.c48 DEFINE(PT_R18, offsetof(struct pt_regs, r18)); main()
106 DEFINE(CC_R18, offsetof(struct cpu_context, r18)); main()
H A Dmcount.S34 swi r18, r1, 60; \
65 lwi r18, r1, 60; \
H A Dprocess.c35 pr_info(" r17=%08lX, r18=%08lX, r19=%08lX, r20=%08lX\n", show_regs()
36 regs->r17, regs->r18, regs->r19, regs->r20); show_regs()
H A Dsignal.c71 COPY(r18); COPY(r19); COPY(r20); COPY(r21); restore_sigcontext()
132 COPY(r18); COPY(r19); COPY(r20); COPY(r21); setup_sigcontext()
H A Dentry.S194 swi r18, r1, PT_R18; /* Save asm scratch reg */ \
230 lwi r18, r1, PT_R18; /* restore asm scratch reg */ \
594 * Handle a signal return; Pending signals should be in r18.
702 /* Handle a signal return; Pending signals should be in r18. */
889 swi r18, r11, CC_R18
936 lwi r18, r11, CC_R18
H A Dhw_exception_handler.S232 * | r18 |
413 swi r18, r1, PT_R18
452 lwi r18, r1, PT_R18
/linux-4.1.27/arch/sh/kernel/cpu/sh5/
H A Dswitchto.S49 st.l r15, 0, r18 ! save link reg
126 ld.l r5, 4, r18 ! next->thread.pc
129 ptabs r18, tr0
189 ld.l r15, 0, r18
191 ptabs r18, tr0
H A Dentry.S266 st.q SP, SAVED_R18, r18
309 st.q SP, SAVED_R18, r18
318 gettr tr4, r18
323 st.q SP, TLB_SAVED_TR4 , r18
346 ld.q SP, TLB_SAVED_TR4, r18
352 ptabs r18, tr4
361 ld.q SP, SAVED_R18, r18
380 ld.q SP, TLB_SAVED_TR4, r18
389 ptabs/u r18, tr4
428 st.q SP, SAVED_R18, r18
561 st.q SP, SAVED_R18, r18
594 st.q SP, SAVED_R18, r18
609 getcon sr, r18
610 or r18, r6, r6
618 movi handle_exception, r18
619 ori r18, 1, r18 ! for safety (do we need this?)
620 putcon r18, spc
658 * (r18)
682 movi 1024, r18
683 add r6, r18, r6
694 movi THREAD_SIZE, r18
695 add r18, r6, r6
705 ld.q r5, SAVED_R3, r18
708 st.q SP, FRAME_R(3), r18
709 ld.q r5, SAVED_R5, r18
712 st.q SP, FRAME_R(5), r18
713 ld.q r5, SAVED_R18, r18
716 st.q SP, FRAME_R(18), r18
739 /* r18 is saved earlier. */
997 ld.q SP, FRAME_R(18), r18
1762 st.q r0, 0x090, r18
H A Dunwind.c28 * and in turn, the previous r14/r18 pair.
31 * the r14/r18 values. In the general case, this can be determined by poking
277 * possible that r18 is never saved out to the stack. sh64_unwind_inner()
313 __asm__ __volatile__ ("ori r18, 0, %0" : "=r" (regs->regs[18])); sh64_unwinder_dump()
/linux-4.1.27/arch/score/include/asm/
H A Dasmmacro.h43 sw r18, [r0, PT_R18] variable
140 lw r18, [r0, PT_R18] variable
/linux-4.1.27/arch/nios2/include/asm/
H A Dentry.h93 stw r18, SW_R18(sp) variable
107 ldw r18, SW_R18(sp) variable
H A Dptrace.h55 unsigned long r18; member in struct:switch_stack
H A Delf.h78 pr_reg[25] = sw->r18; \
/linux-4.1.27/arch/powerpc/crypto/
H A Dsha1-powerpc-asm.S158 lwz r18,8(r3)
166 add RC(0),RC(80),r18
H A Daes-spe-regs.h29 #define rW2 r18
H A Dsha1-spe-asm.S29 #define rW4 r18
67 evstdw r18,40(r1); \
80 evldw r18,40(r1); \
H A Dsha256-spe-asm.S38 #define rW4 r18
58 evstdw r18,40(r1); \
73 evldw r18,40(r1); \
H A Dmd5-asm.S32 #define rW09 r18
H A Daes-spe-modes.S95 evstdw r18,48(r1); \
109 evldw r18,48(r1); \
/linux-4.1.27/arch/ia64/lib/
H A Dip_fast_csum.S115 add r18=r24,r25
119 add r8=r8,r18
H A Dcopy_page.S25 #define saved_lc r18
H A Dclear_user.S27 #define saved_lc r18
H A Dcopy_page_mck.S76 #define t2 r18
H A Dmemcpy.S30 # define t0 r18
H A Dstrlen.S74 #define saved_pr r18
H A Dstrlen_user.S76 #define saved_pr r18
H A Ddo_csum.S96 #define first1 r18
H A Dcopy_user.S58 #define cnt r18
H A Dmemcpy_mck.S34 #define dst1 r18
/linux-4.1.27/arch/arc/include/asm/
H A Dunwind.h35 unsigned long r18; member in struct:arc700_regs
94 PTREGS_INFO(r18), \
H A Dptrace.h63 long r25, r24, r23, r22, r21, r20, r19, r18, r17, r16, r15, r14, r13; member in struct:callee_regs
H A Dentry.h122 PUSH r18
138 POP r18
/linux-4.1.27/arch/arc/kernel/
H A Dctx_sw.c36 "st.a r18, [sp, -4] \n\t" __switch_to()
98 "ld.ab r18, [sp, 4] \n\t" __switch_to()
/linux-4.1.27/arch/microblaze/include/uapi/asm/
H A Dptrace.h35 microblaze_reg_t r18; member in struct:pt_regs
H A Delf.h111 _r->r16 = _r->r17 = _r->r18 = _r->r19 = \
/linux-4.1.27/arch/powerpc/boot/
H A Dppc_asm.h47 #define r18 18 macro
/linux-4.1.27/arch/hexagon/include/uapi/asm/
H A Duser.h31 unsigned long r18; member in struct:user_regs_struct
H A Dregisters.h141 unsigned long r18; member in struct:pt_regs::__anon1456::__anon1457
/linux-4.1.27/arch/alpha/include/uapi/asm/
H A Dptrace.h50 unsigned long r18; member in struct:pt_regs
/linux-4.1.27/arch/arc/include/uapi/asm/
H A Dptrace.h45 long r19, r18, r17, r16, r15, r14, r13; member in struct:user_regs_struct::__anon140
/linux-4.1.27/tools/testing/selftests/powerpc/switch_endian/
H A Dswitch_endian_test.S44 addi r18, r15, 18
/linux-4.1.27/arch/tile/lib/
H A Dmemcpy_32.S297 EX: { lw r18, r1; addi r1, r1, 4 } /* r18 = WORD_8 */
310 EX: { lw r13, r1; addi r1, r1, 4; move zero, r18 } /* r13 = WORD_9 */
315 EX: { sw r0, r18; addi r0, r0, 4 } /* store(WORD_8) */
348 { bz r4, .Ldest_is_word_aligned; add r18, r1, r2 }
394 * - r18 points one byte past the end of source memory.
408 { prefetch r3; move r3, r8; slt_u r8, r8, r18 }
410 { prefetch r3; move r3, r8; slt_u r8, r8, r18 }
417 EX: { lw_na r15, r15; slt_u r8, r3, r18 }
/linux-4.1.27/arch/parisc/include/asm/
H A Dassembly.h198 STREG %r18, PT_GR18(\regs) variable
232 LDREG PT_GR18(\regs), %r18
362 std %r18, -24(%r30)
368 ldd -24(%r30), %r18
406 stw %r18, -68(%r30)
412 ldw -68(%r30), %r18
H A Dasmregs.h64 r18: .reg %r18
/linux-4.1.27/arch/sh/boot/compressed/
H A Dhead_64.S139 blink tr0, r18
155 blink tr0, r18
/linux-4.1.27/arch/powerpc/kernel/
H A Dswsusp_asm64.S100 SAVE_REGISTER(r18)
217 RESTORE_REGISTER(r18)
H A Dkgdb.c292 { "r18", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[18]) },
H A Dhead_8xx.S589 add r10, r10, r18 ;b 151f
/linux-4.1.27/arch/sh/mm/
H A DMakefile54 # r15, r18 : SP and LINK
/linux-4.1.27/arch/tile/include/asm/
H A Dbarrier.h41 "r15", "r16", "r17", "r18", "r19", __mb_incoherent()
/linux-4.1.27/arch/sh/include/cpu-sh5/cpu/
H A Dregisters.h59 #define LINK r18
/linux-4.1.27/arch/nios2/kernel/
H A Dasm-offsets.c69 OFFSET(SW_R18, switch_stack, r18); main()
H A Dsignal.c69 err |= __get_user(sw->r18, &gregs[17]); rt_restore_ucontext()
151 err |= __put_user(sw->r18, &gregs[17]); rt_setup_ucontext()
H A Dkgdb.c51 { "r18", GDB_SIZEOF_REG, -1 },
H A Dinsnemu.S145 stw r18, 72(sp)
576 ldw r18, 72(sp)
/linux-4.1.27/arch/ia64/sn/kernel/sn2/
H A Dptc_deadlock.S33 mask = r18
/linux-4.1.27/arch/powerpc/kvm/
H A Dbooke_interrupts.S187 stw r18, VCPU_GPR(R18)(r4)
267 lwz r18, VCPU_GPR(R18)(r4)
305 stw r18, VCPU_GPR(R18)(r4)
325 lwz r18, HOST_NV_GPR(R18)(r1)
370 stw r18, HOST_NV_GPR(R18)(r1)
390 lwz r18, VCPU_GPR(R18)(r4)
H A Dbookehv_interrupts.S126 PPC_STL r18, VCPU_GPR(R18)(r4)
458 PPC_LL r18, VCPU_GPR(R18)(r4)
492 PPC_STL r18, VCPU_GPR(R18)(r4)
512 PPC_LL r18, HOST_NV_GPR(R18)(r1)
555 PPC_STL r18, HOST_NV_GPR(R18)(r1)
575 PPC_LL r18, VCPU_GPR(R18)(r4)
H A Dbook3s_interrupts.S46 PPC_LL r18, VCPU_GPR(R18)(vcpu); \
190 PPC_STL r18, VCPU_GPR(R18)(r7)
H A Dbook3s_hv_rmhandlers.S736 ld r18, VCPU_GPR(R18)(r4)
1311 std r18, VCPU_GPR(R18)(r9)
2124 std r18, VCPU_GPR(R18)(r3)
2235 ld r18, VCPU_GPR(R18)(r4)
/linux-4.1.27/arch/unicore32/include/asm/
H A Dthread_info.h49 __u32 r18; member in struct:cpu_context_save
/linux-4.1.27/arch/hexagon/kernel/
H A Dvm_events.c67 regs->r18, show_regs()
H A Dkgdb.c50 { "r18", GDB_SIZEOF_REG, offsetof(struct pt_regs, r18)},
/linux-4.1.27/arch/alpha/include/asm/
H A Da.out-core.h75 dump->regs[EF_A2] = pt->r18; aout_dump_thread()
/linux-4.1.27/arch/alpha/kernel/
H A Dsignal.c175 err |= __get_user(regs->r18, sc->sc_regs+18); restore_sigcontext()
310 err |= __put_user(regs->r18, sc->sc_regs+18); setup_sigcontext()
372 regs->r18 = (unsigned long) &frame->sc; /* a2: sigcontext pointer */ setup_frame()
426 regs->r18 = (unsigned long) &frame->uc; /* a2: ucontext pointer */ setup_rt_frame()
H A Dptrace.c86 PT_REG( r16), PT_REG( r17), PT_REG( r18), PT_REG( r19),
324 audit_syscall_entry(regs->r0, regs->r16, regs->r17, regs->r18, regs->r19); syscall_trace_enter()
H A Dprocess.c315 dest[18] = pt->r18; dump_elf_thread()
H A Dtraps.c86 regs->r16, regs->r17, regs->r18); dik_show_regs()
670 printk("r16= %016lx r17= %016lx r18= %016lx\n", do_entUna()
766 R(r16), R(r17), R(r18),
/linux-4.1.27/arch/openrisc/kernel/
H A Dentry.S74 l.lwz r18,PT_GPR18(r1) ;\
112 l.sw PT_GPR18(r1),r18 ;\
150 l.sw PT_GPR18(r1),r18 ;\
658 l.sw PT_GPR18(r1),r18
935 l.lwz r18,PT_GPR18(r1)
1000 l.sw PT_GPR18(r1),r18
1043 l.lwz r18,PT_GPR18(r1)
1083 l.sw PT_GPR18(r1),r18
H A Dhead.S472 CLEAR_GPR(r18)
607 CLEAR_GPR(r18)
/linux-4.1.27/arch/hexagon/include/asm/
H A Delf.h137 DEST.r18 = REGS->r18; \
H A Dprocessor.h113 unsigned long r18; member in struct:hexagon_switch_stack::__anon1413::__anon1414
/linux-4.1.27/arch/powerpc/lib/
H A Dcopyuser_power7.S80 ld r18,STK_REG(R18)(r1)
149 std r18,STK_REG(R18)(r1)
174 err2; ld r18,96(r4)
191 err2; std r18,96(r3)
204 ld r18,STK_REG(R18)(r1)
H A Dmemcpy_power7.S82 std r18,STK_REG(R18)(r1)
107 ld r18,96(r4)
124 std r18,96(r3)
137 ld r18,STK_REG(R18)(r1)
H A Dcrtsavres.S333 std r18,-112(r1)
390 ld r18,-112(r1)
/linux-4.1.27/tools/testing/selftests/powerpc/copyloops/
H A Dcopyuser_power7.S80 ld r18,STK_REG(R18)(r1)
149 std r18,STK_REG(R18)(r1)
174 err2; ld r18,96(r4)
191 err2; std r18,96(r3)
204 ld r18,STK_REG(R18)(r1)
H A Dmemcpy_power7.S82 std r18,STK_REG(R18)(r1)
107 ld r18,96(r4)
124 std r18,96(r3)
137 ld r18,STK_REG(R18)(r1)
/linux-4.1.27/arch/tile/kernel/
H A Dregs_32.S110 r16, r17, r18, r19, r20, r21, r22, r23, \
H A Dregs_64.S110 r16, r17, r18, r19, r20, r21, r22, r23, \
H A Dkgdb.c47 { "r18", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[18])},
H A Dintvec_32.S433 push_reg r18, r52
1053 { move r18, zero; move r19, zero }
1095 pop_reg r18
H A Dintvec_64.S629 push_reg r18, r52
1084 { move r17, zero; move r18, zero }
1131 pop_reg r18
/linux-4.1.27/arch/tile/kernel/vdso/
H A Dvgettimeofday.c168 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", vdso_fallback_gettime()
/linux-4.1.27/arch/microblaze/include/asm/
H A Dthread_info.h40 __u32 r18; member in struct:cpu_context
/linux-4.1.27/arch/score/kernel/
H A Dentry.S345 sw r18, [\reg, THREAD_REG18];
361 lw r18, [\reg, THREAD_REG18];
/linux-4.1.27/arch/parisc/kernel/
H A Dptrace.c134 FIXME. There is a problem at the moment in that r3-r18 are only arch_ptrace()
225 FIXME. There is a problem at the moment in that r3-r18 are only compat_arch_ptrace()
H A Dentry.S1654 %r3 - %r18 preserved by C code (saved by signal code)
1688 STREG %r18,PT_GR18(\regs)
1707 LDREG PT_GR18(\regs),%r18
1923 * We could make this more efficient by not saving r3-r18, but
1930 reg_save %r25 /* Save r3 to r18 */
2091 bv %r0(%r25) /* r18 */
2092 copy %r18,%r1
2165 bv %r0(%r25) /* r18 */
2166 copy %r1,%r18
H A Dsyscall.S312 STREG %r18,PT_GR18(%r2)
428 - %r3-%r18
/linux-4.1.27/drivers/net/wireless/b43/
H A Dradio_2059.c36 r10, r11, r12, r13, r14, r15, r16, r17, r18, r19, \
56 .radio_rxtx6e = r18, \
H A Dradio_2057.c130 r10, r11, r12, r13, r14, r15, r16, r17, r18, r19, \
150 .radio_pad5g_tune_misc_pus_core0 = r18, \
H A Dradio_2055.c272 r12, r13, r14, r15, r16, r17, r18, r19, r20, r21) \
291 .radio_c2_lgbuf_gtune = r18, \
H A Dradio_2056.c3039 r10, r11, r12, r13, r14, r15, r16, r17, r18, r19, \
3060 .radio_rx0_lnag_tune = r18, \
/linux-4.1.27/arch/unicore32/kernel/
H A Dprocess.c151 printk(KERN_DEFAULT "r19: %08lx r18: %08lx r17: %08lx r16: %08lx\n", __show_regs()
H A Dentry.S142 * Interrupt handling. Preserves r17, r18, r19
/linux-4.1.27/arch/ia64/include/uapi/asm/
H A Dptrace.h123 unsigned long r18; /* scratch */ member in struct:pt_regs
/linux-4.1.27/arch/powerpc/include/asm/
H A Dppc_asm.h587 #define r18 %r18 macro
/linux-4.1.27/arch/sh/kernel/
H A Dhead_64.S130 * . reflect as much as possible SH5 ABI (r15, r26, r27, r18)
/linux-4.1.27/sound/soc/codecs/
H A Dcs42l52.c80 { CS42L52_ADCA_MIXER_VOL, 0x80 }, /* r18 ADCA Mixer Volume */
H A Dcs42l56.c90 { 24, 0x88 }, /* r18 - Tone Ctl */
H A Dcs42l73.c68 { 24, 0x00 }, /* r18 - Input Path B Digital Volume */
/linux-4.1.27/drivers/net/ethernet/tile/
H A Dtilepro.c333 "r15", "r16", "r17", "r18", "r19", __netio_fastio1()
/linux-4.1.27/arch/powerpc/xmon/
H A Dxmon.c2499 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
/linux-4.1.27/arch/arm/mach-omap2/
H A Dmux34xx.c854 _OMAP3_BALLENTRY(MCBSP2_CLKX, "r18", NULL),

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