Searched refs:quartz (Results 1 - 15 of 15) sorted by relevance

/linux-4.1.27/arch/mips/include/asm/
H A Dmc146818-time.h77 * battery and quartz) will not reset the oscillator and will not mc146818_set_rtc_mmss()
/linux-4.1.27/arch/powerpc/platforms/chrp/
H A Dtime.c117 * battery and quartz) will not reset the oscillator and will not chrp_set_rtc_time()
/linux-4.1.27/arch/powerpc/platforms/maple/
H A Dtime.c122 * battery and quartz) will not reset the oscillator and will not maple_set_rtc_time()
/linux-4.1.27/arch/mn10300/kernel/
H A Drtc.c100 * battery and quartz) will not reset the oscillator and will not set_rtc_mmss()
/linux-4.1.27/drivers/media/dvb-frontends/
H A Dstv0900_core.c310 intp->quartz); stv0900_set_mclk()
313 m_div = ((clk_sel * mclk) / intp->quartz) - 1; stv0900_set_mclk()
316 intp->quartz); stv0900_set_mclk()
1403 intp->quartz = p_init->dmd_ref_clk; stv0900_init_internal()
1504 intp->mclk = stv0900_get_mclk_freq(intp, intp->quartz); stv0900_init_internal()
1545 bitrate = (stv0900_get_mclk_freq(intp, intp->quartz)/1000000) stv0900_status()
H A Dstv0900_priv.h302 s32 quartz; member in struct:stv0900_internal
/linux-4.1.27/drivers/net/wan/
H A Ddscc4.c33 * *first two* ports provided you put a quartz and a line driver on it and
116 static int quartz; variable
134 module_param(quartz, int, 0);
135 MODULE_PARM_DESC(quartz,"If present, on-board quartz frequency (Hz)");
954 ret = dscc4_set_quartz(root, quartz); dscc4_found1()
1222 * A quartz must be available (on pin XTAL1). Modes 6b/7b are used. Choosing
2032 int *args[] = { &debug, &quartz, NULL }, **p = args; dscc4_setup()
/linux-4.1.27/arch/alpha/kernel/
H A Drtc.c183 * battery and quartz) will not reset the oscillator and will not alpha_rtc_set_mmss()
/linux-4.1.27/include/sound/
H A Dvx_core.h361 VX_CLOCK_MODE_INTERNAL, /* fixed to internal quartz */
/linux-4.1.27/kernel/time/
H A Dntp.c634 * if the quartz is off by more than 10% then ntp_validate_timex()
/linux-4.1.27/drivers/media/i2c/
H A Ds5k4ecgx.c1034 MODULE_AUTHOR("Seok-Young Jang <quartz.jang@samsung.com>");
/linux-4.1.27/sound/pci/pcxhr/
H A Dpcxhr.c257 case PCXHR_CLOCK_TYPE_INTERNAL : /* clock by quartz or pll */ pcxhr_get_clock_reg()
/linux-4.1.27/sound/pci/
H A Drme32.c160 #define RME32_RCR_KMODE (1 << 30) /* card mode: 1=PLL, 0=quartz */
/linux-4.1.27/drivers/isdn/hardware/mISDN/
H A Dhfcmulti.c1004 hc->e1_resync |= 4; /* switch quartz */ hfcmulti_resync()
2427 /* set jatt to quartz */ handle_timer_irq()
/linux-4.1.27/drivers/tty/serial/8250/
H A D8250_pci.c450 * 16954 quad UART PCI chip clocked by 18.432 MHz quartz.

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