Home
last modified time | relevance | path

Searched refs:postdiv (Results 1 – 12 of 12) sorted by relevance

/linux-4.1.27/arch/mips/ar7/
Dclock.c85 u32 postdiv; member
112 int *postdiv, int *mul) in approximate() argument
123 *postdiv = k; in approximate()
128 static void calculate(int base, int target, int *prediv, int *postdiv, in calculate() argument
137 *postdiv = tmp_base / tmp_gcd; in calculate()
140 if ((*postdiv > 0) & (*postdiv <= 32)) in calculate()
144 if (base / *prediv * *mul / *postdiv != target) { in calculate()
145 approximate(base, target, prediv, postdiv, mul); in calculate()
146 tmp_freq = base / *prediv * *mul / *postdiv; in calculate()
153 *prediv, *postdiv, *mul); in calculate()
[all …]
/linux-4.1.27/arch/mips/ath79/
Dclock.c243 u32 pll, out_div, ref_div, nint, nfrac, frac, clk_ctrl, postdiv; in ar934x_clocks_init() local
312 postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT) & in ar934x_clocks_init()
318 cpu_rate = cpu_pll / (postdiv + 1); in ar934x_clocks_init()
320 cpu_rate = ddr_pll / (postdiv + 1); in ar934x_clocks_init()
322 postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_SHIFT) & in ar934x_clocks_init()
328 ddr_rate = ddr_pll / (postdiv + 1); in ar934x_clocks_init()
330 ddr_rate = cpu_pll / (postdiv + 1); in ar934x_clocks_init()
332 postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_SHIFT) & in ar934x_clocks_init()
338 ahb_rate = ddr_pll / (postdiv + 1); in ar934x_clocks_init()
340 ahb_rate = cpu_pll / (postdiv + 1); in ar934x_clocks_init()
[all …]
/linux-4.1.27/drivers/clk/keystone/
Dpll.c65 u32 postdiv; member
86 u32 mult = 0, prediv, postdiv, val; in clk_pllclk_recalc() local
105 postdiv = ((val & pll_data->clkod_mask) >> in clk_pllclk_recalc()
108 postdiv = readl(pll_data->pllod); in clk_pllclk_recalc()
109 postdiv = ((postdiv & pll_data->clkod_mask) >> in clk_pllclk_recalc()
112 postdiv = pll_data->postdiv; in clk_pllclk_recalc()
116 rate /= postdiv; in clk_pllclk_recalc()
177 if (of_property_read_u32(node, "fixed-postdiv", &pll_data->postdiv)) { in _of_pll_clk_init()
/linux-4.1.27/arch/arm/mach-davinci/
Dclock.c410 u32 ctrl, mult = 1, prediv = 1, postdiv = 1; in clk_pllclk_recalc() local
441 postdiv = __raw_readl(pll->base + POSTDIV); in clk_pllclk_recalc()
442 if (postdiv & PLLDIV_EN) in clk_pllclk_recalc()
443 postdiv = (postdiv & pll->div_ratio_mask) + 1; in clk_pllclk_recalc()
445 postdiv = 1; in clk_pllclk_recalc()
451 rate /= postdiv; in clk_pllclk_recalc()
462 if (postdiv > 1) in clk_pllclk_recalc()
463 pr_debug("/ %d ", postdiv); in clk_pllclk_recalc()
480 unsigned int mult, unsigned int postdiv) in davinci_set_pllrate() argument
500 if (postdiv) in davinci_set_pllrate()
[all …]
Dda850.c947 unsigned int postdiv; member
956 .postdiv = 1,
965 .postdiv = 1,
974 .postdiv = 1,
983 .postdiv = 2,
992 .postdiv = 3,
1001 .postdiv = 5,
1125 unsigned int prediv, mult, postdiv; in da850_set_pll0rate() local
1133 postdiv = opp->postdiv; in da850_set_pll0rate()
1135 ret = davinci_set_pllrate(pll, prediv, mult, postdiv); in da850_set_pll0rate()
Dclock.h129 unsigned int mult, unsigned int postdiv);
/linux-4.1.27/arch/c6x/platforms/
Dpll.c271 u32 ctrl, mult = 0, prediv = 0, postdiv = 0; in clk_pllclk_recalc() local
299 postdiv = pll_read(pll, PLLPOST); in clk_pllclk_recalc()
300 if (postdiv & PLLDIV_EN) in clk_pllclk_recalc()
301 postdiv = (postdiv & PLLDIV_RATIO_MASK) + 1; in clk_pllclk_recalc()
303 postdiv = 1; in clk_pllclk_recalc()
311 if (postdiv) in clk_pllclk_recalc()
312 rate /= postdiv; in clk_pllclk_recalc()
317 prediv, mult, postdiv, rate / 1000000); in clk_pllclk_recalc()
/linux-4.1.27/Documentation/devicetree/bindings/clock/
Dkeystone-pll.txt20 - fixed-postdiv : fixed post divider value. If absent, use clkod register bits
21 for postdiv
30 fixed-postdiv = <2>;
/linux-4.1.27/drivers/video/fbdev/
Dgxt4500.c237 int m, n, pdiv1, pdiv2, postdiv; in calc_pll() local
247 postdiv = pdiv1 * pdiv2; in calc_pll()
248 pll_period = DIV_ROUND_UP(period_ps, postdiv); in calc_pll()
256 n = intf * postdiv / period_ps; in calc_pll()
259 t = par->refclk_ps * m * postdiv / n; in calc_pll()
/linux-4.1.27/drivers/clk/
Dclk-axm5516.c55 unsigned long rate, fbdiv, refdiv, postdiv; in axxia_pllclk_recalc() local
59 postdiv = ((control >> 0) & 0xf) + 1; in axxia_pllclk_recalc()
62 rate = (parent_rate / (refdiv * postdiv)) * fbdiv; in axxia_pllclk_recalc()
/linux-4.1.27/drivers/media/i2c/
Dov2659.c913 u32 prediv, postdiv, mult; in ov2659_pll_calc_params() local
919 postdiv = ctrl1[i].div; in ov2659_pll_calc_params()
926 actual /= postdiv; in ov2659_pll_calc_params()
934 s_postdiv = postdiv; in ov2659_pll_calc_params()
/linux-4.1.27/drivers/gpu/drm/radeon/
Drv770_dpm.c343 static int rv770_encode_yclk_post_div(u32 postdiv, u32 *encoded_postdiv) in rv770_encode_yclk_post_div() argument
347 switch (postdiv) { in rv770_encode_yclk_post_div()