243 	u32 pll, out_div, ref_div, nint, nfrac, frac, clk_ctrl, postdiv;  in ar934x_clocks_init()  local
312 	postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT) &  in ar934x_clocks_init()
318 		cpu_rate = cpu_pll / (postdiv + 1);  in ar934x_clocks_init()
320 		cpu_rate = ddr_pll / (postdiv + 1);  in ar934x_clocks_init()
322 	postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_SHIFT) &  in ar934x_clocks_init()
328 		ddr_rate = ddr_pll / (postdiv + 1);  in ar934x_clocks_init()
330 		ddr_rate = cpu_pll / (postdiv + 1);  in ar934x_clocks_init()
332 	postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_SHIFT) &  in ar934x_clocks_init()
338 		ahb_rate = ddr_pll / (postdiv + 1);  in ar934x_clocks_init()
340 		ahb_rate = cpu_pll / (postdiv + 1);  in ar934x_clocks_init()
359 	u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv;  in qca955x_clocks_init()  local
399 	postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) &  in qca955x_clocks_init()
405 		cpu_rate = ddr_pll / (postdiv + 1);  in qca955x_clocks_init()
407 		cpu_rate = cpu_pll / (postdiv + 1);  in qca955x_clocks_init()
409 	postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) &  in qca955x_clocks_init()
415 		ddr_rate = cpu_pll / (postdiv + 1);  in qca955x_clocks_init()
417 		ddr_rate = ddr_pll / (postdiv + 1);  in qca955x_clocks_init()
419 	postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) &  in qca955x_clocks_init()
425 		ahb_rate = ddr_pll / (postdiv + 1);  in qca955x_clocks_init()
427 		ahb_rate = cpu_pll / (postdiv + 1);  in qca955x_clocks_init()