Searched refs:mmcra (Results 1 - 13 of 13) sorted by relevance

/linux-4.1.27/arch/powerpc/oprofile/
H A Dop_model_power4.c3 * Added mmcra[slot] support:
104 * mmcr1 and mmcra values passed from the user in the power4_reg_setup()
109 mmcra_val = sys->mmcra; power4_reg_setup()
176 unsigned long mmcra = mmcra_val; power4_cpu_setup() local
191 mmcra |= MMCRA_SAMPLE_ENABLE; power4_cpu_setup()
192 mtspr(SPRN_MMCRA, mmcra); power4_cpu_setup()
198 dbg("setup on cpu %d, mmcra %lx\n", smp_processor_id(), power4_cpu_setup()
277 * mmcra[slot] bits represent the slot number of a sampled instruction
284 unsigned long mmcra; get_pc() local
291 mmcra = mfspr(SPRN_MMCRA); get_pc()
293 if (use_slot_nums && (mmcra & MMCRA_SAMPLE_ENABLE)) { get_pc()
294 slot = ((mmcra & MMCRA_SLOT) >> MMCRA_SLOT_SHIFT); get_pc()
301 (mmcra & cur_cpu_spec->oprofile_mmcra_sihv)) get_pc()
306 if (mmcra & cur_cpu_spec->oprofile_mmcra_sipr) get_pc()
328 static int get_kernel(unsigned long pc, unsigned long mmcra) get_kernel() argument
335 is_kernel = ((mmcra & cur_cpu_spec->oprofile_mmcra_sipr) == 0); get_kernel()
371 unsigned long mmcra; power4_handle_interrupt() local
374 mmcra = mfspr(SPRN_MMCRA); power4_handle_interrupt()
377 is_kernel = get_kernel(pc, mmcra); power4_handle_interrupt()
383 if ((mmcra & MMCRA_SIAR_VALID_MASK) == MMCRA_SIAR_VALID_MASK) power4_handle_interrupt()
424 mmcra &= ~cur_cpu_spec->oprofile_mmcra_clear; power4_handle_interrupt()
425 mtspr(SPRN_MMCRA, mmcra); power4_handle_interrupt()
H A Dcommon.c128 * There is one mmcr0, mmcr1 and mmcra for setting the events for op_powerpc_create_files()
133 oprofilefs_create_ulong(root, "mmcra", &sys.mmcra); op_powerpc_create_files()
/linux-4.1.27/arch/powerpc/perf/
H A Dpower8-pmu.c405 unsigned long mmcra, mmcr1, mmcr2, unit, combine, psel, cache, val; power8_compute_mmcr() local
419 mmcra = MMCRA_SDAR_MODE_TLB; power8_compute_mmcr()
452 mmcra |= MMCRA_SAMPLE_ENABLE; power8_compute_mmcr()
456 mmcra |= (val & 3) << MMCRA_SAMP_MODE_SHIFT; power8_compute_mmcr()
457 mmcra |= (val >> 2) << MMCRA_SAMP_ELIG_SHIFT; power8_compute_mmcr()
470 mmcra |= val << MMCRA_THR_CTL_SHIFT; power8_compute_mmcr()
472 mmcra |= val << MMCRA_THR_SEL_SHIFT; power8_compute_mmcr()
474 mmcra |= val << MMCRA_THR_CMP_SHIFT; power8_compute_mmcr()
479 mmcra |= val << MMCRA_IFM_SHIFT; power8_compute_mmcr()
513 mmcr[2] = mmcra; power8_compute_mmcr()
H A Dpower4-pmu.c361 unsigned long mmcr0 = 0, mmcr1 = 0, mmcra = 0; p4_compute_mmcr() local
500 mmcra |= MMCRA_SAMPLE_ENABLE; p4_compute_mmcr()
508 mmcra |= (psel & 1) << MMCRA_PMC8SEL0_SH; p4_compute_mmcr()
511 mmcra |= MMCRA_SAMPLE_ENABLE; p4_compute_mmcr()
519 mmcra |= 0x2000; /* mark only one IOP per PPC instruction */ p4_compute_mmcr()
524 mmcr[2] = mmcra; p4_compute_mmcr()
H A Dppc970-pmu.c262 unsigned long mmcr0 = 0, mmcr1 = 0, mmcra = 0; p970_compute_mmcr() local
385 mmcra |= MMCRA_SAMPLE_ENABLE; p970_compute_mmcr()
397 mmcra |= 0x2000; /* mark only one IOP per PPC instruction */ p970_compute_mmcr()
402 mmcr[2] = mmcra; p970_compute_mmcr()
H A Dpower7-pmu.c251 unsigned long mmcra = MMCRA_SDAR_DCACHE_MISS | MMCRA_SDAR_ERAT_MISS; power7_compute_mmcr() local
299 mmcra |= MMCRA_SAMPLE_ENABLE; power7_compute_mmcr()
310 mmcr[2] = mmcra; power7_compute_mmcr()
H A Dpower5+-pmu.c458 unsigned long mmcra = 0; power5p_compute_mmcr() local
583 mmcra |= MMCRA_SAMPLE_ENABLE; power5p_compute_mmcr()
599 mmcr[2] = mmcra; power5p_compute_mmcr()
H A Dpower5-pmu.c389 unsigned long mmcra = MMCRA_SDAR_DCACHE_MISS | MMCRA_SDAR_ERAT_MISS; power5_compute_mmcr() local
528 mmcra |= MMCRA_SAMPLE_ENABLE; power5_compute_mmcr()
541 mmcr[2] = mmcra; power5_compute_mmcr()
H A Dpower6-pmu.c181 unsigned long mmcra = MMCRA_SDAR_DCACHE_MISS | MMCRA_SDAR_ERAT_MISS; p6_compute_mmcr() local
246 mmcra |= MMCRA_SAMPLE_ENABLE; p6_compute_mmcr()
256 mmcr[2] = mmcra; p6_compute_mmcr()
H A Dcore-book3s.c153 unsigned long mmcra = regs->dsisr; perf_ip_adjust() local
155 if ((ppmu->flags & PPMU_HAS_SSLOT) && (mmcra & MMCRA_SAMPLE_ENABLE)) { perf_ip_adjust()
156 unsigned long slot = (mmcra & MMCRA_SLOT) >> MMCRA_SLOT_SHIFT; perf_ip_adjust()
174 unsigned long mmcra = regs->dsisr; perf_get_data_addr() local
189 sdar_valid = mmcra & sdsync; perf_get_data_addr()
192 if (!(mmcra & MMCRA_SAMPLE_ENABLE) || sdar_valid) perf_get_data_addr()
270 unsigned long mmcra = mfspr(SPRN_MMCRA); perf_read_regs() local
271 int marked = mmcra & MMCRA_SAMPLE_ENABLE; perf_read_regs()
274 regs->dsisr = mmcra; perf_read_regs()
328 unsigned long mmcra = regs->dsisr; siar_valid() local
329 int marked = mmcra & MMCRA_SAMPLE_ENABLE; siar_valid()
336 return mmcra & POWER7P_MMCRA_SIAR_VALID; siar_valid()
/linux-4.1.27/arch/powerpc/include/asm/
H A Doprofile_impl.h34 unsigned long mmcra; member in struct:op_system_config
H A Dcputable.h79 /* Bit locations inside the mmcra change */
/linux-4.1.27/arch/powerpc/kernel/
H A Dsysfs.c484 SYSFS_PMCSETUP(mmcra, SPRN_MMCRA);
494 static DEVICE_ATTR(mmcra, 0600, show_mmcra, store_mmcra);

Completed in 265 milliseconds