| /linux-4.1.27/drivers/gpu/drm/exynos/ |
| D | exynos_dp_core.c | 293 int lane, lane_count, pll_tries, retval; in exynos_dp_link_start() local
295 lane_count = dp->link_train.lane_count; in exynos_dp_link_start()
300 for (lane = 0; lane < lane_count; lane++) in exynos_dp_link_start()
305 exynos_dp_set_lane_count(dp, dp->link_train.lane_count); in exynos_dp_link_start()
309 buf[1] = dp->link_train.lane_count; in exynos_dp_link_start()
316 for (lane = 0; lane < lane_count; lane++) in exynos_dp_link_start()
342 for (lane = 0; lane < lane_count; lane++) in exynos_dp_link_start()
347 lane_count, buf); in exynos_dp_link_start()
360 static int exynos_dp_clock_recovery_ok(u8 link_status[2], int lane_count) in exynos_dp_clock_recovery_ok() argument
365 for (lane = 0; lane < lane_count; lane++) { in exynos_dp_clock_recovery_ok()
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| D | exynos_dp_core.h | 135 enum link_lane_count_type lane_count; member
143 u8 lane_count; member
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| /linux-4.1.27/drivers/gpu/drm/gma500/ |
| D | cdv_intel_dp.c | 265 uint8_t lane_count; member
901 int lane_count, clock; in cdv_intel_dp_mode_fixup() local
914 for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) { in cdv_intel_dp_mode_fixup()
916 int link_avail = cdv_intel_dp_max_data_rate(cdv_intel_dp_link_clock(bws[clock]), lane_count); in cdv_intel_dp_mode_fixup()
920 intel_dp->lane_count = lane_count; in cdv_intel_dp_mode_fixup()
924 intel_dp->link_bw, intel_dp->lane_count, in cdv_intel_dp_mode_fixup()
932 intel_dp->lane_count = max_lane_count; in cdv_intel_dp_mode_fixup()
937 intel_dp->link_bw, intel_dp->lane_count, in cdv_intel_dp_mode_fixup()
994 int lane_count = 4, bpp = 24; in cdv_intel_dp_set_m_n() local
1011 lane_count = intel_dp->lane_count; in cdv_intel_dp_set_m_n()
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| D | mdfld_dsi_dpi.c | 470 int lane_count = dsi_config->lane_count; in mdfld_dsi_dpi_controller_init() local
485 val = lane_count; in mdfld_dsi_dpi_controller_init()
506 (8 * lane_count)) & DSI_HS_TX_TIMEOUT_MASK); in mdfld_dsi_dpi_controller_init()
523 dsi_config->lane_count, dsi_config->bpp); in mdfld_dsi_dpi_controller_init()
749 dsi_config->lane_count, in mdfld_mipi_set_video_timing()
773 int lane_count = dsi_config->lane_count; in mdfld_mipi_config() local
787 REG_WRITE(MIPI_DSI_FUNC_PRG_REG(pipe), 0x00000200 | lane_count); in mdfld_mipi_config()
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| D | mdfld_dsi_output.c | 434 config->lane_count = 4; in mdfld_dsi_get_default_config()
436 config->lane_count = 2; in mdfld_dsi_get_default_config()
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| D | mdfld_dsi_output.h | 260 int lane_count; member
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| /linux-4.1.27/drivers/gpu/drm/i915/ |
| D | intel_dsi_pll.c | 57 int lane_count, bool eotp) in dsi_rr_formula() argument
122 bytes_per_x_frames_x_lanes = bytes_per_x_frames / lane_count; in dsi_rr_formula()
137 static u32 dsi_clk_from_pclk(u32 pclk, int pixel_format, int lane_count) in dsi_clk_from_pclk() argument
158 dsi_clk_khz = DIV_ROUND_CLOSEST(pclk * bpp, lane_count); in dsi_clk_from_pclk()
236 intel_dsi->lane_count); in vlv_configure_dsi_pll()
381 pclk = DIV_ROUND_CLOSEST(dsi_clock * intel_dsi->lane_count, pipe_bpp); in vlv_get_dsi_pclk()
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| D | intel_dsi.c | 682 static u16 txbyteclkhs(u16 pixels, int bpp, int lane_count, in txbyteclkhs() argument
686 8 * 100), lane_count); in txbyteclkhs()
698 unsigned int lane_count = intel_dsi->lane_count; in set_dsi_timings() local
721 hactive = txbyteclkhs(hactive, bpp, lane_count, in set_dsi_timings()
723 hfp = txbyteclkhs(hfp, bpp, lane_count, intel_dsi->burst_mode_ratio); in set_dsi_timings()
724 hsync = txbyteclkhs(hsync, bpp, lane_count, in set_dsi_timings()
726 hbp = txbyteclkhs(hbp, bpp, lane_count, intel_dsi->burst_mode_ratio); in set_dsi_timings()
793 val = intel_dsi->lane_count << DATA_LANES_PRG_REG_SHIFT; in intel_dsi_prepare()
834 intel_dsi->lane_count, in intel_dsi_prepare()
840 bpp, intel_dsi->lane_count, in intel_dsi_prepare()
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| D | intel_dp_mst.c | 41 int lane_count, slots, rate; in intel_dp_mst_compute_config() local
54 lane_count = drm_dp_max_lane_count(intel_dp->dpcd); in intel_dp_mst_compute_config()
66 intel_dp->lane_count = lane_count; in intel_dp_mst_compute_config()
93 intel_link_compute_m_n(bpp, lane_count, in intel_dp_mst_compute_config()
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| D | intel_dsi_panel_vbt.c | 413 intel_dsi->lane_count = mipi_config->lane_cnt + 1; in vbt_panel_init()
457 (pclk * bits_per_pixel) / intel_dsi->lane_count; in vbt_panel_init()
480 bitrate = (pclk * bits_per_pixel) / intel_dsi->lane_count; in vbt_panel_init()
498 switch (intel_dsi->lane_count) { in vbt_panel_init()
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| D | intel_dsi.h | 60 unsigned int lane_count; member
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| D | intel_dp.c | 1337 int lane_count, clock; in intel_dp_compute_config() local
1407 for (lane_count = min_lane_count; in intel_dp_compute_config()
1408 lane_count <= max_lane_count; in intel_dp_compute_config()
1409 lane_count <<= 1) { in intel_dp_compute_config()
1413 lane_count); in intel_dp_compute_config()
1440 intel_dp->lane_count = lane_count; in intel_dp_compute_config()
1456 intel_dp->link_bw, intel_dp->lane_count, in intel_dp_compute_config()
1461 intel_link_compute_m_n(bpp, lane_count, in intel_dp_compute_config()
1469 intel_link_compute_m_n(bpp, lane_count, in intel_dp_compute_config()
1549 intel_dp->DP |= DP_PORT_WIDTH(intel_dp->lane_count); in intel_dp_prepare()
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| D | intel_ddi.c | 469 intel_dp->DP |= DDI_PORT_WIDTH(intel_dp->lane_count); in intel_ddi_init_dp_buf_reg()
1366 temp |= DDI_PORT_WIDTH(intel_dp->lane_count); in intel_ddi_enable_transcoder_func()
1375 temp |= DDI_PORT_WIDTH(intel_dp->lane_count); in intel_ddi_enable_transcoder_func()
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| D | intel_drv.h | 624 uint8_t lane_count; member
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| /linux-4.1.27/drivers/gpu/drm/bridge/ |
| D | ps8622.c | 64 u32 lane_count; member
200 err = ps8622_set(cl, 0x01, 0x21, 0x80 | ps8622->lane_count); in ps8622_send_config()
615 &ps8622->lane_count)) { in ps8622_probe()
616 ps8622->lane_count = ps8622->max_lane_count; in ps8622_probe()
617 } else if (ps8622->lane_count > ps8622->max_lane_count) { in ps8622_probe()
620 ps8622->lane_count = ps8622->max_lane_count; in ps8622_probe()
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| /linux-4.1.27/drivers/gpu/drm/ |
| D | drm_dp_helper.c | 58 int lane_count) in drm_dp_channel_eq_ok() argument
68 for (lane = 0; lane < lane_count; lane++) { in drm_dp_channel_eq_ok()
78 int lane_count) in drm_dp_clock_recovery_ok() argument
83 for (lane = 0; lane < lane_count; lane++) { in drm_dp_clock_recovery_ok()
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| /linux-4.1.27/include/drm/ |
| D | drm_dp_helper.h | 573 int lane_count);
575 int lane_count);
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| /linux-4.1.27/drivers/edac/ |
| D | ppc4xx_edac.c | 443 const unsigned int lane_count = 16; in ppc4xx_edac_generate_lane_message() local
454 for (lanes = 0, lane = first_lane; lane < lane_count; lane++) { in ppc4xx_edac_generate_lane_message()
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| /linux-4.1.27/drivers/gpu/drm/radeon/ |
| D | atombios_dp.c | 258 int lane_count, in dp_get_adjust_train() argument
265 for (lane = 0; lane < lane_count; lane++) { in dp_get_adjust_train()
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