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Searched refs:hwclk (Results 1 – 6 of 6) sorted by relevance

/linux-4.1.27/drivers/clk/
Dclk-highbank.c55 static int clk_pll_prepare(struct clk_hw *hwclk) in clk_pll_prepare() argument
57 struct hb_clk *hbclk = to_hb_clk(hwclk); in clk_pll_prepare()
72 static void clk_pll_unprepare(struct clk_hw *hwclk) in clk_pll_unprepare() argument
74 struct hb_clk *hbclk = to_hb_clk(hwclk); in clk_pll_unprepare()
82 static int clk_pll_enable(struct clk_hw *hwclk) in clk_pll_enable() argument
84 struct hb_clk *hbclk = to_hb_clk(hwclk); in clk_pll_enable()
94 static void clk_pll_disable(struct clk_hw *hwclk) in clk_pll_disable() argument
96 struct hb_clk *hbclk = to_hb_clk(hwclk); in clk_pll_disable()
104 static unsigned long clk_pll_recalc_rate(struct clk_hw *hwclk, in clk_pll_recalc_rate() argument
107 struct hb_clk *hbclk = to_hb_clk(hwclk); in clk_pll_recalc_rate()
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/linux-4.1.27/drivers/clk/socfpga/
Dclk-gate.c44 static u8 socfpga_clk_get_parent(struct clk_hw *hwclk) in socfpga_clk_get_parent() argument
49 if (streq(hwclk->init->name, SOCFPGA_L4_MP_CLK)) { in socfpga_clk_get_parent()
53 if (streq(hwclk->init->name, SOCFPGA_L4_SP_CLK)) { in socfpga_clk_get_parent()
59 if (streq(hwclk->init->name, SOCFPGA_MMC_CLK)) in socfpga_clk_get_parent()
61 if (streq(hwclk->init->name, SOCFPGA_NAND_CLK) || in socfpga_clk_get_parent()
62 streq(hwclk->init->name, SOCFPGA_NAND_X_CLK)) in socfpga_clk_get_parent()
70 static int socfpga_clk_set_parent(struct clk_hw *hwclk, u8 parent) in socfpga_clk_set_parent() argument
74 if (streq(hwclk->init->name, SOCFPGA_L4_MP_CLK)) { in socfpga_clk_set_parent()
79 } else if (streq(hwclk->init->name, SOCFPGA_L4_SP_CLK)) { in socfpga_clk_set_parent()
86 if (streq(hwclk->init->name, SOCFPGA_MMC_CLK)) { in socfpga_clk_set_parent()
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Dclk-pll.c49 static unsigned long clk_pll_recalc_rate(struct clk_hw *hwclk, in clk_pll_recalc_rate() argument
52 struct socfpga_pll *socfpgaclk = to_socfpga_clk(hwclk); in clk_pll_recalc_rate()
69 static u8 clk_pll_get_parent(struct clk_hw *hwclk) in clk_pll_get_parent() argument
72 struct socfpga_pll *socfpgaclk = to_socfpga_clk(hwclk); in clk_pll_get_parent()
Dclk-periph.c28 static unsigned long clk_periclk_recalc_rate(struct clk_hw *hwclk, in clk_periclk_recalc_rate() argument
31 struct socfpga_periph_clk *socfpgaclk = to_socfpga_periph_clk(hwclk); in clk_periclk_recalc_rate()
/linux-4.1.27/drivers/clk/mvebu/
Dclk-cpu.c49 static unsigned long clk_cpu_recalc_rate(struct clk_hw *hwclk, in clk_cpu_recalc_rate() argument
52 struct cpu_clk *cpuclk = to_cpu_clk(hwclk); in clk_cpu_recalc_rate()
60 static long clk_cpu_round_rate(struct clk_hw *hwclk, unsigned long rate, in clk_cpu_round_rate() argument
75 static int clk_cpu_off_set_rate(struct clk_hw *hwclk, unsigned long rate, in clk_cpu_off_set_rate() argument
79 struct cpu_clk *cpuclk = to_cpu_clk(hwclk); in clk_cpu_off_set_rate()
109 static int clk_cpu_on_set_rate(struct clk_hw *hwclk, unsigned long rate, in clk_cpu_on_set_rate() argument
114 struct cpu_clk *cpuclk = to_cpu_clk(hwclk); in clk_cpu_on_set_rate()
123 cur_rate = __clk_get_rate(hwclk->clk); in clk_cpu_on_set_rate()
152 static int clk_cpu_set_rate(struct clk_hw *hwclk, unsigned long rate, in clk_cpu_set_rate() argument
155 if (__clk_is_enabled(hwclk->clk)) in clk_cpu_set_rate()
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Dclk-corediv.c76 static int clk_corediv_is_enabled(struct clk_hw *hwclk) in clk_corediv_is_enabled() argument
78 struct clk_corediv *corediv = to_corediv_clk(hwclk); in clk_corediv_is_enabled()
86 static int clk_corediv_enable(struct clk_hw *hwclk) in clk_corediv_enable() argument
88 struct clk_corediv *corediv = to_corediv_clk(hwclk); in clk_corediv_enable()
105 static void clk_corediv_disable(struct clk_hw *hwclk) in clk_corediv_disable() argument
107 struct clk_corediv *corediv = to_corediv_clk(hwclk); in clk_corediv_disable()
122 static unsigned long clk_corediv_recalc_rate(struct clk_hw *hwclk, in clk_corediv_recalc_rate() argument
125 struct clk_corediv *corediv = to_corediv_clk(hwclk); in clk_corediv_recalc_rate()
135 static long clk_corediv_round_rate(struct clk_hw *hwclk, unsigned long rate, in clk_corediv_round_rate() argument
150 static int clk_corediv_set_rate(struct clk_hw *hwclk, unsigned long rate, in clk_corediv_set_rate() argument
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