Searched refs:enable_count (Results 1 – 6 of 6) sorted by relevance
49 && edev->enable_count == 0) { in devfreq_event_enable_edev()54 edev->enable_count++; in devfreq_event_enable_edev()80 if (edev->enable_count <= 0) { in devfreq_event_disable_edev()87 && edev->enable_count == 1) { in devfreq_event_disable_edev()92 edev->enable_count--; in devfreq_event_disable_edev()118 if (edev->enable_count > 0) in devfreq_event_is_enabled()329 edev->enable_count = 0; in devfreq_event_add_edev()363 WARN_ON(edev->enable_count); in devfreq_event_remove_edev()461 return sprintf(buf, "%d\n", edev->enable_count); in enable_count_show()463 static DEVICE_ATTR_RO(enable_count);
54 unsigned int enable_count; member179 if (ch->enable_count++ > 0) in sh_tmu_enable()202 if (WARN_ON(ch->enable_count == 0)) in sh_tmu_disable()205 if (--ch->enable_count > 0) in sh_tmu_disable()300 if (--ch->enable_count == 0) { in sh_tmu_clocksource_suspend()313 if (ch->enable_count++ == 0) { in sh_tmu_clocksource_resume()490 ch->enable_count = 0; in sh_tmu_channel_setup()
65 unsigned int enable_count; member178 c->enable_count, c->prepare_count, clk_core_get_rate(c), in clk_summary_show_one()235 seq_printf(s, "\"enable_count\": %d,", c->enable_count); in clk_dump_one()339 (u32 *)&clk->enable_count); in clk_debug_create_one()521 if (clk->enable_count) in clk_disable_unused_subtree()641 return !clk ? 0 : clk->core->enable_count; in __clk_get_enable_count()729 ret = clk->enable_count ? 1 : 0; in clk_core_is_enabled()916 WARN_ON(clk->enable_count > 0); in clk_core_unprepare()1011 if (WARN_ON(clk->enable_count == 0)) in clk_core_disable()1014 if (--clk->enable_count > 0) in clk_core_disable()[all …]
34 u32 enable_count; member
82 u32 enable_count; /* a number of enabled shared GPIO */ member1808 if (pin->enable_count == 0) in regulator_ena_gpio_ctrl()1812 pin->enable_count++; in regulator_ena_gpio_ctrl()1814 if (pin->enable_count > 1) { in regulator_ena_gpio_ctrl()1815 pin->enable_count--; in regulator_ena_gpio_ctrl()1820 if (pin->enable_count <= 1) { in regulator_ena_gpio_ctrl()1823 pin->enable_count = 0; in regulator_ena_gpio_ctrl()
112 Nothing about clock topology or accounting, such as enable_count or