Searched refs:clk_phase (Results 1 – 4 of 4) sorted by relevance
130 u32 clk_phase[2]; in socfpga_clk_prepare() local132 if (socfpgaclk->clk_phase[0] || socfpgaclk->clk_phase[1]) { in socfpga_clk_prepare()140 switch (socfpgaclk->clk_phase[i]) { in socfpga_clk_prepare()142 clk_phase[i] = 0; in socfpga_clk_prepare()145 clk_phase[i] = 1; in socfpga_clk_prepare()148 clk_phase[i] = 2; in socfpga_clk_prepare()151 clk_phase[i] = 3; in socfpga_clk_prepare()154 clk_phase[i] = 4; in socfpga_clk_prepare()157 clk_phase[i] = 5; in socfpga_clk_prepare()160 clk_phase[i] = 6; in socfpga_clk_prepare()[all …]
49 u32 clk_phase[2]; member
162 DECLARE_EVENT_CLASS(clk_phase,181 DEFINE_EVENT(clk_phase, clk_set_phase,188 DEFINE_EVENT(clk_phase, clk_set_phase_complete,
1153 int clk_phase = 0; in lm49453_set_dai_fmt() local1180 clk_phase = (1 << 5); in lm49453_set_dai_fmt()1185 clk_phase = (1 << 5); in lm49453_set_dai_fmt()1194 (aif_val | mode | clk_phase)); in lm49453_set_dai_fmt()