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Searched refs:clk_bypass (Results 1 – 7 of 7) sorted by relevance

/linux-4.1.27/drivers/clk/ti/
Ddpll.c150 dd->clk_bypass = of_clk_get(node, 1); in _register_dpll()
152 if (IS_ERR(dd->clk_ref) || IS_ERR(dd->clk_bypass)) { in _register_dpll()
202 struct clk *clk_bypass; in ti_clk_register_dpll() local
210 clk_bypass = clk_get_sys(NULL, dpll->parents[1]); in ti_clk_register_dpll()
212 if (IS_ERR_OR_NULL(clk_ref) || IS_ERR_OR_NULL(clk_bypass)) in ti_clk_register_dpll()
254 dd->clk_bypass = clk_bypass; in ti_clk_register_dpll()
Dfapll.c69 struct clk *clk_bypass; member
571 fd->clk_bypass = of_clk_get(node, 1); in ti_fapll_setup()
572 if (IS_ERR(fd->clk_bypass)) { in ti_fapll_setup()
655 if (fd->clk_bypass) in ti_fapll_setup()
656 clk_put(fd->clk_bypass); in ti_fapll_setup()
Dapll.c141 ad->clk_bypass = of_clk_get(node, 1); in omap_clk_register_apll()
143 if (IS_ERR(ad->clk_ref) || IS_ERR(ad->clk_bypass)) { in omap_clk_register_apll()
/linux-4.1.27/arch/arm/mach-omap2/
Ddpll44xx.c220 if (__clk_get_rate(dd->clk_bypass) == rate && in omap4_dpll_regm4xen_determine_rate()
222 *best_parent_clk = __clk_get_hw(dd->clk_bypass); in omap4_dpll_regm4xen_determine_rate()
Ddpll3xxx.c432 if (__clk_get_rate(hw->clk) == __clk_get_rate(dd->clk_bypass)) { in omap3_noncore_dpll_enable()
433 WARN_ON(parent != __clk_get_hw(dd->clk_bypass)); in omap3_noncore_dpll_enable()
491 if (__clk_get_rate(dd->clk_bypass) == rate && in omap3_noncore_dpll_determine_rate()
493 *best_parent_clk = __clk_get_hw(dd->clk_bypass); in omap3_noncore_dpll_determine_rate()
Dclkt_dpll.c255 return __clk_get_rate(dd->clk_bypass); in omap2_get_dpll_rate()
/linux-4.1.27/include/linux/clk/
Dti.h72 struct clk *clk_bypass; member