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Searched refs:clk1 (Results 1 – 17 of 17) sorted by relevance

/linux-4.1.27/drivers/clk/ti/
Dclk-33xx.c124 struct clk *clk1, *clk2; in am33xx_dt_clk_init() local
142 clk1 = clk_get_sys(NULL, "sys_clkin_ck"); in am33xx_dt_clk_init()
144 clk_set_parent(clk2, clk1); in am33xx_dt_clk_init()
147 clk_set_parent(clk2, clk1); in am33xx_dt_clk_init()
155 clk1 = clk_get_sys(NULL, "wdt1_fck"); in am33xx_dt_clk_init()
157 clk_set_parent(clk1, clk2); in am33xx_dt_clk_init()
Dclk-43xx.c119 struct clk *clk1, *clk2; in am43xx_dt_clk_init() local
135 clk1 = clk_get_sys(NULL, "cpsw_cpts_rft_clk"); in am43xx_dt_clk_init()
137 clk_set_parent(clk1, clk2); in am43xx_dt_clk_init()
/linux-4.1.27/drivers/clk/spear/
Dspear1340_clock.c445 struct clk *clk, *clk1; in spear1340_clk_init() local
482 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); in spear1340_clk_init()
484 clk_register_clkdev(clk1, "pll1_clk", NULL); in spear1340_clk_init()
493 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); in spear1340_clk_init()
495 clk_register_clkdev(clk1, "pll2_clk", NULL); in spear1340_clk_init()
504 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); in spear1340_clk_init()
506 clk_register_clkdev(clk1, "pll3_clk", NULL); in spear1340_clk_init()
510 ARRAY_SIZE(pll4_rtbl), &_lock, &clk1, NULL); in spear1340_clk_init()
512 clk_register_clkdev(clk1, "pll4_clk", NULL); in spear1340_clk_init()
639 aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1); in spear1340_clk_init()
[all …]
Dspear6xx_clock.c119 struct clk *clk, *clk1; in spear6xx_clk_init() local
141 &_lock, &clk1, NULL); in spear6xx_clk_init()
143 clk_register_clkdev(clk1, "pll1_clk", NULL); in spear6xx_clk_init()
147 &_lock, &clk1, NULL); in spear6xx_clk_init()
149 clk_register_clkdev(clk1, "pll2_clk", NULL); in spear6xx_clk_init()
167 &_lock, &clk1); in spear6xx_clk_init()
169 clk_register_clkdev(clk1, "uart_syn_gclk", NULL); in spear6xx_clk_init()
187 &_lock, &clk1); in spear6xx_clk_init()
189 clk_register_clkdev(clk1, "firda_syn_gclk", NULL); in spear6xx_clk_init()
203 &_lock, &clk1); in spear6xx_clk_init()
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Dspear3xx_clock.c392 struct clk *clk, *clk1, *ras_apb_clk; in spear3xx_clk_init() local
418 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); in spear3xx_clk_init()
420 clk_register_clkdev(clk1, "pll1_clk", NULL); in spear3xx_clk_init()
424 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); in spear3xx_clk_init()
426 clk_register_clkdev(clk1, "pll2_clk", NULL); in spear3xx_clk_init()
440 &_lock, &clk1); in spear3xx_clk_init()
442 clk_register_clkdev(clk1, "uart_syn_gclk", NULL); in spear3xx_clk_init()
458 &_lock, &clk1); in spear3xx_clk_init()
460 clk_register_clkdev(clk1, "firda_syn_gclk", NULL); in spear3xx_clk_init()
510 &_lock, &clk1); in spear3xx_clk_init()
[all …]
Dspear1310_clock.c388 struct clk *clk, *clk1; in spear1310_clk_init() local
425 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); in spear1310_clk_init()
427 clk_register_clkdev(clk1, "pll1_clk", NULL); in spear1310_clk_init()
436 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); in spear1310_clk_init()
438 clk_register_clkdev(clk1, "pll2_clk", NULL); in spear1310_clk_init()
447 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); in spear1310_clk_init()
449 clk_register_clkdev(clk1, "pll3_clk", NULL); in spear1310_clk_init()
453 ARRAY_SIZE(pll4_rtbl), &_lock, &clk1, NULL); in spear1310_clk_init()
455 clk_register_clkdev(clk1, "pll4_clk", NULL); in spear1310_clk_init()
560 ARRAY_SIZE(aux_rtbl), &_lock, &clk1); in spear1310_clk_init()
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/linux-4.1.27/arch/arm/common/
Dtimer-sp.c218 struct clk *clk1, *clk2; in sp804_of_init() local
232 clk1 = of_clk_get(np, 0); in sp804_of_init()
233 if (IS_ERR(clk1)) in sp804_of_init()
234 clk1 = NULL; in sp804_of_init()
245 clk2 = clk1; in sp804_of_init()
254 __sp804_clocksource_and_sched_clock_init(base, name, clk1, 1); in sp804_of_init()
256 __sp804_clockevents_init(base, irq, clk1 , name); in sp804_of_init()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dgf100.c268 u32 clk0, clk1 = 0; in calc_clk() local
281 clk1 = calc_pll(priv, clk, freq, &info->coef); in calc_clk()
283 clk1 = cstate->domain[nv_clk_src_hubk06]; in calc_clk()
284 clk1 = calc_div(priv, clk, clk1, freq, &div1P); in calc_clk()
288 if (abs((int)freq - clk0) <= abs((int)freq - clk1)) { in calc_clk()
307 info->freq = clk1; in calc_clk()
Dgk104.c286 u32 clk0, clk1 = 0; in calc_clk() local
299 clk1 = calc_pll(priv, clk, freq, &info->coef); in calc_clk()
301 clk1 = cstate->domain[nv_clk_src_hubk06]; in calc_clk()
302 clk1 = calc_div(priv, clk, clk1, freq, &div1P); in calc_clk()
306 if (abs((int)freq - clk0) <= abs((int)freq - clk1)) { in calc_clk()
325 info->freq = clk1; in calc_clk()
Dmcp77.c184 u32 clk0 = src, clk1 = src; in calc_P() local
187 clk1 = clk0 << (*div ? 1 : 0); in calc_P()
193 if (target - clk0 <= clk1 - target) in calc_P()
196 return clk1; in calc_P()
Dnv50.c342 u32 clk0 = src, clk1 = src; in calc_div() local
345 clk1 = clk0 << (*div ? 1 : 0); in calc_div()
351 if (target - clk0 <= clk1 - target) in calc_div()
354 return clk1; in calc_div()
/linux-4.1.27/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/
Dusb.txt13 "clk1" through "clk24": clock source is CLK1-CLK24, respectively
17 "clk1" through "clk24": clock source is CLK1-CLK24, respectively
Ducc.txt27 "clk1" through "clk24": clock source is CLK1-CLK24, respectively
31 "clk1" through "clk24": clock source is CLK1-CLK24, respectively
/linux-4.1.27/drivers/clk/rockchip/
Dclk-rk3188.c768 struct clk *clk1, *clk2; in rk3188a_clk_init() local
784 clk1 = __clk_lookup("aclk_cpu_pre"); in rk3188a_clk_init()
786 if (clk1 && clk2) { in rk3188a_clk_init()
787 rate = clk_get_rate(clk1); in rk3188a_clk_init()
789 ret = clk_set_parent(clk1, clk2); in rk3188a_clk_init()
794 clk_set_rate(clk1, rate); in rk3188a_clk_init()
/linux-4.1.27/drivers/clk/zynq/
Dclkc.c178 enum zynq_clk clk1, const char *clk_name0, in zynq_clk_register_periph_clk() argument
204 clks[clk1] = clk_register_gate(NULL, clk_name1, div_name, in zynq_clk_register_periph_clk()
215 clks[clk1] = ERR_PTR(-ENOMEM); in zynq_clk_register_periph_clk()
/linux-4.1.27/sound/soc/codecs/
Dwm8994.c2136 u16 reg, clk1, aif_reg, aif_src; in _wm8994_set_fll() local
2196 clk1 = snd_soc_read(codec, WM8994_CLOCKING_1); in _wm8994_set_fll()
2197 if (clk1 & WM8994_SYSCLK_SRC) in _wm8994_set_fll()
/linux-4.1.27/arch/arm/boot/dts/
Dexynos5420.dtsi291 "pclk1", "clk1", "pclk2", "clk2",