H A D | bnx2x_link.c | 1950 u32 bmac_addr = params->port ? NIG_REG_INGRESS_BMAC1_MEM : bnx2x_update_pfc_bmac1() local 1961 REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_RX_CONTROL, wb_data, 2); bnx2x_update_pfc_bmac1() 1971 REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_TX_CONTROL, wb_data, 2); bnx2x_update_pfc_bmac1() 1983 u32 bmac_addr = params->port ? NIG_REG_INGRESS_BMAC1_MEM : bnx2x_update_pfc_bmac2() local 1994 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_RX_CONTROL, wb_data, 2); bnx2x_update_pfc_bmac2() 2005 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_TX_CONTROL, wb_data, 2); bnx2x_update_pfc_bmac2() 2017 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_PFC_CONTROL, bnx2x_update_pfc_bmac2() 2028 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_PFC_CONTROL, wb_data, 2); bnx2x_update_pfc_bmac2() 2041 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_TX_PAUSE_CONTROL, bnx2x_update_pfc_bmac2() 2056 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_BMAC_CONTROL, wb_data, 2); bnx2x_update_pfc_bmac2() 2282 u32 bmac_addr = port ? NIG_REG_INGRESS_BMAC1_MEM : bnx2x_bmac1_enable() local 2292 REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_BMAC_XGXS_CONTROL, bnx2x_bmac1_enable() 2302 REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_TX_SOURCE_ADDR, wb_data, 2); bnx2x_bmac1_enable() 2312 REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_BMAC_CONTROL, wb_data, 2); bnx2x_bmac1_enable() 2317 REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_RX_MAX_SIZE, wb_data, 2); bnx2x_bmac1_enable() 2324 REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_TX_MAX_SIZE, wb_data, 2); bnx2x_bmac1_enable() 2329 REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_CNT_MAX_SIZE, wb_data, 2); bnx2x_bmac1_enable() 2334 REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_RX_LLFC_MSG_FLDS, bnx2x_bmac1_enable() 2346 u32 bmac_addr = port ? NIG_REG_INGRESS_BMAC1_MEM : bnx2x_bmac2_enable() local 2354 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_BMAC_CONTROL, wb_data, 2); bnx2x_bmac2_enable() 2360 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_BMAC_XGXS_CONTROL, bnx2x_bmac2_enable() 2372 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_TX_SOURCE_ADDR, bnx2x_bmac2_enable() 2380 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_RX_LLFC_MSG_FLDS, bnx2x_bmac2_enable() 2387 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_RX_MAX_SIZE, wb_data, 2); bnx2x_bmac2_enable() 2393 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_TX_MAX_SIZE, wb_data, 2); bnx2x_bmac2_enable() 2398 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_CNT_MAX_SIZE, wb_data, 2); bnx2x_bmac2_enable() 2452 u32 bmac_addr = port ? NIG_REG_INGRESS_BMAC1_MEM : bnx2x_set_bmac_rx() local 2458 bmac_addr += BIGMAC2_REGISTER_BMAC_CONTROL; bnx2x_set_bmac_rx() 2460 bmac_addr += BIGMAC_REGISTER_BMAC_CONTROL; bnx2x_set_bmac_rx() 2466 REG_RD_DMAE(bp, bmac_addr, wb_data, 2); bnx2x_set_bmac_rx() 2471 REG_WR_DMAE(bp, bmac_addr, wb_data, 2); bnx2x_set_bmac_rx()
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