| /linux-4.1.27/arch/arm/mm/ |
| D | context.c | 59 u64 context_id, asid; in a15_erratum_get_cpumask() local
70 asid = per_cpu(active_asids, cpu).counter; in a15_erratum_get_cpumask()
71 if (asid == 0) in a15_erratum_get_cpumask()
72 asid = per_cpu(reserved_asids, cpu); in a15_erratum_get_cpumask()
73 if (context_id == asid) in a15_erratum_get_cpumask()
142 u64 asid; in flush_context() local
147 asid = atomic64_xchg(&per_cpu(active_asids, i), 0); in flush_context()
155 if (asid == 0) in flush_context()
156 asid = per_cpu(reserved_asids, i); in flush_context()
157 __set_bit(asid & ~ASID_MASK, asid_map); in flush_context()
[all …]
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| D | tlb-v7.S | 41 asid r3, r3 @ mask ASID
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| D | tlb-v6.S | 43 asid r3, r3 @ mask ASID
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| D | proc-v7-3level.S | 60 asid r2, r2
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| D | proc-macros.S | 54 .macro asid, rd, rn macro
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| /linux-4.1.27/arch/xtensa/include/asm/ |
| D | mmu_context.h | 70 unsigned long asid = cpu_asid_cache(cpu); in get_new_mmu_context() local
71 if ((++asid & ASID_MASK) == 0) { in get_new_mmu_context()
77 asid += ASID_USER_FIRST; in get_new_mmu_context()
79 cpu_asid_cache(cpu) = asid; in get_new_mmu_context()
80 mm->context.asid[cpu] = asid; in get_new_mmu_context()
91 unsigned long asid = mm->context.asid[cpu]; in get_mmu_context() local
93 if (asid == NO_CONTEXT || in get_mmu_context()
94 ((asid ^ cpu_asid_cache(cpu)) & ~ASID_MASK)) in get_mmu_context()
102 set_rasid_register(ASID_INSERT(mm->context.asid[cpu])); in activate_context()
117 mm->context.asid[cpu] = NO_CONTEXT; in init_new_context()
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| D | mmu.h | 17 unsigned long asid[NR_CPUS]; member
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| /linux-4.1.27/arch/arm64/mm/ |
| D | context.c | 58 static void set_mm_context(struct mm_struct *mm, unsigned int asid) in set_mm_context() argument
74 mm->context.id = asid; in set_mm_context()
91 unsigned int asid; in reset_context() local
104 asid = cpu_last_asid + cpu; in reset_context()
107 set_mm_context(mm, asid); in reset_context()
115 static inline void set_mm_context(struct mm_struct *mm, unsigned int asid) in set_mm_context() argument
117 mm->context.id = asid; in set_mm_context()
125 unsigned int asid; in __new_context() local
145 asid = ++cpu_last_asid; in __new_context()
151 if (unlikely((asid & ((1 << bits) - 1)) == 0)) { in __new_context()
[all …]
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| /linux-4.1.27/arch/sh/include/asm/ |
| D | mmu_context_32.h | 14 static inline void set_asid(unsigned long asid) in set_asid() argument
16 __raw_writel(asid, MMU_PTEAEX); in set_asid()
24 static inline void set_asid(unsigned long asid) in set_asid() argument
33 : "r" (asid), "m" (__m(MMU_PTEH)), in set_asid()
39 unsigned long asid; in get_asid() local
42 : "=r" (asid) in get_asid()
44 asid &= MMU_CONTEXT_ASID_MASK; in get_asid()
45 return asid; in get_asid()
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| D | mmu_context.h | 59 unsigned long asid = asid_cache(cpu); in get_mmu_context() local
62 if (((cpu_context(cpu, mm) ^ asid) & MMU_CONTEXT_VERSION_MASK) == 0) in get_mmu_context()
67 if (!(++asid & MMU_CONTEXT_ASID_MASK)) { in get_mmu_context()
86 if (!asid) in get_mmu_context()
87 asid = MMU_CONTEXT_FIRST_VERSION; in get_mmu_context()
90 cpu_context(cpu, mm) = asid_cache(cpu) = asid; in get_mmu_context()
139 #define set_asid(asid) do { } while (0) argument
142 #define switch_and_save_asid(asid) (0) argument
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| D | tlbflush.h | 22 extern void local_flush_tlb_one(unsigned long asid, unsigned long page);
34 extern void flush_tlb_one(unsigned long asid, unsigned long page);
41 #define flush_tlb_one(asid, page) local_flush_tlb_one(asid, page) argument
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| D | mmu_context_64.h | 42 static inline void set_asid(unsigned long asid) in set_asid() argument
48 sr = (sr & SR_ASID_MASK) | (asid << SR_ASID_SHIFT); in set_asid()
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| D | tlb_64.h | 60 unsigned long asid, unsigned long paddr);
67 #define sh64_setup_tlb_slot(conf, virt, asid, phys) do { } while (0) argument
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| /linux-4.1.27/arch/sh/mm/ |
| D | tlbflush_32.c | 21 unsigned long asid; in local_flush_tlb_page() local
24 asid = cpu_asid(cpu, vma->vm_mm); in local_flush_tlb_page()
30 set_asid(asid); in local_flush_tlb_page()
32 local_flush_tlb_one(asid, page); in local_flush_tlb_page()
56 unsigned long asid; in local_flush_tlb_range() local
59 asid = cpu_asid(cpu, mm); in local_flush_tlb_range()
65 set_asid(asid); in local_flush_tlb_range()
68 local_flush_tlb_one(asid, start); in local_flush_tlb_range()
89 unsigned long asid; in local_flush_tlb_kernel_range() local
92 asid = cpu_asid(cpu, &init_mm); in local_flush_tlb_kernel_range()
[all …]
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| D | tlb-pteaex.c | 70 void local_flush_tlb_one(unsigned long asid, unsigned long page) in local_flush_tlb_one() argument
74 __raw_writel(asid, MMU_UTLB_ADDRESS_ARRAY2 | MMU_PAGE_ASSOC_BIT); in local_flush_tlb_one()
76 __raw_writel(asid, MMU_ITLB_ADDRESS_ARRAY2 | MMU_PAGE_ASSOC_BIT); in local_flush_tlb_one()
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| D | tlb-debugfs.c | 94 unsigned long vpn, ppn, asid, size; in tlb_seq_show() local
107 asid = val & MMU_CONTEXT_ASID_MASK; in tlb_seq_show()
126 entry, vpn, ppn, asid, in tlb_seq_show()
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| D | tlb-sh3.c | 57 void local_flush_tlb_one(unsigned long asid, unsigned long page) in local_flush_tlb_one() argument
69 data = (page & 0xfffe0000) | asid; /* VALID bit is off */ in local_flush_tlb_one()
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| D | tlb-sh4.c | 66 void local_flush_tlb_one(unsigned long asid, unsigned long page) in local_flush_tlb_one() argument
77 data = page | asid; /* VALID bit is off */ in local_flush_tlb_one()
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| D | tlbflush_64.c | 31 void local_flush_tlb_one(unsigned long asid, unsigned long page) in local_flush_tlb_one() argument
40 match = (asid << PTEH_ASID_SHIFT) | PTEH_VALID; in local_flush_tlb_one()
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| D | tlb-sh5.c | 121 unsigned long asid, unsigned long paddr) in sh64_setup_tlb_slot() argument
127 pteh |= (asid << PTEH_ASID_SHIFT) | PTEH_VALID; in sh64_setup_tlb_slot()
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| D | nommu.c | 60 void local_flush_tlb_one(unsigned long asid, unsigned long page) in local_flush_tlb_one() argument
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| D | cache-sh5.c | 34 sh64_setup_dtlb_cache_slot(unsigned long eaddr, unsigned long asid, in sh64_setup_dtlb_cache_slot() argument
38 sh64_setup_tlb_slot(dtlb_cache_slot, eaddr, asid, paddr); in sh64_setup_dtlb_cache_slot()
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| /linux-4.1.27/arch/tile/include/asm/ |
| D | mmu_context.h | 37 static inline void __install_page_table(pgd_t *pgdir, int asid, pgprot_t prot) in __install_page_table() argument
40 int rc = hv_install_context(__pa(pgdir), prot, asid, in __install_page_table()
46 static inline void install_page_table(pgd_t *pgdir, int asid) in install_page_table() argument
49 __install_page_table(pgdir, asid, *ptep); in install_page_table()
99 int asid = __this_cpu_read(current_asid) + 1; in switch_mm() local
100 if (asid > max_asid) { in switch_mm()
101 asid = min_asid; in switch_mm()
104 __this_cpu_write(current_asid, asid); in switch_mm()
111 install_page_table(next->pgd, asid); in switch_mm()
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| /linux-4.1.27/arch/score/include/asm/ |
| D | mmu_context.h | 49 unsigned long asid = asid_cache + ASID_INC; in get_new_mmu_context() local
51 if (!(asid & ASID_MASK)) { in get_new_mmu_context()
53 if (!asid) /* fix version if needed */ in get_new_mmu_context()
54 asid = ASID_FIRST_VERSION; in get_new_mmu_context()
57 mm->context = asid; in get_new_mmu_context()
58 asid_cache = asid; in get_new_mmu_context()
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| /linux-4.1.27/arch/m32r/include/asm/ |
| D | mmu_context.h | 96 static inline void set_asid(unsigned long asid) in set_asid() argument
98 *(volatile unsigned long *)MASID = (asid & MMU_CONTEXT_ASID_MASK); in set_asid()
103 unsigned long asid; in get_asid() local
105 asid = *(volatile long *)MASID; in get_asid()
106 asid &= MMU_CONTEXT_ASID_MASK; in get_asid()
108 return asid; in get_asid()
152 #define set_asid(asid) do { } while (0) argument
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| /linux-4.1.27/arch/avr32/mm/ |
| D | tlb.c | 117 static void __flush_tlb_page(unsigned long asid, unsigned long page) in __flush_tlb_page() argument
126 tlbehi = page | asid; in __flush_tlb_page()
153 unsigned long flags, asid; in flush_tlb_page() local
156 asid = vma->vm_mm->context & MMU_CONTEXT_ASID_MASK; in flush_tlb_page()
162 set_asid(asid); in flush_tlb_page()
165 __flush_tlb_page(asid, page); in flush_tlb_page()
190 unsigned long asid; in flush_tlb_range() local
193 asid = mm->context & MMU_CONTEXT_ASID_MASK; in flush_tlb_range()
202 set_asid(asid); in flush_tlb_range()
206 __flush_tlb_page(asid, start); in flush_tlb_range()
[all …]
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| /linux-4.1.27/drivers/misc/sgi-gru/ |
| D | grumain.c | 106 static int gru_reset_asid_limit(struct gru_state *gru, int asid) in gru_reset_asid_limit() argument
110 gru_dbg(grudev, "gid %d, asid 0x%x\n", gru->gs_gid, asid); in gru_reset_asid_limit()
113 if (asid >= limit) in gru_reset_asid_limit()
114 asid = gru_wrap_asid(gru); in gru_reset_asid_limit()
125 if (inuse_asid == asid) { in gru_reset_asid_limit()
126 asid += ASID_INC; in gru_reset_asid_limit()
127 if (asid >= limit) { in gru_reset_asid_limit()
133 if (asid >= MAX_ASID) in gru_reset_asid_limit()
134 asid = gru_wrap_asid(gru); in gru_reset_asid_limit()
139 if ((inuse_asid > asid) && (inuse_asid < limit)) in gru_reset_asid_limit()
[all …]
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| D | gruhandles.c | 153 int asid, int pagesize, int global, int n, in tgh_invalidate() argument
157 tgh->asid = asid; in tgh_invalidate()
170 unsigned long vaddr, int asid, int dirty, in tfh_write_only() argument
173 tfh->fillasid = asid; in tfh_write_only()
186 unsigned long vaddr, int asid, int dirty, in tfh_write_restart() argument
189 tfh->fillasid = asid; in tfh_write_restart()
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| D | grutlbpurge.c | 165 int grupagesize, pagesize, pageshift, gid, asid; in gru_flush_tlb_range() local
182 asid = asids->mt_asid; in gru_flush_tlb_range()
183 if (asids->mt_ctxbitmap && asid) { in gru_flush_tlb_range()
185 asid = GRUASID(asid, start); in gru_flush_tlb_range()
188 gid, asid, start, grupagesize, num, asids->mt_ctxbitmap); in gru_flush_tlb_range()
190 tgh_invalidate(tgh, start, ~0, asid, grupagesize, 0, in gru_flush_tlb_range()
199 gid, asid, asids->mt_ctxbitmap, in gru_flush_tlb_range()
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| D | gruhandles.h | 214 unsigned int asid:24; /* DW 2 */ member
388 unsigned int asid[8]; /* DW 2 - 5 */ member
521 unsigned long vaddrmask, int asid, int pagesize, int global, int n,
524 int gaa, unsigned long vaddr, int asid, int dirty, int pagesize);
526 int gaa, unsigned long vaddr, int asid, int dirty, int pagesize);
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| D | grufault.c | 320 unsigned long fault_vaddr, int asid, int write, in gru_preload_tlb() argument
342 if (ret || tfh_write_only(tfh, gpa, GAA_RAM, vaddr, asid, write, in gru_preload_tlb()
348 vaddr, asid, write, pageshift, gpa); in gru_preload_tlb()
371 int pageshift = 0, asid, write, ret, atomic = !cbk, indexway; in gru_try_dropin() local
408 asid = tfh->missasid; in gru_try_dropin()
410 if (asid == 0) in gru_try_dropin()
437 gru_preload_tlb(gru, gts, atomic, vaddr, asid, write, tlb_preload_count, tfh, cbe); in gru_try_dropin()
443 tfh_write_restart(tfh, gpa, GAA_RAM, vaddr, asid, write, in gru_try_dropin()
448 atomic ? "atomic" : "non-atomic", gru->gs_gid, gts, tfh, vaddr, asid, in gru_try_dropin()
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| D | grutables.h | 301 #define GRUASID(asid, addr) ((asid) + GRUREGION(addr)) argument
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| /linux-4.1.27/arch/mips/lib/ |
| D | r3k_dump_tlb.c | 22 unsigned int asid; in dump_tlb() local
25 asid = read_c0_entryhi() & ASID_MASK; in dump_tlb()
39 && (entryhi & ASID_MASK) == asid) { in dump_tlb()
58 write_c0_entryhi(asid); in dump_tlb()
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| D | dump_tlb.c | 51 unsigned long s_entryhi, entryhi, asid; in dump_tlb() local
58 asid = s_entryhi & 0xff; in dump_tlb()
72 && (entryhi & 0xff) == asid) { in dump_tlb()
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| /linux-4.1.27/arch/avr32/include/asm/ |
| D | mmu_context.h | 87 static inline void set_asid(unsigned long asid) in set_asid() argument
90 sysreg_write(TLBEHI, asid & MMU_CONTEXT_ASID_MASK); in set_asid()
96 unsigned long asid; in get_asid() local
98 asid = sysreg_read(TLBEHI); in get_asid()
99 return asid & MMU_CONTEXT_ASID_MASK; in get_asid()
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| /linux-4.1.27/arch/arm64/include/asm/ |
| D | tlbflush.h | 78 unsigned long asid = (unsigned long)ASID(mm) << 48; in flush_tlb_mm() local
81 asm("tlbi aside1is, %0" : : "r" (asid)); in flush_tlb_mm()
99 unsigned long asid = (unsigned long)ASID(vma->vm_mm) << 48; in __flush_tlb_range() local
101 start = asid | (start >> 12); in __flush_tlb_range()
102 end = asid | (end >> 12); in __flush_tlb_range()
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| /linux-4.1.27/arch/tile/kernel/ |
| D | tlb.c | 39 HV_Remote_ASID *asid = &asids[i++]; in flush_tlb_mm() local
40 asid->y = cpu / smp_topology.width; in flush_tlb_mm()
41 asid->x = cpu % smp_topology.width; in flush_tlb_mm()
42 asid->asid = per_cpu(current_asid, cpu); in flush_tlb_mm()
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| D | hvglue_trace.c | 207 HV_ASID, asid, __hv32, flags)
210 HV_WRAP1(int, hv_flush_asid, HV_ASID, asid)
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| D | pci_gx.c | 166 context->asid = ret; in tile_pcie_open()
1015 trio_context->asid, in pcibios_init()
1566 trio_context->asid); in arch_setup_msi_irq()
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| /linux-4.1.27/arch/mips/include/asm/ |
| D | mmu_context.h | 85 #define cpu_context(cpu, mm) ((mm)->context.asid[cpu])
105 unsigned long asid = asid_cache(cpu); in get_new_mmu_context() local
107 if (! ((asid += ASID_INC) & ASID_MASK) ) { in get_new_mmu_context()
115 if (!asid) /* fix version if needed */ in get_new_mmu_context()
116 asid = ASID_FIRST_VERSION; in get_new_mmu_context()
119 cpu_context(cpu, mm) = asid_cache(cpu) = asid; in get_new_mmu_context()
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| D | mmu.h | 7 unsigned long asid[NR_CPUS]; member
|
| /linux-4.1.27/arch/xtensa/mm/ |
| D | tlb.c | 70 mm->context.asid[cpu] = NO_CONTEXT; in local_flush_tlb_mm()
74 mm->context.asid[cpu] = NO_CONTEXT; in local_flush_tlb_mm()
95 if (mm->context.asid[cpu] == NO_CONTEXT) in local_flush_tlb_range()
100 (unsigned long)mm->context.asid[cpu], start, end); in local_flush_tlb_range()
107 set_rasid_register(ASID_INSERT(mm->context.asid[cpu])); in local_flush_tlb_range()
135 if (mm->context.asid[cpu] == NO_CONTEXT) in local_flush_tlb_page()
141 set_rasid_register(ASID_INSERT(mm->context.asid[cpu])); in local_flush_tlb_page()
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| /linux-4.1.27/arch/tile/gxio/ |
| D | iorpc_trio.c | 141 unsigned int asid; member
150 uint64_t size, unsigned int asid, in gxio_trio_init_memory_map_mmu_aux() argument
161 params->asid = asid; in gxio_trio_init_memory_map_mmu_aux()
227 unsigned int asid; member
234 unsigned int asid) in gxio_trio_config_msi_intr() argument
247 params->asid = asid; in gxio_trio_config_msi_intr()
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| /linux-4.1.27/arch/mips/dec/ |
| D | kn01-berr.c | 83 long asid, entryhi, vaddr; in dec_kn01_be_backend() local
113 asid = read_c0_entryhi(); in dec_kn01_be_backend()
114 entryhi = asid & (PAGE_SIZE - 1); in dec_kn01_be_backend()
122 write_c0_entryhi(asid); in dec_kn01_be_backend()
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| /linux-4.1.27/arch/mips/kvm/ |
| D | tlb.c | 602 unsigned long asid = asid_cache(cpu); in kvm_get_new_mmu_context() local
604 asid += ASID_INC; in kvm_get_new_mmu_context()
605 if (!(asid & ASID_MASK)) { in kvm_get_new_mmu_context()
611 if (!asid) /* fix version if needed */ in kvm_get_new_mmu_context()
612 asid = ASID_FIRST_VERSION; in kvm_get_new_mmu_context()
615 cpu_context(cpu, mm) = asid_cache(cpu) = asid; in kvm_get_new_mmu_context()
680 vcpu->arch.guest_kernel_mm.context.asid[cpu]; in kvm_arch_vcpu_load()
683 vcpu->arch.guest_user_mm.context.asid[cpu]; in kvm_arch_vcpu_load()
776 unsigned long paddr, flags, vpn2, asid; in kvm_get_inst() local
788 asid = kvm_read_c0_guest_entryhi(cop0) & ASID_MASK; in kvm_get_inst()
[all …]
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| /linux-4.1.27/arch/tile/include/gxio/ |
| D | trio.h | 182 unsigned int asid; member
251 size_t target_size, unsigned int asid,
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| D | iorpc_trio.h | 73 uint64_t size, unsigned int asid,
89 unsigned int asid);
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| /linux-4.1.27/drivers/iommu/ |
| D | tegra-smmu.c | 168 unsigned long asid) in smmu_flush_tlb_asid() argument
172 value = SMMU_TLB_FLUSH_ASID_MATCH | SMMU_TLB_FLUSH_ASID(asid) | in smmu_flush_tlb_asid()
178 unsigned long asid, in smmu_flush_tlb_section() argument
183 value = SMMU_TLB_FLUSH_ASID_MATCH | SMMU_TLB_FLUSH_ASID(asid) | in smmu_flush_tlb_section()
189 unsigned long asid, in smmu_flush_tlb_group() argument
194 value = SMMU_TLB_FLUSH_ASID_MATCH | SMMU_TLB_FLUSH_ASID(asid) | in smmu_flush_tlb_group()
312 unsigned int asid) in tegra_smmu_enable() argument
333 value |= SMMU_ASID_VALUE(asid); in tegra_smmu_enable()
340 unsigned int asid) in tegra_smmu_disable() argument
350 value |= SMMU_ASID_VALUE(asid); in tegra_smmu_disable()
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| D | shmobile-ipmmu.c | 47 int asid) in ipmmu_tlb_set() argument
87 ipmmu_reg_write(ipmmu, IMASID, asid); in ipmmu_tlb_set()
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| D | shmobile-ipmmu.h | 25 int asid);
|
| /linux-4.1.27/arch/m68k/mm/ |
| D | mcfmmu.c | 91 int asid; in cf_tlb_miss() local
132 asid = mm->context & 0xff; in cf_tlb_miss()
136 mmutr = (mmuar & PAGE_MASK) | (asid << MMUTR_IDN) | MMUTR_V; in cf_tlb_miss()
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| /linux-4.1.27/arch/arm/include/asm/ |
| D | tlbflush.h | 369 const int asid = ASID(mm); in __local_flush_tlb_mm() local
380 tlb_op(TLB_V6_U_ASID, "c8, c7, 2", asid); in __local_flush_tlb_mm()
381 tlb_op(TLB_V6_D_ASID, "c8, c6, 2", asid); in __local_flush_tlb_mm()
382 tlb_op(TLB_V6_I_ASID, "c8, c5, 2", asid); in __local_flush_tlb_mm()
387 const int asid = ASID(mm); in local_flush_tlb_mm() local
394 tlb_op(TLB_V7_UIS_ASID, "c8, c7, 2", asid); in local_flush_tlb_mm()
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| /linux-4.1.27/arch/m32r/mm/ |
| D | fault.c | 491 unsigned long asid; in local_flush_tlb_range() local
493 asid = mm_context(mm) & MMU_CONTEXT_ASID_MASK; in local_flush_tlb_range()
498 start |= asid; in local_flush_tlb_range()
499 end |= asid; in local_flush_tlb_range()
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| /linux-4.1.27/arch/m68k/include/asm/ |
| D | mmu_context.h | 100 int asid; in load_ksp_mmu() local
139 asid = mm->context & 0xff; in load_ksp_mmu()
143 mmu_write(MMUTR, (mmuar & PAGE_MASK) | (asid << MMUTR_IDN) | in load_ksp_mmu()
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| /linux-4.1.27/arch/tile/mm/ |
| D | migrate.h | 32 HV_ASID asid,
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| /linux-4.1.27/arch/sh/kernel/ |
| D | smp.c | 460 void flush_tlb_one(unsigned long asid, unsigned long vaddr) in flush_tlb_one() argument
464 fd.addr1 = asid; in flush_tlb_one()
468 local_flush_tlb_one(asid, vaddr); in flush_tlb_one()
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| /linux-4.1.27/arch/arc/include/asm/ |
| D | mmu.h | 51 unsigned long asid[NR_CPUS]; /* 8 bit MMU PID + Generation cycle */ member
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| D | mmu_context.h | 50 #define asid_mm(mm, cpu) mm->context.asid[cpu]
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| /linux-4.1.27/arch/x86/include/asm/uv/ |
| D | uv_mmrs.h | 897 unsigned long asid:24; /* RO */ member
902 unsigned long asid:24; /* RO */ member
907 unsigned long asid:24; /* RO */ member
912 unsigned long asid:24; /* RO */ member
917 unsigned long asid:24; /* RO */ member
1339 unsigned long asid:24; /* RO */ member
1344 unsigned long asid:24; /* RO */ member
1349 unsigned long asid:24; /* RO */ member
1354 unsigned long asid:24; /* RO */ member
1359 unsigned long asid:24; /* RO */ member
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| /linux-4.1.27/arch/tile/include/hv/ |
| D | hypervisor.h | 772 int hv_install_context(HV_PhysAddr page_table, HV_PTE access, HV_ASID asid,
820 HV_ASID asid; member
843 int hv_flush_asid(HV_ASID asid);
1901 HV_ASID asid:10; member
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| /linux-4.1.27/arch/x86/kvm/ |
| D | trace.h | 629 TP_PROTO(__u64 rip, int asid, u64 address),
630 TP_ARGS(rip, asid, address),
634 __field( int, asid )
640 __entry->asid = asid;
645 __entry->rip, __entry->asid, __entry->address)
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| D | svm.c | 459 static inline void invlpga(unsigned long addr, u32 asid) in invlpga() argument
461 asm volatile (__ex(SVM_INVLPGA) : : "a"(addr), "c"(asid)); in invlpga()
1664 svm->vmcb->control.asid = sd->next_asid++; in new_asid()
2291 dst->asid = from->asid; in copy_vmcb_control_area()
2468 if (vmcb->control.asid == 0) in nested_vmcb_checks()
3413 pr_err("%-20s%d\n", "asid:", control->asid); in dump_vmcb()
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| /linux-4.1.27/arch/arc/kernel/ |
| D | asm-offsets.c | 44 DEFINE(MM_CTXT_ASID, offsetof(mm_context_t, asid)); in main()
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| /linux-4.1.27/arch/unicore32/mm/ |
| D | proc-macros.S | 77 .macro asid, rd, rn macro
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| /linux-4.1.27/arch/arc/mm/ |
| D | tlbex.S | 234 lr r3,[ARC_REG_TLBPD0] ; MMU prepares PD0 with vaddr and asid
236 or r3, r3, r2 ; S | vaddr | {sasid|asid}
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| /linux-4.1.27/arch/m68k/coldfire/ |
| D | head.S | 218 movec %d0,%asid
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| /linux-4.1.27/arch/x86/include/asm/ |
| D | svm.h | 67 u32 asid; member
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| /linux-4.1.27/security/selinux/ |
| D | hooks.c | 1493 u32 asid = cred_sid(actor), tsid = cred_sid(target); in cred_has_perm() local
1495 return avc_has_perm(asid, tsid, SECCLASS_PROCESS, perms, NULL); in cred_has_perm()
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