| /linux-4.1.27/arch/arm/mach-omap2/ |
| D | clkt_clksel.c | 76 __clk_get_name(clk->hw.clk), __clk_get_name(src_clk)); in _get_clksel_by_parent()
142 __clk_get_name(clk->hw.clk), field_val, in _clksel_to_divisor()
143 __clk_get_name(parent)); in _clksel_to_divisor()
184 __clk_get_name(clk->hw.clk), div, in _divisor_to_clksel()
185 __clk_get_name(parent)); in _divisor_to_clksel()
241 clk_name = __clk_get_name(clk->hw.clk); in omap2_clksel_round_rate_div()
275 clk_name, target_rate, __clk_get_name(parent)); in omap2_clksel_round_rate_div()
317 clk_name = __clk_get_name(hw->clk); in omap2_clksel_find_parent_index()
372 __clk_get_name(hw->clk), rate, div); in omap2_clksel_recalc()
431 pr_debug("clock: %s: set rate to %ld\n", __clk_get_name(hw->clk), in omap2_clksel_set_rate()
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| D | clock.c | 254 idlest_val, __clk_get_name(clk->hw.clk)); in _omap2_module_wait_ready()
280 clk_name = __clk_get_name(hw->clk); in omap2_init_clk_clkdm()
397 __func__, __clk_get_name(hw->clk), in omap2_dflt_clk_enable()
405 __clk_get_name(hw->clk)); in omap2_dflt_clk_enable()
451 __func__, __clk_get_name(hw->clk)); in omap2_dflt_clk_disable()
488 __clk_get_name(hw->clk)); in omap2_clkops_enable_clkdm()
494 __clk_get_name(hw->clk)); in omap2_clkops_enable_clkdm()
498 __func__, __clk_get_name(hw->clk)); in omap2_clkops_enable_clkdm()
504 __func__, __clk_get_name(hw->clk), clk->clkdm->name, ret); in omap2_clkops_enable_clkdm()
526 __clk_get_name(hw->clk)); in omap2_clkops_disable_clkdm()
[all …]
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| D | dpll3xxx.c | 65 clk_name = __clk_get_name(clk->hw.clk); in _omap3_wait_dpll_status()
141 pr_debug("clock: locking DPLL %s\n", __clk_get_name(clk->hw.clk)); in _omap3_noncore_dpll_lock()
188 __clk_get_name(clk->hw.clk)); in _omap3_noncore_dpll_bypass()
218 pr_debug("clock: stopping DPLL %s\n", __clk_get_name(clk->hw.clk)); in _omap3_noncore_dpll_stop()
424 __func__, __clk_get_name(hw->clk), in omap3_noncore_dpll_enable()
568 __clk_get_name(hw->clk), rate); in omap3_noncore_dpll_set_rate()
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| D | clkt_dpll.c | 303 clk_name = __clk_get_name(hw->clk); in omap2_dpll_round_rate()
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| D | omap_hwmod.c | 889 __clk_get_name(oc->_clk)); in _enable_optional_clocks()
904 __clk_get_name(oc->_clk)); in _disable_optional_clocks()
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| /linux-4.1.27/drivers/clk/ux500/ |
| D | clk-prcmu.c | 46 __clk_get_name(hw->clk)); in clk_prcmu_unprepare()
104 (char *)__clk_get_name(hw->clk), in clk_prcmu_opp_prepare()
108 __func__, __clk_get_name(hw->clk)); in clk_prcmu_opp_prepare()
117 (char *)__clk_get_name(hw->clk)); in clk_prcmu_opp_prepare()
132 __clk_get_name(hw->clk)); in clk_prcmu_opp_unprepare()
138 (char *)__clk_get_name(hw->clk)); in clk_prcmu_opp_unprepare()
154 __func__, __clk_get_name(hw->clk)); in clk_prcmu_opp_volt_prepare()
177 __clk_get_name(hw->clk)); in clk_prcmu_opp_volt_unprepare()
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| D | clk-sysctrl.c | 55 __func__, __clk_get_name(hw->clk)); in clk_sysctrl_unprepare()
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| /linux-4.1.27/drivers/clk/st/ |
| D | clkgen-pll.c | 294 pr_debug("%s:%s rate %lu\n", __clk_get_name(hw->clk), __func__, rate); in recalc_stm_pll800c65()
319 pr_debug("%s:%s rate %lu\n", __clk_get_name(hw->clk), __func__, rate); in recalc_stm_pll1600c65()
341 pr_debug("%s:%s rate %lu\n", __clk_get_name(hw->clk), __func__, rate); in recalc_stm_pll3200c32()
368 pr_debug("%s:%s rate %lu\n", __clk_get_name(hw->clk), __func__, rate); in recalc_stm_pll1200c32()
424 __clk_get_name(clk), in clkgen_pll_register()
425 __clk_get_name(clk_get_parent(clk)), in clkgen_pll_register()
441 __clk_get_name(clk), in clkgen_c65_lsdiv_register()
442 __clk_get_name(clk_get_parent(clk)), in clkgen_c65_lsdiv_register()
515 clk_data->clks[1] = clkgen_c65_lsdiv_register(__clk_get_name in clkgena_c65_pll_setup()
590 __clk_get_name(clk), in clkgen_odf_register()
[all …]
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| D | clkgen-mux.c | 144 __func__, __clk_get_name(hw->clk)); in clkgena_divmux_get_parent()
282 __clk_get_name(clk), in clk_register_genamux()
283 __clk_get_name(clk_get_parent(clk)), in clk_register_genamux()
524 __clk_get_name(clk), in st_of_clkgena_prediv_setup()
525 __clk_get_name(clk_get_parent(clk)), in st_of_clkgena_prediv_setup()
664 __clk_get_name(clk), in st_of_clkgen_mux_setup()
665 __clk_get_name(clk_get_parent(clk)), in st_of_clkgen_mux_setup()
798 __clk_get_name(clk), in st_of_clkgen_vcc_setup()
799 __clk_get_name(clk_get_parent(clk)), in st_of_clkgen_vcc_setup()
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| D | clkgen-fsyn.c | 515 __clk_get_name(hw->clk), __func__); in quadfs_pll_fs660c32_recalc_rate()
560 __func__, __clk_get_name(hw->clk), in quadfs_pll_fs660c32_round_rate()
583 __func__, __clk_get_name(hw->clk), in quadfs_pll_fs660c32_set_rate()
747 pr_debug("%s: %s\n", __func__, __clk_get_name(hw->clk)); in quadfs_fsynth_enable()
772 pr_debug("%s: %s\n", __func__, __clk_get_name(hw->clk)); in quadfs_fsynth_disable()
789 __func__, __clk_get_name(hw->clk), nsb); in quadfs_fsynth_is_enabled()
948 __clk_get_name(hw->clk), __func__); in quadfs_recalc_rate()
951 pr_debug("%s:%s rate %lu\n", __clk_get_name(hw->clk), __func__, rate); in quadfs_recalc_rate()
964 __func__, __clk_get_name(hw->clk), in quadfs_round_rate()
1138 __clk_get_name(clk), in st_of_create_quadfs_fsynths()
[all …]
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| D | clk-flexgen.c | 47 pr_debug("%s: flexgen output enabled\n", __clk_get_name(hw->clk)); in flexgen_enable()
61 pr_debug("%s: flexgen output disabled\n", __clk_get_name(hw->clk)); in flexgen_disable()
236 __clk_get_name(clk), in clk_register_flexgen()
237 __clk_get_name(clk_get_parent(clk)), in clk_register_flexgen()
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| /linux-4.1.27/drivers/clk/samsung/ |
| D | clk-s5pv210-audss.c | 115 mout_audss_p[0] = __clk_get_name(pll_ref); in s5pv210_audss_clk_probe()
118 mout_audss_p[1] = __clk_get_name(pll_in); in s5pv210_audss_clk_probe()
126 mout_i2s_p[1] = __clk_get_name(cdclk); in s5pv210_audss_clk_probe()
129 mout_i2s_p[2] = __clk_get_name(sclk_audio); in s5pv210_audss_clk_probe()
146 hclk_p = __clk_get_name(hclk); in s5pv210_audss_clk_probe()
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| D | clk-exynos-audss.c | 146 mout_audss_p[0] = __clk_get_name(pll_ref); in exynos_audss_clk_probe()
148 mout_audss_p[1] = __clk_get_name(pll_in); in exynos_audss_clk_probe()
169 mout_i2s_p[1] = __clk_get_name(cdclk); in exynos_audss_clk_probe()
171 mout_i2s_p[2] = __clk_get_name(sclk_audio); in exynos_audss_clk_probe()
207 sclk_pcm_p = __clk_get_name(sclk_pcm_in); in exynos_audss_clk_probe()
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| D | clk-pll.c | 183 drate, __clk_get_name(hw->clk)); in samsung_pll35xx_set_rate()
291 drate, __clk_get_name(hw->clk)); in samsung_pll36xx_set_rate()
406 drate, __clk_get_name(hw->clk)); in samsung_pll45xx_set_rate()
458 __func__, __clk_get_name(hw->clk)); in samsung_pll45xx_set_rate()
557 drate, __clk_get_name(hw->clk)); in samsung_pll46xx_set_rate()
617 __func__, __clk_get_name(hw->clk)); in samsung_pll46xx_set_rate()
775 drate, __clk_get_name(hw->clk)); in samsung_s3c2410_pll_set_rate()
1016 drate, __clk_get_name(hw->clk)); in samsung_pll2550xx_set_rate()
1114 drate, __clk_get_name(hw->clk)); in samsung_pll2650xx_set_rate()
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| D | clk-exynos-clkout.c | 82 parent_names[i] = __clk_get_name(parents[i]); in exynos_clkout_init()
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| /linux-4.1.27/drivers/clk/tegra/ |
| D | clk.c | 236 __func__, __clk_get_name(parent), in tegra_init_from_table()
237 __clk_get_name(clk)); in tegra_init_from_table()
246 __clk_get_name(clk)); in tegra_init_from_table()
253 __clk_get_name(clk)); in tegra_init_from_table()
303 clk_register_clkdev(clks[i], __clk_get_name(clks[i]), in tegra_register_devclks()
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| D | clk-pll.c | 267 __clk_get_name(pll->hw.clk)); in clk_pll_wait_for_lock()
598 __func__, __clk_get_name(hw->clk), in clk_pll_set_rate()
608 __clk_get_name(hw->clk), rate); in clk_pll_set_rate()
666 __clk_get_name(hw->clk)); in clk_pll_recalc_rate()
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| /linux-4.1.27/drivers/clk/ |
| D | clk-conf.c | 67 __clk_get_name(clk), __clk_get_name(pclk), rc); in __set_clk_parents()
110 __clk_get_name(clk), rc); in __set_clk_rates()
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| D | clk-si5351.c | 442 __func__, __clk_get_name(hwdata->hw.clk), in si5351_pll_recalc_rate()
500 __func__, __clk_get_name(hwdata->hw.clk), a, b, c, in si5351_pll_round_rate()
524 __func__, __clk_get_name(hwdata->hw.clk), in si5351_pll_set_rate()
635 __func__, __clk_get_name(hwdata->hw.clk), in si5351_msynth_recalc_rate()
736 __func__, __clk_get_name(hwdata->hw.clk), a, b, c, divby4, in si5351_msynth_round_rate()
768 __func__, __clk_get_name(hwdata->hw.clk), in si5351_msynth_set_rate()
1033 __func__, __clk_get_name(hwdata->hw.clk), (1 << rdiv), in si5351_clkout_round_rate()
1084 __func__, __clk_get_name(hwdata->hw.clk), (1 << rdiv), in si5351_clkout_set_rate()
1414 drvdata->pxtal_name = __clk_get_name(drvdata->pxtal); in si5351_i2c_probe()
1432 drvdata->pclkin_name = __clk_get_name(drvdata->pclkin); in si5351_i2c_probe()
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| D | clk-divider.c | 126 __clk_get_name(hw->clk)); in divider_recalc_rate()
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| D | clk-cdce706.c | 492 cdce->clkin_name[i] = __clk_get_name(parent); in cdce706_register_clkin()
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| D | clk.c | 584 const char *__clk_get_name(struct clk *clk) in __clk_get_name() function
588 EXPORT_SYMBOL_GPL(__clk_get_name);
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| /linux-4.1.27/drivers/clk/rockchip/ |
| D | clk-pll.c | 140 __clk_get_name(hw->clk)); in rockchip_rk3066_pll_recalc_rate()
178 __func__, __clk_get_name(hw->clk), old_rate, drate, prate); in rockchip_rk3066_pll_set_rate()
184 drate, __clk_get_name(hw->clk)); in rockchip_rk3066_pll_set_rate()
290 __func__, __clk_get_name(hw->clk), drate, rate->nr, nr, in rockchip_rk3066_pll_init()
299 __func__, __clk_get_name(hw->clk)); in rockchip_rk3066_pll_init()
304 __func__, __clk_get_name(hw->clk)); in rockchip_rk3066_pll_init()
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| D | clk-mmc-phase.c | 108 __clk_get_name(hw->clk), degrees, delay_num, in rockchip_mmc_set_phase()
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| /linux-4.1.27/drivers/clk/berlin/ |
| D | berlin2-pll.c | 71 pr_warn("%s has zero rfdiv\n", __clk_get_name(hw->clk)); in berlin2_pll_recalc_rate()
80 __clk_get_name(hw->clk), vcodivsel); in berlin2_pll_recalc_rate()
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| D | bg2.c | 517 clk_names[REFCLK] = __clk_get_name(clk); in berlin2_clock_setup()
523 clk_names[VIDEO_EXT0] = __clk_get_name(clk); in berlin2_clock_setup()
581 clk_names[SYSPLL] = __clk_get_name(clk); in berlin2_clock_setup()
589 clk_names[MEMPLL] = __clk_get_name(clk); in berlin2_clock_setup()
597 clk_names[CPUPLL] = __clk_get_name(clk); in berlin2_clock_setup()
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| D | bg2q.c | 314 clk_names[REFCLK] = __clk_get_name(clk); in berlin2q_clock_setup()
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| /linux-4.1.27/drivers/cpufreq/ |
| D | ls1x-cpufreq.c | 162 __clk_get_name(ls1x_cpufreq.clk)); in ls1x_cpufreq_probe()
171 __clk_get_name(ls1x_cpufreq.mux_clk)); in ls1x_cpufreq_probe()
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| /linux-4.1.27/drivers/clk/ti/ |
| D | clockdomain.c | 46 __clk_get_name(clk)); in of_ti_clockdomain_setup()
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| D | apll.c | 50 clk_name = __clk_get_name(clk->hw.clk); in dra7_apll_enable()
275 __clk_get_name(clk->hw.clk)); in omap2_apll_enable()
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| D | divider.c | 112 __clk_get_name(hw->clk)); in ti_clk_divider_recalc_rate()
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| /linux-4.1.27/drivers/staging/clocking-wizard/ |
| D | clk-xlnx-clock-wizard.c | 213 __clk_get_name(clk_wzrd->clk_in1), in clk_wzrd_probe()
233 __clk_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]), in clk_wzrd_probe()
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| /linux-4.1.27/drivers/clk/qcom/ |
| D | clk-branch.c | 78 const char *name = __clk_get_name(br->clkr.hw.clk); in clk_branch_wait()
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| D | clk-rcg2.c | 83 __func__, __clk_get_name(hw->clk)); in clk_rcg2_get_parent()
92 const char *name = __clk_get_name(hw->clk); in update_config()
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| D | clk-pll.c | 197 const char *name = __clk_get_name(pll->clkr.hw.clk); in wait_for_pll()
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| D | clk-rcg.c | 62 __func__, __clk_get_name(hw->clk)); in clk_rcg_get_parent()
98 __func__, __clk_get_name(hw->clk)); in clk_dyn_rcg_get_parent()
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| /linux-4.1.27/drivers/clk/pistachio/ |
| D | clk.c | 138 __clk_get_name(clk), err); in pistachio_clk_force_enable()
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| /linux-4.1.27/arch/arm/mach-omap1/ |
| D | clock.h | 48 #define __clk_get_name(clk) (clk->name) macro
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| /linux-4.1.27/drivers/clk/sunxi/ |
| D | clk-sun9i-mmc.c | 138 clk_parent = __clk_get_name(data->clk); in sun9i_a80_mmc_config_clk_probe()
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| D | clk-mod0.c | 334 parent = __clk_get_name(clk_data->clks[0]); in sunxi_mmc_setup()
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| D | clk-sunxi.c | 1142 parent = __clk_get_name(pclk); in sunxi_divs_clk_setup()
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| /linux-4.1.27/drivers/clk/mvebu/ |
| D | clk-cpu.c | 213 cpuclk[cpu].parent_name = __clk_get_name(parent_clk); in of_cpu_clk_setup()
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| D | common.c | 258 default_parent = __clk_get_name(clk); in mvebu_clk_gating_setup()
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| /linux-4.1.27/drivers/clk/shmobile/ |
| D | clk-div6.c | 142 __func__, __clk_get_name(hw->clk), hw_index); in cpg_div6_clock_get_parent()
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| /linux-4.1.27/include/linux/ |
| D | clk-provider.h | 567 const char *__clk_get_name(struct clk *clk);
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| /linux-4.1.27/drivers/clk/mmp/ |
| D | clk-mix.c | 184 __func__, __clk_get_name(mix->hw.clk)); in _set_rate()
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| /linux-4.1.27/drivers/gpu/drm/imx/ |
| D | imx-tve.c | 482 tve_di_parent[0] = __clk_get_name(tve->clk); in tve_clk_init()
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| /linux-4.1.27/sound/soc/mxs/ |
| D | mxs-saif.c | 689 __clk_get_name(saif->clk), 0, in mxs_saif_mclk_init()
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| /linux-4.1.27/sound/soc/samsung/ |
| D | i2s.c | 1180 p_names[i] = __clk_get_name(rclksrc); in i2s_register_clock_provider()
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| /linux-4.1.27/drivers/media/platform/exynos4-is/ |
| D | media-dev.c | 1233 p_name = __clk_get_name(fmd->camclk[i].clock); in fimc_md_register_clk_provider()
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| /linux-4.1.27/lib/ |
| D | vsprintf.c | 1353 return string(buf, end, __clk_get_name(clk), spec); in clock()
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