| /linux-4.1.27/drivers/mtd/nand/ |
| D | nuc900_nand.c | 36 #define SWRST 0x01 macro
232 val &= ~(SWRST|PSIZE|DMARWEN|BUSWID|ECC4EN|NANDCS); in nuc900_nand_enable()
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| /linux-4.1.27/drivers/clk/samsung/ |
| D | clk-s3c2412.c | 30 #define SWRST 0x30 macro
222 __raw_writel(0x533C2412, reg_base + SWRST); in s3c2412_restart()
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| D | clk-s3c2443.c | 37 #define SWRST 0x44 macro
362 __raw_writel(0x533c2443, reg_base + SWRST); in s3c2443_restart()
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| /linux-4.1.27/drivers/net/ethernet/apple/ |
| D | mace.h | 118 #define SWRST 0x01 /* software reset */ macro
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| D | macmace.c | 275 mb->biucc = SWRST; in mace_reset()
276 if (mb->biucc & SWRST) { in mace_reset()
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| D | mace.c | 326 out_8(&mb->biucc, SWRST); in mace_reset()
327 if (in_8(&mb->biucc) & SWRST) { in mace_reset()
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| /linux-4.1.27/drivers/spi/ |
| D | spi-atmel.c | 1370 spi_writel(as, CR, SPI_BIT(SWRST)); in atmel_spi_probe()
1371 spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */ in atmel_spi_probe()
1405 spi_writel(as, CR, SPI_BIT(SWRST)); in atmel_spi_probe()
1406 spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */ in atmel_spi_probe()
1432 spi_writel(as, CR, SPI_BIT(SWRST)); in atmel_spi_remove()
1433 spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */ in atmel_spi_remove()
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| /linux-4.1.27/arch/blackfin/mach-bf533/include/mach/ |
| D | defBF532.h | 25 #define SWRST 0xFFC00100 /* Software Reset Register (16-bit) */ macro
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| D | cdefBF532.h | 22 #define bfin_read_SWRST() bfin_read16(SWRST)
23 #define bfin_write_SWRST(val) bfin_write16(SWRST,val)
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| /linux-4.1.27/arch/blackfin/mach-bf518/include/mach/ |
| D | defBF512.h | 23 #define SWRST 0xFFC00100 /* Software Reset Register */ macro
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| D | cdefBF512.h | 24 #define bfin_read_SWRST() bfin_read16(SWRST)
25 #define bfin_write_SWRST(val) bfin_write16(SWRST, val)
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| /linux-4.1.27/arch/blackfin/mach-bf527/include/mach/ |
| D | defBF522.h | 26 #define SWRST 0xFFC00100 /* Software Reset Register */ macro
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| D | cdefBF522.h | 24 #define bfin_read_SWRST() bfin_read16(SWRST)
25 #define bfin_write_SWRST(val) bfin_write16(SWRST, val)
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| /linux-4.1.27/arch/blackfin/mach-bf561/include/mach/ |
| D | defBF561.h | 30 #define SWRST 0xFFC00100 /* Software Reset register */ macro
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| D | cdefBF561.h | 26 #define bfin_read_SWRST() bfin_read16(SWRST)
27 #define bfin_write_SWRST(val) bfin_write16(SWRST,val)
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| /linux-4.1.27/arch/blackfin/mach-bf537/include/mach/ |
| D | defBF534.h | 22 #define SWRST 0xFFC00100 /* Software Reset Register */ macro
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| D | cdefBF534.h | 22 #define bfin_read_SWRST() bfin_read16(SWRST)
23 #define bfin_write_SWRST(val) bfin_write16(SWRST,val)
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| /linux-4.1.27/arch/blackfin/mach-bf538/include/mach/ |
| D | defBF538.h | 24 #define SWRST 0xFFC00100 /* Software Reset Register (16-bit) */ macro
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| D | cdefBF538.h | 22 #define bfin_read_SWRST() bfin_read16(SWRST)
23 #define bfin_write_SWRST(val) bfin_write16(SWRST, val)
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| /linux-4.1.27/arch/blackfin/mach-bf548/include/mach/ |
| D | defBF54x_base.h | 33 #define SWRST 0xffc00100 /* Software Reset Register */ macro
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| D | cdefBF54x_base.h | 32 #define bfin_read_SWRST() bfin_read16(SWRST)
33 #define bfin_write_SWRST(val) bfin_write16(SWRST, val)
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| /linux-4.1.27/arch/blackfin/kernel/ |
| D | debug-mmrs.c | 1460 D16(SWRST); in bfin_debug_mmrs_init()
|