Searched refs:SSSR_ROR (Results 1 – 8 of 8) sorted by relevance
32 if (status & SSSR_ROR) in ssp_interrupt()35 Ser4SSSR = SSSR_ROR; in ssp_interrupt()177 Ser4SSSR = SSSR_ROR; in ssp_restore_state()205 Ser4SSSR = SSSR_ROR; in ssp_init()
122 error = status & SSSR_ROR; in pxa2xx_spi_dma_transfer_complete()254 if (status & SSSR_ROR) { in pxa2xx_spi_dma_transfer()
306 write_SSSR_CS(drv_data, SSSR_ROR); in pxa2xx_spi_flush()532 if (irq_status & SSSR_ROR) { in interrupt_transfer()1382 drv_data->clear_sr = SSSR_ROR; in pxa2xx_spi_probe()1383 drv_data->mask_sr = SSSR_RFS | SSSR_TFS | SSSR_ROR; in pxa2xx_spi_probe()1388 drv_data->clear_sr = SSSR_ROR | SSSR_TINT; in pxa2xx_spi_probe()1389 drv_data->mask_sr = SSSR_TINT | SSSR_RFS | SSSR_TFS | SSSR_ROR; in pxa2xx_spi_probe()
244 if (irq_status & SSSR_ROR) { in pxa2xx_spi_dma_transfer()
84 #define SSSR_ROR (1 << 7) /* Receive FIFO Overrun */ macro
68 | SSSR_ROR /* ROR = 1; Clear ROR */
155 uint32_t sssr = SSSR_ROR | SSSR_TUR | SSSR_BCE; in pxa_ssp_resume()
808 #define SSSR_ROR 0x00000040 /* Receive FIFO Over-Run */ macro