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Searched refs:SR (Results 1 – 75 of 75) sorted by relevance

/linux-4.1.27/Documentation/PCI/
Dpci-iov-howto.txt11 1.1 What is SR-IOV
13 Single Root I/O Virtualization (SR-IOV) is a PCI Express Extended
28 2.1 How can I enable SR-IOV capability
30 Multiple methods are available for SR-IOV enablement.
32 enabling and disabling of the capability via API provided by SR-IOV core.
33 If the hardware has SR-IOV capability, loading its PF driver would
54 3.1 SR-IOV API
56 To enable SR-IOV capability:
64 To disable SR-IOV capability:
73 Following piece of code illustrates the usage of the SR-IOV API.
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/linux-4.1.27/drivers/macintosh/
Dvia-cuda.c46 #define SR (10*RS) /* Shift register */ macro
267 (void)in_8(&via[SR]); /* clear any left-over data */ in cuda_init_via()
277 (void)in_8(&via[SR]); in cuda_init_via()
288 (void)in_8(&via[SR]); in cuda_init_via()
297 (void)in_8(&via[SR]); in cuda_init_via()
428 out_8(&via[SR], req->data[0]); in cuda_start()
483 (void)in_8(&via[SR]); in cuda_interrupt()
494 (void)in_8(&via[SR]); in cuda_interrupt()
505 (void)in_8(&via[SR]); in cuda_interrupt()
512 out_8(&via[SR], current_req->data[1]); in cuda_interrupt()
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Dvia-macii.c52 #define SR (10*RS) /* Shift register */ macro
187 x = via[SR]; in macii_init_via()
362 via[SR] = req->data[1]; in macii_start()
414 x = via[SR]; in macii_interrupt()
456 x = via[SR]; in macii_interrupt()
461 via[SR] = req->data[data_index++]; in macii_interrupt()
474 x = via[SR]; in macii_interrupt()
515 x = via[SR]; in macii_interrupt()
Dvia-maciisi.c37 #define SR (10*RS) /* Shift register */ macro
167 tmp = via[SR]; /* Clear shift register */ in maciisi_stfu()
203 tmp = via[SR]; in maciisi_init_via()
406 via[SR] = req->data[0]; in maciisi_start()
474 tmp = via[SR]; in maciisi_interrupt()
499 tmp = via[SR]; in maciisi_interrupt()
516 tmp = via[SR]; in maciisi_interrupt()
543 via[SR] = req->data[data_index++]; in maciisi_interrupt()
568 *reply_ptr++ = via[SR]; in maciisi_interrupt()
579 tmp = via[SR]; /* That's what happens in 2.2 */ in maciisi_interrupt()
Dvia-pmu68k.c58 #define SR (10*RS) /* Shift register */ macro
512 via1[SR] = x; in send_byte()
522 c = via1[SR]; /* resets SR */ in recv_byte()
587 if ((via1[ACR] & SR_OUT) == 0) bite = via1[SR]; in pmu_interrupt()
Dvia-pmu.c92 #define SR (10*RS) /* Shift register */ macro
1191 out_8(&v[SR], x); in send_byte()
1202 in_8(&v[SR]); /* resets SR */ in recv_byte()
1467 bite = in_8(&via[SR]); in pmu_sr_intr()
2441 via[SR] = x; eieio(); in polled_send_byte()
2451 x = via[SR]; eieio(); in polled_recv_byte()
2453 x = via[SR]; eieio(); in polled_recv_byte()
/linux-4.1.27/arch/alpha/math-emu/
Dmath.c101 FP_DECL_S(SA); FP_DECL_S(SB); FP_DECL_S(SR); in alpha_fp_emul()
135 FP_SUB_S(SR, SA, SB); in alpha_fp_emul()
139 FP_ADD_S(SR, SA, SB); in alpha_fp_emul()
143 FP_MUL_S(SR, SA, SB); in alpha_fp_emul()
147 FP_DIV_S(SR, SA, SB); in alpha_fp_emul()
151 FP_SQRT_S(SR, SB); in alpha_fp_emul()
221 FP_CONV(S,D,1,1,SR,DB); in alpha_fp_emul()
259 FP_FROM_INT_S(SR, ((long)vb), 64, long); in alpha_fp_emul()
271 FP_PACK_SP(&vc, SR); in alpha_fp_emul()
/linux-4.1.27/arch/sparc/math-emu/
Dmath_32.c285 FP_DECL_S(SA); FP_DECL_S(SB); FP_DECL_S(SR); in do_one_mathemu()
427 case FADDS: FP_ADD_S (SR, SA, SB); break; in do_one_mathemu()
431 case FSUBS: FP_SUB_S (SR, SA, SB); break; in do_one_mathemu()
435 case FMULS: FP_MUL_S (SR, SA, SB); break; in do_one_mathemu()
443 case FDIVS: FP_DIV_S (SR, SA, SB); break; in do_one_mathemu()
447 case FSQRTS: FP_SQRT_S (SR, SB); break; in do_one_mathemu()
459 case FITOS: IR = rs2->s; FP_FROM_INT_S (SR, IR, 32, int); break; in do_one_mathemu()
466 case FDTOS: FP_CONV (S, D, 1, 2, SR, DB); break; in do_one_mathemu()
467 case FQTOS: FP_CONV (S, Q, 1, 4, SR, QB); break; in do_one_mathemu()
506 case 5: FP_PACK_SP (rd, SR); break; in do_one_mathemu()
Dmath_64.c180 FP_DECL_S(SA); FP_DECL_S(SB); FP_DECL_S(SR); in do_mathemu()
432 case FADDS: FP_ADD_S (SR, SA, SB); break; in do_mathemu()
436 case FSUBS: FP_SUB_S (SR, SA, SB); break; in do_mathemu()
440 case FMULS: FP_MUL_S (SR, SA, SB); break; in do_mathemu()
448 case FDIVS: FP_DIV_S (SR, SA, SB); break; in do_mathemu()
452 case FSQRTS: FP_SQRT_S (SR, SB); break; in do_mathemu()
470 case FXTOS: XR = rs2->d; FP_FROM_INT_S (SR, XR, 64, long); break; in do_mathemu()
473 case FITOS: IR = rs2->s; FP_FROM_INT_S (SR, IR, 32, int); break; in do_mathemu()
480 case FDTOS: FP_CONV (S, D, 1, 1, SR, DB); break; in do_mathemu()
481 case FQTOS: FP_CONV (S, Q, 1, 2, SR, QB); break; in do_mathemu()
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/linux-4.1.27/Documentation/sh/
Dregister-banks.txt8 bank (selected by SR.RB, only r0 ... r7 are banked), whereas other families
11 SR.RB banking
15 r0 ... r7 if SR.RB is set to the bank we are interested in, otherwise ldc/stc
17 when in the context of another bank. The developer must keep the SR.RB value
30 - The SR.IMASK interrupt handler makes use of this to set the
/linux-4.1.27/arch/avr32/mach-at32ap/
Dintc.c79 status_reg = sysreg_read(SR); in do_IRQ()
82 sysreg_write(SR, status_reg); in do_IRQ()
134 sysreg_write(SR, (sysreg_read(SR) in init_IRQ()
/linux-4.1.27/Documentation/networking/
Dixgbe.txt45 SR Modules
46 Intel DUAL RATE 1G/10G SFP+ SR (bailed) FTLX8571D3BCV-IT
47 Intel DUAL RATE 1G/10G SFP+ SR (bailed) AFBR-703SDDZ-IN1
48 Intel DUAL RATE 1G/10G SFP+ SR (bailed) AFBR-703SDZ-IN2
59 Finisar SFP+ SR bailed, 10g single rate FTLX8571D3BCL
60 Avago SFP+ SR bailed, 10g single rate AFBR-700SDZ
63 Finisar DUAL RATE 1G/10G SFP+ SR (No Bail) FTLX8571D3QCV-IT
64 Avago DUAL RATE 1G/10G SFP+ SR (No Bail) AFBR-703SDZ-IN1
83 their original module type (i.e., the Intel(R) 10 Gigabit SR Dual Port
84 Express Module only supports SR optical modules). If you plug in a different
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Digbvf.txt17 be activated on kernels that support SR-IOV. SR-IOV requires the correct
42 be activated on kernels that support SR-IOV.
Dswitchdev.txt6 including switches embedded into SR-IOV NICs.
Digb.txt36 This parameter adds support for SR-IOV. It causes the driver to spawn up to
Dixgb.txt56 82597EX Intel(R) PRO/10GbE LR/SR/CX4 10G Base-LR (1310 nm optical fiber)
57 Server Adapters 10G Base-SR (850 nm optical fiber)
/linux-4.1.27/arch/sh/kernel/
Dhead_64.S168 getcon SR, r29
170 putcon r20, SR
257 getcon SR, r21
300 getcon SR, r21
303 putcon r22, SR /* Try to enable */
304 getcon SR, r22
/linux-4.1.27/arch/avr32/include/asm/
Dirqflags.h16 return sysreg_read(SR); in arch_local_save_flags()
28 sysreg_write(SR, flags); in arch_local_irq_restore()
/linux-4.1.27/drivers/video/fbdev/omap2/dss/
Ddispc.c279 #define SR(reg) \ macro
290 SR(IRQENABLE); in dispc_save_context()
291 SR(CONTROL); in dispc_save_context()
292 SR(CONFIG); in dispc_save_context()
293 SR(LINE_NUMBER); in dispc_save_context()
296 SR(GLOBAL_ALPHA); in dispc_save_context()
298 SR(CONTROL2); in dispc_save_context()
299 SR(CONFIG2); in dispc_save_context()
302 SR(CONTROL3); in dispc_save_context()
303 SR(CONFIG3); in dispc_save_context()
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Ddss.c124 #define SR(reg) \ macro
133 SR(CONTROL); in dss_save_context()
137 SR(SDI_CONTROL); in dss_save_context()
138 SR(PLL_CONTROL); in dss_save_context()
164 #undef SR
/linux-4.1.27/arch/sh/include/cpu-sh5/cpu/
Dregisters.h25 #define SR cr0 macro
87 #define __SR __str(SR)
/linux-4.1.27/drivers/media/pci/ngene/
Dngene-core.c97 while (Cur->ngeneBuffer.SR.Flags & 0x80) { in demux_tasklet()
100 if (Cur->ngeneBuffer.SR.Flags & 0x20) in demux_tasklet()
106 Cur->ngeneBuffer.SR. in demux_tasklet()
120 Cur->ngeneBuffer.SR.Flags &= in demux_tasklet()
133 Cur->ngeneBuffer.SR.Flags &= ~0x40; in demux_tasklet()
141 Cur->ngeneBuffer.SR.DTOUpdate = in demux_tasklet()
150 if (Cur->ngeneBuffer.SR.Flags & 0x01) in demux_tasklet()
152 if (Cur->ngeneBuffer.SR.Flags & 0x20) in demux_tasklet()
158 Cur->ngeneBuffer.SR.Clock, in demux_tasklet()
163 Cur->ngeneBuffer.SR.Clock, in demux_tasklet()
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Dngene.h188 struct BUFFER_STREAM_RESULTS SR; member
/linux-4.1.27/arch/sh/kernel/cpu/sh2a/
Dentry.S49 bld.b #6,@(0,r2) !previus SR.MD
50 bst.b #6,@(4*4,r15) !set cpu mode to SR.MD
53 bset.b #6,@(0,r2) !set SR.MD
66 mov.l r0,@-r15 ! original SR
94 mov.l @r8+,r11 ! old SR
/linux-4.1.27/drivers/staging/unisys/Documentation/ABI/
Dsysfs-platform-visorchipset71 responsible for enabling and disabling SR-IOV devices when the
74 Some SR-IOV devices have problems when the PF is reset without
90 responsible for enabling and disabling SR-IOV devices when the
93 Some SR-IOV devices have problems when the PF is reset without
/linux-4.1.27/arch/sh/kernel/cpu/sh3/
Dentry.S217 ! r8 passes SR bitmask, overwritten with restored data on return
245 mov.l @r15+, k3 ! original SR
259 ! Calculate new SR value
260 mov k3, k2 ! original SR value
264 and k1, k2 ! Mask original SR value
Dswsusp.S109 mov.l 2f, r3 ! get new SR value for bank1
117 mov.l 3f, k4 ! SR bits to clear in k4
/linux-4.1.27/Documentation/powerpc/
Dpci_iov_resource_on_powernv.txt92 SR-IOV). We basically use the trick of forcing the bridge MMIO windows
151 3. Considerations for SR-IOV on PowerKVM
153 * SR-IOV Background
155 The PCIe SR-IOV feature allows a single Physical Function (PF) to
156 support several Virtual Functions (VFs). Registers in the PF's SR-IOV
163 software uses VF BAR registers in the *PF* SR-IOV Capability to
167 When a VF BAR in the PF SR-IOV Capability is programmed, it sets the
169 PF SR-IOV Capability is programmed to enable eight VFs, and it has a
204 Finally, the plan to use M64 windows for SR-IOV, which will be described
217 SR-IOV VF BARs are all the same size.
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/linux-4.1.27/arch/powerpc/math-emu/
Dmath_efp.c219 FP_DECL_S(SA); FP_DECL_S(SB); FP_DECL_S(SR); in do_spe_mathemu()
250 FP_ADD_S(SR, SA, SB); in do_spe_mathemu()
254 FP_SUB_S(SR, SA, SB); in do_spe_mathemu()
258 FP_MUL_S(SR, SA, SB); in do_spe_mathemu()
262 FP_DIV_S(SR, SA, SB); in do_spe_mathemu()
297 FP_CONV(S, D, 1, 2, SR, DB); in do_spe_mathemu()
331 FP_PACK_SP(vc.wp + 1, SR); in do_spe_mathemu()
/linux-4.1.27/arch/m68k/ifpsp060/
DCHANGES79 SR = SR at time of exception
101 SR = SR at time of exception
Diskeleton.S72 btst #0x5,%sp@ | supervisor bit set in saved SR?
107 | * SR * * SR *
147 | * SR * * SR *
/linux-4.1.27/arch/sh/kernel/cpu/sh2/
Dentry.S51 mov.l @(5*4,r15),r3 ! previous SR
55 mov.l r3,@(5*4,r15) ! update SR
71 mov.l r0,@-r15 ! original SR
115 mov.l @r2+,r0 ! old SR
121 mov.l r0,@-r2 ! save old SR
/linux-4.1.27/Documentation/devicetree/bindings/powerpc/4xx/
Dcpm.txt12 in the following order (ER,FR,SR). The
14 (SR,ER,FR). For the second case set
/linux-4.1.27/drivers/video/fbdev/via/
Dviamode.h29 unsigned char SR[StdSR]; member
Dhw.c1813 via_write_reg(VIASR, i, VPIT.SR[i - 1]); in hw_init()
/linux-4.1.27/net/switchdev/
DKconfig13 SR-IOV NICs.
/linux-4.1.27/arch/sh/
DKconfig.cpu92 This will enable the use of SR.RB register bank usage. Processors
97 information on SR.RB and register banking in the kernel in general.
DKconfig.debug83 bool "Debug: set SR.WATCH to enable hardware watchpoints and trace"
/linux-4.1.27/drivers/spi/
Dspi-atmel.c517 while (spi_readl(as, SR) & SPI_BIT(RDRF)) { in atmel_spi_next_xfer_pio()
890 status = spi_readl(as, SR); in atmel_spi_pio_interrupt()
911 spi_readl(as, SR); in atmel_spi_pio_interrupt()
947 status = spi_readl(as, SR); in atmel_spi_pdc_interrupt()
958 spi_readl(as, SR); in atmel_spi_pdc_interrupt()
1140 if (spi_readl(as, SR) & SPI_BIT(TXEMPTY)) in atmel_spi_one_transfer()
1145 while (spi_readl(as, SR) & SPI_BIT(RDRF)) in atmel_spi_one_transfer()
1149 spi_readl(as, SR); in atmel_spi_one_transfer()
1434 spi_readl(as, SR); in atmel_spi_remove()
/linux-4.1.27/drivers/usb/misc/sisusbvga/
Dsisusb_struct.h71 unsigned char SR[4]; member
Dsisusb_init.c355 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[0] | 0x20; in SiS_SetSeqRegs()
359 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[i - 1]; in SiS_SetSeqRegs()
/linux-4.1.27/arch/s390/kernel/
Dsysinfo.c418 FP_DECL_S(SA); FP_DECL_S(SB); FP_DECL_S(SR); in s390_adjust_jiffies()
443 FP_DIV_S(SR, SA, SB); in s390_adjust_jiffies()
444 FP_TO_INT_S(capability, SR, 32, 0); in s390_adjust_jiffies()
/linux-4.1.27/arch/sh/kernel/cpu/sh5/
Dentry.S83 getcon SR, r6; \
85 putcon r6, SR;
88 getcon SR, r6; \
90 putcon r6, SR;
606 ! construct useful SR for handle_exception
613 ! SSR is now the current SR with the MD and MMU bits set
831 getcon SR, r6
834 putcon r6, SR
837 putcon r6, SR
909 getcon SR, r7
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/linux-4.1.27/drivers/net/ethernet/sfc/
DKconfig32 bool "Solarflare SFC9000-family SR-IOV support"
/linux-4.1.27/drivers/input/serio/
Dat32psif.c113 status = psif_readl(psif, SR); in psif_interrupt()
140 while (!(psif_readl(psif, SR) & PSIF_BIT(TXEMPTY)) && timeout--) in psif_write()
/linux-4.1.27/sound/soc/atmel/
Datmel_ssc_dai.c163 ssc_sr = (unsigned long)ssc_readl(ssc_p->ssc->regs, SR) in atmel_ssc_interrupt()
294 ssc_readl(ssc_p->ssc->regs, SR)); in atmel_ssc_startup()
791 ssc_readl(ssc_p->ssc->regs, SR)); in atmel_ssc_prepare()
834 ssc_p->ssc_state.ssc_sr = ssc_readl(ssc_p->ssc->regs, SR); in atmel_ssc_suspend()
/linux-4.1.27/Documentation/ABI/testing/
Dsysfs-bus-pci144 This symbolic link appears when hardware supports the SR-IOV
153 This symbolic link appears when hardware supports the SR-IOV
234 This file appears when a physical PCIe device supports SR-IOV.
238 in the PF's SR-IOV extended capability structure's TotalVFs
247 This file appears when a physical PCIe device supports SR-IOV.
/linux-4.1.27/arch/mips/include/asm/emma/
Demma2rh.h232 #define SR 0x000000ff macro
/linux-4.1.27/drivers/misc/
Datmel-ssc.c188 ssc_readl(ssc->regs, SR); in ssc_probe()
/linux-4.1.27/arch/avr32/kernel/
Dkprobes.c73 BUG_ON(!(sysreg_read(SR) & SYSREG_BIT(SR_D))); in prepare_singlestep()
Dsignal.c278 if ((sysreg_read(SR) & MODE_MASK) == MODE_SUPERVISOR) in do_notify_resume()
/linux-4.1.27/Documentation/filesystems/
Dnilfs2.txt184 blocks, and an optional super root block (SR):
199 | Summary | Payload blocks |SR|
238 | Summary | regular file | file | ... | ifile | cpfile | sufile | DAT |SR|
/linux-4.1.27/drivers/net/ethernet/qlogic/
DKconfig39 bool "QLOGIC QLCNIC 83XX family SR-IOV Support"
/linux-4.1.27/arch/frv/kernel/
Dcmode.S117 # (7) Set '1' to the DRCN.SR bit, and change SDRAM to the
/linux-4.1.27/drivers/clocksource/
Dtcb_clksrc.c172 sr = __raw_readl(dev->regs + ATMEL_TC_REG(2, SR)); in ch2_irq()
/linux-4.1.27/drivers/mtd/nand/
Datmel_nand.c937 while ((pmecc_readl_relaxed(host->ecc, SR) & PMECC_SR_BUSY)) { in atmel_nand_pmecc_read_page()
970 while ((pmecc_readl_relaxed(host->ecc, SR) & PMECC_SR_BUSY)) { in atmel_nand_pmecc_write_page()
1420 ecc_status = ecc_readl(host->ecc, SR); in atmel_nand_correct()
1646 u32 nfc_status = nfc_readl(host->nfc->hsmc_regs, SR); in nfc_read_status()
1756 while (nfc_readl(host->nfc->hsmc_regs, SR) & NFC_SR_BUSY) { in nfc_send_command()
2356 nfc_readl(nfc->hsmc_regs, SR); /* clear the NFC_SR */ in atmel_nand_nfc_probe()
/linux-4.1.27/drivers/pci/
DKconfig47 automatically re-allocate PCI resources if SR-IOV BARs have not
/linux-4.1.27/drivers/net/ethernet/chelsio/
DKconfig116 adapters and T5 based 40Gb Ethernet adapters with PCI-E SR-IOV Virtual
/linux-4.1.27/drivers/video/fbdev/sis/
Dvstruct.h134 unsigned char SR[4]; member
Dinit.c1840 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[0] | 0x20; in SiS_SetSeqRegs()
1854 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[i - 1]; in SiS_SetSeqRegs()
/linux-4.1.27/drivers/net/ethernet/broadcom/
DKconfig135 bool "Broadcom 578xx and 57712 SR-IOV support"
/linux-4.1.27/arch/m68k/kernel/
Dentry.S263 bclr #7,%sp@(PT_OFF_SR) | clear trace bit in SR
/linux-4.1.27/drivers/rtc/
Drtc-at91sam9.c286 sr = rtt_readl(rtc, SR) & (mr >> 16); in at91_rtc_cache_events()
/linux-4.1.27/drivers/net/ethernet/amd/xgbe/
Dxgbe-dev.c2658 XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RCR, SR, 1); in xgbe_enable_rx()
2694 XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RCR, SR, 0); in xgbe_disable_rx()
2754 XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RCR, SR, 1); in xgbe_powerup_rx()
2769 XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RCR, SR, 0); in xgbe_powerdown_rx()
/linux-4.1.27/drivers/staging/unisys/Documentation/
Doverview.txt11 bus adapters that do not support shared access via SR-IOV. The shared
/linux-4.1.27/Documentation/virtual/kvm/
Dppc-pv.txt96 KVM_MAGIC_FEAT_SR Maps SR registers r/w in the magic page
/linux-4.1.27/Documentation/scsi/
DChangeLog.megaraid_sas25 4. Add Dell PowerEdge VRTX SR-IOV VF device support.
178 4. Use lowest memory bar (for SR-IOV VF support).
/linux-4.1.27/Documentation/devicetree/bindings/clock/
Dat91-clock.txt144 and reflect the bit position in the PMC_ER/DR/SR registers.
/linux-4.1.27/arch/m68k/ifpsp060/src/
Dpfpsp.S2052 # * SR * * SR *
3001 mov.w 0xc(%sp),0x4(%sp) # move SR
3026 mov.l 0x8(%sp),(%sp) # store SR,hi(PC)
Dfpsp.S2053 # * SR * * SR *
3002 mov.w 0xc(%sp),0x4(%sp) # move SR
3027 mov.l 0x8(%sp),(%sp) # store SR,hi(PC)
4372 mov.l 0x2(%sp),(%sp) # shift SR,hi(PC) "down"
4378 mov.l 0x2(%sp),(%sp) # shift SR,hi(PC) "down"
4397 # ** Next PC ** * SR *
4399 # * SR * (4 words)
4406 mov.w EXC_SR(%a6),2+EXC_PC(%a6) # shift SR "up"
/linux-4.1.27/sound/atmel/
Dac97c.c654 u32 sr = ac97c_readl(chip, SR); in atmel_ac97c_interrupt()
/linux-4.1.27/drivers/gpu/drm/i915/
Dintel_pm.c667 reg |= FW_WM(wm, SR); in pineview_update_wm()
857 FW_WM(wm->sr.plane, SR) | in vlv_write_wm_values()
1166 FW_WM(plane_sr, SR) | in g4x_update_wm()
1242 I915_WRITE(DSPFW1, FW_WM(srwm, SR) | in i965_update_wm()
/linux-4.1.27/Documentation/
Dvfio.txt443 still provide isolation. For PCI, SR-IOV Virtual Functions are the
/linux-4.1.27/arch/powerpc/xmon/
Dppc-opc.c482 #define SR SPRG + 1 macro
486 #define STRM SR + 1
3482 { "mtsrd", X(31,82), XRB_MASK|(1<<20), PPC64, { SR, RS } },
3610 { "mtsr", X(31,210), XRB_MASK|(1<<20), COM32, { SR, RS } },
4324 { "mfsr", X(31,595), XRB_MASK|(1<<20), COM32, { RT, SR } },
/linux-4.1.27/drivers/staging/xgifb/
Dvb_setmode.c76 SRdata = XGI330_StandTable.SR[i]; in XGI_SetSeqRegs()