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/linux-4.1.27/Documentation/devicetree/bindings/crypto/
Dfsl-sec2.txt1 Freescale SoC SEC Security Engines versions 2.x-3.x
6 SEC versions, high to low, e.g., "fsl,sec2.1", "fsl,sec2.0"
8 - interrupts : the SEC's interrupt number
15 should be encoded following the SEC's Descriptor Header Dword
19 bit 1 = set if SEC has the ARC4 EU (AFEU)
20 bit 2 = set if SEC has the DES/3DES EU (DEU)
21 bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
22 bit 4 = set if SEC has the random number generator EU (RNG)
23 bit 5 = set if SEC has the public key EU (PKEU)
24 bit 6 = set if SEC has the AES EU (AESU)
[all …]
Dfsl-sec6.txt1 SEC 6 is as Freescale's Cryptographic Accelerator and Assurance Module (CAAM).
2 Currently Freescale powerpc chip C29X is embedded with SEC 6.
3 SEC 6 device tree binding include:
4 -SEC 6 Node
9 SEC 6 Node
13 Node defines the base address of the SEC 6 block.
15 configuration registers for the SEC 6 block.
16 For example, In C293, we could see three SEC 6 node.
28 Definition: A standard property. Define the 'ERA' of the SEC
48 address and length of the SEC 6 configuration registers.
[all …]
Dfsl-sec4.txt2 SEC 4 Device Tree Binding
7 -SEC 4 Node
15 NOTE: the SEC 4 is also known as Freescale's Cryptographic Accelerator
23 SEC 4 h/w can process requests from 2 types of sources.
24 1. DPAA Queue Interface (HW interface between Queue Manager & SEC 4).
25 2. Job Rings (HW interface between cores & SEC 4 registers).
29 HW interface between QM & SEC 4 and also BM & SEC 4, on DPAA-enabled parts
32 SEC version. E.g., the SEC 4.0 in the P4080 has 5 DECOs and can thus
42 SEC 4 Node
46 Node defines the base address of the SEC 4 block.
[all …]
/linux-4.1.27/samples/bpf/
Dtracex2_kern.c13 struct bpf_map_def SEC("maps") my_map = {
23 SEC("kprobe/kfree_skb")
65 struct bpf_map_def SEC("maps") my_hist_map = {
72 SEC("kprobe/sys_write")
85 char _license[] SEC("license") = "GPL";
86 u32 _version SEC("version") = LINUX_VERSION_CODE;
Dtracex4_kern.c17 struct bpf_map_def SEC("maps") my_map = {
27 SEC("kprobe/kmem_cache_free")
36 SEC("kretprobe/kmem_cache_alloc_node")
53 char _license[] SEC("license") = "GPL";
54 u32 _version SEC("version") = LINUX_VERSION_CODE;
Dtracex3_kern.c13 struct bpf_map_def SEC("maps") my_map = {
23 SEC("kprobe/blk_mq_start_request")
44 struct bpf_map_def SEC("maps") lat_map = {
51 SEC("kprobe/blk_update_request")
88 char _license[] SEC("license") = "GPL";
89 u32 _version SEC("version") = LINUX_VERSION_CODE;
Dsockex1_kern.c7 struct bpf_map_def SEC("maps") my_map = {
14 SEC("socket1")
29 char _license[] SEC("license") = "GPL";
Dtracex1_kern.c20 SEC("kprobe/__netif_receive_skb_core")
49 char _license[] SEC("license") = "GPL";
50 u32 _version SEC("version") = LINUX_VERSION_CODE;
Dtcbpf1_kern.c53 SEC("classifier")
67 char _license[] SEC("license") = "GPL";
Dsockex2_kern.c191 struct bpf_map_def SEC("maps") hash_map = {
198 SEC("socket2")
221 char _license[] SEC("license") = "GPL";
Dbpf_helpers.h8 #define SEC(NAME) __attribute__((section(NAME), used)) macro
/linux-4.1.27/drivers/crypto/qat/qat_common/
Dqat_crypto.c57 #define SEC ADF_KERNEL_SEC macro
162 if (adf_cfg_get_param_value(accel_dev, SEC, key, val)) in qat_crypto_create_instances()
179 if (adf_cfg_get_param_value(accel_dev, SEC, key, val)) in qat_crypto_create_instances()
185 if (adf_cfg_get_param_value(accel_dev, SEC, key, val)) in qat_crypto_create_instances()
192 if (adf_cfg_get_param_value(accel_dev, SEC, key, val)) in qat_crypto_create_instances()
201 if (adf_create_ring(accel_dev, SEC, bank, num_msg_sym, in qat_crypto_create_instances()
206 if (adf_create_ring(accel_dev, SEC, bank, num_msg_asym, in qat_crypto_create_instances()
212 if (adf_create_ring(accel_dev, SEC, bank, num_msg_asym, in qat_crypto_create_instances()
218 if (adf_create_ring(accel_dev, SEC, bank, num_msg_sym, in qat_crypto_create_instances()
224 if (adf_create_ring(accel_dev, SEC, bank, num_msg_asym, in qat_crypto_create_instances()
[all …]
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/sec/
Dg98.c52 .handle = NV_ENGCTX(SEC, 0x98),
140 .handle = NV_ENGINE(SEC, 0x98),
/linux-4.1.27/Documentation/dvb/
Dtechnisat.txt51 c.) => "ISL6421 SEC controller"
56 c.) => "ISL6421 SEC controller"
/linux-4.1.27/drivers/media/dvb-frontends/
DKconfig701 comment "SEC control devices for DVB-S"
707 tristate "LNBP21/LNBH24 SEC controllers"
711 An SEC control chips.
714 tristate "LNBP22 SEC controllers"
724 tristate "ISL6405 SEC controller"
728 An SEC control chip.
731 tristate "ISL6421 SEC controller"
735 An SEC control chip.
738 tristate "ISL6423 SEC controller"
742 A SEC controller chip from Intersil
/linux-4.1.27/drivers/staging/lustre/lustre/include/
Dlprocfs_status.h276 OPC_RANGE(SEC) + in opcode_offset()
289 OPC_RANGE(SEC) + in opcode_offset()
311 OPC_RANGE(SEC) + \
313 OPC_RANGE(SEC) + \
/linux-4.1.27/drivers/crypto/
DKconfig210 tristate "Talitos Freescale Security Engine (SEC)"
216 Say 'Y' here to use the Freescale Security Engine (SEC)
219 The Freescale SEC is present on PowerQUICC 'E' processors, such
/linux-4.1.27/drivers/crypto/caam/
DKconfig6 and Assurance Module (CAAM), also known as the SEC version 4 (SEC4).
/linux-4.1.27/arch/powerpc/boot/dts/
Dhaleakala.dts96 0x6 0x4>; /* ECC SEC Error */
Dobs600.dts110 0x6 0x4>; /* ECC SEC Error */
Dmakalu.dts97 0x6 0x4 /* ECC SEC Error */ >;
Dkilauea.dts106 0x6 0x4>; /* ECC SEC Error */
/linux-4.1.27/drivers/net/ethernet/intel/e1000e/
Dmac.c376 er32(SEC); in e1000e_clear_hw_cntrs_base()
/linux-4.1.27/arch/blackfin/mach-bf609/
DKconfig13 int "SEC interrupt priority levels"
/linux-4.1.27/drivers/net/ethernet/intel/e1000/
De1000_hw.c4712 temp = er32(SEC); in e1000_clear_hw_cntrs()
De1000_main.c3654 adapter->stats.sec += er32(SEC); in e1000_update_stats()
/linux-4.1.27/
DCREDITS3572 S: 2F 14 ALY 31 LN 166 SEC 1 SHIH-PEI RD